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1 | 3475187d | bellard | /*
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2 | c7ba218d | blueswir1 | * QEMU Sun4u/Sun4v System Emulator
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3 | 5fafdf24 | ths | *
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4 | 3475187d | bellard | * Copyright (c) 2005 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 3475187d | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 3475187d | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 3475187d | bellard | * in the Software without restriction, including without limitation the rights
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9 | 3475187d | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 3475187d | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 3475187d | bellard | * furnished to do so, subject to the following conditions:
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12 | 3475187d | bellard | *
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13 | 3475187d | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 3475187d | bellard | * all copies or substantial portions of the Software.
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15 | 3475187d | bellard | *
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16 | 3475187d | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 3475187d | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 3475187d | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 3475187d | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 3475187d | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 3475187d | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 3475187d | bellard | * THE SOFTWARE.
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23 | 3475187d | bellard | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pci.h" |
26 | 87ecb68b | pbrook | #include "pc.h" |
27 | 87ecb68b | pbrook | #include "nvram.h" |
28 | 87ecb68b | pbrook | #include "fdc.h" |
29 | 87ecb68b | pbrook | #include "net.h" |
30 | 87ecb68b | pbrook | #include "qemu-timer.h" |
31 | 87ecb68b | pbrook | #include "sysemu.h" |
32 | 87ecb68b | pbrook | #include "boards.h" |
33 | d2c63fc1 | blueswir1 | #include "firmware_abi.h" |
34 | 3cce6243 | blueswir1 | #include "fw_cfg.h" |
35 | 3475187d | bellard | |
36 | 83469015 | bellard | #define KERNEL_LOAD_ADDR 0x00404000 |
37 | 83469015 | bellard | #define CMDLINE_ADDR 0x003ff000 |
38 | 83469015 | bellard | #define INITRD_LOAD_ADDR 0x00300000 |
39 | ac2e9d66 | blueswir1 | #define PROM_SIZE_MAX (4 * 1024 * 1024) |
40 | f930d07e | blueswir1 | #define PROM_ADDR 0x1fff0000000ULL |
41 | f930d07e | blueswir1 | #define PROM_VADDR 0x000ffd00000ULL |
42 | 83469015 | bellard | #define APB_SPECIAL_BASE 0x1fe00000000ULL |
43 | f930d07e | blueswir1 | #define APB_MEM_BASE 0x1ff00000000ULL |
44 | f930d07e | blueswir1 | #define VGA_BASE (APB_MEM_BASE + 0x400000ULL) |
45 | f930d07e | blueswir1 | #define PROM_FILENAME "openbios-sparc64" |
46 | 83469015 | bellard | #define NVRAM_SIZE 0x2000 |
47 | e4bcb14c | ths | #define MAX_IDE_BUS 2 |
48 | 3cce6243 | blueswir1 | #define BIOS_CFG_IOPORT 0x510 |
49 | 3475187d | bellard | |
50 | c7ba218d | blueswir1 | struct hwdef {
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51 | c7ba218d | blueswir1 | const char * const default_cpu_model; |
52 | c7ba218d | blueswir1 | }; |
53 | c7ba218d | blueswir1 | |
54 | 3475187d | bellard | int DMA_get_channel_mode (int nchan) |
55 | 3475187d | bellard | { |
56 | 3475187d | bellard | return 0; |
57 | 3475187d | bellard | } |
58 | 3475187d | bellard | int DMA_read_memory (int nchan, void *buf, int pos, int size) |
59 | 3475187d | bellard | { |
60 | 3475187d | bellard | return 0; |
61 | 3475187d | bellard | } |
62 | 3475187d | bellard | int DMA_write_memory (int nchan, void *buf, int pos, int size) |
63 | 3475187d | bellard | { |
64 | 3475187d | bellard | return 0; |
65 | 3475187d | bellard | } |
66 | 3475187d | bellard | void DMA_hold_DREQ (int nchan) {} |
67 | 3475187d | bellard | void DMA_release_DREQ (int nchan) {} |
68 | 3475187d | bellard | void DMA_schedule(int nchan) {} |
69 | 3475187d | bellard | void DMA_run (void) {} |
70 | 3475187d | bellard | void DMA_init (int high_page_enable) {} |
71 | 3475187d | bellard | void DMA_register_channel (int nchan, |
72 | 3475187d | bellard | DMA_transfer_handler transfer_handler, |
73 | 3475187d | bellard | void *opaque)
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74 | 3475187d | bellard | { |
75 | 3475187d | bellard | } |
76 | 3475187d | bellard | |
77 | 81864572 | blueswir1 | static int nvram_boot_set(void *opaque, const char *boot_device) |
78 | 81864572 | blueswir1 | { |
79 | 81864572 | blueswir1 | unsigned int i; |
80 | 81864572 | blueswir1 | uint8_t image[sizeof(ohwcfg_v3_t)];
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81 | 81864572 | blueswir1 | ohwcfg_v3_t *header = (ohwcfg_v3_t *)ℑ |
82 | 81864572 | blueswir1 | m48t59_t *nvram = (m48t59_t *)opaque; |
83 | 81864572 | blueswir1 | |
84 | 81864572 | blueswir1 | for (i = 0; i < sizeof(image); i++) |
85 | 81864572 | blueswir1 | image[i] = m48t59_read(nvram, i) & 0xff;
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86 | 81864572 | blueswir1 | |
87 | 363a37d5 | blueswir1 | pstrcpy((char *)header->boot_devices, sizeof(header->boot_devices), |
88 | 363a37d5 | blueswir1 | boot_device); |
89 | 81864572 | blueswir1 | header->nboot_devices = strlen(boot_device) & 0xff;
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90 | 81864572 | blueswir1 | header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8)); |
91 | 81864572 | blueswir1 | |
92 | 81864572 | blueswir1 | for (i = 0; i < sizeof(image); i++) |
93 | 81864572 | blueswir1 | m48t59_write(nvram, i, image[i]); |
94 | 81864572 | blueswir1 | |
95 | 81864572 | blueswir1 | return 0; |
96 | 81864572 | blueswir1 | } |
97 | 81864572 | blueswir1 | |
98 | 3475187d | bellard | extern int nographic; |
99 | 3475187d | bellard | |
100 | d2c63fc1 | blueswir1 | static int sun4u_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, |
101 | e7fb1406 | blueswir1 | const char *arch, |
102 | 77f193da | blueswir1 | ram_addr_t RAM_size, |
103 | 77f193da | blueswir1 | const char *boot_devices, |
104 | d2c63fc1 | blueswir1 | uint32_t kernel_image, uint32_t kernel_size, |
105 | d2c63fc1 | blueswir1 | const char *cmdline, |
106 | d2c63fc1 | blueswir1 | uint32_t initrd_image, uint32_t initrd_size, |
107 | d2c63fc1 | blueswir1 | uint32_t NVRAM_image, |
108 | 0d31cb99 | blueswir1 | int width, int height, int depth, |
109 | 0d31cb99 | blueswir1 | const uint8_t *macaddr)
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110 | 83469015 | bellard | { |
111 | 66508601 | blueswir1 | unsigned int i; |
112 | 66508601 | blueswir1 | uint32_t start, end; |
113 | d2c63fc1 | blueswir1 | uint8_t image[0x1ff0];
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114 | d2c63fc1 | blueswir1 | ohwcfg_v3_t *header = (ohwcfg_v3_t *)ℑ |
115 | d2c63fc1 | blueswir1 | struct sparc_arch_cfg *sparc_header;
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116 | d2c63fc1 | blueswir1 | struct OpenBIOS_nvpart_v1 *part_header;
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117 | d2c63fc1 | blueswir1 | |
118 | d2c63fc1 | blueswir1 | memset(image, '\0', sizeof(image)); |
119 | d2c63fc1 | blueswir1 | |
120 | d2c63fc1 | blueswir1 | // Try to match PPC NVRAM
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121 | 363a37d5 | blueswir1 | pstrcpy((char *)header->struct_ident, sizeof(header->struct_ident), |
122 | 363a37d5 | blueswir1 | "QEMU_BIOS");
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123 | d2c63fc1 | blueswir1 | header->struct_version = cpu_to_be32(3); /* structure v3 */ |
124 | d2c63fc1 | blueswir1 | |
125 | d2c63fc1 | blueswir1 | header->nvram_size = cpu_to_be16(NVRAM_size); |
126 | d2c63fc1 | blueswir1 | header->nvram_arch_ptr = cpu_to_be16(sizeof(ohwcfg_v3_t));
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127 | d2c63fc1 | blueswir1 | header->nvram_arch_size = cpu_to_be16(sizeof(struct sparc_arch_cfg)); |
128 | 363a37d5 | blueswir1 | pstrcpy((char *)header->arch, sizeof(header->arch), arch); |
129 | d2c63fc1 | blueswir1 | header->nb_cpus = smp_cpus & 0xff;
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130 | d2c63fc1 | blueswir1 | header->RAM0_base = 0;
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131 | d2c63fc1 | blueswir1 | header->RAM0_size = cpu_to_be64((uint64_t)RAM_size); |
132 | 363a37d5 | blueswir1 | pstrcpy((char *)header->boot_devices, sizeof(header->boot_devices), |
133 | 363a37d5 | blueswir1 | boot_devices); |
134 | d2c63fc1 | blueswir1 | header->nboot_devices = strlen(boot_devices) & 0xff;
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135 | d2c63fc1 | blueswir1 | header->kernel_image = cpu_to_be64((uint64_t)kernel_image); |
136 | d2c63fc1 | blueswir1 | header->kernel_size = cpu_to_be64((uint64_t)kernel_size); |
137 | 3475187d | bellard | if (cmdline) {
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138 | 293f78bc | blueswir1 | pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, cmdline); |
139 | d2c63fc1 | blueswir1 | header->cmdline = cpu_to_be64((uint64_t)CMDLINE_ADDR); |
140 | d2c63fc1 | blueswir1 | header->cmdline_size = cpu_to_be64((uint64_t)strlen(cmdline)); |
141 | 3475187d | bellard | } |
142 | d2c63fc1 | blueswir1 | header->initrd_image = cpu_to_be64((uint64_t)initrd_image); |
143 | d2c63fc1 | blueswir1 | header->initrd_size = cpu_to_be64((uint64_t)initrd_size); |
144 | d2c63fc1 | blueswir1 | header->NVRAM_image = cpu_to_be64((uint64_t)NVRAM_image); |
145 | d2c63fc1 | blueswir1 | |
146 | d2c63fc1 | blueswir1 | header->width = cpu_to_be16(width); |
147 | d2c63fc1 | blueswir1 | header->height = cpu_to_be16(height); |
148 | d2c63fc1 | blueswir1 | header->depth = cpu_to_be16(depth); |
149 | d2c63fc1 | blueswir1 | if (nographic)
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150 | d2c63fc1 | blueswir1 | header->graphic_flags = cpu_to_be16(OHW_GF_NOGRAPHICS); |
151 | 83469015 | bellard | |
152 | d2c63fc1 | blueswir1 | header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8)); |
153 | d2c63fc1 | blueswir1 | |
154 | d2c63fc1 | blueswir1 | // Architecture specific header
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155 | d2c63fc1 | blueswir1 | start = sizeof(ohwcfg_v3_t);
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156 | d2c63fc1 | blueswir1 | sparc_header = (struct sparc_arch_cfg *)&image[start];
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157 | d2c63fc1 | blueswir1 | sparc_header->valid = 0;
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158 | d2c63fc1 | blueswir1 | start += sizeof(struct sparc_arch_cfg); |
159 | 83469015 | bellard | |
160 | 66508601 | blueswir1 | // OpenBIOS nvram variables
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161 | 66508601 | blueswir1 | // Variable partition
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162 | d2c63fc1 | blueswir1 | part_header = (struct OpenBIOS_nvpart_v1 *)&image[start];
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163 | d2c63fc1 | blueswir1 | part_header->signature = OPENBIOS_PART_SYSTEM; |
164 | 363a37d5 | blueswir1 | pstrcpy(part_header->name, sizeof(part_header->name), "system"); |
165 | 66508601 | blueswir1 | |
166 | d2c63fc1 | blueswir1 | end = start + sizeof(struct OpenBIOS_nvpart_v1); |
167 | 66508601 | blueswir1 | for (i = 0; i < nb_prom_envs; i++) |
168 | d2c63fc1 | blueswir1 | end = OpenBIOS_set_var(image, end, prom_envs[i]); |
169 | d2c63fc1 | blueswir1 | |
170 | d2c63fc1 | blueswir1 | // End marker
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171 | d2c63fc1 | blueswir1 | image[end++] = '\0';
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172 | 66508601 | blueswir1 | |
173 | 66508601 | blueswir1 | end = start + ((end - start + 15) & ~15); |
174 | d2c63fc1 | blueswir1 | OpenBIOS_finish_partition(part_header, end - start); |
175 | 66508601 | blueswir1 | |
176 | 66508601 | blueswir1 | // free partition
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177 | 66508601 | blueswir1 | start = end; |
178 | d2c63fc1 | blueswir1 | part_header = (struct OpenBIOS_nvpart_v1 *)&image[start];
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179 | d2c63fc1 | blueswir1 | part_header->signature = OPENBIOS_PART_FREE; |
180 | 363a37d5 | blueswir1 | pstrcpy(part_header->name, sizeof(part_header->name), "free"); |
181 | 66508601 | blueswir1 | |
182 | 66508601 | blueswir1 | end = 0x1fd0;
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183 | d2c63fc1 | blueswir1 | OpenBIOS_finish_partition(part_header, end - start); |
184 | d2c63fc1 | blueswir1 | |
185 | 0d31cb99 | blueswir1 | Sun_init_header((struct Sun_nvram *)&image[0x1fd8], macaddr, 0x80); |
186 | 0d31cb99 | blueswir1 | |
187 | d2c63fc1 | blueswir1 | for (i = 0; i < sizeof(image); i++) |
188 | d2c63fc1 | blueswir1 | m48t59_write(nvram, i, image[i]); |
189 | 66508601 | blueswir1 | |
190 | 81864572 | blueswir1 | qemu_register_boot_set(nvram_boot_set, nvram); |
191 | 81864572 | blueswir1 | |
192 | 83469015 | bellard | return 0; |
193 | 3475187d | bellard | } |
194 | 3475187d | bellard | |
195 | 22548760 | blueswir1 | void pic_info(void) |
196 | 3475187d | bellard | { |
197 | 3475187d | bellard | } |
198 | 3475187d | bellard | |
199 | 22548760 | blueswir1 | void irq_info(void) |
200 | 3475187d | bellard | { |
201 | 3475187d | bellard | } |
202 | 3475187d | bellard | |
203 | 83469015 | bellard | void qemu_system_powerdown(void) |
204 | 3475187d | bellard | { |
205 | 3475187d | bellard | } |
206 | 3475187d | bellard | |
207 | c68ea704 | bellard | static void main_cpu_reset(void *opaque) |
208 | c68ea704 | bellard | { |
209 | c68ea704 | bellard | CPUState *env = opaque; |
210 | 20c9f095 | blueswir1 | |
211 | c68ea704 | bellard | cpu_reset(env); |
212 | 20c9f095 | blueswir1 | ptimer_set_limit(env->tick, 0x7fffffffffffffffULL, 1); |
213 | 20c9f095 | blueswir1 | ptimer_run(env->tick, 0);
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214 | 20c9f095 | blueswir1 | ptimer_set_limit(env->stick, 0x7fffffffffffffffULL, 1); |
215 | 20c9f095 | blueswir1 | ptimer_run(env->stick, 0);
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216 | 20c9f095 | blueswir1 | ptimer_set_limit(env->hstick, 0x7fffffffffffffffULL, 1); |
217 | 20c9f095 | blueswir1 | ptimer_run(env->hstick, 0);
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218 | 20c9f095 | blueswir1 | } |
219 | 20c9f095 | blueswir1 | |
220 | 22548760 | blueswir1 | static void tick_irq(void *opaque) |
221 | 20c9f095 | blueswir1 | { |
222 | 20c9f095 | blueswir1 | CPUState *env = opaque; |
223 | 20c9f095 | blueswir1 | |
224 | 20c9f095 | blueswir1 | cpu_interrupt(env, CPU_INTERRUPT_TIMER); |
225 | 20c9f095 | blueswir1 | } |
226 | 20c9f095 | blueswir1 | |
227 | 22548760 | blueswir1 | static void stick_irq(void *opaque) |
228 | 20c9f095 | blueswir1 | { |
229 | 20c9f095 | blueswir1 | CPUState *env = opaque; |
230 | 20c9f095 | blueswir1 | |
231 | 20c9f095 | blueswir1 | cpu_interrupt(env, CPU_INTERRUPT_TIMER); |
232 | 20c9f095 | blueswir1 | } |
233 | 20c9f095 | blueswir1 | |
234 | 22548760 | blueswir1 | static void hstick_irq(void *opaque) |
235 | 20c9f095 | blueswir1 | { |
236 | 20c9f095 | blueswir1 | CPUState *env = opaque; |
237 | 20c9f095 | blueswir1 | |
238 | 20c9f095 | blueswir1 | cpu_interrupt(env, CPU_INTERRUPT_TIMER); |
239 | c68ea704 | bellard | } |
240 | c68ea704 | bellard | |
241 | f19e918d | blueswir1 | static void dummy_cpu_set_irq(void *opaque, int irq, int level) |
242 | f19e918d | blueswir1 | { |
243 | f19e918d | blueswir1 | } |
244 | f19e918d | blueswir1 | |
245 | 83469015 | bellard | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
246 | 83469015 | bellard | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
247 | 83469015 | bellard | static const int ide_irq[2] = { 14, 15 }; |
248 | 3475187d | bellard | |
249 | 83469015 | bellard | static const int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
250 | 83469015 | bellard | static const int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
251 | 83469015 | bellard | |
252 | 83469015 | bellard | static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
253 | 83469015 | bellard | static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
254 | 83469015 | bellard | |
255 | 83469015 | bellard | static fdctrl_t *floppy_controller;
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256 | 3475187d | bellard | |
257 | c7ba218d | blueswir1 | static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size, |
258 | c7ba218d | blueswir1 | const char *boot_devices, DisplayState *ds, |
259 | c7ba218d | blueswir1 | const char *kernel_filename, const char *kernel_cmdline, |
260 | c7ba218d | blueswir1 | const char *initrd_filename, const char *cpu_model, |
261 | c7ba218d | blueswir1 | const struct hwdef *hwdef) |
262 | 3475187d | bellard | { |
263 | c68ea704 | bellard | CPUState *env; |
264 | 3475187d | bellard | char buf[1024]; |
265 | 83469015 | bellard | m48t59_t *nvram; |
266 | 3475187d | bellard | int ret, linux_boot;
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267 | 3475187d | bellard | unsigned int i; |
268 | 83469015 | bellard | long prom_offset, initrd_size, kernel_size;
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269 | 83469015 | bellard | PCIBus *pci_bus; |
270 | 20c9f095 | blueswir1 | QEMUBH *bh; |
271 | f19e918d | blueswir1 | qemu_irq *irq; |
272 | 22548760 | blueswir1 | int drive_index;
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273 | e4bcb14c | ths | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
274 | e4bcb14c | ths | BlockDriverState *fd[MAX_FD]; |
275 | 3cce6243 | blueswir1 | void *fw_cfg;
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276 | 3475187d | bellard | |
277 | 3475187d | bellard | linux_boot = (kernel_filename != NULL);
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278 | 3475187d | bellard | |
279 | 62724a37 | blueswir1 | /* init CPUs */
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280 | c7ba218d | blueswir1 | if (!cpu_model)
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281 | c7ba218d | blueswir1 | cpu_model = hwdef->default_cpu_model; |
282 | c7ba218d | blueswir1 | |
283 | aaed909a | bellard | env = cpu_init(cpu_model); |
284 | aaed909a | bellard | if (!env) {
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285 | 62724a37 | blueswir1 | fprintf(stderr, "Unable to find Sparc CPU definition\n");
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286 | 62724a37 | blueswir1 | exit(1);
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287 | 62724a37 | blueswir1 | } |
288 | 20c9f095 | blueswir1 | bh = qemu_bh_new(tick_irq, env); |
289 | 20c9f095 | blueswir1 | env->tick = ptimer_init(bh); |
290 | 20c9f095 | blueswir1 | ptimer_set_period(env->tick, 1ULL);
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291 | 20c9f095 | blueswir1 | |
292 | 20c9f095 | blueswir1 | bh = qemu_bh_new(stick_irq, env); |
293 | 20c9f095 | blueswir1 | env->stick = ptimer_init(bh); |
294 | 20c9f095 | blueswir1 | ptimer_set_period(env->stick, 1ULL);
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295 | 20c9f095 | blueswir1 | |
296 | 20c9f095 | blueswir1 | bh = qemu_bh_new(hstick_irq, env); |
297 | 20c9f095 | blueswir1 | env->hstick = ptimer_init(bh); |
298 | 20c9f095 | blueswir1 | ptimer_set_period(env->hstick, 1ULL);
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299 | c68ea704 | bellard | qemu_register_reset(main_cpu_reset, env); |
300 | 20c9f095 | blueswir1 | main_cpu_reset(env); |
301 | c68ea704 | bellard | |
302 | 3475187d | bellard | /* allocate RAM */
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303 | 22548760 | blueswir1 | cpu_register_physical_memory(0, RAM_size, 0); |
304 | 3475187d | bellard | |
305 | 22548760 | blueswir1 | prom_offset = RAM_size + vga_ram_size; |
306 | 5fafdf24 | ths | cpu_register_physical_memory(PROM_ADDR, |
307 | 77f193da | blueswir1 | (PROM_SIZE_MAX + TARGET_PAGE_SIZE) & |
308 | 77f193da | blueswir1 | TARGET_PAGE_MASK, |
309 | b3783731 | bellard | prom_offset | IO_MEM_ROM); |
310 | 3475187d | bellard | |
311 | 1192dad8 | j_mayer | if (bios_name == NULL) |
312 | 1192dad8 | j_mayer | bios_name = PROM_FILENAME; |
313 | 1192dad8 | j_mayer | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
314 | f19e918d | blueswir1 | ret = load_elf(buf, PROM_ADDR - PROM_VADDR, NULL, NULL, NULL); |
315 | 3475187d | bellard | if (ret < 0) { |
316 | f930d07e | blueswir1 | fprintf(stderr, "qemu: could not load prom '%s'\n",
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317 | f930d07e | blueswir1 | buf); |
318 | f930d07e | blueswir1 | exit(1);
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319 | 3475187d | bellard | } |
320 | 3475187d | bellard | |
321 | 3475187d | bellard | kernel_size = 0;
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322 | 83469015 | bellard | initrd_size = 0;
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323 | 3475187d | bellard | if (linux_boot) {
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324 | b3783731 | bellard | /* XXX: put correct offset */
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325 | 74287114 | ths | kernel_size = load_elf(kernel_filename, 0, NULL, NULL, NULL); |
326 | 3475187d | bellard | if (kernel_size < 0) |
327 | 293f78bc | blueswir1 | kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR, |
328 | 293f78bc | blueswir1 | ram_size - KERNEL_LOAD_ADDR); |
329 | f930d07e | blueswir1 | if (kernel_size < 0) |
330 | 293f78bc | blueswir1 | kernel_size = load_image_targphys(kernel_filename, |
331 | 293f78bc | blueswir1 | KERNEL_LOAD_ADDR, |
332 | 293f78bc | blueswir1 | ram_size - KERNEL_LOAD_ADDR); |
333 | 3475187d | bellard | if (kernel_size < 0) { |
334 | 5fafdf24 | ths | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
335 | 3475187d | bellard | kernel_filename); |
336 | f930d07e | blueswir1 | exit(1);
|
337 | 3475187d | bellard | } |
338 | 3475187d | bellard | |
339 | 3475187d | bellard | /* load initrd */
|
340 | 3475187d | bellard | if (initrd_filename) {
|
341 | 293f78bc | blueswir1 | initrd_size = load_image_targphys(initrd_filename, |
342 | 293f78bc | blueswir1 | INITRD_LOAD_ADDR, |
343 | 293f78bc | blueswir1 | ram_size - INITRD_LOAD_ADDR); |
344 | 3475187d | bellard | if (initrd_size < 0) { |
345 | 5fafdf24 | ths | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
346 | 3475187d | bellard | initrd_filename); |
347 | 3475187d | bellard | exit(1);
|
348 | 3475187d | bellard | } |
349 | 3475187d | bellard | } |
350 | 3475187d | bellard | if (initrd_size > 0) { |
351 | f930d07e | blueswir1 | for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { |
352 | 293f78bc | blueswir1 | if (ldl_phys(KERNEL_LOAD_ADDR + i) == 0x48647253) { // HdrS |
353 | 293f78bc | blueswir1 | stl_phys(KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR);
|
354 | 293f78bc | blueswir1 | stl_phys(KERNEL_LOAD_ADDR + i + 20, initrd_size);
|
355 | f930d07e | blueswir1 | break;
|
356 | f930d07e | blueswir1 | } |
357 | f930d07e | blueswir1 | } |
358 | 3475187d | bellard | } |
359 | 3475187d | bellard | } |
360 | 502a5395 | pbrook | pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
|
361 | 83469015 | bellard | isa_mem_base = VGA_BASE; |
362 | 77f193da | blueswir1 | pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + RAM_size, RAM_size, |
363 | 77f193da | blueswir1 | vga_ram_size); |
364 | 83469015 | bellard | |
365 | 83469015 | bellard | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
366 | 83469015 | bellard | if (serial_hds[i]) {
|
367 | cbf5c748 | blueswir1 | serial_init(serial_io[i], NULL/*serial_irq[i]*/, 115200, |
368 | cbf5c748 | blueswir1 | serial_hds[i]); |
369 | 83469015 | bellard | } |
370 | 83469015 | bellard | } |
371 | 83469015 | bellard | |
372 | 83469015 | bellard | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
373 | 83469015 | bellard | if (parallel_hds[i]) {
|
374 | 77f193da | blueswir1 | parallel_init(parallel_io[i], NULL/*parallel_irq[i]*/, |
375 | 77f193da | blueswir1 | parallel_hds[i]); |
376 | 83469015 | bellard | } |
377 | 83469015 | bellard | } |
378 | 83469015 | bellard | |
379 | 83469015 | bellard | for(i = 0; i < nb_nics; i++) { |
380 | a41b2ff2 | pbrook | if (!nd_table[i].model)
|
381 | a41b2ff2 | pbrook | nd_table[i].model = "ne2k_pci";
|
382 | f930d07e | blueswir1 | pci_nic_init(pci_bus, &nd_table[i], -1);
|
383 | 83469015 | bellard | } |
384 | 83469015 | bellard | |
385 | f19e918d | blueswir1 | irq = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, 32); |
386 | e4bcb14c | ths | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
|
387 | e4bcb14c | ths | fprintf(stderr, "qemu: too many IDE bus\n");
|
388 | e4bcb14c | ths | exit(1);
|
389 | e4bcb14c | ths | } |
390 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { |
391 | 22548760 | blueswir1 | drive_index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, |
392 | 22548760 | blueswir1 | i % MAX_IDE_DEVS); |
393 | 22548760 | blueswir1 | if (drive_index != -1) |
394 | 22548760 | blueswir1 | hd[i] = drives_table[drive_index].bdrv; |
395 | e4bcb14c | ths | else
|
396 | e4bcb14c | ths | hd[i] = NULL;
|
397 | e4bcb14c | ths | } |
398 | e4bcb14c | ths | |
399 | e4bcb14c | ths | // XXX pci_cmd646_ide_init(pci_bus, hd, 1);
|
400 | e4bcb14c | ths | pci_piix3_ide_init(pci_bus, hd, -1, irq);
|
401 | d537cf6c | pbrook | /* FIXME: wire up interrupts. */
|
402 | d537cf6c | pbrook | i8042_init(NULL/*1*/, NULL/*12*/, 0x60); |
403 | e4bcb14c | ths | for(i = 0; i < MAX_FD; i++) { |
404 | 22548760 | blueswir1 | drive_index = drive_get_index(IF_FLOPPY, 0, i);
|
405 | 22548760 | blueswir1 | if (drive_index != -1) |
406 | 22548760 | blueswir1 | fd[i] = drives_table[drive_index].bdrv; |
407 | e4bcb14c | ths | else
|
408 | e4bcb14c | ths | fd[i] = NULL;
|
409 | e4bcb14c | ths | } |
410 | e4bcb14c | ths | floppy_controller = fdctrl_init(NULL/*6*/, 2, 0, 0x3f0, fd); |
411 | d537cf6c | pbrook | nvram = m48t59_init(NULL/*8*/, 0, 0x0074, NVRAM_SIZE, 59); |
412 | 22548760 | blueswir1 | sun4u_NVRAM_set_params(nvram, NVRAM_SIZE, "Sun4u", RAM_size, boot_devices,
|
413 | 0d31cb99 | blueswir1 | KERNEL_LOAD_ADDR, kernel_size, |
414 | 0d31cb99 | blueswir1 | kernel_cmdline, |
415 | 0d31cb99 | blueswir1 | INITRD_LOAD_ADDR, initrd_size, |
416 | 0d31cb99 | blueswir1 | /* XXX: need an option to load a NVRAM image */
|
417 | 0d31cb99 | blueswir1 | 0,
|
418 | 0d31cb99 | blueswir1 | graphic_width, graphic_height, graphic_depth, |
419 | 0d31cb99 | blueswir1 | (uint8_t *)&nd_table[0].macaddr);
|
420 | 83469015 | bellard | |
421 | 3cce6243 | blueswir1 | fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); |
422 | 3cce6243 | blueswir1 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
423 | 3475187d | bellard | } |
424 | 3475187d | bellard | |
425 | c7ba218d | blueswir1 | static const struct hwdef hwdefs[] = { |
426 | c7ba218d | blueswir1 | /* Sun4u generic PC-like machine */
|
427 | c7ba218d | blueswir1 | { |
428 | c7ba218d | blueswir1 | .default_cpu_model = "TI UltraSparc II",
|
429 | c7ba218d | blueswir1 | }, |
430 | c7ba218d | blueswir1 | /* Sun4v generic PC-like machine */
|
431 | c7ba218d | blueswir1 | { |
432 | c7ba218d | blueswir1 | .default_cpu_model = "Sun UltraSparc T1",
|
433 | c7ba218d | blueswir1 | }, |
434 | c7ba218d | blueswir1 | }; |
435 | c7ba218d | blueswir1 | |
436 | c7ba218d | blueswir1 | /* Sun4u hardware initialisation */
|
437 | c7ba218d | blueswir1 | static void sun4u_init(ram_addr_t RAM_size, int vga_ram_size, |
438 | c7ba218d | blueswir1 | const char *boot_devices, DisplayState *ds, |
439 | c7ba218d | blueswir1 | const char *kernel_filename, const char *kernel_cmdline, |
440 | c7ba218d | blueswir1 | const char *initrd_filename, const char *cpu_model) |
441 | c7ba218d | blueswir1 | { |
442 | c7ba218d | blueswir1 | sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename, |
443 | c7ba218d | blueswir1 | kernel_cmdline, initrd_filename, cpu_model, &hwdefs[0]);
|
444 | c7ba218d | blueswir1 | } |
445 | c7ba218d | blueswir1 | |
446 | c7ba218d | blueswir1 | /* Sun4v hardware initialisation */
|
447 | c7ba218d | blueswir1 | static void sun4v_init(ram_addr_t RAM_size, int vga_ram_size, |
448 | c7ba218d | blueswir1 | const char *boot_devices, DisplayState *ds, |
449 | c7ba218d | blueswir1 | const char *kernel_filename, const char *kernel_cmdline, |
450 | c7ba218d | blueswir1 | const char *initrd_filename, const char *cpu_model) |
451 | c7ba218d | blueswir1 | { |
452 | c7ba218d | blueswir1 | sun4uv_init(RAM_size, vga_ram_size, boot_devices, ds, kernel_filename, |
453 | c7ba218d | blueswir1 | kernel_cmdline, initrd_filename, cpu_model, &hwdefs[1]);
|
454 | c7ba218d | blueswir1 | } |
455 | c7ba218d | blueswir1 | |
456 | 3475187d | bellard | QEMUMachine sun4u_machine = { |
457 | 66de733b | blueswir1 | .name = "sun4u",
|
458 | 66de733b | blueswir1 | .desc = "Sun4u platform",
|
459 | 66de733b | blueswir1 | .init = sun4u_init, |
460 | 66de733b | blueswir1 | .ram_require = PROM_SIZE_MAX + VGA_RAM_SIZE, |
461 | f88e4b91 | blueswir1 | .nodisk_ok = 1,
|
462 | 3475187d | bellard | }; |
463 | c7ba218d | blueswir1 | |
464 | c7ba218d | blueswir1 | QEMUMachine sun4v_machine = { |
465 | 66de733b | blueswir1 | .name = "sun4v",
|
466 | 66de733b | blueswir1 | .desc = "Sun4v platform",
|
467 | 66de733b | blueswir1 | .init = sun4v_init, |
468 | 66de733b | blueswir1 | .ram_require = PROM_SIZE_MAX + VGA_RAM_SIZE, |
469 | f88e4b91 | blueswir1 | .nodisk_ok = 1,
|
470 | c7ba218d | blueswir1 | }; |