Revision 3d596f49

b/target-s390x/helper.h
99 99
DEF_HELPER_FLAGS_2(iske, TCG_CALL_NO_RWG_SE, i64, env, i64)
100 100
DEF_HELPER_FLAGS_3(sske, TCG_CALL_NO_RWG, void, env, i64, i64)
101 101
DEF_HELPER_FLAGS_2(rrbe, TCG_CALL_NO_RWG, i32, env, i64)
102
DEF_HELPER_3(csp, i32, env, i32, i32)
102
DEF_HELPER_3(csp, i32, env, i32, i64)
103 103
DEF_HELPER_4(mvcs, i32, env, i64, i64, i64)
104 104
DEF_HELPER_4(mvcp, i32, env, i64, i64, i64)
105 105
DEF_HELPER_4(sigp, i32, env, i64, i32, i64)
b/target-s390x/insn-data.def
614 614
    C(0xf300, UNPK,    SS_a,  Z,   la1, a2, 0, 0, unpk, 0)
615 615

  
616 616
#ifndef CONFIG_USER_ONLY
617
/* COMPARE AND SWAP AND PURGE */
618
    C(0xb250, CSP,     RRE,   Z,   0, ra2, 0, 0, csp, 0)
617 619
/* DIAGNOSE (KVM hypercall) */
618 620
    C(0x8300, DIAG,    RX_a,  Z,   0, 0, 0, 0, diag, 0)
619 621
/* INSERT STORAGE KEY EXTENDED */
b/target-s390x/mem_helper.c
984 984
}
985 985

  
986 986
/* compare and swap and purge */
987
uint32_t HELPER(csp)(CPUS390XState *env, uint32_t r1, uint32_t r2)
987
uint32_t HELPER(csp)(CPUS390XState *env, uint32_t r1, uint64_t r2)
988 988
{
989 989
    uint32_t cc;
990 990
    uint32_t o1 = env->regs[r1];
991
    uint64_t a2 = get_address_31fix(env, r2) & ~3ULL;
991
    uint64_t a2 = r2 & ~3ULL;
992 992
    uint32_t o2 = cpu_ldl_data(env, a2);
993 993

  
994 994
    if (o1 == o2) {
995 995
        cpu_stl_data(env, a2, env->regs[(r1 + 1) & 15]);
996
        if (env->regs[r2] & 0x3) {
996
        if (r2 & 0x3) {
997 997
            /* flush TLB / ALB */
998 998
            tlb_flush(env, 1);
999 999
        }
b/target-s390x/translate.c
1033 1033
    LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2);
1034 1034

  
1035 1035
    switch (op) {
1036
    case 0x50: /* CSP      R1,R2      [RRE] */
1037
        /* Compare And Swap And Purge */
1038
        check_privileged(s);
1039
        r1 = (insn >> 4) & 0xf;
1040
        r2 = insn & 0xf;
1041
        tmp32_1 = tcg_const_i32(r1);
1042
        tmp32_2 = tcg_const_i32(r2);
1043
        gen_helper_csp(cc_op, cpu_env, tmp32_1, tmp32_2);
1044
        set_cc_static(s);
1045
        tcg_temp_free_i32(tmp32_1);
1046
        tcg_temp_free_i32(tmp32_2);
1047
        break;
1048 1036
    case 0x78: /* STCKE    D2(B2)     [S] */
1049 1037
        /* Store Clock Extended */
1050 1038
        decode_rs(s, insn, &r1, &r3, &b2, &d2);
......
1901 1889
    return NO_EXIT;
1902 1890
}
1903 1891

  
1892
#ifndef CONFIG_USER_ONLY
1893
static ExitStatus op_csp(DisasContext *s, DisasOps *o)
1894
{
1895
    TCGv_i32 r1 = tcg_const_i32(get_field(s->fields, r1));
1896
    check_privileged(s);
1897
    gen_helper_csp(cc_op, cpu_env, r1, o->in2);
1898
    tcg_temp_free_i32(r1);
1899
    set_cc_static(s);
1900
    return NO_EXIT;
1901
}
1902
#endif
1903

  
1904 1904
static ExitStatus op_cds(DisasContext *s, DisasOps *o)
1905 1905
{
1906 1906
    int r3 = get_field(s->fields, r3);

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