Revision 3dcd219f hw/e1000.c
| b/hw/e1000.c | ||
|---|---|---|
| 150 | 150 |
} |
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| 152 | 152 |
static void |
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update_irqs(E1000State *s) |
|
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{
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qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0); |
|
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} |
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static void |
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| 153 | 159 |
set_interrupt_cause(E1000State *s, int index, uint32_t val) |
| 154 | 160 |
{
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| 155 | 161 |
if (val) |
| 156 | 162 |
val |= E1000_ICR_INT_ASSERTED; |
| 157 | 163 |
s->mac_reg[ICR] = val; |
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qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0);
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update_irqs(s);
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| 159 | 165 |
} |
| 160 | 166 |
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| 161 | 167 |
static void |
| ... | ... | |
| 970 | 976 |
for (j = 0; j < mac_regarraystosave[i].size; j++) |
| 971 | 977 |
qemu_get_be32s(f, |
| 972 | 978 |
s->mac_reg + mac_regarraystosave[i].array0 + j); |
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update_irqs(s); |
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| 973 | 980 |
return 0; |
| 974 | 981 |
} |
| 975 | 982 |
|
| ... | ... | |
| 1068 | 1075 |
memmove(d->mac_reg, mac_reg_init, sizeof mac_reg_init); |
| 1069 | 1076 |
d->rxbuf_min_shift = 1; |
| 1070 | 1077 |
memset(&d->tx, 0, sizeof d->tx); |
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update_irqs(d); |
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| 1071 | 1079 |
} |
| 1072 | 1080 |
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| 1073 | 1081 |
static void pci_e1000_init(PCIDevice *pci_dev) |
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