Revision 3e48dd4a hw/rtl8139.c

b/hw/rtl8139.c
2482 2482
    rtl8139_transmit(s);
2483 2483
}
2484 2484

  
2485
static uint32_t rtl8139_TxStatus_read(RTL8139State *s, uint8_t addr, int size)
2485
static uint32_t rtl8139_TxStatus_TxAddr_read(RTL8139State *s, uint32_t regs[],
2486
                                             uint32_t base, uint8_t addr,
2487
                                             int size)
2486 2488
{
2487
    uint32_t reg = (addr - TxStatus0) / 4;
2489
    uint32_t reg = (addr - base) / 4;
2488 2490
    uint32_t offset = addr & 0x3;
2489 2491
    uint32_t ret = 0;
2490 2492

  
2491 2493
    if (addr & (size - 1)) {
2492
        DPRINTF("not implemented read for TxStatus addr=0x%x size=0x%x\n", addr,
2493
                size);
2494
        DPRINTF("not implemented read for TxStatus/TxAddr "
2495
                "addr=0x%x size=0x%x\n", addr, size);
2494 2496
        return ret;
2495 2497
    }
2496 2498

  
......
2498 2500
    case 1: /* fall through */
2499 2501
    case 2: /* fall through */
2500 2502
    case 4:
2501
        ret = (s->TxStatus[reg] >> offset * 8) & ((1 << (size * 8)) - 1);
2502
        DPRINTF("TxStatus[%d] read addr=0x%x size=0x%x val=0x%08x\n", reg, addr,
2503
                size, ret);
2503
        ret = (regs[reg] >> offset * 8) & ((1 << (size * 8)) - 1);
2504
        DPRINTF("TxStatus/TxAddr[%d] read addr=0x%x size=0x%x val=0x%08x\n",
2505
                reg, addr, size, ret);
2504 2506
        break;
2505 2507
    default:
2506
        DPRINTF("unsupported size 0x%x of TxStatus reading\n", size);
2508
        DPRINTF("unsupported size 0x%x of TxStatus/TxAddr reading\n", size);
2507 2509
        break;
2508 2510
    }
2509 2511

  
......
2977 2979
            ret = s->mult[addr - MAR0];
2978 2980
            break;
2979 2981
        case TxStatus0 ... TxStatus0+4*4-1:
2980
            ret = rtl8139_TxStatus_read(s, addr, 1);
2982
            ret = rtl8139_TxStatus_TxAddr_read(s, s->TxStatus, TxStatus0,
2983
                                               addr, 1);
2981 2984
            break;
2982 2985
        case ChipCmd:
2983 2986
            ret = rtl8139_ChipCmd_read(s);
......
3043 3046
    switch (addr)
3044 3047
    {
3045 3048
        case TxAddr0 ... TxAddr0+4*4-1:
3046
            ret = rtl8139_TxStatus_read(s, addr, 2);
3049
            ret = rtl8139_TxStatus_TxAddr_read(s, s->TxAddr, TxAddr0, addr, 2);
3047 3050
            break;
3048 3051
        case IntrMask:
3049 3052
            ret = rtl8139_IntrMask_read(s);
......
3135 3138
            break;
3136 3139

  
3137 3140
        case TxStatus0 ... TxStatus0+4*4-1:
3138
            ret = rtl8139_TxStatus_read(s, addr, 4);
3141
            ret = rtl8139_TxStatus_TxAddr_read(s, s->TxStatus, TxStatus0,
3142
                                               addr, 4);
3139 3143
            break;
3140 3144

  
3141 3145
        case TxAddr0 ... TxAddr0+4*4-1:

Also available in: Unified diff