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/* Print i386 instructions for GDB, the GNU debugger.
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   Copyright (C) 1988, 89, 91, 93, 94, 95, 96, 97, 1998
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   Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
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/*
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 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
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 * July 1988
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 *  modified by John Hassey (hassey@dg-rtp.dg.com)
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 */
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/*
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 * The main tables describing the instructions is essentially a copy
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 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
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 * Programmers Manual.  Usually, there is a capital letter, followed
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 * by a small letter.  The capital letter tell the addressing mode,
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 * and the small letter tells about the operand size.  Refer to 
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 * the Intel manual for details.
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 */
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#include "dis-asm.h"
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#define MAXLEN 20
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#include <setjmp.h>
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static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
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struct dis_private
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{
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  /* Points to first byte not fetched.  */
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  bfd_byte *max_fetched;
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  bfd_byte the_buffer[MAXLEN];
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  bfd_vma insn_start;
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  jmp_buf bailout;
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};
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/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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   to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
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   on error.  */
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#define FETCH_DATA(info, addr) \
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  ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
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   ? 1 : fetch_data ((info), (addr)))
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static int
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fetch_data (info, addr)
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     struct disassemble_info *info;
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     bfd_byte *addr;
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{
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  int status;
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  struct dis_private *priv = (struct dis_private *)info->private_data;
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  bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
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  status = (*info->read_memory_func) (start,
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                                      priv->max_fetched,
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                                      addr - priv->max_fetched,
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                                      info);
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  if (status != 0)
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    {
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      (*info->memory_error_func) (status, start, info);
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      longjmp (priv->bailout, 1);
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    }
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  else
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    priv->max_fetched = addr;
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  return 1;
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}
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#define Eb OP_E, b_mode
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#define indirEb OP_indirE, b_mode
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#define Gb OP_G, b_mode
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#define Ev OP_E, v_mode
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#define indirEv OP_indirE, v_mode
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#define Ew OP_E, w_mode
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#define Ma OP_E, v_mode
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#define M OP_E, 0
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#define Mp OP_E, 0                /* ? */
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#define Gv OP_G, v_mode
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#define Gw OP_G, w_mode
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#define Rw OP_rm, w_mode
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#define Rd OP_rm, d_mode
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#define Ib OP_I, b_mode
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#define sIb OP_sI, b_mode        /* sign extened byte */
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#define Iv OP_I, v_mode
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#define Iw OP_I, w_mode
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#define Jb OP_J, b_mode
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#define Jv OP_J, v_mode
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#if 0
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#define ONE OP_ONE, 0
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#endif
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#define Cd OP_C, d_mode
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#define Dd OP_D, d_mode
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#define Td OP_T, d_mode
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#define eAX OP_REG, eAX_reg
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#define eBX OP_REG, eBX_reg
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#define eCX OP_REG, eCX_reg
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#define eDX OP_REG, eDX_reg
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#define eSP OP_REG, eSP_reg
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#define eBP OP_REG, eBP_reg
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#define eSI OP_REG, eSI_reg
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#define eDI OP_REG, eDI_reg
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#define AL OP_REG, al_reg
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#define CL OP_REG, cl_reg
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#define DL OP_REG, dl_reg
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#define BL OP_REG, bl_reg
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#define AH OP_REG, ah_reg
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#define CH OP_REG, ch_reg
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#define DH OP_REG, dh_reg
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#define BH OP_REG, bh_reg
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#define AX OP_REG, ax_reg
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#define DX OP_REG, dx_reg
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#define indirDX OP_REG, indir_dx_reg
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#define Sw OP_SEG, w_mode
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#define Ap OP_DIR, lptr
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#define Av OP_DIR, v_mode
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#define Ob OP_OFF, b_mode
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#define Ov OP_OFF, v_mode
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#define Xb OP_DSSI, b_mode
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#define Xv OP_DSSI, v_mode
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#define Yb OP_ESDI, b_mode
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#define Yv OP_ESDI, v_mode
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#define es OP_REG, es_reg
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#define ss OP_REG, ss_reg
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#define cs OP_REG, cs_reg
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#define ds OP_REG, ds_reg
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#define fs OP_REG, fs_reg
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#define gs OP_REG, gs_reg
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#define MX OP_MMX, 0
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#define EM OP_EM, v_mode
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#define MS OP_MS, b_mode
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typedef int (*op_rtn) PARAMS ((int bytemode, int aflag, int dflag));
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static int OP_E PARAMS ((int, int, int));
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static int OP_G PARAMS ((int, int, int));
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static int OP_I PARAMS ((int, int, int));
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static int OP_indirE PARAMS ((int, int, int));
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static int OP_sI PARAMS ((int, int, int));
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static int OP_REG PARAMS ((int, int, int));
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static int OP_J PARAMS ((int, int, int));
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static int OP_DIR PARAMS ((int, int, int));
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static int OP_OFF PARAMS ((int, int, int));
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static int OP_ESDI PARAMS ((int, int, int));
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static int OP_DSSI PARAMS ((int, int, int));
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static int OP_SEG PARAMS ((int, int, int));
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static int OP_C PARAMS ((int, int, int));
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static int OP_D PARAMS ((int, int, int));
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static int OP_T PARAMS ((int, int, int));
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static int OP_rm PARAMS ((int, int, int));
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static int OP_ST PARAMS ((int, int, int));
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static int OP_STi  PARAMS ((int, int, int));
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#if 0
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static int OP_ONE PARAMS ((int, int, int));
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#endif
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static int OP_MMX PARAMS ((int, int, int));
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static int OP_EM PARAMS ((int, int, int));
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static int OP_MS PARAMS ((int, int, int));
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static void append_prefix PARAMS ((void));
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static void set_op PARAMS ((int op));
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static void putop PARAMS ((char *template, int aflag, int dflag));
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static void dofloat PARAMS ((int aflag, int dflag));
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static int get16 PARAMS ((void));
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static int get32 PARAMS ((void));
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static void ckprefix PARAMS ((void));
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#define b_mode 1
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#define v_mode 2
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#define w_mode 3
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#define d_mode 4
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#define es_reg 100
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#define cs_reg 101
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#define ss_reg 102
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#define ds_reg 103
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#define fs_reg 104
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#define gs_reg 105
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#define eAX_reg 107
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#define eCX_reg 108
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#define eDX_reg 109
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#define eBX_reg 110
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#define eSP_reg 111
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#define eBP_reg 112
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#define eSI_reg 113
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#define eDI_reg 114
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#define lptr 115
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#define al_reg 116
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#define cl_reg 117
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#define dl_reg 118
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#define bl_reg 119
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#define ah_reg 120
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#define ch_reg 121
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#define dh_reg 122
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#define bh_reg 123
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#define ax_reg 124
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#define cx_reg 125
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#define dx_reg 126
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#define bx_reg 127
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#define sp_reg 128
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#define bp_reg 129
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#define si_reg 130
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#define di_reg 131
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#define indir_dx_reg 150
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#define GRP1b NULL, NULL, 0
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#define GRP1S NULL, NULL, 1
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#define GRP1Ss NULL, NULL, 2
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#define GRP2b NULL, NULL, 3
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#define GRP2S NULL, NULL, 4
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#define GRP2b_one NULL, NULL, 5
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#define GRP2S_one NULL, NULL, 6
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#define GRP2b_cl NULL, NULL, 7
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#define GRP2S_cl NULL, NULL, 8
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#define GRP3b NULL, NULL, 9
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#define GRP3S NULL, NULL, 10
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#define GRP4  NULL, NULL, 11
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#define GRP5  NULL, NULL, 12
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#define GRP6  NULL, NULL, 13
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#define GRP7 NULL, NULL, 14
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#define GRP8 NULL, NULL, 15
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#define GRP9 NULL, NULL, 16
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#define GRP10 NULL, NULL, 17
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#define GRP11 NULL, NULL, 18
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#define GRP12 NULL, NULL, 19
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#define FLOATCODE 50
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#define FLOAT NULL, NULL, FLOATCODE
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struct dis386 {
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  char *name;
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  op_rtn op1;
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  int bytemode1;
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  op_rtn op2;
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  int bytemode2;
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  op_rtn op3;
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  int bytemode3;
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};
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static struct dis386 dis386[] = {
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  /* 00 */
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  { "addb",        Eb, Gb },
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  { "addS",        Ev, Gv },
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  { "addb",        Gb, Eb },
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  { "addS",        Gv, Ev },
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  { "addb",        AL, Ib },
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  { "addS",        eAX, Iv },
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  { "pushS",        es },
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  { "popS",        es },
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  /* 08 */
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  { "orb",        Eb, Gb },
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  { "orS",        Ev, Gv },
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  { "orb",        Gb, Eb },
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  { "orS",        Gv, Ev },
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  { "orb",        AL, Ib },
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  { "orS",        eAX, Iv },
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  { "pushS",        cs },
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  { "(bad)" },        /* 0x0f extended opcode escape */
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  /* 10 */
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  { "adcb",        Eb, Gb },
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  { "adcS",        Ev, Gv },
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  { "adcb",        Gb, Eb },
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  { "adcS",        Gv, Ev },
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  { "adcb",        AL, Ib },
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  { "adcS",        eAX, Iv },
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  { "pushS",        ss },
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  { "popS",        ss },
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  /* 18 */
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  { "sbbb",        Eb, Gb },
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  { "sbbS",        Ev, Gv },
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  { "sbbb",        Gb, Eb },
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  { "sbbS",        Gv, Ev },
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  { "sbbb",        AL, Ib },
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  { "sbbS",        eAX, Iv },
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  { "pushS",        ds },
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  { "popS",        ds },
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  /* 20 */
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  { "andb",        Eb, Gb },
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  { "andS",        Ev, Gv },
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  { "andb",        Gb, Eb },
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  { "andS",        Gv, Ev },
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  { "andb",        AL, Ib },
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  { "andS",        eAX, Iv },
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  { "(bad)" },                        /* SEG ES prefix */
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  { "daa" },
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  /* 28 */
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  { "subb",        Eb, Gb },
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  { "subS",        Ev, Gv },
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  { "subb",        Gb, Eb },
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  { "subS",        Gv, Ev },
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  { "subb",        AL, Ib },
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  { "subS",        eAX, Iv },
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  { "(bad)" },                        /* SEG CS prefix */
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  { "das" },
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  /* 30 */
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  { "xorb",        Eb, Gb },
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  { "xorS",        Ev, Gv },
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  { "xorb",        Gb, Eb },
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  { "xorS",        Gv, Ev },
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  { "xorb",        AL, Ib },
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  { "xorS",        eAX, Iv },
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  { "(bad)" },                        /* SEG SS prefix */
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  { "aaa" },
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  /* 38 */
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  { "cmpb",        Eb, Gb },
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  { "cmpS",        Ev, Gv },
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  { "cmpb",        Gb, Eb },
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  { "cmpS",        Gv, Ev },
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  { "cmpb",        AL, Ib },
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  { "cmpS",        eAX, Iv },
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  { "(bad)" },                        /* SEG DS prefix */
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  { "aas" },
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  /* 40 */
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  { "incS",        eAX },
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  { "incS",        eCX },
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  { "incS",        eDX },
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  { "incS",        eBX },
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  { "incS",        eSP },
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  { "incS",        eBP },
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  { "incS",        eSI },
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  { "incS",        eDI },
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  /* 48 */
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  { "decS",        eAX },
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  { "decS",        eCX },
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  { "decS",        eDX },
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  { "decS",        eBX },
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  { "decS",        eSP },
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  { "decS",        eBP },
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  { "decS",        eSI },
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  { "decS",        eDI },
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  /* 50 */
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  { "pushS",        eAX },
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  { "pushS",        eCX },
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  { "pushS",        eDX },
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  { "pushS",        eBX },
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  { "pushS",        eSP },
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  { "pushS",        eBP },
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  { "pushS",        eSI },
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  { "pushS",        eDI },
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  /* 58 */
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  { "popS",        eAX },
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  { "popS",        eCX },
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  { "popS",        eDX },
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  { "popS",        eBX },
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  { "popS",        eSP },
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  { "popS",        eBP },
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  { "popS",        eSI },
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  { "popS",        eDI },
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  /* 60 */
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  { "pusha" },
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  { "popa" },
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  { "boundS",        Gv, Ma },
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  { "arpl",        Ew, Gw },
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  { "(bad)" },                        /* seg fs */
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  { "(bad)" },                        /* seg gs */
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  { "(bad)" },                        /* op size prefix */
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  { "(bad)" },                        /* adr size prefix */
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  /* 68 */
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  { "pushS",        Iv },                /* 386 book wrong */
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  { "imulS",        Gv, Ev, Iv },
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  { "pushS",        sIb },                /* push of byte really pushes 2 or 4 bytes */
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  { "imulS",        Gv, Ev, Ib },
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  { "insb",        Yb, indirDX },
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  { "insS",        Yv, indirDX },
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  { "outsb",        indirDX, Xb },
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  { "outsS",        indirDX, Xv },
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  /* 70 */
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  { "jo",        Jb },
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  { "jno",        Jb },
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  { "jb",        Jb },
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  { "jae",        Jb },
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  { "je",        Jb },
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  { "jne",        Jb },
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  { "jbe",        Jb },
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  { "ja",        Jb },
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  /* 78 */
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  { "js",        Jb },
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  { "jns",        Jb },
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  { "jp",        Jb },
401 dc99065b bellard
  { "jnp",        Jb },
402 dc99065b bellard
  { "jl",        Jb },
403 dc99065b bellard
  { "jnl",        Jb },
404 dc99065b bellard
  { "jle",        Jb },
405 dc99065b bellard
  { "jg",        Jb },
406 dc99065b bellard
  /* 80 */
407 dc99065b bellard
  { GRP1b },
408 dc99065b bellard
  { GRP1S },
409 dc99065b bellard
  { "(bad)" },
410 dc99065b bellard
  { GRP1Ss },
411 dc99065b bellard
  { "testb",        Eb, Gb },
412 dc99065b bellard
  { "testS",        Ev, Gv },
413 dc99065b bellard
  { "xchgb",        Eb, Gb },
414 dc99065b bellard
  { "xchgS",        Ev, Gv },
415 dc99065b bellard
  /* 88 */
416 dc99065b bellard
  { "movb",        Eb, Gb },
417 dc99065b bellard
  { "movS",        Ev, Gv },
418 dc99065b bellard
  { "movb",        Gb, Eb },
419 dc99065b bellard
  { "movS",        Gv, Ev },
420 dc99065b bellard
  { "movS",        Ev, Sw },
421 dc99065b bellard
  { "leaS",        Gv, M },
422 dc99065b bellard
  { "movS",        Sw, Ev },
423 dc99065b bellard
  { "popS",        Ev },
424 dc99065b bellard
  /* 90 */
425 dc99065b bellard
  { "nop" },
426 dc99065b bellard
  { "xchgS",        eCX, eAX },
427 dc99065b bellard
  { "xchgS",        eDX, eAX },
428 dc99065b bellard
  { "xchgS",        eBX, eAX },
429 dc99065b bellard
  { "xchgS",        eSP, eAX },
430 dc99065b bellard
  { "xchgS",        eBP, eAX },
431 dc99065b bellard
  { "xchgS",        eSI, eAX },
432 dc99065b bellard
  { "xchgS",        eDI, eAX },
433 dc99065b bellard
  /* 98 */
434 dc99065b bellard
  { "cWtS" },
435 dc99065b bellard
  { "cStd" },
436 dc99065b bellard
  { "lcall",        Ap },
437 dc99065b bellard
  { "(bad)" },                /* fwait */
438 dc99065b bellard
  { "pushf" },
439 dc99065b bellard
  { "popf" },
440 dc99065b bellard
  { "sahf" },
441 dc99065b bellard
  { "lahf" },
442 dc99065b bellard
  /* a0 */
443 dc99065b bellard
  { "movb",        AL, Ob },
444 dc99065b bellard
  { "movS",        eAX, Ov },
445 dc99065b bellard
  { "movb",        Ob, AL },
446 dc99065b bellard
  { "movS",        Ov, eAX },
447 dc99065b bellard
  { "movsb",        Yb, Xb },
448 dc99065b bellard
  { "movsS",        Yv, Xv },
449 dc99065b bellard
  { "cmpsb",        Yb, Xb },
450 dc99065b bellard
  { "cmpsS",        Yv, Xv },
451 dc99065b bellard
  /* a8 */
452 dc99065b bellard
  { "testb",        AL, Ib },
453 dc99065b bellard
  { "testS",        eAX, Iv },
454 dc99065b bellard
  { "stosb",        Yb, AL },
455 dc99065b bellard
  { "stosS",        Yv, eAX },
456 dc99065b bellard
  { "lodsb",        AL, Xb },
457 dc99065b bellard
  { "lodsS",        eAX, Xv },
458 dc99065b bellard
  { "scasb",        AL, Yb },
459 dc99065b bellard
  { "scasS",        eAX, Yv },
460 dc99065b bellard
  /* b0 */
461 dc99065b bellard
  { "movb",        AL, Ib },
462 dc99065b bellard
  { "movb",        CL, Ib },
463 dc99065b bellard
  { "movb",        DL, Ib },
464 dc99065b bellard
  { "movb",        BL, Ib },
465 dc99065b bellard
  { "movb",        AH, Ib },
466 dc99065b bellard
  { "movb",        CH, Ib },
467 dc99065b bellard
  { "movb",        DH, Ib },
468 dc99065b bellard
  { "movb",        BH, Ib },
469 dc99065b bellard
  /* b8 */
470 dc99065b bellard
  { "movS",        eAX, Iv },
471 dc99065b bellard
  { "movS",        eCX, Iv },
472 dc99065b bellard
  { "movS",        eDX, Iv },
473 dc99065b bellard
  { "movS",        eBX, Iv },
474 dc99065b bellard
  { "movS",        eSP, Iv },
475 dc99065b bellard
  { "movS",        eBP, Iv },
476 dc99065b bellard
  { "movS",        eSI, Iv },
477 dc99065b bellard
  { "movS",        eDI, Iv },
478 dc99065b bellard
  /* c0 */
479 dc99065b bellard
  { GRP2b },
480 dc99065b bellard
  { GRP2S },
481 dc99065b bellard
  { "ret",        Iw },
482 dc99065b bellard
  { "ret" },
483 dc99065b bellard
  { "lesS",        Gv, Mp },
484 dc99065b bellard
  { "ldsS",        Gv, Mp },
485 dc99065b bellard
  { "movb",        Eb, Ib },
486 dc99065b bellard
  { "movS",        Ev, Iv },
487 dc99065b bellard
  /* c8 */
488 dc99065b bellard
  { "enter",        Iw, Ib },
489 dc99065b bellard
  { "leave" },
490 dc99065b bellard
  { "lret",        Iw },
491 dc99065b bellard
  { "lret" },
492 dc99065b bellard
  { "int3" },
493 dc99065b bellard
  { "int",        Ib },
494 dc99065b bellard
  { "into" },
495 dc99065b bellard
  { "iret" },
496 dc99065b bellard
  /* d0 */
497 dc99065b bellard
  { GRP2b_one },
498 dc99065b bellard
  { GRP2S_one },
499 dc99065b bellard
  { GRP2b_cl },
500 dc99065b bellard
  { GRP2S_cl },
501 dc99065b bellard
  { "aam",        Ib },
502 dc99065b bellard
  { "aad",        Ib },
503 dc99065b bellard
  { "(bad)" },
504 dc99065b bellard
  { "xlat" },
505 dc99065b bellard
  /* d8 */
506 dc99065b bellard
  { FLOAT },
507 dc99065b bellard
  { FLOAT },
508 dc99065b bellard
  { FLOAT },
509 dc99065b bellard
  { FLOAT },
510 dc99065b bellard
  { FLOAT },
511 dc99065b bellard
  { FLOAT },
512 dc99065b bellard
  { FLOAT },
513 dc99065b bellard
  { FLOAT },
514 dc99065b bellard
  /* e0 */
515 dc99065b bellard
  { "loopne",        Jb },
516 dc99065b bellard
  { "loope",        Jb },
517 dc99065b bellard
  { "loop",        Jb },
518 dc99065b bellard
  { "jCcxz",        Jb },
519 dc99065b bellard
  { "inb",        AL, Ib },
520 dc99065b bellard
  { "inS",        eAX, Ib },
521 dc99065b bellard
  { "outb",        Ib, AL },
522 dc99065b bellard
  { "outS",        Ib, eAX },
523 dc99065b bellard
  /* e8 */
524 dc99065b bellard
  { "call",        Av },
525 dc99065b bellard
  { "jmp",        Jv },
526 dc99065b bellard
  { "ljmp",        Ap },
527 dc99065b bellard
  { "jmp",        Jb },
528 dc99065b bellard
  { "inb",        AL, indirDX },
529 dc99065b bellard
  { "inS",        eAX, indirDX },
530 dc99065b bellard
  { "outb",        indirDX, AL },
531 dc99065b bellard
  { "outS",        indirDX, eAX },
532 dc99065b bellard
  /* f0 */
533 dc99065b bellard
  { "(bad)" },                        /* lock prefix */
534 dc99065b bellard
  { "(bad)" },
535 dc99065b bellard
  { "(bad)" },                        /* repne */
536 dc99065b bellard
  { "(bad)" },                        /* repz */
537 dc99065b bellard
  { "hlt" },
538 dc99065b bellard
  { "cmc" },
539 dc99065b bellard
  { GRP3b },
540 dc99065b bellard
  { GRP3S },
541 dc99065b bellard
  /* f8 */
542 dc99065b bellard
  { "clc" },
543 dc99065b bellard
  { "stc" },
544 dc99065b bellard
  { "cli" },
545 dc99065b bellard
  { "sti" },
546 dc99065b bellard
  { "cld" },
547 dc99065b bellard
  { "std" },
548 dc99065b bellard
  { GRP4 },
549 dc99065b bellard
  { GRP5 },
550 dc99065b bellard
};
551 dc99065b bellard
552 dc99065b bellard
static struct dis386 dis386_twobyte[] = {
553 dc99065b bellard
  /* 00 */
554 dc99065b bellard
  { GRP6 },
555 dc99065b bellard
  { GRP7 },
556 dc99065b bellard
  { "larS", Gv, Ew },
557 dc99065b bellard
  { "lslS", Gv, Ew },  
558 dc99065b bellard
  { "(bad)" },
559 dc99065b bellard
  { "(bad)" },
560 dc99065b bellard
  { "clts" },
561 dc99065b bellard
  { "(bad)" },  
562 dc99065b bellard
  /* 08 */
563 dc99065b bellard
  { "invd" },
564 dc99065b bellard
  { "wbinvd" },
565 dc99065b bellard
  { "(bad)" },  { "ud2a" },  
566 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
567 dc99065b bellard
  /* 10 */
568 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
569 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
570 dc99065b bellard
  /* 18 */
571 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
572 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
573 dc99065b bellard
  /* 20 */
574 dc99065b bellard
  /* these are all backward in appendix A of the intel book */
575 dc99065b bellard
  { "movl", Rd, Cd },
576 dc99065b bellard
  { "movl", Rd, Dd },
577 dc99065b bellard
  { "movl", Cd, Rd },
578 dc99065b bellard
  { "movl", Dd, Rd },  
579 dc99065b bellard
  { "movl", Rd, Td },
580 dc99065b bellard
  { "(bad)" },
581 dc99065b bellard
  { "movl", Td, Rd },
582 dc99065b bellard
  { "(bad)" },  
583 dc99065b bellard
  /* 28 */
584 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
585 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
586 dc99065b bellard
  /* 30 */
587 dc99065b bellard
  { "wrmsr" },  { "rdtsc" },  { "rdmsr" },  { "rdpmc" },  
588 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
589 dc99065b bellard
  /* 38 */
590 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
591 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
592 dc99065b bellard
  /* 40 */
593 dc99065b bellard
  { "cmovo", Gv,Ev }, { "cmovno", Gv,Ev }, { "cmovb", Gv,Ev }, { "cmovae", Gv,Ev },
594 dc99065b bellard
  { "cmove", Gv,Ev }, { "cmovne", Gv,Ev }, { "cmovbe", Gv,Ev }, { "cmova", Gv,Ev },
595 dc99065b bellard
  /* 48 */
596 dc99065b bellard
  { "cmovs", Gv,Ev }, { "cmovns", Gv,Ev }, { "cmovp", Gv,Ev }, { "cmovnp", Gv,Ev },
597 dc99065b bellard
  { "cmovl", Gv,Ev }, { "cmovge", Gv,Ev }, { "cmovle", Gv,Ev }, { "cmovg", Gv,Ev },  
598 dc99065b bellard
  /* 50 */
599 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
600 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
601 dc99065b bellard
  /* 58 */
602 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
603 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
604 dc99065b bellard
  /* 60 */
605 dc99065b bellard
  { "punpcklbw", MX, EM },
606 dc99065b bellard
  { "punpcklwd", MX, EM },
607 dc99065b bellard
  { "punpckldq", MX, EM },
608 dc99065b bellard
  { "packsswb", MX, EM },
609 dc99065b bellard
  { "pcmpgtb", MX, EM },
610 dc99065b bellard
  { "pcmpgtw", MX, EM },
611 dc99065b bellard
  { "pcmpgtd", MX, EM },
612 dc99065b bellard
  { "packuswb", MX, EM },
613 dc99065b bellard
  /* 68 */
614 dc99065b bellard
  { "punpckhbw", MX, EM },
615 dc99065b bellard
  { "punpckhwd", MX, EM },
616 dc99065b bellard
  { "punpckhdq", MX, EM },
617 dc99065b bellard
  { "packssdw", MX, EM },
618 dc99065b bellard
  { "(bad)" },  { "(bad)" },
619 dc99065b bellard
  { "movd", MX, Ev },
620 dc99065b bellard
  { "movq", MX, EM },
621 dc99065b bellard
  /* 70 */
622 dc99065b bellard
  { "(bad)" },
623 dc99065b bellard
  { GRP10 },
624 dc99065b bellard
  { GRP11 },
625 dc99065b bellard
  { GRP12 },
626 dc99065b bellard
  { "pcmpeqb", MX, EM },
627 dc99065b bellard
  { "pcmpeqw", MX, EM },
628 dc99065b bellard
  { "pcmpeqd", MX, EM },
629 dc99065b bellard
  { "emms" },
630 dc99065b bellard
  /* 78 */
631 dc99065b bellard
  { "(bad)" },  { "(bad)" },  { "(bad)" },  { "(bad)" },  
632 dc99065b bellard
  { "(bad)" },  { "(bad)" },
633 dc99065b bellard
  { "movd", Ev, MX },
634 dc99065b bellard
  { "movq", EM, MX },
635 dc99065b bellard
  /* 80 */
636 dc99065b bellard
  { "jo", Jv },
637 dc99065b bellard
  { "jno", Jv },
638 dc99065b bellard
  { "jb", Jv },
639 dc99065b bellard
  { "jae", Jv },  
640 dc99065b bellard
  { "je", Jv },
641 dc99065b bellard
  { "jne", Jv },
642 dc99065b bellard
  { "jbe", Jv },
643 dc99065b bellard
  { "ja", Jv },  
644 dc99065b bellard
  /* 88 */
645 dc99065b bellard
  { "js", Jv },
646 dc99065b bellard
  { "jns", Jv },
647 dc99065b bellard
  { "jp", Jv },
648 dc99065b bellard
  { "jnp", Jv },  
649 dc99065b bellard
  { "jl", Jv },
650 dc99065b bellard
  { "jge", Jv },
651 dc99065b bellard
  { "jle", Jv },
652 dc99065b bellard
  { "jg", Jv },  
653 dc99065b bellard
  /* 90 */
654 dc99065b bellard
  { "seto", Eb },
655 dc99065b bellard
  { "setno", Eb },
656 dc99065b bellard
  { "setb", Eb },
657 dc99065b bellard
  { "setae", Eb },
658 dc99065b bellard
  { "sete", Eb },
659 dc99065b bellard
  { "setne", Eb },
660 dc99065b bellard
  { "setbe", Eb },
661 dc99065b bellard
  { "seta", Eb },
662 dc99065b bellard
  /* 98 */
663 dc99065b bellard
  { "sets", Eb },
664 dc99065b bellard
  { "setns", Eb },
665 dc99065b bellard
  { "setp", Eb },
666 dc99065b bellard
  { "setnp", Eb },
667 dc99065b bellard
  { "setl", Eb },
668 dc99065b bellard
  { "setge", Eb },
669 dc99065b bellard
  { "setle", Eb },
670 dc99065b bellard
  { "setg", Eb },  
671 dc99065b bellard
  /* a0 */
672 dc99065b bellard
  { "pushS", fs },
673 dc99065b bellard
  { "popS", fs },
674 dc99065b bellard
  { "cpuid" },
675 dc99065b bellard
  { "btS", Ev, Gv },  
676 dc99065b bellard
  { "shldS", Ev, Gv, Ib },
677 dc99065b bellard
  { "shldS", Ev, Gv, CL },
678 dc99065b bellard
  { "(bad)" },
679 dc99065b bellard
  { "(bad)" },  
680 dc99065b bellard
  /* a8 */
681 dc99065b bellard
  { "pushS", gs },
682 dc99065b bellard
  { "popS", gs },
683 dc99065b bellard
  { "rsm" },
684 dc99065b bellard
  { "btsS", Ev, Gv },  
685 dc99065b bellard
  { "shrdS", Ev, Gv, Ib },
686 dc99065b bellard
  { "shrdS", Ev, Gv, CL },
687 dc99065b bellard
  { "(bad)" },
688 dc99065b bellard
  { "imulS", Gv, Ev },  
689 dc99065b bellard
  /* b0 */
690 dc99065b bellard
  { "cmpxchgb", Eb, Gb },
691 dc99065b bellard
  { "cmpxchgS", Ev, Gv },
692 dc99065b bellard
  { "lssS", Gv, Mp },        /* 386 lists only Mp */
693 dc99065b bellard
  { "btrS", Ev, Gv },  
694 dc99065b bellard
  { "lfsS", Gv, Mp },        /* 386 lists only Mp */
695 dc99065b bellard
  { "lgsS", Gv, Mp },        /* 386 lists only Mp */
696 dc99065b bellard
  { "movzbS", Gv, Eb },
697 dc99065b bellard
  { "movzwS", Gv, Ew },  
698 dc99065b bellard
  /* b8 */
699 dc99065b bellard
  { "ud2b" },
700 dc99065b bellard
  { "(bad)" },
701 dc99065b bellard
  { GRP8 },
702 dc99065b bellard
  { "btcS", Ev, Gv },  
703 dc99065b bellard
  { "bsfS", Gv, Ev },
704 dc99065b bellard
  { "bsrS", Gv, Ev },
705 dc99065b bellard
  { "movsbS", Gv, Eb },
706 dc99065b bellard
  { "movswS", Gv, Ew },  
707 dc99065b bellard
  /* c0 */
708 dc99065b bellard
  { "xaddb", Eb, Gb },
709 dc99065b bellard
  { "xaddS", Ev, Gv },
710 dc99065b bellard
  { "(bad)" },
711 dc99065b bellard
  { "(bad)" },  
712 dc99065b bellard
  { "(bad)" },
713 dc99065b bellard
  { "(bad)" },
714 dc99065b bellard
  { "(bad)" },
715 dc99065b bellard
  { GRP9 },  
716 dc99065b bellard
  /* c8 */
717 dc99065b bellard
  { "bswap", eAX },
718 dc99065b bellard
  { "bswap", eCX },
719 dc99065b bellard
  { "bswap", eDX },
720 dc99065b bellard
  { "bswap", eBX },
721 dc99065b bellard
  { "bswap", eSP },
722 dc99065b bellard
  { "bswap", eBP },
723 dc99065b bellard
  { "bswap", eSI },
724 dc99065b bellard
  { "bswap", eDI },
725 dc99065b bellard
  /* d0 */
726 dc99065b bellard
  { "(bad)" },
727 dc99065b bellard
  { "psrlw", MX, EM },
728 dc99065b bellard
  { "psrld", MX, EM },
729 dc99065b bellard
  { "psrlq", MX, EM },
730 dc99065b bellard
  { "(bad)" },
731 dc99065b bellard
  { "pmullw", MX, EM },
732 dc99065b bellard
  { "(bad)" },  { "(bad)" },  
733 dc99065b bellard
  /* d8 */
734 dc99065b bellard
  { "psubusb", MX, EM },
735 dc99065b bellard
  { "psubusw", MX, EM },
736 dc99065b bellard
  { "(bad)" },
737 dc99065b bellard
  { "pand", MX, EM },
738 dc99065b bellard
  { "paddusb", MX, EM },
739 dc99065b bellard
  { "paddusw", MX, EM },
740 dc99065b bellard
  { "(bad)" },
741 dc99065b bellard
  { "pandn", MX, EM },
742 dc99065b bellard
  /* e0 */
743 dc99065b bellard
  { "(bad)" },
744 dc99065b bellard
  { "psraw", MX, EM },
745 dc99065b bellard
  { "psrad", MX, EM },
746 dc99065b bellard
  { "(bad)" },
747 dc99065b bellard
  { "(bad)" },
748 dc99065b bellard
  { "pmulhw", MX, EM },
749 dc99065b bellard
  { "(bad)" },  { "(bad)" },  
750 dc99065b bellard
  /* e8 */
751 dc99065b bellard
  { "psubsb", MX, EM },
752 dc99065b bellard
  { "psubsw", MX, EM },
753 dc99065b bellard
  { "(bad)" },
754 dc99065b bellard
  { "por", MX, EM },
755 dc99065b bellard
  { "paddsb", MX, EM },
756 dc99065b bellard
  { "paddsw", MX, EM },
757 dc99065b bellard
  { "(bad)" },
758 dc99065b bellard
  { "pxor", MX, EM },
759 dc99065b bellard
  /* f0 */
760 dc99065b bellard
  { "(bad)" },
761 dc99065b bellard
  { "psllw", MX, EM },
762 dc99065b bellard
  { "pslld", MX, EM },
763 dc99065b bellard
  { "psllq", MX, EM },
764 dc99065b bellard
  { "(bad)" },
765 dc99065b bellard
  { "pmaddwd", MX, EM },
766 dc99065b bellard
  { "(bad)" },  { "(bad)" },  
767 dc99065b bellard
  /* f8 */
768 dc99065b bellard
  { "psubb", MX, EM },
769 dc99065b bellard
  { "psubw", MX, EM },
770 dc99065b bellard
  { "psubd", MX, EM },
771 dc99065b bellard
  { "(bad)" },  
772 dc99065b bellard
  { "paddb", MX, EM },
773 dc99065b bellard
  { "paddw", MX, EM },
774 dc99065b bellard
  { "paddd", MX, EM },
775 dc99065b bellard
  { "(bad)" }
776 dc99065b bellard
};
777 dc99065b bellard
778 dc99065b bellard
static const unsigned char onebyte_has_modrm[256] = {
779 dc99065b bellard
  1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
780 dc99065b bellard
  1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
781 dc99065b bellard
  1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
782 dc99065b bellard
  1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,
783 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
784 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
785 dc99065b bellard
  0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0,
786 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
787 dc99065b bellard
  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
788 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
789 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
790 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
791 dc99065b bellard
  1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0,
792 dc99065b bellard
  1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,
793 dc99065b bellard
  0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
794 dc99065b bellard
  0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1
795 dc99065b bellard
};
796 dc99065b bellard
797 dc99065b bellard
static const unsigned char twobyte_has_modrm[256] = {
798 dc99065b bellard
  /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
799 dc99065b bellard
  /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
800 dc99065b bellard
  /* 20 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* 2f */
801 dc99065b bellard
  /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
802 dc99065b bellard
  /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
803 dc99065b bellard
  /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
804 dc99065b bellard
  /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
805 dc99065b bellard
  /* 70 */ 0,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
806 dc99065b bellard
  /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
807 dc99065b bellard
  /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
808 dc99065b bellard
  /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
809 dc99065b bellard
  /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
810 dc99065b bellard
  /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
811 dc99065b bellard
  /* d0 */ 0,1,1,1,0,1,0,0,1,1,0,1,1,1,0,1, /* df */
812 dc99065b bellard
  /* e0 */ 0,1,1,0,0,1,0,0,1,1,0,1,1,1,0,1, /* ef */
813 dc99065b bellard
  /* f0 */ 0,1,1,1,0,1,0,0,1,1,1,0,1,1,1,0  /* ff */
814 dc99065b bellard
};
815 dc99065b bellard
816 dc99065b bellard
static char obuf[100];
817 dc99065b bellard
static char *obufp;
818 dc99065b bellard
static char scratchbuf[100];
819 dc99065b bellard
static unsigned char *start_codep;
820 dc99065b bellard
static unsigned char *codep;
821 dc99065b bellard
static disassemble_info *the_info;
822 dc99065b bellard
static int mod;
823 dc99065b bellard
static int rm;
824 dc99065b bellard
static int reg;
825 dc99065b bellard
static void oappend PARAMS ((char *s));
826 dc99065b bellard
827 dc99065b bellard
static char *names32[]={
828 dc99065b bellard
  "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
829 dc99065b bellard
};
830 dc99065b bellard
static char *names16[] = {
831 dc99065b bellard
  "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
832 dc99065b bellard
};
833 dc99065b bellard
static char *names8[] = {
834 dc99065b bellard
  "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
835 dc99065b bellard
};
836 dc99065b bellard
static char *names_seg[] = {
837 dc99065b bellard
  "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
838 dc99065b bellard
};
839 dc99065b bellard
static char *index16[] = {
840 dc99065b bellard
  "bx+si","bx+di","bp+si","bp+di","si","di","bp","bx"
841 dc99065b bellard
};
842 dc99065b bellard
843 dc99065b bellard
static struct dis386 grps[][8] = {
844 dc99065b bellard
  /* GRP1b */
845 dc99065b bellard
  {
846 dc99065b bellard
    { "addb",        Eb, Ib },
847 dc99065b bellard
    { "orb",        Eb, Ib },
848 dc99065b bellard
    { "adcb",        Eb, Ib },
849 dc99065b bellard
    { "sbbb",        Eb, Ib },
850 dc99065b bellard
    { "andb",        Eb, Ib },
851 dc99065b bellard
    { "subb",        Eb, Ib },
852 dc99065b bellard
    { "xorb",        Eb, Ib },
853 dc99065b bellard
    { "cmpb",        Eb, Ib }
854 dc99065b bellard
  },
855 dc99065b bellard
  /* GRP1S */
856 dc99065b bellard
  {
857 dc99065b bellard
    { "addS",        Ev, Iv },
858 dc99065b bellard
    { "orS",        Ev, Iv },
859 dc99065b bellard
    { "adcS",        Ev, Iv },
860 dc99065b bellard
    { "sbbS",        Ev, Iv },
861 dc99065b bellard
    { "andS",        Ev, Iv },
862 dc99065b bellard
    { "subS",        Ev, Iv },
863 dc99065b bellard
    { "xorS",        Ev, Iv },
864 dc99065b bellard
    { "cmpS",        Ev, Iv }
865 dc99065b bellard
  },
866 dc99065b bellard
  /* GRP1Ss */
867 dc99065b bellard
  {
868 dc99065b bellard
    { "addS",        Ev, sIb },
869 dc99065b bellard
    { "orS",        Ev, sIb },
870 dc99065b bellard
    { "adcS",        Ev, sIb },
871 dc99065b bellard
    { "sbbS",        Ev, sIb },
872 dc99065b bellard
    { "andS",        Ev, sIb },
873 dc99065b bellard
    { "subS",        Ev, sIb },
874 dc99065b bellard
    { "xorS",        Ev, sIb },
875 dc99065b bellard
    { "cmpS",        Ev, sIb }
876 dc99065b bellard
  },
877 dc99065b bellard
  /* GRP2b */
878 dc99065b bellard
  {
879 dc99065b bellard
    { "rolb",        Eb, Ib },
880 dc99065b bellard
    { "rorb",        Eb, Ib },
881 dc99065b bellard
    { "rclb",        Eb, Ib },
882 dc99065b bellard
    { "rcrb",        Eb, Ib },
883 dc99065b bellard
    { "shlb",        Eb, Ib },
884 dc99065b bellard
    { "shrb",        Eb, Ib },
885 dc99065b bellard
    { "(bad)" },
886 dc99065b bellard
    { "sarb",        Eb, Ib },
887 dc99065b bellard
  },
888 dc99065b bellard
  /* GRP2S */
889 dc99065b bellard
  {
890 dc99065b bellard
    { "rolS",        Ev, Ib },
891 dc99065b bellard
    { "rorS",        Ev, Ib },
892 dc99065b bellard
    { "rclS",        Ev, Ib },
893 dc99065b bellard
    { "rcrS",        Ev, Ib },
894 dc99065b bellard
    { "shlS",        Ev, Ib },
895 dc99065b bellard
    { "shrS",        Ev, Ib },
896 dc99065b bellard
    { "(bad)" },
897 dc99065b bellard
    { "sarS",        Ev, Ib },
898 dc99065b bellard
  },
899 dc99065b bellard
  /* GRP2b_one */
900 dc99065b bellard
  {
901 dc99065b bellard
    { "rolb",        Eb },
902 dc99065b bellard
    { "rorb",        Eb },
903 dc99065b bellard
    { "rclb",        Eb },
904 dc99065b bellard
    { "rcrb",        Eb },
905 dc99065b bellard
    { "shlb",        Eb },
906 dc99065b bellard
    { "shrb",        Eb },
907 dc99065b bellard
    { "(bad)" },
908 dc99065b bellard
    { "sarb",        Eb },
909 dc99065b bellard
  },
910 dc99065b bellard
  /* GRP2S_one */
911 dc99065b bellard
  {
912 dc99065b bellard
    { "rolS",        Ev },
913 dc99065b bellard
    { "rorS",        Ev },
914 dc99065b bellard
    { "rclS",        Ev },
915 dc99065b bellard
    { "rcrS",        Ev },
916 dc99065b bellard
    { "shlS",        Ev },
917 dc99065b bellard
    { "shrS",        Ev },
918 dc99065b bellard
    { "(bad)" },
919 dc99065b bellard
    { "sarS",        Ev },
920 dc99065b bellard
  },
921 dc99065b bellard
  /* GRP2b_cl */
922 dc99065b bellard
  {
923 dc99065b bellard
    { "rolb",        Eb, CL },
924 dc99065b bellard
    { "rorb",        Eb, CL },
925 dc99065b bellard
    { "rclb",        Eb, CL },
926 dc99065b bellard
    { "rcrb",        Eb, CL },
927 dc99065b bellard
    { "shlb",        Eb, CL },
928 dc99065b bellard
    { "shrb",        Eb, CL },
929 dc99065b bellard
    { "(bad)" },
930 dc99065b bellard
    { "sarb",        Eb, CL },
931 dc99065b bellard
  },
932 dc99065b bellard
  /* GRP2S_cl */
933 dc99065b bellard
  {
934 dc99065b bellard
    { "rolS",        Ev, CL },
935 dc99065b bellard
    { "rorS",        Ev, CL },
936 dc99065b bellard
    { "rclS",        Ev, CL },
937 dc99065b bellard
    { "rcrS",        Ev, CL },
938 dc99065b bellard
    { "shlS",        Ev, CL },
939 dc99065b bellard
    { "shrS",        Ev, CL },
940 dc99065b bellard
    { "(bad)" },
941 dc99065b bellard
    { "sarS",        Ev, CL }
942 dc99065b bellard
  },
943 dc99065b bellard
  /* GRP3b */
944 dc99065b bellard
  {
945 dc99065b bellard
    { "testb",        Eb, Ib },
946 dc99065b bellard
    { "(bad)",        Eb },
947 dc99065b bellard
    { "notb",        Eb },
948 dc99065b bellard
    { "negb",        Eb },
949 dc99065b bellard
    { "mulb",        AL, Eb },
950 dc99065b bellard
    { "imulb",        AL, Eb },
951 dc99065b bellard
    { "divb",        AL, Eb },
952 dc99065b bellard
    { "idivb",        AL, Eb }
953 dc99065b bellard
  },
954 dc99065b bellard
  /* GRP3S */
955 dc99065b bellard
  {
956 dc99065b bellard
    { "testS",        Ev, Iv },
957 dc99065b bellard
    { "(bad)" },
958 dc99065b bellard
    { "notS",        Ev },
959 dc99065b bellard
    { "negS",        Ev },
960 dc99065b bellard
    { "mulS",        eAX, Ev },
961 dc99065b bellard
    { "imulS",        eAX, Ev },
962 dc99065b bellard
    { "divS",        eAX, Ev },
963 dc99065b bellard
    { "idivS",        eAX, Ev },
964 dc99065b bellard
  },
965 dc99065b bellard
  /* GRP4 */
966 dc99065b bellard
  {
967 dc99065b bellard
    { "incb", Eb },
968 dc99065b bellard
    { "decb", Eb },
969 dc99065b bellard
    { "(bad)" },
970 dc99065b bellard
    { "(bad)" },
971 dc99065b bellard
    { "(bad)" },
972 dc99065b bellard
    { "(bad)" },
973 dc99065b bellard
    { "(bad)" },
974 dc99065b bellard
    { "(bad)" },
975 dc99065b bellard
  },
976 dc99065b bellard
  /* GRP5 */
977 dc99065b bellard
  {
978 dc99065b bellard
    { "incS",        Ev },
979 dc99065b bellard
    { "decS",        Ev },
980 dc99065b bellard
    { "call",        indirEv },
981 dc99065b bellard
    { "lcall",        indirEv },
982 dc99065b bellard
    { "jmp",        indirEv },
983 dc99065b bellard
    { "ljmp",        indirEv },
984 dc99065b bellard
    { "pushS",        Ev },
985 dc99065b bellard
    { "(bad)" },
986 dc99065b bellard
  },
987 dc99065b bellard
  /* GRP6 */
988 dc99065b bellard
  {
989 dc99065b bellard
    { "sldt",        Ew },
990 dc99065b bellard
    { "str",        Ew },
991 dc99065b bellard
    { "lldt",        Ew },
992 dc99065b bellard
    { "ltr",        Ew },
993 dc99065b bellard
    { "verr",        Ew },
994 dc99065b bellard
    { "verw",        Ew },
995 dc99065b bellard
    { "(bad)" },
996 dc99065b bellard
    { "(bad)" }
997 dc99065b bellard
  },
998 dc99065b bellard
  /* GRP7 */
999 dc99065b bellard
  {
1000 dc99065b bellard
    { "sgdt", Ew },
1001 dc99065b bellard
    { "sidt", Ew },
1002 dc99065b bellard
    { "lgdt", Ew },
1003 dc99065b bellard
    { "lidt", Ew },
1004 dc99065b bellard
    { "smsw", Ew },
1005 dc99065b bellard
    { "(bad)" },
1006 dc99065b bellard
    { "lmsw", Ew },
1007 dc99065b bellard
    { "invlpg", Ew },
1008 dc99065b bellard
  },
1009 dc99065b bellard
  /* GRP8 */
1010 dc99065b bellard
  {
1011 dc99065b bellard
    { "(bad)" },
1012 dc99065b bellard
    { "(bad)" },
1013 dc99065b bellard
    { "(bad)" },
1014 dc99065b bellard
    { "(bad)" },
1015 dc99065b bellard
    { "btS",        Ev, Ib },
1016 dc99065b bellard
    { "btsS",        Ev, Ib },
1017 dc99065b bellard
    { "btrS",        Ev, Ib },
1018 dc99065b bellard
    { "btcS",        Ev, Ib },
1019 dc99065b bellard
  },
1020 dc99065b bellard
  /* GRP9 */
1021 dc99065b bellard
  {
1022 dc99065b bellard
    { "(bad)" },
1023 dc99065b bellard
    { "cmpxchg8b", Ev },
1024 dc99065b bellard
    { "(bad)" },
1025 dc99065b bellard
    { "(bad)" },
1026 dc99065b bellard
    { "(bad)" },
1027 dc99065b bellard
    { "(bad)" },
1028 dc99065b bellard
    { "(bad)" },
1029 dc99065b bellard
    { "(bad)" },
1030 dc99065b bellard
  },
1031 dc99065b bellard
  /* GRP10 */
1032 dc99065b bellard
  {
1033 dc99065b bellard
    { "(bad)" },
1034 dc99065b bellard
    { "(bad)" },
1035 dc99065b bellard
    { "psrlw", MS, Ib },
1036 dc99065b bellard
    { "(bad)" },
1037 dc99065b bellard
    { "psraw", MS, Ib },
1038 dc99065b bellard
    { "(bad)" },
1039 dc99065b bellard
    { "psllw", MS, Ib },
1040 dc99065b bellard
    { "(bad)" },
1041 dc99065b bellard
  },
1042 dc99065b bellard
  /* GRP11 */
1043 dc99065b bellard
  {
1044 dc99065b bellard
    { "(bad)" },
1045 dc99065b bellard
    { "(bad)" },
1046 dc99065b bellard
    { "psrld", MS, Ib },
1047 dc99065b bellard
    { "(bad)" },
1048 dc99065b bellard
    { "psrad", MS, Ib },
1049 dc99065b bellard
    { "(bad)" },
1050 dc99065b bellard
    { "pslld", MS, Ib },
1051 dc99065b bellard
    { "(bad)" },
1052 dc99065b bellard
  },
1053 dc99065b bellard
  /* GRP12 */
1054 dc99065b bellard
  {
1055 dc99065b bellard
    { "(bad)" },
1056 dc99065b bellard
    { "(bad)" },
1057 dc99065b bellard
    { "psrlq", MS, Ib },
1058 dc99065b bellard
    { "(bad)" },
1059 dc99065b bellard
    { "(bad)" },
1060 dc99065b bellard
    { "(bad)" },
1061 dc99065b bellard
    { "psllq", MS, Ib },
1062 dc99065b bellard
    { "(bad)" },
1063 dc99065b bellard
  }
1064 dc99065b bellard
};
1065 dc99065b bellard
1066 dc99065b bellard
#define PREFIX_REPZ 1
1067 dc99065b bellard
#define PREFIX_REPNZ 2
1068 dc99065b bellard
#define PREFIX_LOCK 4
1069 dc99065b bellard
#define PREFIX_CS 8
1070 dc99065b bellard
#define PREFIX_SS 0x10
1071 dc99065b bellard
#define PREFIX_DS 0x20
1072 dc99065b bellard
#define PREFIX_ES 0x40
1073 dc99065b bellard
#define PREFIX_FS 0x80
1074 dc99065b bellard
#define PREFIX_GS 0x100
1075 dc99065b bellard
#define PREFIX_DATA 0x200
1076 dc99065b bellard
#define PREFIX_ADR 0x400
1077 dc99065b bellard
#define PREFIX_FWAIT 0x800
1078 dc99065b bellard
1079 dc99065b bellard
static int prefixes;
1080 dc99065b bellard
1081 dc99065b bellard
static void
1082 dc99065b bellard
ckprefix ()
1083 dc99065b bellard
{
1084 dc99065b bellard
  prefixes = 0;
1085 dc99065b bellard
  while (1)
1086 dc99065b bellard
    {
1087 dc99065b bellard
      FETCH_DATA (the_info, codep + 1);
1088 dc99065b bellard
      switch (*codep)
1089 dc99065b bellard
        {
1090 dc99065b bellard
        case 0xf3:
1091 dc99065b bellard
          prefixes |= PREFIX_REPZ;
1092 dc99065b bellard
          break;
1093 dc99065b bellard
        case 0xf2:
1094 dc99065b bellard
          prefixes |= PREFIX_REPNZ;
1095 dc99065b bellard
          break;
1096 dc99065b bellard
        case 0xf0:
1097 dc99065b bellard
          prefixes |= PREFIX_LOCK;
1098 dc99065b bellard
          break;
1099 dc99065b bellard
        case 0x2e:
1100 dc99065b bellard
          prefixes |= PREFIX_CS;
1101 dc99065b bellard
          break;
1102 dc99065b bellard
        case 0x36:
1103 dc99065b bellard
          prefixes |= PREFIX_SS;
1104 dc99065b bellard
          break;
1105 dc99065b bellard
        case 0x3e:
1106 dc99065b bellard
          prefixes |= PREFIX_DS;
1107 dc99065b bellard
          break;
1108 dc99065b bellard
        case 0x26:
1109 dc99065b bellard
          prefixes |= PREFIX_ES;
1110 dc99065b bellard
          break;
1111 dc99065b bellard
        case 0x64:
1112 dc99065b bellard
          prefixes |= PREFIX_FS;
1113 dc99065b bellard
          break;
1114 dc99065b bellard
        case 0x65:
1115 dc99065b bellard
          prefixes |= PREFIX_GS;
1116 dc99065b bellard
          break;
1117 dc99065b bellard
        case 0x66:
1118 dc99065b bellard
          prefixes |= PREFIX_DATA;
1119 dc99065b bellard
          break;
1120 dc99065b bellard
        case 0x67:
1121 dc99065b bellard
          prefixes |= PREFIX_ADR;
1122 dc99065b bellard
          break;
1123 dc99065b bellard
        case 0x9b:
1124 dc99065b bellard
          prefixes |= PREFIX_FWAIT;
1125 dc99065b bellard
          break;
1126 dc99065b bellard
        default:
1127 dc99065b bellard
          return;
1128 dc99065b bellard
        }
1129 dc99065b bellard
      codep++;
1130 dc99065b bellard
    }
1131 dc99065b bellard
}
1132 dc99065b bellard
1133 dc99065b bellard
static char op1out[100], op2out[100], op3out[100];
1134 dc99065b bellard
static int op_address[3], op_ad, op_index[3];
1135 dc99065b bellard
static int start_pc;
1136 dc99065b bellard
1137 dc99065b bellard
 
1138 dc99065b bellard
/*
1139 dc99065b bellard
 *   On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1140 dc99065b bellard
 *   (see topic "Redundant prefixes" in the "Differences from 8086"
1141 dc99065b bellard
 *   section of the "Virtual 8086 Mode" chapter.)
1142 dc99065b bellard
 * 'pc' should be the address of this instruction, it will
1143 dc99065b bellard
 *   be used to print the target address if this is a relative jump or call
1144 dc99065b bellard
 * The function returns the length of this instruction in bytes.
1145 dc99065b bellard
 */
1146 dc99065b bellard
1147 dc99065b bellard
int print_insn_x86 PARAMS ((bfd_vma pc, disassemble_info *info, int aflag,
1148 dc99065b bellard
                            int dflag));
1149 dc99065b bellard
int
1150 dc99065b bellard
print_insn_i386 (pc, info)
1151 dc99065b bellard
     bfd_vma pc;
1152 dc99065b bellard
     disassemble_info *info;
1153 dc99065b bellard
{
1154 dc99065b bellard
  if (info->mach == bfd_mach_i386_i386)
1155 dc99065b bellard
    return print_insn_x86 (pc, info, 1, 1);
1156 dc99065b bellard
  else if (info->mach == bfd_mach_i386_i8086)
1157 dc99065b bellard
    return print_insn_x86 (pc, info, 0, 0);
1158 dc99065b bellard
  else
1159 dc99065b bellard
    abort ();
1160 dc99065b bellard
}
1161 dc99065b bellard
1162 dc99065b bellard
int
1163 dc99065b bellard
print_insn_x86 (pc, info, aflag, dflag)
1164 dc99065b bellard
     bfd_vma pc;
1165 dc99065b bellard
     disassemble_info *info;
1166 dc99065b bellard
     int aflag;
1167 dc99065b bellard
     int dflag;
1168 dc99065b bellard
{
1169 dc99065b bellard
  struct dis386 *dp;
1170 dc99065b bellard
  int i;
1171 dc99065b bellard
  int enter_instruction;
1172 dc99065b bellard
  char *first, *second, *third;
1173 dc99065b bellard
  int needcomma;
1174 dc99065b bellard
  unsigned char need_modrm;
1175 dc99065b bellard
1176 dc99065b bellard
  struct dis_private priv;
1177 dc99065b bellard
  bfd_byte *inbuf = priv.the_buffer;
1178 dc99065b bellard
1179 dc99065b bellard
  /* The output looks better if we put 5 bytes on a line, since that
1180 dc99065b bellard
     puts long word instructions on a single line.  */
1181 dc99065b bellard
  info->bytes_per_line = 5;
1182 dc99065b bellard
1183 dc99065b bellard
  info->private_data = (PTR) &priv;
1184 dc99065b bellard
  priv.max_fetched = priv.the_buffer;
1185 dc99065b bellard
  priv.insn_start = pc;
1186 dc99065b bellard
  if (setjmp (priv.bailout) != 0)
1187 dc99065b bellard
    /* Error return.  */
1188 dc99065b bellard
    return -1;
1189 dc99065b bellard
1190 dc99065b bellard
  obuf[0] = 0;
1191 dc99065b bellard
  op1out[0] = 0;
1192 dc99065b bellard
  op2out[0] = 0;
1193 dc99065b bellard
  op3out[0] = 0;
1194 dc99065b bellard
1195 dc99065b bellard
  op_index[0] = op_index[1] = op_index[2] = -1;
1196 dc99065b bellard
1197 dc99065b bellard
  the_info = info;
1198 dc99065b bellard
  start_pc = pc;
1199 dc99065b bellard
  start_codep = inbuf;
1200 dc99065b bellard
  codep = inbuf;
1201 dc99065b bellard
  
1202 dc99065b bellard
  ckprefix ();
1203 dc99065b bellard
1204 dc99065b bellard
  FETCH_DATA (info, codep + 1);
1205 dc99065b bellard
  if (*codep == 0xc8)
1206 dc99065b bellard
    enter_instruction = 1;
1207 dc99065b bellard
  else
1208 dc99065b bellard
    enter_instruction = 0;
1209 dc99065b bellard
  
1210 dc99065b bellard
  obufp = obuf;
1211 dc99065b bellard
  
1212 dc99065b bellard
  if (prefixes & PREFIX_REPZ)
1213 dc99065b bellard
    oappend ("repz ");
1214 dc99065b bellard
  if (prefixes & PREFIX_REPNZ)
1215 dc99065b bellard
    oappend ("repnz ");
1216 dc99065b bellard
  if (prefixes & PREFIX_LOCK)
1217 dc99065b bellard
    oappend ("lock ");
1218 dc99065b bellard
  
1219 dc99065b bellard
  if ((prefixes & PREFIX_FWAIT)
1220 dc99065b bellard
      && ((*codep < 0xd8) || (*codep > 0xdf)))
1221 dc99065b bellard
    {
1222 dc99065b bellard
      /* fwait not followed by floating point instruction */
1223 dc99065b bellard
      (*info->fprintf_func) (info->stream, "fwait");
1224 dc99065b bellard
      return (1);
1225 dc99065b bellard
    }
1226 dc99065b bellard
  
1227 dc99065b bellard
  if (prefixes & PREFIX_DATA)
1228 dc99065b bellard
    dflag ^= 1;
1229 dc99065b bellard
  
1230 dc99065b bellard
  if (prefixes & PREFIX_ADR)
1231 dc99065b bellard
    {
1232 dc99065b bellard
      aflag ^= 1;
1233 dc99065b bellard
      if (aflag)
1234 dc99065b bellard
        oappend ("addr32 ");
1235 dc99065b bellard
      else
1236 dc99065b bellard
        oappend ("addr16 ");
1237 dc99065b bellard
    }
1238 dc99065b bellard
  
1239 dc99065b bellard
  if (*codep == 0x0f)
1240 dc99065b bellard
    {
1241 dc99065b bellard
      FETCH_DATA (info, codep + 2);
1242 dc99065b bellard
      dp = &dis386_twobyte[*++codep];
1243 dc99065b bellard
      need_modrm = twobyte_has_modrm[*codep];
1244 dc99065b bellard
    }
1245 dc99065b bellard
  else
1246 dc99065b bellard
    {
1247 dc99065b bellard
      dp = &dis386[*codep];
1248 dc99065b bellard
      need_modrm = onebyte_has_modrm[*codep];
1249 dc99065b bellard
    }
1250 dc99065b bellard
  codep++;
1251 dc99065b bellard
1252 dc99065b bellard
  if (need_modrm)
1253 dc99065b bellard
    {
1254 dc99065b bellard
      FETCH_DATA (info, codep + 1);
1255 dc99065b bellard
      mod = (*codep >> 6) & 3;
1256 dc99065b bellard
      reg = (*codep >> 3) & 7;
1257 dc99065b bellard
      rm = *codep & 7;
1258 dc99065b bellard
    }
1259 dc99065b bellard
1260 dc99065b bellard
  if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
1261 dc99065b bellard
    {
1262 dc99065b bellard
      dofloat (aflag, dflag);
1263 dc99065b bellard
    }
1264 dc99065b bellard
  else
1265 dc99065b bellard
    {
1266 dc99065b bellard
      if (dp->name == NULL)
1267 dc99065b bellard
        dp = &grps[dp->bytemode1][reg];
1268 dc99065b bellard
      
1269 dc99065b bellard
      putop (dp->name, aflag, dflag);
1270 dc99065b bellard
      
1271 dc99065b bellard
      obufp = op1out;
1272 dc99065b bellard
      op_ad = 2;
1273 dc99065b bellard
      if (dp->op1)
1274 dc99065b bellard
        (*dp->op1)(dp->bytemode1, aflag, dflag);
1275 dc99065b bellard
      
1276 dc99065b bellard
      obufp = op2out;
1277 dc99065b bellard
      op_ad = 1;
1278 dc99065b bellard
      if (dp->op2)
1279 dc99065b bellard
        (*dp->op2)(dp->bytemode2, aflag, dflag);
1280 dc99065b bellard
      
1281 dc99065b bellard
      obufp = op3out;
1282 dc99065b bellard
      op_ad = 0;
1283 dc99065b bellard
      if (dp->op3)
1284 dc99065b bellard
        (*dp->op3)(dp->bytemode3, aflag, dflag);
1285 dc99065b bellard
    }
1286 dc99065b bellard
  
1287 dc99065b bellard
  obufp = obuf + strlen (obuf);
1288 dc99065b bellard
  for (i = strlen (obuf); i < 6; i++)
1289 dc99065b bellard
    oappend (" ");
1290 dc99065b bellard
  oappend (" ");
1291 dc99065b bellard
  (*info->fprintf_func) (info->stream, "%s", obuf);
1292 dc99065b bellard
  
1293 dc99065b bellard
  /* enter instruction is printed with operands in the
1294 dc99065b bellard
   * same order as the intel book; everything else
1295 dc99065b bellard
   * is printed in reverse order 
1296 dc99065b bellard
   */
1297 dc99065b bellard
  if (enter_instruction)
1298 dc99065b bellard
    {
1299 dc99065b bellard
      first = op1out;
1300 dc99065b bellard
      second = op2out;
1301 dc99065b bellard
      third = op3out;
1302 dc99065b bellard
      op_ad = op_index[0];
1303 dc99065b bellard
      op_index[0] = op_index[2];
1304 dc99065b bellard
      op_index[2] = op_ad;
1305 dc99065b bellard
    }
1306 dc99065b bellard
  else
1307 dc99065b bellard
    {
1308 dc99065b bellard
      first = op3out;
1309 dc99065b bellard
      second = op2out;
1310 dc99065b bellard
      third = op1out;
1311 dc99065b bellard
    }
1312 dc99065b bellard
  needcomma = 0;
1313 dc99065b bellard
  if (*first)
1314 dc99065b bellard
    {
1315 dc99065b bellard
      if (op_index[0] != -1)
1316 dc99065b bellard
        (*info->print_address_func) (op_address[op_index[0]], info);
1317 dc99065b bellard
      else
1318 dc99065b bellard
        (*info->fprintf_func) (info->stream, "%s", first);
1319 dc99065b bellard
      needcomma = 1;
1320 dc99065b bellard
    }
1321 dc99065b bellard
  if (*second)
1322 dc99065b bellard
    {
1323 dc99065b bellard
      if (needcomma)
1324 dc99065b bellard
        (*info->fprintf_func) (info->stream, ",");
1325 dc99065b bellard
      if (op_index[1] != -1)
1326 dc99065b bellard
        (*info->print_address_func) (op_address[op_index[1]], info);
1327 dc99065b bellard
      else
1328 dc99065b bellard
        (*info->fprintf_func) (info->stream, "%s", second);
1329 dc99065b bellard
      needcomma = 1;
1330 dc99065b bellard
    }
1331 dc99065b bellard
  if (*third)
1332 dc99065b bellard
    {
1333 dc99065b bellard
      if (needcomma)
1334 dc99065b bellard
        (*info->fprintf_func) (info->stream, ",");
1335 dc99065b bellard
      if (op_index[2] != -1)
1336 dc99065b bellard
        (*info->print_address_func) (op_address[op_index[2]], info);
1337 dc99065b bellard
      else
1338 dc99065b bellard
        (*info->fprintf_func) (info->stream, "%s", third);
1339 dc99065b bellard
    }
1340 dc99065b bellard
  return (codep - inbuf);
1341 dc99065b bellard
}
1342 dc99065b bellard
1343 dc99065b bellard
static char *float_mem[] = {
1344 dc99065b bellard
  /* d8 */
1345 dc99065b bellard
  "fadds",
1346 dc99065b bellard
  "fmuls",
1347 dc99065b bellard
  "fcoms",
1348 dc99065b bellard
  "fcomps",
1349 dc99065b bellard
  "fsubs",
1350 dc99065b bellard
  "fsubrs",
1351 dc99065b bellard
  "fdivs",
1352 dc99065b bellard
  "fdivrs",
1353 dc99065b bellard
  /*  d9 */
1354 dc99065b bellard
  "flds",
1355 dc99065b bellard
  "(bad)",
1356 dc99065b bellard
  "fsts",
1357 dc99065b bellard
  "fstps",
1358 dc99065b bellard
  "fldenv",
1359 dc99065b bellard
  "fldcw",
1360 dc99065b bellard
  "fNstenv",
1361 dc99065b bellard
  "fNstcw",
1362 dc99065b bellard
  /* da */
1363 dc99065b bellard
  "fiaddl",
1364 dc99065b bellard
  "fimull",
1365 dc99065b bellard
  "ficoml",
1366 dc99065b bellard
  "ficompl",
1367 dc99065b bellard
  "fisubl",
1368 dc99065b bellard
  "fisubrl",
1369 dc99065b bellard
  "fidivl",
1370 dc99065b bellard
  "fidivrl",
1371 dc99065b bellard
  /* db */
1372 dc99065b bellard
  "fildl",
1373 dc99065b bellard
  "(bad)",
1374 dc99065b bellard
  "fistl",
1375 dc99065b bellard
  "fistpl",
1376 dc99065b bellard
  "(bad)",
1377 dc99065b bellard
  "fldt",
1378 dc99065b bellard
  "(bad)",
1379 dc99065b bellard
  "fstpt",
1380 dc99065b bellard
  /* dc */
1381 dc99065b bellard
  "faddl",
1382 dc99065b bellard
  "fmull",
1383 dc99065b bellard
  "fcoml",
1384 dc99065b bellard
  "fcompl",
1385 dc99065b bellard
  "fsubl",
1386 dc99065b bellard
  "fsubrl",
1387 dc99065b bellard
  "fdivl",
1388 dc99065b bellard
  "fdivrl",
1389 dc99065b bellard
  /* dd */
1390 dc99065b bellard
  "fldl",
1391 dc99065b bellard
  "(bad)",
1392 dc99065b bellard
  "fstl",
1393 dc99065b bellard
  "fstpl",
1394 dc99065b bellard
  "frstor",
1395 dc99065b bellard
  "(bad)",
1396 dc99065b bellard
  "fNsave",
1397 dc99065b bellard
  "fNstsw",
1398 dc99065b bellard
  /* de */
1399 dc99065b bellard
  "fiadd",
1400 dc99065b bellard
  "fimul",
1401 dc99065b bellard
  "ficom",
1402 dc99065b bellard
  "ficomp",
1403 dc99065b bellard
  "fisub",
1404 dc99065b bellard
  "fisubr",
1405 dc99065b bellard
  "fidiv",
1406 dc99065b bellard
  "fidivr",
1407 dc99065b bellard
  /* df */
1408 dc99065b bellard
  "fild",
1409 dc99065b bellard
  "(bad)",
1410 dc99065b bellard
  "fist",
1411 dc99065b bellard
  "fistp",
1412 dc99065b bellard
  "fbld",
1413 dc99065b bellard
  "fildll",
1414 dc99065b bellard
  "fbstp",
1415 dc99065b bellard
  "fistpll",
1416 dc99065b bellard
};
1417 dc99065b bellard
1418 dc99065b bellard
#define ST OP_ST, 0
1419 dc99065b bellard
#define STi OP_STi, 0
1420 dc99065b bellard
1421 dc99065b bellard
#define FGRPd9_2 NULL, NULL, 0
1422 dc99065b bellard
#define FGRPd9_4 NULL, NULL, 1
1423 dc99065b bellard
#define FGRPd9_5 NULL, NULL, 2
1424 dc99065b bellard
#define FGRPd9_6 NULL, NULL, 3
1425 dc99065b bellard
#define FGRPd9_7 NULL, NULL, 4
1426 dc99065b bellard
#define FGRPda_5 NULL, NULL, 5
1427 dc99065b bellard
#define FGRPdb_4 NULL, NULL, 6
1428 dc99065b bellard
#define FGRPde_3 NULL, NULL, 7
1429 dc99065b bellard
#define FGRPdf_4 NULL, NULL, 8
1430 dc99065b bellard
1431 dc99065b bellard
static struct dis386 float_reg[][8] = {
1432 dc99065b bellard
  /* d8 */
1433 dc99065b bellard
  {
1434 dc99065b bellard
    { "fadd",        ST, STi },
1435 dc99065b bellard
    { "fmul",        ST, STi },
1436 dc99065b bellard
    { "fcom",        STi },
1437 dc99065b bellard
    { "fcomp",        STi },
1438 dc99065b bellard
    { "fsub",        ST, STi },
1439 dc99065b bellard
    { "fsubr",        ST, STi },
1440 dc99065b bellard
    { "fdiv",        ST, STi },
1441 dc99065b bellard
    { "fdivr",        ST, STi },
1442 dc99065b bellard
  },
1443 dc99065b bellard
  /* d9 */
1444 dc99065b bellard
  {
1445 dc99065b bellard
    { "fld",        STi },
1446 dc99065b bellard
    { "fxch",        STi },
1447 dc99065b bellard
    { FGRPd9_2 },
1448 dc99065b bellard
    { "(bad)" },
1449 dc99065b bellard
    { FGRPd9_4 },
1450 dc99065b bellard
    { FGRPd9_5 },
1451 dc99065b bellard
    { FGRPd9_6 },
1452 dc99065b bellard
    { FGRPd9_7 },
1453 dc99065b bellard
  },
1454 dc99065b bellard
  /* da */
1455 dc99065b bellard
  {
1456 dc99065b bellard
    { "fcmovb",        ST, STi },
1457 dc99065b bellard
    { "fcmove",        ST, STi },
1458 dc99065b bellard
    { "fcmovbe",ST, STi },
1459 dc99065b bellard
    { "fcmovu",        ST, STi },
1460 dc99065b bellard
    { "(bad)" },
1461 dc99065b bellard
    { FGRPda_5 },
1462 dc99065b bellard
    { "(bad)" },
1463 dc99065b bellard
    { "(bad)" },
1464 dc99065b bellard
  },
1465 dc99065b bellard
  /* db */
1466 dc99065b bellard
  {
1467 dc99065b bellard
    { "fcmovnb",ST, STi },
1468 dc99065b bellard
    { "fcmovne",ST, STi },
1469 dc99065b bellard
    { "fcmovnbe",ST, STi },
1470 dc99065b bellard
    { "fcmovnu",ST, STi },
1471 dc99065b bellard
    { FGRPdb_4 },
1472 dc99065b bellard
    { "fucomi",        ST, STi },
1473 dc99065b bellard
    { "fcomi",        ST, STi },
1474 dc99065b bellard
    { "(bad)" },
1475 dc99065b bellard
  },
1476 dc99065b bellard
  /* dc */
1477 dc99065b bellard
  {
1478 dc99065b bellard
    { "fadd",        STi, ST },
1479 dc99065b bellard
    { "fmul",        STi, ST },
1480 dc99065b bellard
    { "(bad)" },
1481 dc99065b bellard
    { "(bad)" },
1482 dc99065b bellard
    { "fsub",        STi, ST },
1483 dc99065b bellard
    { "fsubr",        STi, ST },
1484 dc99065b bellard
    { "fdiv",        STi, ST },
1485 dc99065b bellard
    { "fdivr",        STi, ST },
1486 dc99065b bellard
  },
1487 dc99065b bellard
  /* dd */
1488 dc99065b bellard
  {
1489 dc99065b bellard
    { "ffree",        STi },
1490 dc99065b bellard
    { "(bad)" },
1491 dc99065b bellard
    { "fst",        STi },
1492 dc99065b bellard
    { "fstp",        STi },
1493 dc99065b bellard
    { "fucom",        STi },
1494 dc99065b bellard
    { "fucomp",        STi },
1495 dc99065b bellard
    { "(bad)" },
1496 dc99065b bellard
    { "(bad)" },
1497 dc99065b bellard
  },
1498 dc99065b bellard
  /* de */
1499 dc99065b bellard
  {
1500 dc99065b bellard
    { "faddp",        STi, ST },
1501 dc99065b bellard
    { "fmulp",        STi, ST },
1502 dc99065b bellard
    { "(bad)" },
1503 dc99065b bellard
    { FGRPde_3 },
1504 dc99065b bellard
    { "fsubp",        STi, ST },
1505 dc99065b bellard
    { "fsubrp",        STi, ST },
1506 dc99065b bellard
    { "fdivp",        STi, ST },
1507 dc99065b bellard
    { "fdivrp",        STi, ST },
1508 dc99065b bellard
  },
1509 dc99065b bellard
  /* df */
1510 dc99065b bellard
  {
1511 dc99065b bellard
    { "(bad)" },
1512 dc99065b bellard
    { "(bad)" },
1513 dc99065b bellard
    { "(bad)" },
1514 dc99065b bellard
    { "(bad)" },
1515 dc99065b bellard
    { FGRPdf_4 },
1516 dc99065b bellard
    { "fucomip",ST, STi },
1517 dc99065b bellard
    { "fcomip", ST, STi },
1518 dc99065b bellard
    { "(bad)" },
1519 dc99065b bellard
  },
1520 dc99065b bellard
};
1521 dc99065b bellard
1522 dc99065b bellard
1523 dc99065b bellard
static char *fgrps[][8] = {
1524 dc99065b bellard
  /* d9_2  0 */
1525 dc99065b bellard
  {
1526 dc99065b bellard
    "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1527 dc99065b bellard
  },
1528 dc99065b bellard
1529 dc99065b bellard
  /* d9_4  1 */
1530 dc99065b bellard
  {
1531 dc99065b bellard
    "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
1532 dc99065b bellard
  },
1533 dc99065b bellard
1534 dc99065b bellard
  /* d9_5  2 */
1535 dc99065b bellard
  {
1536 dc99065b bellard
    "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
1537 dc99065b bellard
  },
1538 dc99065b bellard
1539 dc99065b bellard
  /* d9_6  3 */
1540 dc99065b bellard
  {
1541 dc99065b bellard
    "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
1542 dc99065b bellard
  },
1543 dc99065b bellard
1544 dc99065b bellard
  /* d9_7  4 */
1545 dc99065b bellard
  {
1546 dc99065b bellard
    "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
1547 dc99065b bellard
  },
1548 dc99065b bellard
1549 dc99065b bellard
  /* da_5  5 */
1550 dc99065b bellard
  {
1551 dc99065b bellard
    "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1552 dc99065b bellard
  },
1553 dc99065b bellard
1554 dc99065b bellard
  /* db_4  6 */
1555 dc99065b bellard
  {
1556 dc99065b bellard
    "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
1557 dc99065b bellard
    "fNsetpm(287 only)","(bad)","(bad)","(bad)",
1558 dc99065b bellard
  },
1559 dc99065b bellard
1560 dc99065b bellard
  /* de_3  7 */
1561 dc99065b bellard
  {
1562 dc99065b bellard
    "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1563 dc99065b bellard
  },
1564 dc99065b bellard
1565 dc99065b bellard
  /* df_4  8 */
1566 dc99065b bellard
  {
1567 dc99065b bellard
    "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
1568 dc99065b bellard
  },
1569 dc99065b bellard
};
1570 dc99065b bellard
1571 dc99065b bellard
static void
1572 dc99065b bellard
dofloat (aflag, dflag)
1573 dc99065b bellard
     int aflag;
1574 dc99065b bellard
     int dflag;
1575 dc99065b bellard
{
1576 dc99065b bellard
  struct dis386 *dp;
1577 dc99065b bellard
  unsigned char floatop;
1578 dc99065b bellard
  
1579 dc99065b bellard
  floatop = codep[-1];
1580 dc99065b bellard
  
1581 dc99065b bellard
  if (mod != 3)
1582 dc99065b bellard
    {
1583 dc99065b bellard
      putop (float_mem[(floatop - 0xd8) * 8 + reg], aflag, dflag);
1584 dc99065b bellard
      obufp = op1out;
1585 dc99065b bellard
      OP_E (v_mode, aflag, dflag);
1586 dc99065b bellard
      return;
1587 dc99065b bellard
    }
1588 dc99065b bellard
  codep++;
1589 dc99065b bellard
  
1590 dc99065b bellard
  dp = &float_reg[floatop - 0xd8][reg];
1591 dc99065b bellard
  if (dp->name == NULL)
1592 dc99065b bellard
    {
1593 dc99065b bellard
      putop (fgrps[dp->bytemode1][rm], aflag, dflag);
1594 dc99065b bellard
      /* instruction fnstsw is only one with strange arg */
1595 dc99065b bellard
      if (floatop == 0xdf
1596 dc99065b bellard
          && FETCH_DATA (the_info, codep + 1)
1597 dc99065b bellard
          && *codep == 0xe0)
1598 dc99065b bellard
        strcpy (op1out, "%eax");
1599 dc99065b bellard
    }
1600 dc99065b bellard
  else
1601 dc99065b bellard
    {
1602 dc99065b bellard
      putop (dp->name, aflag, dflag);
1603 dc99065b bellard
      obufp = op1out;
1604 dc99065b bellard
      if (dp->op1)
1605 dc99065b bellard
        (*dp->op1)(dp->bytemode1, aflag, dflag);
1606 dc99065b bellard
      obufp = op2out;
1607 dc99065b bellard
      if (dp->op2)
1608 dc99065b bellard
        (*dp->op2)(dp->bytemode2, aflag, dflag);
1609 dc99065b bellard
    }
1610 dc99065b bellard
}
1611 dc99065b bellard
1612 dc99065b bellard
/* ARGSUSED */
1613 dc99065b bellard
static int
1614 dc99065b bellard
OP_ST (ignore, aflag, dflag)
1615 dc99065b bellard
     int ignore;
1616 dc99065b bellard
     int aflag;
1617 dc99065b bellard
     int dflag;
1618 dc99065b bellard
{
1619 dc99065b bellard
  oappend ("%st");
1620 dc99065b bellard
  return (0);
1621 dc99065b bellard
}
1622 dc99065b bellard
1623 dc99065b bellard
/* ARGSUSED */
1624 dc99065b bellard
static int
1625 dc99065b bellard
OP_STi (ignore, aflag, dflag)
1626 dc99065b bellard
     int ignore;
1627 dc99065b bellard
     int aflag;
1628 dc99065b bellard
     int dflag;
1629 dc99065b bellard
{
1630 dc99065b bellard
  sprintf (scratchbuf, "%%st(%d)", rm);
1631 dc99065b bellard
  oappend (scratchbuf);
1632 dc99065b bellard
  return (0);
1633 dc99065b bellard
}
1634 dc99065b bellard
1635 dc99065b bellard
1636 dc99065b bellard
/* capital letters in template are macros */
1637 dc99065b bellard
static void
1638 dc99065b bellard
putop (template, aflag, dflag)
1639 dc99065b bellard
     char *template;
1640 dc99065b bellard
     int aflag;
1641 dc99065b bellard
     int dflag;
1642 dc99065b bellard
{
1643 dc99065b bellard
  char *p;
1644 dc99065b bellard
  
1645 dc99065b bellard
  for (p = template; *p; p++)
1646 dc99065b bellard
    {
1647 dc99065b bellard
      switch (*p)
1648 dc99065b bellard
        {
1649 dc99065b bellard
        default:
1650 dc99065b bellard
          *obufp++ = *p;
1651 dc99065b bellard
          break;
1652 dc99065b bellard
        case 'C':                /* For jcxz/jecxz */
1653 dc99065b bellard
          if (aflag)
1654 dc99065b bellard
            *obufp++ = 'e';
1655 dc99065b bellard
          break;
1656 dc99065b bellard
        case 'N':
1657 dc99065b bellard
          if ((prefixes & PREFIX_FWAIT) == 0)
1658 dc99065b bellard
            *obufp++ = 'n';
1659 dc99065b bellard
          break;
1660 dc99065b bellard
        case 'S':
1661 dc99065b bellard
          /* operand size flag */
1662 dc99065b bellard
          if (dflag)
1663 dc99065b bellard
            *obufp++ = 'l';
1664 dc99065b bellard
          else
1665 dc99065b bellard
            *obufp++ = 'w';
1666 dc99065b bellard
          break;
1667 dc99065b bellard
        case 'W':
1668 dc99065b bellard
          /* operand size flag for cwtl, cbtw */
1669 dc99065b bellard
          if (dflag)
1670 dc99065b bellard
            *obufp++ = 'w';
1671 dc99065b bellard
          else
1672 dc99065b bellard
            *obufp++ = 'b';
1673 dc99065b bellard
          break;
1674 dc99065b bellard
        }
1675 dc99065b bellard
    }
1676 dc99065b bellard
  *obufp = 0;
1677 dc99065b bellard
}
1678 dc99065b bellard
1679 dc99065b bellard
static void
1680 dc99065b bellard
oappend (s)
1681 dc99065b bellard
     char *s;
1682 dc99065b bellard
{
1683 dc99065b bellard
  strcpy (obufp, s);
1684 dc99065b bellard
  obufp += strlen (s);
1685 dc99065b bellard
  *obufp = 0;
1686 dc99065b bellard
}
1687 dc99065b bellard
1688 dc99065b bellard
static void
1689 dc99065b bellard
append_prefix ()
1690 dc99065b bellard
{
1691 dc99065b bellard
  if (prefixes & PREFIX_CS)
1692 dc99065b bellard
    oappend ("%cs:");
1693 dc99065b bellard
  if (prefixes & PREFIX_DS)
1694 dc99065b bellard
    oappend ("%ds:");
1695 dc99065b bellard
  if (prefixes & PREFIX_SS)
1696 dc99065b bellard
    oappend ("%ss:");
1697 dc99065b bellard
  if (prefixes & PREFIX_ES)
1698 dc99065b bellard
    oappend ("%es:");
1699 dc99065b bellard
  if (prefixes & PREFIX_FS)
1700 dc99065b bellard
    oappend ("%fs:");
1701 dc99065b bellard
  if (prefixes & PREFIX_GS)
1702 dc99065b bellard
    oappend ("%gs:");
1703 dc99065b bellard
}
1704 dc99065b bellard
1705 dc99065b bellard
static int
1706 dc99065b bellard
OP_indirE (bytemode, aflag, dflag)
1707 dc99065b bellard
     int bytemode;
1708 dc99065b bellard
     int aflag;
1709 dc99065b bellard
     int dflag;
1710 dc99065b bellard
{
1711 dc99065b bellard
  oappend ("*");
1712 dc99065b bellard
  return OP_E (bytemode, aflag, dflag);
1713 dc99065b bellard
}
1714 dc99065b bellard
1715 dc99065b bellard
static int
1716 dc99065b bellard
OP_E (bytemode, aflag, dflag)
1717 dc99065b bellard
     int bytemode;
1718 dc99065b bellard
     int aflag;
1719 dc99065b bellard
     int dflag;
1720 dc99065b bellard
{
1721 dc99065b bellard
  int disp;
1722 dc99065b bellard
1723 dc99065b bellard
  /* skip mod/rm byte */
1724 dc99065b bellard
  codep++;
1725 dc99065b bellard
1726 dc99065b bellard
  if (mod == 3)
1727 dc99065b bellard
    {
1728 dc99065b bellard
      switch (bytemode)
1729 dc99065b bellard
        {
1730 dc99065b bellard
        case b_mode:
1731 dc99065b bellard
          oappend (names8[rm]);
1732 dc99065b bellard
          break;
1733 dc99065b bellard
        case w_mode:
1734 dc99065b bellard
          oappend (names16[rm]);
1735 dc99065b bellard
          break;
1736 dc99065b bellard
        case v_mode:
1737 dc99065b bellard
          if (dflag)
1738 dc99065b bellard
            oappend (names32[rm]);
1739 dc99065b bellard
          else
1740 dc99065b bellard
            oappend (names16[rm]);
1741 dc99065b bellard
          break;
1742 dc99065b bellard
        default:
1743 dc99065b bellard
          oappend ("<bad dis table>");
1744 dc99065b bellard
          break;
1745 dc99065b bellard
        }
1746 dc99065b bellard
      return 0;
1747 dc99065b bellard
    }
1748 dc99065b bellard
1749 dc99065b bellard
  disp = 0;
1750 dc99065b bellard
  append_prefix ();
1751 dc99065b bellard
1752 dc99065b bellard
  if (aflag) /* 32 bit address mode */
1753 dc99065b bellard
    {
1754 dc99065b bellard
      int havesib;
1755 dc99065b bellard
      int havebase;
1756 dc99065b bellard
      int base;
1757 dc99065b bellard
      int index = 0;
1758 dc99065b bellard
      int scale = 0;
1759 dc99065b bellard
1760 dc99065b bellard
      havesib = 0;
1761 dc99065b bellard
      havebase = 1;
1762 dc99065b bellard
      base = rm;
1763 dc99065b bellard
1764 dc99065b bellard
      if (base == 4)
1765 dc99065b bellard
        {
1766 dc99065b bellard
          havesib = 1;
1767 dc99065b bellard
          FETCH_DATA (the_info, codep + 1);
1768 dc99065b bellard
          scale = (*codep >> 6) & 3;
1769 dc99065b bellard
          index = (*codep >> 3) & 7;
1770 dc99065b bellard
          base = *codep & 7;
1771 dc99065b bellard
          codep++;
1772 dc99065b bellard
        }
1773 dc99065b bellard
1774 dc99065b bellard
      switch (mod)
1775 dc99065b bellard
        {
1776 dc99065b bellard
        case 0:
1777 dc99065b bellard
          if (base == 5)
1778 dc99065b bellard
            {
1779 dc99065b bellard
              havebase = 0;
1780 dc99065b bellard
              disp = get32 ();
1781 dc99065b bellard
            }
1782 dc99065b bellard
          break;
1783 dc99065b bellard
        case 1:
1784 dc99065b bellard
          FETCH_DATA (the_info, codep + 1);
1785 dc99065b bellard
          disp = *codep++;
1786 dc99065b bellard
          if ((disp & 0x80) != 0)
1787 dc99065b bellard
            disp -= 0x100;
1788 dc99065b bellard
          break;
1789 dc99065b bellard
        case 2:
1790 dc99065b bellard
          disp = get32 ();
1791 dc99065b bellard
          break;
1792 dc99065b bellard
        }
1793 dc99065b bellard
1794 dc99065b bellard
      if (mod != 0 || base == 5)
1795 dc99065b bellard
        {
1796 dc99065b bellard
          sprintf (scratchbuf, "0x%x", disp);
1797 dc99065b bellard
          oappend (scratchbuf);
1798 dc99065b bellard
        }
1799 dc99065b bellard
1800 dc99065b bellard
      if (havebase || (havesib && (index != 4 || scale != 0)))
1801 dc99065b bellard
        {
1802 dc99065b bellard
          oappend ("(");
1803 dc99065b bellard
          if (havebase)
1804 dc99065b bellard
            oappend (names32[base]);
1805 dc99065b bellard
          if (havesib)
1806 dc99065b bellard
            {
1807 dc99065b bellard
              if (index != 4)
1808 dc99065b bellard
                {
1809 dc99065b bellard
                  sprintf (scratchbuf, ",%s", names32[index]);
1810 dc99065b bellard
                  oappend (scratchbuf);
1811 dc99065b bellard
                }
1812 dc99065b bellard
              sprintf (scratchbuf, ",%d", 1 << scale);
1813 dc99065b bellard
              oappend (scratchbuf);
1814 dc99065b bellard
            }
1815 dc99065b bellard
          oappend (")");
1816 dc99065b bellard
        }
1817 dc99065b bellard
    }
1818 dc99065b bellard
  else
1819 dc99065b bellard
    { /* 16 bit address mode */
1820 dc99065b bellard
      switch (mod)
1821 dc99065b bellard
        {
1822 dc99065b bellard
        case 0:
1823 dc99065b bellard
          if (rm == 6)
1824 dc99065b bellard
            {
1825 dc99065b bellard
              disp = get16 ();
1826 dc99065b bellard
              if ((disp & 0x8000) != 0)
1827 dc99065b bellard
                disp -= 0x10000;
1828 dc99065b bellard
            }
1829 dc99065b bellard
          break;
1830 dc99065b bellard
        case 1:
1831 dc99065b bellard
          FETCH_DATA (the_info, codep + 1);
1832 dc99065b bellard
          disp = *codep++;
1833 dc99065b bellard
          if ((disp & 0x80) != 0)
1834 dc99065b bellard
            disp -= 0x100;
1835 dc99065b bellard
          break;
1836 dc99065b bellard
        case 2:
1837 dc99065b bellard
          disp = get16 ();
1838 dc99065b bellard
          if ((disp & 0x8000) != 0)
1839 dc99065b bellard
            disp -= 0x10000;
1840 dc99065b bellard
          break;
1841 dc99065b bellard
        }
1842 dc99065b bellard
1843 dc99065b bellard
      if (mod != 0 || rm == 6)
1844 dc99065b bellard
        {
1845 dc99065b bellard
          sprintf (scratchbuf, "0x%x", disp);
1846 dc99065b bellard
          oappend (scratchbuf);
1847 dc99065b bellard
        }
1848 dc99065b bellard
1849 dc99065b bellard
      if (mod != 0 || rm != 6)
1850 dc99065b bellard
        {
1851 dc99065b bellard
          oappend ("(");
1852 dc99065b bellard
          oappend (index16[rm]);
1853 dc99065b bellard
          oappend (")");
1854 dc99065b bellard
        }
1855 dc99065b bellard
    }
1856 dc99065b bellard
  return 0;
1857 dc99065b bellard
}
1858 dc99065b bellard
1859 dc99065b bellard
static int
1860 dc99065b bellard
OP_G (bytemode, aflag, dflag)
1861 dc99065b bellard
     int bytemode;
1862 dc99065b bellard
     int aflag;
1863 dc99065b bellard
     int dflag;
1864 dc99065b bellard
{
1865 dc99065b bellard
  switch (bytemode) 
1866 dc99065b bellard
    {
1867 dc99065b bellard
    case b_mode:
1868 dc99065b bellard
      oappend (names8[reg]);
1869 dc99065b bellard
      break;
1870 dc99065b bellard
    case w_mode:
1871 dc99065b bellard
      oappend (names16[reg]);
1872 dc99065b bellard
      break;
1873 dc99065b bellard
    case d_mode:
1874 dc99065b bellard
      oappend (names32[reg]);
1875 dc99065b bellard
      break;
1876 dc99065b bellard
    case v_mode:
1877 dc99065b bellard
      if (dflag)
1878 dc99065b bellard
        oappend (names32[reg]);
1879 dc99065b bellard
      else
1880 dc99065b bellard
        oappend (names16[reg]);
1881 dc99065b bellard
      break;
1882 dc99065b bellard
    default:
1883 dc99065b bellard
      oappend ("<internal disassembler error>");
1884 dc99065b bellard
      break;
1885 dc99065b bellard
    }
1886 dc99065b bellard
  return (0);
1887 dc99065b bellard
}
1888 dc99065b bellard
1889 dc99065b bellard
static int
1890 dc99065b bellard
get32 ()
1891 dc99065b bellard
{
1892 dc99065b bellard
  int x = 0;
1893 dc99065b bellard
1894 dc99065b bellard
  FETCH_DATA (the_info, codep + 4);
1895 dc99065b bellard
  x = *codep++ & 0xff;
1896 dc99065b bellard
  x |= (*codep++ & 0xff) << 8;
1897 dc99065b bellard
  x |= (*codep++ & 0xff) << 16;
1898 dc99065b bellard
  x |= (*codep++ & 0xff) << 24;
1899 dc99065b bellard
  return (x);
1900 dc99065b bellard
}
1901 dc99065b bellard
1902 dc99065b bellard
static int
1903 dc99065b bellard
get16 ()
1904 dc99065b bellard
{
1905 dc99065b bellard
  int x = 0;
1906 dc99065b bellard
1907 dc99065b bellard
  FETCH_DATA (the_info, codep + 2);
1908 dc99065b bellard
  x = *codep++ & 0xff;
1909 dc99065b bellard
  x |= (*codep++ & 0xff) << 8;
1910 dc99065b bellard
  return (x);
1911 dc99065b bellard
}
1912 dc99065b bellard
1913 dc99065b bellard
static void
1914 dc99065b bellard
set_op (op)
1915 dc99065b bellard
     int op;
1916 dc99065b bellard
{
1917 dc99065b bellard
  op_index[op_ad] = op_ad;
1918 dc99065b bellard
  op_address[op_ad] = op;
1919 dc99065b bellard
}
1920 dc99065b bellard
1921 dc99065b bellard
static int
1922 dc99065b bellard
OP_REG (code, aflag, dflag)
1923 dc99065b bellard
     int code;
1924 dc99065b bellard
     int aflag;
1925 dc99065b bellard
     int dflag;
1926 dc99065b bellard
{
1927 dc99065b bellard
  char *s;
1928 dc99065b bellard
  
1929 dc99065b bellard
  switch (code) 
1930 dc99065b bellard
    {
1931 dc99065b bellard
    case indir_dx_reg: s = "(%dx)"; break;
1932 dc99065b bellard
        case ax_reg: case cx_reg: case dx_reg: case bx_reg:
1933 dc99065b bellard
        case sp_reg: case bp_reg: case si_reg: case di_reg:
1934 dc99065b bellard
                s = names16[code - ax_reg];
1935 dc99065b bellard
                break;
1936 dc99065b bellard
        case es_reg: case ss_reg: case cs_reg:
1937 dc99065b bellard
        case ds_reg: case fs_reg: case gs_reg:
1938 dc99065b bellard
                s = names_seg[code - es_reg];
1939 dc99065b bellard
                break;
1940 dc99065b bellard
        case al_reg: case ah_reg: case cl_reg: case ch_reg:
1941 dc99065b bellard
        case dl_reg: case dh_reg: case bl_reg: case bh_reg:
1942 dc99065b bellard
                s = names8[code - al_reg];
1943 dc99065b bellard
                break;
1944 dc99065b bellard
        case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
1945 dc99065b bellard
        case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
1946 dc99065b bellard
      if (dflag)
1947 dc99065b bellard
        s = names32[code - eAX_reg];
1948 dc99065b bellard
      else
1949 dc99065b bellard
        s = names16[code - eAX_reg];
1950 dc99065b bellard
      break;
1951 dc99065b bellard
    default:
1952 dc99065b bellard
      s = "<internal disassembler error>";
1953 dc99065b bellard
      break;
1954 dc99065b bellard
    }
1955 dc99065b bellard
  oappend (s);
1956 dc99065b bellard
  return (0);
1957 dc99065b bellard
}
1958 dc99065b bellard
1959 dc99065b bellard
static int
1960 dc99065b bellard
OP_I (bytemode, aflag, dflag)
1961 dc99065b bellard
     int bytemode;
1962 dc99065b bellard
     int aflag;
1963 dc99065b bellard
     int dflag;
1964 dc99065b bellard
{
1965 dc99065b bellard
  int op;
1966 dc99065b bellard
  
1967 dc99065b bellard
  switch (bytemode) 
1968 dc99065b bellard
    {
1969 dc99065b bellard
    case b_mode:
1970 dc99065b bellard
      FETCH_DATA (the_info, codep + 1);
1971 dc99065b bellard
      op = *codep++ & 0xff;
1972 dc99065b bellard
      break;
1973 dc99065b bellard
    case v_mode:
1974 dc99065b bellard
      if (dflag)
1975 dc99065b bellard
        op = get32 ();
1976 dc99065b bellard
      else
1977 dc99065b bellard
        op = get16 ();
1978 dc99065b bellard
      break;
1979 dc99065b bellard
    case w_mode:
1980 dc99065b bellard
      op = get16 ();
1981 dc99065b bellard
      break;
1982 dc99065b bellard
    default:
1983 dc99065b bellard
      oappend ("<internal disassembler error>");
1984 dc99065b bellard
      return (0);
1985 dc99065b bellard
    }
1986 dc99065b bellard
  sprintf (scratchbuf, "$0x%x", op);
1987 dc99065b bellard
  oappend (scratchbuf);
1988 dc99065b bellard
  return (0);
1989 dc99065b bellard
}
1990 dc99065b bellard
1991 dc99065b bellard
static int
1992 dc99065b bellard
OP_sI (bytemode, aflag, dflag)
1993 dc99065b bellard
     int bytemode;
1994 dc99065b bellard
     int aflag;
1995 dc99065b bellard
     int dflag;
1996 dc99065b bellard
{
1997 dc99065b bellard
  int op;
1998 dc99065b bellard
  
1999 dc99065b bellard
  switch (bytemode) 
2000 dc99065b bellard
    {
2001 dc99065b bellard
    case b_mode:
2002 dc99065b bellard
      FETCH_DATA (the_info, codep + 1);
2003 dc99065b bellard
      op = *codep++;
2004 dc99065b bellard
      if ((op & 0x80) != 0)
2005 dc99065b bellard
        op -= 0x100;
2006 dc99065b bellard
      break;
2007 dc99065b bellard
    case v_mode:
2008 dc99065b bellard
      if (dflag)
2009 dc99065b bellard
        op = get32 ();
2010 dc99065b bellard
      else
2011 dc99065b bellard
        {
2012 dc99065b bellard
          op = get16();
2013 dc99065b bellard
          if ((op & 0x8000) != 0)
2014 dc99065b bellard
            op -= 0x10000;
2015 dc99065b bellard
        }
2016 dc99065b bellard
      break;
2017 dc99065b bellard
    case w_mode:
2018 dc99065b bellard
      op = get16 ();
2019 dc99065b bellard
      if ((op & 0x8000) != 0)
2020 dc99065b bellard
        op -= 0x10000;
2021 dc99065b bellard
      break;
2022 dc99065b bellard
    default:
2023 dc99065b bellard
      oappend ("<internal disassembler error>");
2024 dc99065b bellard
      return (0);
2025 dc99065b bellard
    }
2026 dc99065b bellard
  sprintf (scratchbuf, "$0x%x", op);
2027 dc99065b bellard
  oappend (scratchbuf);
2028 dc99065b bellard
  return (0);
2029 dc99065b bellard
}
2030 dc99065b bellard
2031 dc99065b bellard
static int
2032 dc99065b bellard
OP_J (bytemode, aflag, dflag)
2033 dc99065b bellard
     int bytemode;
2034 dc99065b bellard
     int aflag;
2035 dc99065b bellard
     int dflag;
2036 dc99065b bellard
{
2037 dc99065b bellard
  int disp;
2038 dc99065b bellard
  int mask = -1;
2039 dc99065b bellard
  
2040 dc99065b bellard
  switch (bytemode) 
2041 dc99065b bellard
    {
2042 dc99065b bellard
    case b_mode:
2043 dc99065b bellard
      FETCH_DATA (the_info, codep + 1);
2044 dc99065b bellard
      disp = *codep++;
2045 dc99065b bellard
      if ((disp & 0x80) != 0)
2046 dc99065b bellard
        disp -= 0x100;
2047 dc99065b bellard
      break;
2048 dc99065b bellard
    case v_mode:
2049 dc99065b bellard
      if (dflag)
2050 dc99065b bellard
        disp = get32 ();
2051 dc99065b bellard
      else
2052 dc99065b bellard
        {
2053 dc99065b bellard
          disp = get16 ();
2054 dc99065b bellard
          if ((disp & 0x8000) != 0)
2055 dc99065b bellard
            disp -= 0x10000;
2056 dc99065b bellard
          /* for some reason, a data16 prefix on a jump instruction
2057 dc99065b bellard
             means that the pc is masked to 16 bits after the
2058 dc99065b bellard
             displacement is added!  */
2059 dc99065b bellard
          mask = 0xffff;
2060 dc99065b bellard
        }
2061 dc99065b bellard
      break;
2062 dc99065b bellard
    default:
2063 dc99065b bellard
      oappend ("<internal disassembler error>");
2064 dc99065b bellard
      return (0);
2065 dc99065b bellard
    }
2066 dc99065b bellard
  disp = (start_pc + codep - start_codep + disp) & mask;
2067 dc99065b bellard
  set_op (disp);
2068 dc99065b bellard
  sprintf (scratchbuf, "0x%x", disp);
2069 dc99065b bellard
  oappend (scratchbuf);
2070 dc99065b bellard
  return (0);
2071 dc99065b bellard
}
2072 dc99065b bellard
2073 dc99065b bellard
/* ARGSUSED */
2074 dc99065b bellard
static int
2075 dc99065b bellard
OP_SEG (dummy, aflag, dflag)
2076 dc99065b bellard
     int dummy;
2077 dc99065b bellard
     int aflag;
2078 dc99065b bellard
     int dflag;
2079 dc99065b bellard
{
2080 dc99065b bellard
  static char *sreg[] = {
2081 dc99065b bellard
    "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2082 dc99065b bellard
  };
2083 dc99065b bellard
2084 dc99065b bellard
  oappend (sreg[reg]);
2085 dc99065b bellard
  return (0);
2086 dc99065b bellard
}
2087 dc99065b bellard
2088 dc99065b bellard
static int
2089 dc99065b bellard
OP_DIR (size, aflag, dflag)
2090 dc99065b bellard
     int size;
2091 dc99065b bellard
     int aflag;
2092 dc99065b bellard
     int dflag;
2093 dc99065b bellard
{
2094 dc99065b bellard
  int seg, offset;
2095 dc99065b bellard
  
2096 dc99065b bellard
  switch (size) 
2097 dc99065b bellard
    {
2098 dc99065b bellard
    case lptr:
2099 dc99065b bellard
      if (aflag) 
2100 dc99065b bellard
        {
2101 dc99065b bellard
          offset = get32 ();
2102 dc99065b bellard
          seg = get16 ();
2103 dc99065b bellard
        } 
2104 dc99065b bellard
      else 
2105 dc99065b bellard
        {
2106 dc99065b bellard
          offset = get16 ();
2107 dc99065b bellard
          seg = get16 ();
2108 dc99065b bellard
        }
2109 dc99065b bellard
      sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
2110 dc99065b bellard
      oappend (scratchbuf);
2111 dc99065b bellard
      break;
2112 dc99065b bellard
    case v_mode:
2113 dc99065b bellard
      if (aflag)
2114 dc99065b bellard
        offset = get32 ();
2115 dc99065b bellard
      else
2116 dc99065b bellard
        {
2117 dc99065b bellard
          offset = get16 ();
2118 dc99065b bellard
          if ((offset & 0x8000) != 0)
2119 dc99065b bellard
            offset -= 0x10000;
2120 dc99065b bellard
        }
2121 dc99065b bellard
      
2122 dc99065b bellard
      offset = start_pc + codep - start_codep + offset;
2123 dc99065b bellard
      set_op (offset);
2124 dc99065b bellard
      sprintf (scratchbuf, "0x%x", offset);
2125 dc99065b bellard
      oappend (scratchbuf);
2126 dc99065b bellard
      break;
2127 dc99065b bellard
    default:
2128 dc99065b bellard
      oappend ("<internal disassembler error>");
2129 dc99065b bellard
      break;
2130 dc99065b bellard
    }
2131 dc99065b bellard
  return (0);
2132 dc99065b bellard
}
2133 dc99065b bellard
2134 dc99065b bellard
/* ARGSUSED */
2135 dc99065b bellard
static int
2136 dc99065b bellard
OP_OFF (bytemode, aflag, dflag)
2137 dc99065b bellard
     int bytemode;
2138 dc99065b bellard
     int aflag;
2139 dc99065b bellard
     int dflag;
2140 dc99065b bellard
{
2141 dc99065b bellard
  int off;
2142 dc99065b bellard
2143 dc99065b bellard
  append_prefix ();
2144 dc99065b bellard
2145 dc99065b bellard
  if (aflag)
2146 dc99065b bellard
    off = get32 ();
2147 dc99065b bellard
  else
2148 dc99065b bellard
    off = get16 ();
2149 dc99065b bellard
  
2150 dc99065b bellard
  sprintf (scratchbuf, "0x%x", off);
2151 dc99065b bellard
  oappend (scratchbuf);
2152 dc99065b bellard
  return (0);
2153 dc99065b bellard
}
2154 dc99065b bellard
2155 dc99065b bellard
/* ARGSUSED */
2156 dc99065b bellard
static int
2157 dc99065b bellard
OP_ESDI (dummy, aflag, dflag)
2158 dc99065b bellard
     int dummy;
2159 dc99065b bellard
     int aflag;
2160 dc99065b bellard
     int dflag;
2161 dc99065b bellard
{
2162 dc99065b bellard
  oappend ("%es:(");
2163 dc99065b bellard
  oappend (aflag ? "%edi" : "%di");
2164 dc99065b bellard
  oappend (")");
2165 dc99065b bellard
  return (0);
2166 dc99065b bellard
}
2167 dc99065b bellard
2168 dc99065b bellard
/* ARGSUSED */
2169 dc99065b bellard
static int
2170 dc99065b bellard
OP_DSSI (dummy, aflag, dflag)
2171 dc99065b bellard
     int dummy;
2172 dc99065b bellard
     int aflag;
2173 dc99065b bellard
     int dflag;
2174 dc99065b bellard
{
2175 dc99065b bellard
  if ((prefixes
2176 dc99065b bellard
       & (PREFIX_CS
2177 dc99065b bellard
          | PREFIX_DS
2178 dc99065b bellard
          | PREFIX_SS
2179 dc99065b bellard
          | PREFIX_ES
2180 dc99065b bellard
          | PREFIX_FS
2181 dc99065b bellard
          | PREFIX_GS)) == 0)
2182 dc99065b bellard
    prefixes |= PREFIX_DS;
2183 dc99065b bellard
  append_prefix ();
2184 dc99065b bellard
  oappend ("(");
2185 dc99065b bellard
  oappend (aflag ? "%esi" : "%si");
2186 dc99065b bellard
  oappend (")");
2187 dc99065b bellard
  return (0);
2188 dc99065b bellard
}
2189 dc99065b bellard
2190 dc99065b bellard
#if 0
2191 dc99065b bellard
/* Not used.  */
2192 dc99065b bellard

2193 dc99065b bellard
/* ARGSUSED */
2194 dc99065b bellard
static int
2195 dc99065b bellard
OP_ONE (dummy, aflag, dflag)
2196 dc99065b bellard
     int dummy;
2197 dc99065b bellard
     int aflag;
2198 dc99065b bellard
     int dflag;
2199 dc99065b bellard
{
2200 dc99065b bellard
  oappend ("1");
2201 dc99065b bellard
  return (0);
2202 dc99065b bellard
}
2203 dc99065b bellard

2204 dc99065b bellard
#endif
2205 dc99065b bellard
2206 dc99065b bellard
/* ARGSUSED */
2207 dc99065b bellard
static int
2208 dc99065b bellard
OP_C (dummy, aflag, dflag)
2209 dc99065b bellard
     int dummy;
2210 dc99065b bellard
     int aflag;
2211 dc99065b bellard
     int dflag;
2212 dc99065b bellard
{
2213 dc99065b bellard
  codep++; /* skip mod/rm */
2214 dc99065b bellard
  sprintf (scratchbuf, "%%cr%d", reg);
2215 dc99065b bellard
  oappend (scratchbuf);
2216 dc99065b bellard
  return (0);
2217 dc99065b bellard
}
2218 dc99065b bellard
2219 dc99065b bellard
/* ARGSUSED */
2220 dc99065b bellard
static int
2221 dc99065b bellard
OP_D (dummy, aflag, dflag)
2222 dc99065b bellard
     int dummy;
2223 dc99065b bellard
     int aflag;
2224 dc99065b bellard
     int dflag;
2225 dc99065b bellard
{
2226 dc99065b bellard
  codep++; /* skip mod/rm */
2227 dc99065b bellard
  sprintf (scratchbuf, "%%db%d", reg);
2228 dc99065b bellard
  oappend (scratchbuf);
2229 dc99065b bellard
  return (0);
2230 dc99065b bellard
}
2231 dc99065b bellard
2232 dc99065b bellard
/* ARGSUSED */
2233 dc99065b bellard
static int
2234 dc99065b bellard
OP_T (dummy, aflag, dflag)
2235 dc99065b bellard
     int dummy;
2236 dc99065b bellard
     int aflag;
2237 dc99065b bellard
     int dflag;
2238 dc99065b bellard
{
2239 dc99065b bellard
  codep++; /* skip mod/rm */
2240 dc99065b bellard
  sprintf (scratchbuf, "%%tr%d", reg);
2241 dc99065b bellard
  oappend (scratchbuf);
2242 dc99065b bellard
  return (0);
2243 dc99065b bellard
}
2244 dc99065b bellard
2245 dc99065b bellard
static int
2246 dc99065b bellard
OP_rm (bytemode, aflag, dflag)
2247 dc99065b bellard
     int bytemode;
2248 dc99065b bellard
     int aflag;
2249 dc99065b bellard
     int dflag;
2250 dc99065b bellard
{
2251 dc99065b bellard
  switch (bytemode) 
2252 dc99065b bellard
    {
2253 dc99065b bellard
    case d_mode:
2254 dc99065b bellard
      oappend (names32[rm]);
2255 dc99065b bellard
      break;
2256 dc99065b bellard
    case w_mode:
2257 dc99065b bellard
      oappend (names16[rm]);
2258 dc99065b bellard
      break;
2259 dc99065b bellard
    }
2260 dc99065b bellard
  return (0);
2261 dc99065b bellard
}
2262 dc99065b bellard
2263 dc99065b bellard
static int
2264 dc99065b bellard
OP_MMX (bytemode, aflag, dflag)
2265 dc99065b bellard
     int bytemode;
2266 dc99065b bellard
     int aflag;
2267 dc99065b bellard
     int dflag;
2268 dc99065b bellard
{
2269 dc99065b bellard
  sprintf (scratchbuf, "%%mm%d", reg);
2270 dc99065b bellard
  oappend (scratchbuf);
2271 dc99065b bellard
  return 0;
2272 dc99065b bellard
}
2273 dc99065b bellard
2274 dc99065b bellard
static int
2275 dc99065b bellard
OP_EM (bytemode, aflag, dflag)
2276 dc99065b bellard
     int bytemode;
2277 dc99065b bellard
     int aflag;
2278 dc99065b bellard
     int dflag;
2279 dc99065b bellard
{
2280 dc99065b bellard
  if (mod != 3)
2281 dc99065b bellard
    return OP_E (bytemode, aflag, dflag);
2282 dc99065b bellard
2283 dc99065b bellard
  codep++;
2284 dc99065b bellard
  sprintf (scratchbuf, "%%mm%d", rm);
2285 dc99065b bellard
  oappend (scratchbuf);
2286 dc99065b bellard
  return 0;
2287 dc99065b bellard
}
2288 dc99065b bellard
2289 dc99065b bellard
static int
2290 dc99065b bellard
OP_MS (bytemode, aflag, dflag)
2291 dc99065b bellard
     int bytemode;
2292 dc99065b bellard
     int aflag;
2293 dc99065b bellard
     int dflag;
2294 dc99065b bellard
{
2295 dc99065b bellard
  ++codep;
2296 dc99065b bellard
  sprintf (scratchbuf, "%%mm%d", rm);
2297 dc99065b bellard
  oappend (scratchbuf);
2298 dc99065b bellard
  return 0;
2299 dc99065b bellard
}