Revision 3efc10e1 hw/ssi/xilinx_spi.c
| b/hw/ssi/xilinx_spi.c | ||
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#define FIFO_CAPACITY 256 |
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#define TYPE_XILINX_SPI "xlnx.xps-spi" |
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#define XILINX_SPI(obj) OBJECT_CHECK(XilinxSPI, (obj), TYPE_XILINX_SPI) |
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typedef struct XilinxSPI {
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SysBusDevice busdev; |
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SysBusDevice parent_obj; |
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MemoryRegion mmio; |
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qemu_irq irq; |
| ... | ... | |
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static void xlx_spi_update_cs(XilinxSPI *s) |
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{
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int i; |
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int i;
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for (i = 0; i < s->num_cs; ++i) {
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qemu_set_irq(s->cs_lines[i], !(~s->regs[R_SPISSR] & 1 << i)); |
| ... | ... | |
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static void xlx_spi_reset(DeviceState *d) |
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{
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xlx_spi_do_reset(DO_UPCAST(XilinxSPI, busdev.qdev, d));
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xlx_spi_do_reset(XILINX_SPI(d));
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} |
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static inline int spi_master_enabled(XilinxSPI *s) |
| ... | ... | |
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} |
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}; |
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static int xilinx_spi_init(SysBusDevice *dev)
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static int xilinx_spi_init(SysBusDevice *sbd)
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{
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DeviceState *dev = DEVICE(sbd); |
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XilinxSPI *s = XILINX_SPI(dev); |
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int i; |
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XilinxSPI *s = FROM_SYSBUS(typeof(*s), dev); |
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DB_PRINT("\n");
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s->spi = ssi_create_bus(&dev->qdev, "spi");
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s->spi = ssi_create_bus(dev, "spi"); |
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sysbus_init_irq(dev, &s->irq);
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sysbus_init_irq(sbd, &s->irq);
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s->cs_lines = g_new(qemu_irq, s->num_cs); |
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ssi_auto_connect_slaves(DEVICE(s), s->cs_lines, s->spi);
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ssi_auto_connect_slaves(dev, s->cs_lines, s->spi);
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for (i = 0; i < s->num_cs; ++i) {
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sysbus_init_irq(dev, &s->cs_lines[i]);
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sysbus_init_irq(sbd, &s->cs_lines[i]);
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} |
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memory_region_init_io(&s->mmio, OBJECT(s), &spi_ops, s, |
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"xilinx-spi", R_MAX * 4); |
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sysbus_init_mmio(dev, &s->mmio);
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sysbus_init_mmio(sbd, &s->mmio);
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s->irqline = -1; |
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|
| ... | ... | |
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} |
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static const TypeInfo xilinx_spi_info = {
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.name = "xlnx.xps-spi",
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.name = TYPE_XILINX_SPI,
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.parent = TYPE_SYS_BUS_DEVICE, |
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.instance_size = sizeof(XilinxSPI), |
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.class_init = xilinx_spi_class_init, |
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