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#define _GNU_SOURCE
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include <math.h>
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#include <signal.h>
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#include <setjmp.h>
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#include <errno.h>
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#include <sys/ucontext.h>
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#include <sys/mman.h>
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#include <asm/vm86.h>
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#define TEST_CMOV  0
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#define TEST_FCOMI 0
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define stringify(s)        tostring(s)
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#define tostring(s)        #s
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#define CC_C           0x0001
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#define CC_P         0x0004
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#define CC_A        0x0010
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#define CC_Z        0x0040
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#define CC_S    0x0080
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#define CC_O    0x0800
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#define __init_call        __attribute__ ((unused,__section__ (".initcall.init")))
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static void *call_start __init_call = NULL;
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#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
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#define OP add
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#include "test-i386.h"
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#define OP sub
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#include "test-i386.h"
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#define OP xor
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#include "test-i386.h"
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#define OP and
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#include "test-i386.h"
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#define OP or
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#include "test-i386.h"
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#define OP cmp
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#include "test-i386.h"
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#define OP adc
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#define OP_CC
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#include "test-i386.h"
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#define OP sbb
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#define OP_CC
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#include "test-i386.h"
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#define OP inc
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#define OP dec
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#define OP neg
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#define OP not
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#define OP_CC
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#define OP1
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#include "test-i386.h"
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#undef CC_MASK
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#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O)
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#define OP shl
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#include "test-i386-shift.h"
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#define OP shr
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#include "test-i386-shift.h"
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#define OP sar
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#include "test-i386-shift.h"
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#define OP rol
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#include "test-i386-shift.h"
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#define OP ror
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#include "test-i386-shift.h"
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#define OP rcr
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#define OP_CC
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#include "test-i386-shift.h"
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#define OP rcl
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#define OP_CC
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#include "test-i386-shift.h"
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#define OP shld
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#define OP_SHIFTD
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP shrd
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#define OP_SHIFTD
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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/* XXX: should be more precise ? */
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#undef CC_MASK
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#define CC_MASK (CC_C)
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#define OP bt
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP bts
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP btr
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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#define OP btc
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#define OP_NOBYTE
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#include "test-i386-shift.h"
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/* lea test (modrm support) */
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#define TEST_LEA(STR)\
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{\
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    asm("leal " STR ", %0"\
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        : "=r" (res)\
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        : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
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    printf("lea %s = %08x\n", STR, res);\
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}
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#define TEST_LEA16(STR)\
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{\
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    asm(".code16 ; .byte 0x67 ; leal " STR ", %0 ; .code32"\
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        : "=wq" (res)\
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        : "a" (eax), "b" (ebx), "c" (ecx), "d" (edx), "S" (esi), "D" (edi));\
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    printf("lea %s = %08x\n", STR, res);\
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}
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void test_lea(void)
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{
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    int eax, ebx, ecx, edx, esi, edi, res;
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    eax = 0x0001;
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    ebx = 0x0002;
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    ecx = 0x0004;
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    edx = 0x0008;
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    esi = 0x0010;
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    edi = 0x0020;
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    TEST_LEA("0x4000");
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    TEST_LEA("(%%eax)");
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    TEST_LEA("(%%ebx)");
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    TEST_LEA("(%%ecx)");
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    TEST_LEA("(%%edx)");
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    TEST_LEA("(%%esi)");
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    TEST_LEA("(%%edi)");
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    TEST_LEA("0x40(%%eax)");
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    TEST_LEA("0x40(%%ebx)");
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    TEST_LEA("0x40(%%ecx)");
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    TEST_LEA("0x40(%%edx)");
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    TEST_LEA("0x40(%%esi)");
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    TEST_LEA("0x40(%%edi)");
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    TEST_LEA("0x4000(%%eax)");
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    TEST_LEA("0x4000(%%ebx)");
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    TEST_LEA("0x4000(%%ecx)");
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    TEST_LEA("0x4000(%%edx)");
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    TEST_LEA("0x4000(%%esi)");
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    TEST_LEA("0x4000(%%edi)");
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    TEST_LEA("(%%eax, %%ecx)");
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    TEST_LEA("(%%ebx, %%edx)");
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    TEST_LEA("(%%ecx, %%ecx)");
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    TEST_LEA("(%%edx, %%ecx)");
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    TEST_LEA("(%%esi, %%ecx)");
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    TEST_LEA("(%%edi, %%ecx)");
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    TEST_LEA("0x40(%%eax, %%ecx)");
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    TEST_LEA("0x4000(%%ebx, %%edx)");
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    TEST_LEA("(%%ecx, %%ecx, 2)");
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    TEST_LEA("(%%edx, %%ecx, 4)");
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    TEST_LEA("(%%esi, %%ecx, 8)");
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    TEST_LEA("(,%%eax, 2)");
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    TEST_LEA("(,%%ebx, 4)");
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    TEST_LEA("(,%%ecx, 8)");
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    TEST_LEA("0x40(,%%eax, 2)");
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    TEST_LEA("0x40(,%%ebx, 4)");
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    TEST_LEA("0x40(,%%ecx, 8)");
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    TEST_LEA("-10(%%ecx, %%ecx, 2)");
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    TEST_LEA("-10(%%edx, %%ecx, 4)");
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    TEST_LEA("-10(%%esi, %%ecx, 8)");
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    TEST_LEA("0x4000(%%ecx, %%ecx, 2)");
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    TEST_LEA("0x4000(%%edx, %%ecx, 4)");
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    TEST_LEA("0x4000(%%esi, %%ecx, 8)");
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    /* limited 16 bit addressing test */
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    TEST_LEA16("0x4000");
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    TEST_LEA16("(%%bx)");
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    TEST_LEA16("(%%si)");
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    TEST_LEA16("(%%di)");
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    TEST_LEA16("0x40(%%bx)");
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    TEST_LEA16("0x40(%%si)");
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    TEST_LEA16("0x40(%%di)");
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    TEST_LEA16("0x4000(%%bx)");
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    TEST_LEA16("0x4000(%%si)");
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    TEST_LEA16("(%%bx,%%si)");
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    TEST_LEA16("(%%bx,%%di)");
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    TEST_LEA16("0x40(%%bx,%%si)");
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    TEST_LEA16("0x40(%%bx,%%di)");
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    TEST_LEA16("0x4000(%%bx,%%si)");
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    TEST_LEA16("0x4000(%%bx,%%di)");
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}
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#define TEST_JCC(JCC, v1, v2)\
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{\
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    int res;\
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    asm("movl $1, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "j" JCC " 1f\n\t"\
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        "movl $0, %0\n\t"\
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        "1:\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2));\
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    printf("%-10s %d\n", "j" JCC, res);\
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\
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    asm("movl $0, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "set" JCC " %b0\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2));\
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    printf("%-10s %d\n", "set" JCC, res);\
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 if (TEST_CMOV) {\
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    asm("movl $0x12345678, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "cmov" JCC "l %3, %0\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2), "m" (1));\
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        printf("%-10s R=0x%08x\n", "cmov" JCC "l", res);\
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    asm("movl $0x12345678, %0\n\t"\
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        "cmpl %2, %1\n\t"\
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        "cmov" JCC "w %w3, %w0\n\t"\
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        : "=r" (res)\
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        : "r" (v1), "r" (v2), "r" (1));\
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        printf("%-10s R=0x%08x\n", "cmov" JCC "w", res);\
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 } \
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}
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/* various jump tests */
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void test_jcc(void)
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{
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    TEST_JCC("ne", 1, 1);
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    TEST_JCC("ne", 1, 0);
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    TEST_JCC("e", 1, 1);
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    TEST_JCC("e", 1, 0);
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    TEST_JCC("l", 1, 1);
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    TEST_JCC("l", 1, 0);
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    TEST_JCC("l", 1, -1);
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    TEST_JCC("le", 1, 1);
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    TEST_JCC("le", 1, 0);
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    TEST_JCC("le", 1, -1);
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    TEST_JCC("ge", 1, 1);
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    TEST_JCC("ge", 1, 0);
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    TEST_JCC("ge", -1, 1);
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    TEST_JCC("g", 1, 1);
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    TEST_JCC("g", 1, 0);
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    TEST_JCC("g", 1, -1);
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    TEST_JCC("b", 1, 1);
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    TEST_JCC("b", 1, 0);
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    TEST_JCC("b", 1, -1);
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    TEST_JCC("be", 1, 1);
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    TEST_JCC("be", 1, 0);
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    TEST_JCC("be", 1, -1);
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    TEST_JCC("ae", 1, 1);
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    TEST_JCC("ae", 1, 0);
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    TEST_JCC("ae", 1, -1);
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    TEST_JCC("a", 1, 1);
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    TEST_JCC("a", 1, 0);
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    TEST_JCC("a", 1, -1);
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    TEST_JCC("p", 1, 1);
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    TEST_JCC("p", 1, 0);
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    TEST_JCC("np", 1, 1);
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    TEST_JCC("np", 1, 0);
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    TEST_JCC("o", 0x7fffffff, 0);
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    TEST_JCC("o", 0x7fffffff, -1);
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    TEST_JCC("no", 0x7fffffff, 0);
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    TEST_JCC("no", 0x7fffffff, -1);
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    TEST_JCC("s", 0, 1);
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    TEST_JCC("s", 0, -1);
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    TEST_JCC("s", 0, 0);
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    TEST_JCC("ns", 0, 1);
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    TEST_JCC("ns", 0, -1);
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    TEST_JCC("ns", 0, 0);
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}
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#undef CC_MASK
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#define CC_MASK (CC_O | CC_C)
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#define OP mul
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#include "test-i386-muldiv.h"
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#define OP imul
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#include "test-i386-muldiv.h"
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#undef CC_MASK
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#define CC_MASK (0)
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#define OP div
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#include "test-i386-muldiv.h"
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#define OP idiv
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#include "test-i386-muldiv.h"
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void test_imulw2(int op0, int op1) 
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{
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    int res, s1, s0, flags;
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    s0 = op0;
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    s1 = op1;
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    res = s0;
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    flags = 0;
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    asm ("push %4\n\t"
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         "popf\n\t"
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         "imulw %w2, %w0\n\t" 
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         "pushf\n\t"
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         "popl %1\n\t"
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         : "=q" (res), "=g" (flags)
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         : "q" (s1), "0" (res), "1" (flags));
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    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
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           "imulw", s0, s1, res, flags & CC_MASK);
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}
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void test_imull2(int op0, int op1) 
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{
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    int res, s1, s0, flags;
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    s0 = op0;
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    s1 = op1;
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    res = s0;
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    flags = 0;
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    asm ("push %4\n\t"
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         "popf\n\t"
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         "imull %2, %0\n\t" 
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         "pushf\n\t"
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         "popl %1\n\t"
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         : "=q" (res), "=g" (flags)
383 4b74fe1f bellard
         : "q" (s1), "0" (res), "1" (flags));
384 4b74fe1f bellard
    printf("%-10s A=%08x B=%08x R=%08x CC=%04x\n",
385 4b74fe1f bellard
           "imull", s0, s1, res, flags & CC_MASK);
386 4b74fe1f bellard
}
387 4b74fe1f bellard
388 4b74fe1f bellard
void test_mul(void)
389 4b74fe1f bellard
{
390 4b74fe1f bellard
    test_imulb(0x1234561d, 4);
391 4b74fe1f bellard
    test_imulb(3, -4);
392 4b74fe1f bellard
    test_imulb(0x80, 0x80);
393 4b74fe1f bellard
    test_imulb(0x10, 0x10);
394 4b74fe1f bellard
395 4b74fe1f bellard
    test_imulw(0, 0x1234001d, 45);
396 4b74fe1f bellard
    test_imulw(0, 23, -45);
397 4b74fe1f bellard
    test_imulw(0, 0x8000, 0x8000);
398 4b74fe1f bellard
    test_imulw(0, 0x100, 0x100);
399 4b74fe1f bellard
400 4b74fe1f bellard
    test_imull(0, 0x1234001d, 45);
401 4b74fe1f bellard
    test_imull(0, 23, -45);
402 4b74fe1f bellard
    test_imull(0, 0x80000000, 0x80000000);
403 4b74fe1f bellard
    test_imull(0, 0x10000, 0x10000);
404 4b74fe1f bellard
405 4b74fe1f bellard
    test_mulb(0x1234561d, 4);
406 4b74fe1f bellard
    test_mulb(3, -4);
407 4b74fe1f bellard
    test_mulb(0x80, 0x80);
408 4b74fe1f bellard
    test_mulb(0x10, 0x10);
409 4b74fe1f bellard
410 4b74fe1f bellard
    test_mulw(0, 0x1234001d, 45);
411 4b74fe1f bellard
    test_mulw(0, 23, -45);
412 4b74fe1f bellard
    test_mulw(0, 0x8000, 0x8000);
413 4b74fe1f bellard
    test_mulw(0, 0x100, 0x100);
414 4b74fe1f bellard
415 4b74fe1f bellard
    test_mull(0, 0x1234001d, 45);
416 4b74fe1f bellard
    test_mull(0, 23, -45);
417 4b74fe1f bellard
    test_mull(0, 0x80000000, 0x80000000);
418 4b74fe1f bellard
    test_mull(0, 0x10000, 0x10000);
419 4b74fe1f bellard
420 4b74fe1f bellard
    test_imulw2(0x1234001d, 45);
421 4b74fe1f bellard
    test_imulw2(23, -45);
422 4b74fe1f bellard
    test_imulw2(0x8000, 0x8000);
423 4b74fe1f bellard
    test_imulw2(0x100, 0x100);
424 4b74fe1f bellard
425 4b74fe1f bellard
    test_imull2(0x1234001d, 45);
426 4b74fe1f bellard
    test_imull2(23, -45);
427 4b74fe1f bellard
    test_imull2(0x80000000, 0x80000000);
428 4b74fe1f bellard
    test_imull2(0x10000, 0x10000);
429 4b74fe1f bellard
430 4b74fe1f bellard
    test_idivb(0x12341678, 0x127e);
431 4b74fe1f bellard
    test_idivb(0x43210123, -5);
432 4b74fe1f bellard
    test_idivb(0x12340004, -1);
433 4b74fe1f bellard
434 4b74fe1f bellard
    test_idivw(0, 0x12345678, 12347);
435 4b74fe1f bellard
    test_idivw(0, -23223, -45);
436 4b74fe1f bellard
    test_idivw(0, 0x12348000, -1);
437 4b74fe1f bellard
    test_idivw(0x12343, 0x12345678, 0x81238567);
438 4b74fe1f bellard
439 4b74fe1f bellard
    test_idivl(0, 0x12345678, 12347);
440 4b74fe1f bellard
    test_idivl(0, -233223, -45);
441 4b74fe1f bellard
    test_idivl(0, 0x80000000, -1);
442 4b74fe1f bellard
    test_idivl(0x12343, 0x12345678, 0x81234567);
443 4b74fe1f bellard
444 4b74fe1f bellard
    test_divb(0x12341678, 0x127e);
445 4b74fe1f bellard
    test_divb(0x43210123, -5);
446 4b74fe1f bellard
    test_divb(0x12340004, -1);
447 4b74fe1f bellard
448 4b74fe1f bellard
    test_divw(0, 0x12345678, 12347);
449 4b74fe1f bellard
    test_divw(0, -23223, -45);
450 4b74fe1f bellard
    test_divw(0, 0x12348000, -1);
451 4b74fe1f bellard
    test_divw(0x12343, 0x12345678, 0x81238567);
452 4b74fe1f bellard
453 4b74fe1f bellard
    test_divl(0, 0x12345678, 12347);
454 4b74fe1f bellard
    test_divl(0, -233223, -45);
455 4b74fe1f bellard
    test_divl(0, 0x80000000, -1);
456 4b74fe1f bellard
    test_divl(0x12343, 0x12345678, 0x81234567);
457 4b74fe1f bellard
}
458 4b74fe1f bellard
459 9d8e9c09 bellard
#define TEST_BSX(op, size, op0)\
460 9d8e9c09 bellard
{\
461 9d8e9c09 bellard
    int res, val, resz;\
462 9d8e9c09 bellard
    val = op0;\
463 9d8e9c09 bellard
    asm("xorl %1, %1 ; " #op " %" size "2, %" size "0 ; setz %b1" \
464 9d8e9c09 bellard
        : "=r" (res), "=q" (resz)\
465 9d8e9c09 bellard
        : "g" (val));\
466 9d8e9c09 bellard
    printf("%-10s A=%08x R=%08x %d\n", #op, val, resz ? 0 : res, resz);\
467 9d8e9c09 bellard
}
468 9d8e9c09 bellard
469 9d8e9c09 bellard
void test_bsx(void)
470 9d8e9c09 bellard
{
471 9d8e9c09 bellard
    TEST_BSX(bsrw, "w", 0);
472 9d8e9c09 bellard
    TEST_BSX(bsrw, "w", 0x12340128);
473 9d8e9c09 bellard
    TEST_BSX(bsrl, "", 0);
474 9d8e9c09 bellard
    TEST_BSX(bsrl, "", 0x00340128);
475 9d8e9c09 bellard
    TEST_BSX(bsfw, "w", 0);
476 9d8e9c09 bellard
    TEST_BSX(bsfw, "w", 0x12340128);
477 9d8e9c09 bellard
    TEST_BSX(bsfl, "", 0);
478 9d8e9c09 bellard
    TEST_BSX(bsfl, "", 0x00340128);
479 9d8e9c09 bellard
}
480 9d8e9c09 bellard
481 55480af8 bellard
/**********************************************/
482 55480af8 bellard
483 9d8e9c09 bellard
void test_fops(double a, double b)
484 9d8e9c09 bellard
{
485 9d8e9c09 bellard
    printf("a=%f b=%f a+b=%f\n", a, b, a + b);
486 9d8e9c09 bellard
    printf("a=%f b=%f a-b=%f\n", a, b, a - b);
487 9d8e9c09 bellard
    printf("a=%f b=%f a*b=%f\n", a, b, a * b);
488 9d8e9c09 bellard
    printf("a=%f b=%f a/b=%f\n", a, b, a / b);
489 9d8e9c09 bellard
    printf("a=%f b=%f fmod(a, b)=%f\n", a, b, fmod(a, b));
490 9d8e9c09 bellard
    printf("a=%f sqrt(a)=%f\n", a, sqrt(a));
491 9d8e9c09 bellard
    printf("a=%f sin(a)=%f\n", a, sin(a));
492 9d8e9c09 bellard
    printf("a=%f cos(a)=%f\n", a, cos(a));
493 9d8e9c09 bellard
    printf("a=%f tan(a)=%f\n", a, tan(a));
494 9d8e9c09 bellard
    printf("a=%f log(a)=%f\n", a, log(a));
495 9d8e9c09 bellard
    printf("a=%f exp(a)=%f\n", a, exp(a));
496 9d8e9c09 bellard
    printf("a=%f b=%f atan2(a, b)=%f\n", a, b, atan2(a, b));
497 9d8e9c09 bellard
    /* just to test some op combining */
498 9d8e9c09 bellard
    printf("a=%f asin(sin(a))=%f\n", a, asin(sin(a)));
499 9d8e9c09 bellard
    printf("a=%f acos(cos(a))=%f\n", a, acos(cos(a)));
500 9d8e9c09 bellard
    printf("a=%f atan(tan(a))=%f\n", a, atan(tan(a)));
501 9d8e9c09 bellard
502 9d8e9c09 bellard
}
503 9d8e9c09 bellard
504 9d8e9c09 bellard
void test_fcmp(double a, double b)
505 9d8e9c09 bellard
{
506 9d8e9c09 bellard
    printf("(%f<%f)=%d\n",
507 9d8e9c09 bellard
           a, b, a < b);
508 9d8e9c09 bellard
    printf("(%f<=%f)=%d\n",
509 9d8e9c09 bellard
           a, b, a <= b);
510 9d8e9c09 bellard
    printf("(%f==%f)=%d\n",
511 9d8e9c09 bellard
           a, b, a == b);
512 9d8e9c09 bellard
    printf("(%f>%f)=%d\n",
513 9d8e9c09 bellard
           a, b, a > b);
514 9d8e9c09 bellard
    printf("(%f<=%f)=%d\n",
515 9d8e9c09 bellard
           a, b, a >= b);
516 03bfca94 bellard
    if (TEST_FCOMI) {
517 03bfca94 bellard
        unsigned int eflags;
518 03bfca94 bellard
        /* test f(u)comi instruction */
519 03bfca94 bellard
        asm("fcomi %2, %1\n"
520 03bfca94 bellard
            "pushf\n"
521 03bfca94 bellard
            "pop %0\n"
522 03bfca94 bellard
            : "=r" (eflags)
523 03bfca94 bellard
            : "t" (a), "u" (b));
524 03bfca94 bellard
        printf("fcomi(%f %f)=%08x\n", a, b, eflags & (CC_Z | CC_P | CC_C));
525 03bfca94 bellard
    }
526 9d8e9c09 bellard
}
527 9d8e9c09 bellard
528 9d8e9c09 bellard
void test_fcvt(double a)
529 9d8e9c09 bellard
{
530 9d8e9c09 bellard
    float fa;
531 9d8e9c09 bellard
    long double la;
532 ea768640 bellard
    int16_t fpuc;
533 ea768640 bellard
    int i;
534 ea768640 bellard
    int64_t lla;
535 ea768640 bellard
    int ia;
536 ea768640 bellard
    int16_t wa;
537 ea768640 bellard
    double ra;
538 9d8e9c09 bellard
539 9d8e9c09 bellard
    fa = a;
540 9d8e9c09 bellard
    la = a;
541 9d8e9c09 bellard
    printf("(float)%f = %f\n", a, fa);
542 9d8e9c09 bellard
    printf("(long double)%f = %Lf\n", a, la);
543 c5e9815d bellard
    printf("a=%016Lx\n", *(long long *)&a);
544 c5e9815d bellard
    printf("la=%016Lx %04x\n", *(long long *)&la, 
545 c5e9815d bellard
           *(unsigned short *)((char *)(&la) + 8));
546 ea768640 bellard
547 ea768640 bellard
    /* test all roundings */
548 ea768640 bellard
    asm volatile ("fstcw %0" : "=m" (fpuc));
549 ea768640 bellard
    for(i=0;i<4;i++) {
550 ea768640 bellard
        asm volatile ("fldcw %0" : : "m" ((fpuc & ~0x0c00) | (i << 10)));
551 ea768640 bellard
        asm volatile ("fist %0" : "=m" (wa) : "t" (a));
552 ea768640 bellard
        asm volatile ("fistl %0" : "=m" (ia) : "t" (a));
553 ea768640 bellard
        asm volatile ("fistpll %0" : "=m" (lla) : "t" (a) : "st");
554 ea768640 bellard
        asm volatile ("frndint ; fstl %0" : "=m" (ra) : "t" (a));
555 ea768640 bellard
        asm volatile ("fldcw %0" : : "m" (fpuc));
556 ea768640 bellard
        printf("(short)a = %d\n", wa);
557 ea768640 bellard
        printf("(int)a = %d\n", ia);
558 ea768640 bellard
        printf("(int64_t)a = %Ld\n", lla);
559 ea768640 bellard
        printf("rint(a) = %f\n", ra);
560 ea768640 bellard
    }
561 9d8e9c09 bellard
}
562 9d8e9c09 bellard
563 9d8e9c09 bellard
#define TEST(N) \
564 9d8e9c09 bellard
    asm("fld" #N : "=t" (a)); \
565 9d8e9c09 bellard
    printf("fld" #N "= %f\n", a);
566 9d8e9c09 bellard
567 9d8e9c09 bellard
void test_fconst(void)
568 9d8e9c09 bellard
{
569 9d8e9c09 bellard
    double a;
570 9d8e9c09 bellard
    TEST(1);
571 9d8e9c09 bellard
    TEST(l2t);
572 9d8e9c09 bellard
    TEST(l2e);
573 9d8e9c09 bellard
    TEST(pi);
574 9d8e9c09 bellard
    TEST(lg2);
575 9d8e9c09 bellard
    TEST(ln2);
576 9d8e9c09 bellard
    TEST(z);
577 9d8e9c09 bellard
}
578 9d8e9c09 bellard
579 c5e9815d bellard
void test_fbcd(double a)
580 c5e9815d bellard
{
581 c5e9815d bellard
    unsigned short bcd[5];
582 c5e9815d bellard
    double b;
583 c5e9815d bellard
584 c5e9815d bellard
    asm("fbstp %0" : "=m" (bcd[0]) : "t" (a) : "st");
585 c5e9815d bellard
    asm("fbld %1" : "=t" (b) : "m" (bcd[0]));
586 c5e9815d bellard
    printf("a=%f bcd=%04x%04x%04x%04x%04x b=%f\n", 
587 c5e9815d bellard
           a, bcd[4], bcd[3], bcd[2], bcd[1], bcd[0], b);
588 c5e9815d bellard
}
589 c5e9815d bellard
590 03bfca94 bellard
#define TEST_ENV(env, prefix)\
591 03bfca94 bellard
{\
592 03bfca94 bellard
    memset((env), 0xaa, sizeof(*(env)));\
593 03bfca94 bellard
    asm("fld1\n"\
594 03bfca94 bellard
        prefix "fnstenv %1\n"\
595 03bfca94 bellard
        prefix "fldenv %1\n"\
596 e3e86d56 bellard
        : "=t" (res) : "m" (*(env)));\
597 03bfca94 bellard
    printf("res=%f\n", res);\
598 03bfca94 bellard
    printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
599 03bfca94 bellard
           (env)->fpuc,\
600 03bfca94 bellard
           (env)->fpus & 0xff00,\
601 03bfca94 bellard
           (env)->fptag);\
602 03bfca94 bellard
    memset((env), 0xaa, sizeof(*(env)));\
603 03bfca94 bellard
    asm("fld1\n"\
604 03bfca94 bellard
        prefix "fnsave %1\n"\
605 03bfca94 bellard
        prefix "frstor %1\n"\
606 e3e86d56 bellard
        : "=t" (res) : "m" (*(env)));\
607 03bfca94 bellard
    printf("res=%f\n", res);\
608 03bfca94 bellard
    printf("fpuc=%04x fpus=%04x fptag=%04x\n",\
609 03bfca94 bellard
           (env)->fpuc,\
610 03bfca94 bellard
           (env)->fpus & 0xff00,\
611 03bfca94 bellard
           (env)->fptag);\
612 03bfca94 bellard
    printf("ST(0) = %Lf\n",\
613 03bfca94 bellard
           (env)->fpregs[0]);\
614 03bfca94 bellard
}
615 03bfca94 bellard
616 03bfca94 bellard
void test_fenv(void)
617 03bfca94 bellard
{
618 03bfca94 bellard
    struct __attribute__((packed)) {
619 03bfca94 bellard
        uint16_t fpuc;
620 03bfca94 bellard
        uint16_t dummy1;
621 03bfca94 bellard
        uint16_t fpus;
622 03bfca94 bellard
        uint16_t dummy2;
623 03bfca94 bellard
        uint16_t fptag;
624 03bfca94 bellard
        uint16_t dummy3;
625 03bfca94 bellard
        uint32_t ignored[4];
626 03bfca94 bellard
        long double fpregs[8];
627 03bfca94 bellard
    } float_env32;
628 03bfca94 bellard
    struct __attribute__((packed)) {
629 03bfca94 bellard
        uint16_t fpuc;
630 03bfca94 bellard
        uint16_t fpus;
631 03bfca94 bellard
        uint16_t fptag;
632 03bfca94 bellard
        uint16_t ignored[4];
633 03bfca94 bellard
        long double fpregs[8];
634 03bfca94 bellard
    } float_env16;
635 03bfca94 bellard
    double res;
636 03bfca94 bellard
637 03bfca94 bellard
    TEST_ENV(&float_env16, "data16 ");
638 03bfca94 bellard
    TEST_ENV(&float_env32, "");
639 03bfca94 bellard
}
640 03bfca94 bellard
641 9d8e9c09 bellard
void test_floats(void)
642 9d8e9c09 bellard
{
643 9d8e9c09 bellard
    test_fops(2, 3);
644 9d8e9c09 bellard
    test_fops(1.4, -5);
645 9d8e9c09 bellard
    test_fcmp(2, -1);
646 9d8e9c09 bellard
    test_fcmp(2, 2);
647 9d8e9c09 bellard
    test_fcmp(2, 3);
648 ea768640 bellard
    test_fcvt(0.5);
649 ea768640 bellard
    test_fcvt(-0.5);
650 9d8e9c09 bellard
    test_fcvt(1.0/7.0);
651 9d8e9c09 bellard
    test_fcvt(-1.0/9.0);
652 ea768640 bellard
    test_fcvt(32768);
653 ea768640 bellard
    test_fcvt(-1e20);
654 9d8e9c09 bellard
    test_fconst();
655 c5e9815d bellard
    test_fbcd(1234567890123456);
656 c5e9815d bellard
    test_fbcd(-123451234567890);
657 03bfca94 bellard
    test_fenv();
658 9d8e9c09 bellard
}
659 4b74fe1f bellard
660 55480af8 bellard
/**********************************************/
661 55480af8 bellard
662 55480af8 bellard
#define TEST_BCD(op, op0, cc_in, cc_mask)\
663 55480af8 bellard
{\
664 55480af8 bellard
    int res, flags;\
665 55480af8 bellard
    res = op0;\
666 55480af8 bellard
    flags = cc_in;\
667 55480af8 bellard
    asm ("push %3\n\t"\
668 55480af8 bellard
         "popf\n\t"\
669 55480af8 bellard
         #op "\n\t"\
670 55480af8 bellard
         "pushf\n\t"\
671 55480af8 bellard
         "popl %1\n\t"\
672 55480af8 bellard
        : "=a" (res), "=g" (flags)\
673 55480af8 bellard
        : "0" (res), "1" (flags));\
674 55480af8 bellard
    printf("%-10s A=%08x R=%08x CCIN=%04x CC=%04x\n",\
675 55480af8 bellard
           #op, op0, res, cc_in, flags & cc_mask);\
676 55480af8 bellard
}
677 55480af8 bellard
678 55480af8 bellard
void test_bcd(void)
679 55480af8 bellard
{
680 55480af8 bellard
    TEST_BCD(daa, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
681 55480af8 bellard
    TEST_BCD(daa, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
682 55480af8 bellard
    TEST_BCD(daa, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
683 55480af8 bellard
    TEST_BCD(daa, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
684 55480af8 bellard
    TEST_BCD(daa, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
685 55480af8 bellard
    TEST_BCD(daa, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
686 55480af8 bellard
    TEST_BCD(daa, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
687 55480af8 bellard
    TEST_BCD(daa, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
688 55480af8 bellard
    TEST_BCD(daa, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
689 55480af8 bellard
    TEST_BCD(daa, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
690 55480af8 bellard
    TEST_BCD(daa, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
691 55480af8 bellard
    TEST_BCD(daa, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
692 55480af8 bellard
    TEST_BCD(daa, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
693 55480af8 bellard
694 55480af8 bellard
    TEST_BCD(das, 0x12340503, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
695 55480af8 bellard
    TEST_BCD(das, 0x12340506, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
696 55480af8 bellard
    TEST_BCD(das, 0x12340507, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
697 55480af8 bellard
    TEST_BCD(das, 0x12340559, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
698 55480af8 bellard
    TEST_BCD(das, 0x12340560, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
699 55480af8 bellard
    TEST_BCD(das, 0x1234059f, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
700 55480af8 bellard
    TEST_BCD(das, 0x123405a0, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
701 55480af8 bellard
    TEST_BCD(das, 0x12340503, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
702 55480af8 bellard
    TEST_BCD(das, 0x12340506, 0, (CC_C | CC_P | CC_Z | CC_S | CC_A));
703 55480af8 bellard
    TEST_BCD(das, 0x12340503, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
704 55480af8 bellard
    TEST_BCD(das, 0x12340506, CC_C, (CC_C | CC_P | CC_Z | CC_S | CC_A));
705 55480af8 bellard
    TEST_BCD(das, 0x12340503, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
706 55480af8 bellard
    TEST_BCD(das, 0x12340506, CC_C | CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_A));
707 55480af8 bellard
708 55480af8 bellard
    TEST_BCD(aaa, 0x12340205, CC_A, (CC_C | CC_A));
709 55480af8 bellard
    TEST_BCD(aaa, 0x12340306, CC_A, (CC_C | CC_A));
710 55480af8 bellard
    TEST_BCD(aaa, 0x1234040a, CC_A, (CC_C | CC_A));
711 55480af8 bellard
    TEST_BCD(aaa, 0x123405fa, CC_A, (CC_C | CC_A));
712 55480af8 bellard
    TEST_BCD(aaa, 0x12340205, 0, (CC_C | CC_A));
713 55480af8 bellard
    TEST_BCD(aaa, 0x12340306, 0, (CC_C | CC_A));
714 55480af8 bellard
    TEST_BCD(aaa, 0x1234040a, 0, (CC_C | CC_A));
715 55480af8 bellard
    TEST_BCD(aaa, 0x123405fa, 0, (CC_C | CC_A));
716 55480af8 bellard
    
717 55480af8 bellard
    TEST_BCD(aas, 0x12340205, CC_A, (CC_C | CC_A));
718 55480af8 bellard
    TEST_BCD(aas, 0x12340306, CC_A, (CC_C | CC_A));
719 55480af8 bellard
    TEST_BCD(aas, 0x1234040a, CC_A, (CC_C | CC_A));
720 55480af8 bellard
    TEST_BCD(aas, 0x123405fa, CC_A, (CC_C | CC_A));
721 55480af8 bellard
    TEST_BCD(aas, 0x12340205, 0, (CC_C | CC_A));
722 55480af8 bellard
    TEST_BCD(aas, 0x12340306, 0, (CC_C | CC_A));
723 55480af8 bellard
    TEST_BCD(aas, 0x1234040a, 0, (CC_C | CC_A));
724 55480af8 bellard
    TEST_BCD(aas, 0x123405fa, 0, (CC_C | CC_A));
725 55480af8 bellard
726 55480af8 bellard
    TEST_BCD(aam, 0x12340547, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
727 55480af8 bellard
    TEST_BCD(aad, 0x12340407, CC_A, (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));
728 55480af8 bellard
}
729 55480af8 bellard
730 e5918247 bellard
#define TEST_XCHG(op, size, opconst)\
731 e5918247 bellard
{\
732 e5918247 bellard
    int op0, op1;\
733 e5918247 bellard
    op0 = 0x12345678;\
734 e5918247 bellard
    op1 = 0xfbca7654;\
735 e5918247 bellard
    asm(#op " %" size "0, %" size "1" \
736 e5918247 bellard
        : "=q" (op0), opconst (op1) \
737 e5918247 bellard
        : "0" (op0), "1" (op1));\
738 e5918247 bellard
    printf("%-10s A=%08x B=%08x\n",\
739 e5918247 bellard
           #op, op0, op1);\
740 e5918247 bellard
}
741 e5918247 bellard
742 e5918247 bellard
#define TEST_CMPXCHG(op, size, opconst, eax)\
743 e5918247 bellard
{\
744 e5918247 bellard
    int op0, op1;\
745 e5918247 bellard
    op0 = 0x12345678;\
746 e5918247 bellard
    op1 = 0xfbca7654;\
747 e5918247 bellard
    asm(#op " %" size "0, %" size "1" \
748 e5918247 bellard
        : "=q" (op0), opconst (op1) \
749 e5918247 bellard
        : "0" (op0), "1" (op1), "a" (eax));\
750 e5918247 bellard
    printf("%-10s EAX=%08x A=%08x C=%08x\n",\
751 e5918247 bellard
           #op, eax, op0, op1);\
752 e5918247 bellard
}
753 e5918247 bellard
754 e5918247 bellard
void test_xchg(void)
755 e5918247 bellard
{
756 e5918247 bellard
    TEST_XCHG(xchgl, "", "=q");
757 e5918247 bellard
    TEST_XCHG(xchgw, "w", "=q");
758 e5918247 bellard
    TEST_XCHG(xchgb, "b", "=q");
759 e5918247 bellard
760 e5918247 bellard
    TEST_XCHG(xchgl, "", "=m");
761 e5918247 bellard
    TEST_XCHG(xchgw, "w", "=m");
762 e5918247 bellard
    TEST_XCHG(xchgb, "b", "=m");
763 e5918247 bellard
764 e5918247 bellard
    TEST_XCHG(xaddl, "", "=q");
765 e5918247 bellard
    TEST_XCHG(xaddw, "w", "=q");
766 e5918247 bellard
    TEST_XCHG(xaddb, "b", "=q");
767 e5918247 bellard
768 e5918247 bellard
    TEST_XCHG(xaddl, "", "=m");
769 e5918247 bellard
    TEST_XCHG(xaddw, "w", "=m");
770 e5918247 bellard
    TEST_XCHG(xaddb, "b", "=m");
771 e5918247 bellard
772 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfbca7654);
773 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfbca7654);
774 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfbca7654);
775 e5918247 bellard
776 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=q", 0xfffefdfc);
777 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=q", 0xfffefdfc);
778 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=q", 0xfffefdfc);
779 e5918247 bellard
780 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfbca7654);
781 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfbca7654);
782 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfbca7654);
783 e5918247 bellard
784 e5918247 bellard
    TEST_CMPXCHG(cmpxchgl, "", "=m", 0xfffefdfc);
785 e5918247 bellard
    TEST_CMPXCHG(cmpxchgw, "w", "=m", 0xfffefdfc);
786 e5918247 bellard
    TEST_CMPXCHG(cmpxchgb, "b", "=m", 0xfffefdfc);
787 e5918247 bellard
}
788 e5918247 bellard
789 6dbad63e bellard
/**********************************************/
790 6dbad63e bellard
/* segmentation tests */
791 6dbad63e bellard
792 6dbad63e bellard
#include <asm/ldt.h>
793 6dbad63e bellard
#include <linux/unistd.h>
794 6dbad63e bellard
795 6dbad63e bellard
_syscall3(int, modify_ldt, int, func, void *, ptr, unsigned long, bytecount)
796 6dbad63e bellard
797 6dbad63e bellard
uint8_t seg_data1[4096];
798 6dbad63e bellard
uint8_t seg_data2[4096];
799 6dbad63e bellard
800 e5918247 bellard
#define MK_SEL(n) (((n) << 3) | 7)
801 6dbad63e bellard
802 288426fe bellard
#define TEST_LR(op, size, seg, mask)\
803 288426fe bellard
{\
804 288426fe bellard
    int res, res2;\
805 288426fe bellard
    res = 0x12345678;\
806 288426fe bellard
    asm (op " %" size "2, %" size "0\n" \
807 288426fe bellard
         "movl $0, %1\n"\
808 288426fe bellard
         "jnz 1f\n"\
809 288426fe bellard
         "movl $1, %1\n"\
810 288426fe bellard
         "1:\n"\
811 288426fe bellard
         : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
812 288426fe bellard
    printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
813 288426fe bellard
}
814 288426fe bellard
815 6dbad63e bellard
/* NOTE: we use Linux modify_ldt syscall */
816 6dbad63e bellard
void test_segs(void)
817 6dbad63e bellard
{
818 6dbad63e bellard
    struct modify_ldt_ldt_s ldt;
819 6dbad63e bellard
    long long ldt_table[3];
820 04369ff2 bellard
    int res, res2;
821 6dbad63e bellard
    char tmp;
822 e1d4294a bellard
    struct {
823 e1d4294a bellard
        uint32_t offset;
824 e1d4294a bellard
        uint16_t seg;
825 e1d4294a bellard
    } __attribute__((packed)) segoff;
826 6dbad63e bellard
827 6dbad63e bellard
    ldt.entry_number = 1;
828 6dbad63e bellard
    ldt.base_addr = (unsigned long)&seg_data1;
829 6dbad63e bellard
    ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
830 6dbad63e bellard
    ldt.seg_32bit = 1;
831 6dbad63e bellard
    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
832 6dbad63e bellard
    ldt.read_exec_only = 0;
833 6dbad63e bellard
    ldt.limit_in_pages = 1;
834 6dbad63e bellard
    ldt.seg_not_present = 0;
835 6dbad63e bellard
    ldt.useable = 1;
836 6dbad63e bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
837 6dbad63e bellard
838 6dbad63e bellard
    ldt.entry_number = 2;
839 6dbad63e bellard
    ldt.base_addr = (unsigned long)&seg_data2;
840 6dbad63e bellard
    ldt.limit = (sizeof(seg_data2) + 0xfff) >> 12;
841 6dbad63e bellard
    ldt.seg_32bit = 1;
842 6dbad63e bellard
    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
843 6dbad63e bellard
    ldt.read_exec_only = 0;
844 6dbad63e bellard
    ldt.limit_in_pages = 1;
845 6dbad63e bellard
    ldt.seg_not_present = 0;
846 6dbad63e bellard
    ldt.useable = 1;
847 6dbad63e bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
848 6dbad63e bellard
849 6dbad63e bellard
    modify_ldt(0, &ldt_table, sizeof(ldt_table)); /* read ldt entries */
850 04369ff2 bellard
#if 0
851 04369ff2 bellard
    {
852 04369ff2 bellard
        int i;
853 04369ff2 bellard
        for(i=0;i<3;i++)
854 04369ff2 bellard
            printf("%d: %016Lx\n", i, ldt_table[i]);
855 04369ff2 bellard
    }
856 04369ff2 bellard
#endif
857 6dbad63e bellard
    /* do some tests with fs or gs */
858 6dbad63e bellard
    asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
859 6dbad63e bellard
860 6dbad63e bellard
    seg_data1[1] = 0xaa;
861 6dbad63e bellard
    seg_data2[1] = 0x55;
862 6dbad63e bellard
863 6dbad63e bellard
    asm volatile ("fs movzbl 0x1, %0" : "=r" (res));
864 6dbad63e bellard
    printf("FS[1] = %02x\n", res);
865 6dbad63e bellard
866 070893f4 bellard
    asm volatile ("pushl %%gs\n"
867 070893f4 bellard
                  "movl %1, %%gs\n"
868 070893f4 bellard
                  "gs movzbl 0x1, %0\n"
869 070893f4 bellard
                  "popl %%gs\n"
870 070893f4 bellard
                  : "=r" (res)
871 070893f4 bellard
                  : "r" (MK_SEL(2)));
872 6dbad63e bellard
    printf("GS[1] = %02x\n", res);
873 6dbad63e bellard
874 6dbad63e bellard
    /* tests with ds/ss (implicit segment case) */
875 6dbad63e bellard
    tmp = 0xa5;
876 6dbad63e bellard
    asm volatile ("pushl %%ebp\n\t"
877 6dbad63e bellard
                  "pushl %%ds\n\t"
878 6dbad63e bellard
                  "movl %2, %%ds\n\t"
879 6dbad63e bellard
                  "movl %3, %%ebp\n\t"
880 6dbad63e bellard
                  "movzbl 0x1, %0\n\t"
881 6dbad63e bellard
                  "movzbl (%%ebp), %1\n\t"
882 6dbad63e bellard
                  "popl %%ds\n\t"
883 6dbad63e bellard
                  "popl %%ebp\n\t"
884 6dbad63e bellard
                  : "=r" (res), "=r" (res2)
885 6dbad63e bellard
                  : "r" (MK_SEL(1)), "r" (&tmp));
886 6dbad63e bellard
    printf("DS[1] = %02x\n", res);
887 6dbad63e bellard
    printf("SS[tmp] = %02x\n", res2);
888 e1d4294a bellard
889 e1d4294a bellard
    segoff.seg = MK_SEL(2);
890 e1d4294a bellard
    segoff.offset = 0xabcdef12;
891 e1d4294a bellard
    asm volatile("lfs %2, %0\n\t" 
892 e1d4294a bellard
                 "movl %%fs, %1\n\t"
893 e1d4294a bellard
                 : "=r" (res), "=g" (res2) 
894 e1d4294a bellard
                 : "m" (segoff));
895 e1d4294a bellard
    printf("FS:reg = %04x:%08x\n", res2, res);
896 288426fe bellard
897 288426fe bellard
    TEST_LR("larw", "w", MK_SEL(2), 0x0100);
898 288426fe bellard
    TEST_LR("larl", "", MK_SEL(2), 0x0100);
899 288426fe bellard
    TEST_LR("lslw", "w", MK_SEL(2), 0);
900 288426fe bellard
    TEST_LR("lsll", "", MK_SEL(2), 0);
901 288426fe bellard
902 288426fe bellard
    TEST_LR("larw", "w", 0xfff8, 0);
903 288426fe bellard
    TEST_LR("larl", "", 0xfff8, 0);
904 288426fe bellard
    TEST_LR("lslw", "w", 0xfff8, 0);
905 288426fe bellard
    TEST_LR("lsll", "", 0xfff8, 0);
906 6dbad63e bellard
}
907 55480af8 bellard
908 e5918247 bellard
/* 16 bit code test */
909 e5918247 bellard
extern char code16_start, code16_end;
910 e5918247 bellard
extern char code16_func1;
911 e5918247 bellard
extern char code16_func2;
912 e5918247 bellard
extern char code16_func3;
913 a300e691 bellard
914 e5918247 bellard
void test_code16(void)
915 1a9353d2 bellard
{
916 e5918247 bellard
    struct modify_ldt_ldt_s ldt;
917 e5918247 bellard
    int res, res2;
918 a300e691 bellard
919 e5918247 bellard
    /* build a code segment */
920 e5918247 bellard
    ldt.entry_number = 1;
921 e5918247 bellard
    ldt.base_addr = (unsigned long)&code16_start;
922 e5918247 bellard
    ldt.limit = &code16_end - &code16_start;
923 e5918247 bellard
    ldt.seg_32bit = 0;
924 e5918247 bellard
    ldt.contents = MODIFY_LDT_CONTENTS_CODE;
925 e5918247 bellard
    ldt.read_exec_only = 0;
926 e5918247 bellard
    ldt.limit_in_pages = 0;
927 e5918247 bellard
    ldt.seg_not_present = 0;
928 e5918247 bellard
    ldt.useable = 1;
929 e5918247 bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
930 a300e691 bellard
931 e5918247 bellard
    /* call the first function */
932 e5918247 bellard
    asm volatile ("lcall %1, %2" 
933 e5918247 bellard
                  : "=a" (res)
934 e5918247 bellard
                  : "i" (MK_SEL(1)), "i" (&code16_func1): "memory", "cc");
935 e5918247 bellard
    printf("func1() = 0x%08x\n", res);
936 e5918247 bellard
    asm volatile ("lcall %2, %3" 
937 e5918247 bellard
                  : "=a" (res), "=c" (res2)
938 e5918247 bellard
                  : "i" (MK_SEL(1)), "i" (&code16_func2): "memory", "cc");
939 e5918247 bellard
    printf("func2() = 0x%08x spdec=%d\n", res, res2);
940 e5918247 bellard
    asm volatile ("lcall %1, %2" 
941 e5918247 bellard
                  : "=a" (res)
942 e5918247 bellard
                  : "i" (MK_SEL(1)), "i" (&code16_func3): "memory", "cc");
943 e5918247 bellard
    printf("func3() = 0x%08x\n", res);
944 1a9353d2 bellard
}
945 1a9353d2 bellard
946 dd3587f3 bellard
extern char func_lret32;
947 dd3587f3 bellard
extern char func_iret32;
948 dd3587f3 bellard
949 e1d4294a bellard
void test_misc(void)
950 e1d4294a bellard
{
951 e1d4294a bellard
    char table[256];
952 e1d4294a bellard
    int res, i;
953 e1d4294a bellard
954 e1d4294a bellard
    for(i=0;i<256;i++) table[i] = 256 - i;
955 e1d4294a bellard
    res = 0x12345678;
956 e1d4294a bellard
    asm ("xlat" : "=a" (res) : "b" (table), "0" (res));
957 e1d4294a bellard
    printf("xlat: EAX=%08x\n", res);
958 dd3587f3 bellard
959 dd3587f3 bellard
    asm volatile ("pushl %%cs ; call %1" 
960 dd3587f3 bellard
                  : "=a" (res)
961 dd3587f3 bellard
                  : "m" (func_lret32): "memory", "cc");
962 dd3587f3 bellard
    printf("func_lret32=%x\n", res);
963 dd3587f3 bellard
964 dd3587f3 bellard
    asm volatile ("pushfl ; pushl %%cs ; call %1" 
965 dd3587f3 bellard
                  : "=a" (res)
966 dd3587f3 bellard
                  : "m" (func_iret32): "memory", "cc");
967 dd3587f3 bellard
    printf("func_iret32=%x\n", res);
968 dd3587f3 bellard
969 dd3587f3 bellard
    /* specific popl test */
970 dd3587f3 bellard
    asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popl (%%esp) ; popl %0"
971 dd3587f3 bellard
                  : "=g" (res));
972 dd3587f3 bellard
    printf("popl esp=%x\n", res);
973 b2b5fb22 bellard
974 b2b5fb22 bellard
    /* specific popw test */
975 b2b5fb22 bellard
    asm volatile ("pushl $12345432 ; pushl $0x9abcdef ; popw (%%esp) ; addl $2, %%esp ; popl %0"
976 b2b5fb22 bellard
                  : "=g" (res));
977 b2b5fb22 bellard
    printf("popw esp=%x\n", res);
978 e1d4294a bellard
}
979 e1d4294a bellard
980 e1d4294a bellard
uint8_t str_buffer[4096];
981 e1d4294a bellard
982 e1d4294a bellard
#define TEST_STRING1(OP, size, DF, REP)\
983 e1d4294a bellard
{\
984 e1d4294a bellard
    int esi, edi, eax, ecx, eflags;\
985 e1d4294a bellard
\
986 e1d4294a bellard
    esi = (long)(str_buffer + sizeof(str_buffer) / 2);\
987 e1d4294a bellard
    edi = (long)(str_buffer + sizeof(str_buffer) / 2) + 16;\
988 e1d4294a bellard
    eax = 0x12345678;\
989 e1d4294a bellard
    ecx = 17;\
990 e1d4294a bellard
\
991 e1d4294a bellard
    asm volatile ("pushl $0\n\t"\
992 e1d4294a bellard
                  "popf\n\t"\
993 e1d4294a bellard
                  DF "\n\t"\
994 e1d4294a bellard
                  REP #OP size "\n\t"\
995 e1d4294a bellard
                  "cld\n\t"\
996 e1d4294a bellard
                  "pushf\n\t"\
997 e1d4294a bellard
                  "popl %4\n\t"\
998 e1d4294a bellard
                  : "=S" (esi), "=D" (edi), "=a" (eax), "=c" (ecx), "=g" (eflags)\
999 e1d4294a bellard
                  : "0" (esi), "1" (edi), "2" (eax), "3" (ecx));\
1000 e1d4294a bellard
    printf("%-10s ESI=%08x EDI=%08x EAX=%08x ECX=%08x EFL=%04x\n",\
1001 e1d4294a bellard
           REP #OP size, esi, edi, eax, ecx,\
1002 e1d4294a bellard
           eflags & (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A));\
1003 e1d4294a bellard
}
1004 e1d4294a bellard
1005 e1d4294a bellard
#define TEST_STRING(OP, REP)\
1006 e1d4294a bellard
    TEST_STRING1(OP, "b", "", REP);\
1007 e1d4294a bellard
    TEST_STRING1(OP, "w", "", REP);\
1008 e1d4294a bellard
    TEST_STRING1(OP, "l", "", REP);\
1009 e1d4294a bellard
    TEST_STRING1(OP, "b", "std", REP);\
1010 e1d4294a bellard
    TEST_STRING1(OP, "w", "std", REP);\
1011 e1d4294a bellard
    TEST_STRING1(OP, "l", "std", REP)
1012 e1d4294a bellard
1013 e1d4294a bellard
void test_string(void)
1014 e1d4294a bellard
{
1015 e1d4294a bellard
    int i;
1016 e1d4294a bellard
    for(i = 0;i < sizeof(str_buffer); i++)
1017 e1d4294a bellard
        str_buffer[i] = i + 0x56;
1018 e1d4294a bellard
   TEST_STRING(stos, "");
1019 e1d4294a bellard
   TEST_STRING(stos, "rep ");
1020 e1d4294a bellard
   TEST_STRING(lods, ""); /* to verify stos */
1021 e1d4294a bellard
   TEST_STRING(lods, "rep "); 
1022 e1d4294a bellard
   TEST_STRING(movs, "");
1023 e1d4294a bellard
   TEST_STRING(movs, "rep ");
1024 e1d4294a bellard
   TEST_STRING(lods, ""); /* to verify stos */
1025 e1d4294a bellard
1026 e1d4294a bellard
   /* XXX: better tests */
1027 e1d4294a bellard
   TEST_STRING(scas, "");
1028 e1d4294a bellard
   TEST_STRING(scas, "repz ");
1029 e1d4294a bellard
   TEST_STRING(scas, "repnz ");
1030 e1d4294a bellard
   TEST_STRING(cmps, "");
1031 e1d4294a bellard
   TEST_STRING(cmps, "repz ");
1032 e1d4294a bellard
   TEST_STRING(cmps, "repnz ");
1033 e1d4294a bellard
}
1034 e5918247 bellard
1035 3a27ad0b bellard
/* VM86 test */
1036 3a27ad0b bellard
1037 3a27ad0b bellard
static inline void set_bit(uint8_t *a, unsigned int bit)
1038 3a27ad0b bellard
{
1039 3a27ad0b bellard
    a[bit / 8] |= (1 << (bit % 8));
1040 3a27ad0b bellard
}
1041 3a27ad0b bellard
1042 3a27ad0b bellard
static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
1043 3a27ad0b bellard
{
1044 3a27ad0b bellard
    return (uint8_t *)((seg << 4) + (reg & 0xffff));
1045 3a27ad0b bellard
}
1046 3a27ad0b bellard
1047 3a27ad0b bellard
static inline void pushw(struct vm86_regs *r, int val)
1048 3a27ad0b bellard
{
1049 3a27ad0b bellard
    r->esp = (r->esp & ~0xffff) | ((r->esp - 2) & 0xffff);
1050 3a27ad0b bellard
    *(uint16_t *)seg_to_linear(r->ss, r->esp) = val;
1051 3a27ad0b bellard
}
1052 3a27ad0b bellard
1053 3a27ad0b bellard
#undef __syscall_return
1054 3a27ad0b bellard
#define __syscall_return(type, res) \
1055 3a27ad0b bellard
do { \
1056 3a27ad0b bellard
        return (type) (res); \
1057 3a27ad0b bellard
} while (0)
1058 3a27ad0b bellard
1059 3a27ad0b bellard
_syscall2(int, vm86, int, func, struct vm86plus_struct *, v86)
1060 3a27ad0b bellard
1061 3a27ad0b bellard
extern char vm86_code_start;
1062 3a27ad0b bellard
extern char vm86_code_end;
1063 3a27ad0b bellard
1064 3a27ad0b bellard
#define VM86_CODE_CS 0x100
1065 3a27ad0b bellard
#define VM86_CODE_IP 0x100
1066 3a27ad0b bellard
1067 3a27ad0b bellard
void test_vm86(void)
1068 3a27ad0b bellard
{
1069 3a27ad0b bellard
    struct vm86plus_struct ctx;
1070 3a27ad0b bellard
    struct vm86_regs *r;
1071 3a27ad0b bellard
    uint8_t *vm86_mem;
1072 3a27ad0b bellard
    int seg, ret;
1073 3a27ad0b bellard
1074 3a27ad0b bellard
    vm86_mem = mmap((void *)0x00000000, 0x110000, 
1075 3a27ad0b bellard
                    PROT_WRITE | PROT_READ | PROT_EXEC, 
1076 3a27ad0b bellard
                    MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
1077 3a27ad0b bellard
    if (vm86_mem == MAP_FAILED) {
1078 3a27ad0b bellard
        printf("ERROR: could not map vm86 memory");
1079 3a27ad0b bellard
        return;
1080 3a27ad0b bellard
    }
1081 3a27ad0b bellard
    memset(&ctx, 0, sizeof(ctx));
1082 3a27ad0b bellard
1083 3a27ad0b bellard
    /* init basic registers */
1084 3a27ad0b bellard
    r = &ctx.regs;
1085 3a27ad0b bellard
    r->eip = VM86_CODE_IP;
1086 3a27ad0b bellard
    r->esp = 0xfffe;
1087 3a27ad0b bellard
    seg = VM86_CODE_CS;
1088 3a27ad0b bellard
    r->cs = seg;
1089 3a27ad0b bellard
    r->ss = seg;
1090 3a27ad0b bellard
    r->ds = seg;
1091 3a27ad0b bellard
    r->es = seg;
1092 3a27ad0b bellard
    r->fs = seg;
1093 3a27ad0b bellard
    r->gs = seg;
1094 3a27ad0b bellard
    r->eflags = VIF_MASK;
1095 3a27ad0b bellard
1096 3a27ad0b bellard
    /* move code to proper address. We use the same layout as a .com
1097 3a27ad0b bellard
       dos program. */
1098 3a27ad0b bellard
    memcpy(vm86_mem + (VM86_CODE_CS << 4) + VM86_CODE_IP, 
1099 3a27ad0b bellard
           &vm86_code_start, &vm86_code_end - &vm86_code_start);
1100 3a27ad0b bellard
1101 3a27ad0b bellard
    /* mark int 0x21 as being emulated */
1102 3a27ad0b bellard
    set_bit((uint8_t *)&ctx.int_revectored, 0x21);
1103 3a27ad0b bellard
1104 3a27ad0b bellard
    for(;;) {
1105 3a27ad0b bellard
        ret = vm86(VM86_ENTER, &ctx);
1106 3a27ad0b bellard
        switch(VM86_TYPE(ret)) {
1107 3a27ad0b bellard
        case VM86_INTx:
1108 3a27ad0b bellard
            {
1109 3a27ad0b bellard
                int int_num, ah;
1110 3a27ad0b bellard
                
1111 3a27ad0b bellard
                int_num = VM86_ARG(ret);
1112 3a27ad0b bellard
                if (int_num != 0x21)
1113 3a27ad0b bellard
                    goto unknown_int;
1114 3a27ad0b bellard
                ah = (r->eax >> 8) & 0xff;
1115 3a27ad0b bellard
                switch(ah) {
1116 3a27ad0b bellard
                case 0x00: /* exit */
1117 3a27ad0b bellard
                    goto the_end;
1118 3a27ad0b bellard
                case 0x02: /* write char */
1119 3a27ad0b bellard
                    {
1120 3a27ad0b bellard
                        uint8_t c = r->edx;
1121 3a27ad0b bellard
                        putchar(c);
1122 3a27ad0b bellard
                    }
1123 3a27ad0b bellard
                    break;
1124 3a27ad0b bellard
                case 0x09: /* write string */
1125 3a27ad0b bellard
                    {
1126 3a27ad0b bellard
                        uint8_t c, *ptr;
1127 3a27ad0b bellard
                        ptr = seg_to_linear(r->ds, r->edx);
1128 3a27ad0b bellard
                        for(;;) {
1129 3a27ad0b bellard
                            c = *ptr++;
1130 3a27ad0b bellard
                            if (c == '$')
1131 3a27ad0b bellard
                                break;
1132 3a27ad0b bellard
                            putchar(c);
1133 3a27ad0b bellard
                        }
1134 3a27ad0b bellard
                        r->eax = (r->eax & ~0xff) | '$';
1135 3a27ad0b bellard
                    }
1136 3a27ad0b bellard
                    break;
1137 3a27ad0b bellard
                case 0xff: /* extension: write hex number in edx */
1138 3a27ad0b bellard
                    printf("%08x\n", (int)r->edx);
1139 3a27ad0b bellard
                    break;
1140 3a27ad0b bellard
                default:
1141 3a27ad0b bellard
                unknown_int:
1142 3a27ad0b bellard
                    printf("unsupported int 0x%02x\n", int_num);
1143 3a27ad0b bellard
                    goto the_end;
1144 3a27ad0b bellard
                }
1145 3a27ad0b bellard
            }
1146 3a27ad0b bellard
            break;
1147 3a27ad0b bellard
        case VM86_SIGNAL:
1148 3a27ad0b bellard
            /* a signal came, we just ignore that */
1149 3a27ad0b bellard
            break;
1150 3a27ad0b bellard
        case VM86_STI:
1151 3a27ad0b bellard
            break;
1152 3a27ad0b bellard
        default:
1153 3a27ad0b bellard
            printf("ERROR: unhandled vm86 return code (0x%x)\n", ret);
1154 3a27ad0b bellard
            goto the_end;
1155 3a27ad0b bellard
        }
1156 3a27ad0b bellard
    }
1157 3a27ad0b bellard
 the_end:
1158 3a27ad0b bellard
    printf("VM86 end\n");
1159 3a27ad0b bellard
    munmap(vm86_mem, 0x110000);
1160 3a27ad0b bellard
}
1161 3a27ad0b bellard
1162 3a27ad0b bellard
/* exception tests */
1163 3a27ad0b bellard
#ifndef REG_EAX
1164 3a27ad0b bellard
#define REG_EAX EAX
1165 3a27ad0b bellard
#define REG_EBX EBX
1166 3a27ad0b bellard
#define REG_ECX ECX
1167 3a27ad0b bellard
#define REG_EDX EDX
1168 3a27ad0b bellard
#define REG_ESI ESI
1169 3a27ad0b bellard
#define REG_EDI EDI
1170 3a27ad0b bellard
#define REG_EBP EBP
1171 3a27ad0b bellard
#define REG_ESP ESP
1172 3a27ad0b bellard
#define REG_EIP EIP
1173 3a27ad0b bellard
#define REG_EFL EFL
1174 3a27ad0b bellard
#define REG_TRAPNO TRAPNO
1175 3a27ad0b bellard
#define REG_ERR ERR
1176 3a27ad0b bellard
#endif
1177 3a27ad0b bellard
1178 3a27ad0b bellard
jmp_buf jmp_env;
1179 3a27ad0b bellard
int v1;
1180 3a27ad0b bellard
int tab[2];
1181 3a27ad0b bellard
1182 3a27ad0b bellard
void sig_handler(int sig, siginfo_t *info, void *puc)
1183 3a27ad0b bellard
{
1184 3a27ad0b bellard
    struct ucontext *uc = puc;
1185 3a27ad0b bellard
1186 3a27ad0b bellard
    printf("si_signo=%d si_errno=%d si_code=%d",
1187 3a27ad0b bellard
           info->si_signo, info->si_errno, info->si_code);
1188 e3b32540 bellard
    printf(" si_addr=0x%08lx",
1189 e3b32540 bellard
           (unsigned long)info->si_addr);
1190 3a27ad0b bellard
    printf("\n");
1191 3a27ad0b bellard
1192 3a27ad0b bellard
    printf("trapno=0x%02x err=0x%08x",
1193 3a27ad0b bellard
           uc->uc_mcontext.gregs[REG_TRAPNO],
1194 3a27ad0b bellard
           uc->uc_mcontext.gregs[REG_ERR]);
1195 e3b32540 bellard
    printf(" EIP=0x%08x", uc->uc_mcontext.gregs[REG_EIP]);
1196 3a27ad0b bellard
    printf("\n");
1197 3a27ad0b bellard
    longjmp(jmp_env, 1);
1198 3a27ad0b bellard
}
1199 3a27ad0b bellard
1200 3a27ad0b bellard
void test_exceptions(void)
1201 3a27ad0b bellard
{
1202 e3b32540 bellard
    struct modify_ldt_ldt_s ldt;
1203 3a27ad0b bellard
    struct sigaction act;
1204 3a27ad0b bellard
    volatile int val;
1205 3a27ad0b bellard
    
1206 3a27ad0b bellard
    act.sa_sigaction = sig_handler;
1207 3a27ad0b bellard
    sigemptyset(&act.sa_mask);
1208 3a27ad0b bellard
    act.sa_flags = SA_SIGINFO;
1209 3a27ad0b bellard
    sigaction(SIGFPE, &act, NULL);
1210 3a27ad0b bellard
    sigaction(SIGILL, &act, NULL);
1211 3a27ad0b bellard
    sigaction(SIGSEGV, &act, NULL);
1212 e3b32540 bellard
    sigaction(SIGBUS, &act, NULL);
1213 3a27ad0b bellard
    sigaction(SIGTRAP, &act, NULL);
1214 3a27ad0b bellard
1215 3a27ad0b bellard
    /* test division by zero reporting */
1216 e3b32540 bellard
    printf("DIVZ exception:\n");
1217 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1218 3a27ad0b bellard
        /* now divide by zero */
1219 3a27ad0b bellard
        v1 = 0;
1220 3a27ad0b bellard
        v1 = 2 / v1;
1221 3a27ad0b bellard
    }
1222 3a27ad0b bellard
1223 e3b32540 bellard
    printf("BOUND exception:\n");
1224 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1225 3a27ad0b bellard
        /* bound exception */
1226 3a27ad0b bellard
        tab[0] = 1;
1227 3a27ad0b bellard
        tab[1] = 10;
1228 3a27ad0b bellard
        asm volatile ("bound %0, %1" : : "r" (11), "m" (tab));
1229 3a27ad0b bellard
    }
1230 3a27ad0b bellard
1231 e3b32540 bellard
    printf("segment exceptions:\n");
1232 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1233 e3b32540 bellard
        /* load an invalid segment */
1234 e3b32540 bellard
        asm volatile ("movl %0, %%fs" : : "r" ((0x1234 << 3) | 1));
1235 e3b32540 bellard
    }
1236 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1237 e3b32540 bellard
        /* null data segment is valid */
1238 e3b32540 bellard
        asm volatile ("movl %0, %%fs" : : "r" (3));
1239 e3b32540 bellard
        /* null stack segment */
1240 e3b32540 bellard
        asm volatile ("movl %0, %%ss" : : "r" (3));
1241 e3b32540 bellard
    }
1242 e3b32540 bellard
1243 e3b32540 bellard
    ldt.entry_number = 1;
1244 e3b32540 bellard
    ldt.base_addr = (unsigned long)&seg_data1;
1245 e3b32540 bellard
    ldt.limit = (sizeof(seg_data1) + 0xfff) >> 12;
1246 e3b32540 bellard
    ldt.seg_32bit = 1;
1247 e3b32540 bellard
    ldt.contents = MODIFY_LDT_CONTENTS_DATA;
1248 e3b32540 bellard
    ldt.read_exec_only = 0;
1249 e3b32540 bellard
    ldt.limit_in_pages = 1;
1250 e3b32540 bellard
    ldt.seg_not_present = 1;
1251 e3b32540 bellard
    ldt.useable = 1;
1252 e3b32540 bellard
    modify_ldt(1, &ldt, sizeof(ldt)); /* write ldt entry */
1253 e3b32540 bellard
1254 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1255 e3b32540 bellard
        /* segment not present */
1256 e3b32540 bellard
        asm volatile ("movl %0, %%fs" : : "r" (MK_SEL(1)));
1257 e3b32540 bellard
    }
1258 e3b32540 bellard
1259 3a27ad0b bellard
    /* test SEGV reporting */
1260 e3b32540 bellard
    printf("PF exception:\n");
1261 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1262 e3b32540 bellard
        val = 1;
1263 ede28208 bellard
        /* we add a nop to test a weird PC retrieval case */
1264 ede28208 bellard
        asm volatile ("nop");
1265 3a27ad0b bellard
        /* now store in an invalid address */
1266 3a27ad0b bellard
        *(char *)0x1234 = 1;
1267 3a27ad0b bellard
    }
1268 3a27ad0b bellard
1269 3a27ad0b bellard
    /* test SEGV reporting */
1270 e3b32540 bellard
    printf("PF exception:\n");
1271 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1272 e3b32540 bellard
        val = 1;
1273 3a27ad0b bellard
        /* read from an invalid address */
1274 3a27ad0b bellard
        v1 = *(char *)0x1234;
1275 3a27ad0b bellard
    }
1276 3a27ad0b bellard
    
1277 3a27ad0b bellard
    /* test illegal instruction reporting */
1278 3a27ad0b bellard
    printf("UD2 exception:\n");
1279 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1280 3a27ad0b bellard
        /* now execute an invalid instruction */
1281 3a27ad0b bellard
        asm volatile("ud2");
1282 3a27ad0b bellard
    }
1283 3a27ad0b bellard
    
1284 3a27ad0b bellard
    printf("INT exception:\n");
1285 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1286 3a27ad0b bellard
        asm volatile ("int $0xfd");
1287 3a27ad0b bellard
    }
1288 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1289 e3b32540 bellard
        asm volatile ("int $0x01");
1290 e3b32540 bellard
    }
1291 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1292 e3b32540 bellard
        asm volatile (".byte 0xcd, 0x03");
1293 e3b32540 bellard
    }
1294 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1295 e3b32540 bellard
        asm volatile ("int $0x04");
1296 e3b32540 bellard
    }
1297 e3b32540 bellard
    if (setjmp(jmp_env) == 0) {
1298 e3b32540 bellard
        asm volatile ("int $0x05");
1299 e3b32540 bellard
    }
1300 3a27ad0b bellard
1301 3a27ad0b bellard
    printf("INT3 exception:\n");
1302 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1303 3a27ad0b bellard
        asm volatile ("int3");
1304 3a27ad0b bellard
    }
1305 3a27ad0b bellard
1306 3a27ad0b bellard
    printf("CLI exception:\n");
1307 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1308 3a27ad0b bellard
        asm volatile ("cli");
1309 3a27ad0b bellard
    }
1310 3a27ad0b bellard
1311 3a27ad0b bellard
    printf("STI exception:\n");
1312 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1313 3a27ad0b bellard
        asm volatile ("cli");
1314 3a27ad0b bellard
    }
1315 3a27ad0b bellard
1316 3a27ad0b bellard
    printf("INTO exception:\n");
1317 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1318 3a27ad0b bellard
        /* overflow exception */
1319 3a27ad0b bellard
        asm volatile ("addl $1, %0 ; into" : : "r" (0x7fffffff));
1320 3a27ad0b bellard
    }
1321 3a27ad0b bellard
1322 3a27ad0b bellard
    printf("OUTB exception:\n");
1323 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1324 3a27ad0b bellard
        asm volatile ("outb %%al, %%dx" : : "d" (0x4321), "a" (0));
1325 3a27ad0b bellard
    }
1326 3a27ad0b bellard
1327 3a27ad0b bellard
    printf("INB exception:\n");
1328 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1329 3a27ad0b bellard
        asm volatile ("inb %%dx, %%al" : "=a" (val) : "d" (0x4321));
1330 3a27ad0b bellard
    }
1331 3a27ad0b bellard
1332 3a27ad0b bellard
    printf("REP OUTSB exception:\n");
1333 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1334 3a27ad0b bellard
        asm volatile ("rep outsb" : : "d" (0x4321), "S" (tab), "c" (1));
1335 3a27ad0b bellard
    }
1336 3a27ad0b bellard
1337 3a27ad0b bellard
    printf("REP INSB exception:\n");
1338 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1339 3a27ad0b bellard
        asm volatile ("rep insb" : : "d" (0x4321), "D" (tab), "c" (1));
1340 3a27ad0b bellard
    }
1341 3a27ad0b bellard
1342 3a27ad0b bellard
    printf("HLT exception:\n");
1343 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1344 3a27ad0b bellard
        asm volatile ("hlt");
1345 3a27ad0b bellard
    }
1346 3a27ad0b bellard
1347 3a27ad0b bellard
    printf("single step exception:\n");
1348 3a27ad0b bellard
    val = 0;
1349 3a27ad0b bellard
    if (setjmp(jmp_env) == 0) {
1350 3a27ad0b bellard
        asm volatile ("pushf\n"
1351 3a27ad0b bellard
                      "orl $0x00100, (%%esp)\n"
1352 3a27ad0b bellard
                      "popf\n"
1353 3a27ad0b bellard
                      "movl $0xabcd, %0\n" 
1354 3a27ad0b bellard
                      "movl $0x0, %0\n" : "=m" (val) : : "cc", "memory");
1355 3a27ad0b bellard
    }
1356 3a27ad0b bellard
    printf("val=0x%x\n", val);
1357 3a27ad0b bellard
}
1358 3a27ad0b bellard
1359 3a27ad0b bellard
/* self modifying code test */
1360 3a27ad0b bellard
uint8_t code[] = {
1361 3a27ad0b bellard
    0xb8, 0x1, 0x00, 0x00, 0x00, /* movl $1, %eax */
1362 3a27ad0b bellard
    0xc3, /* ret */
1363 3a27ad0b bellard
};
1364 3a27ad0b bellard
1365 d1fe2b24 bellard
typedef int FuncType(void);
1366 d1fe2b24 bellard
1367 3a27ad0b bellard
void test_self_modifying_code(void)
1368 3a27ad0b bellard
{
1369 d1fe2b24 bellard
    int i;
1370 3a27ad0b bellard
1371 3a27ad0b bellard
    printf("self modifying code:\n");
1372 d1fe2b24 bellard
    printf("func1 = 0x%x\n", ((FuncType *)code)());
1373 d1fe2b24 bellard
    for(i = 2; i <= 4; i++) {
1374 d1fe2b24 bellard
        code[1] = i;
1375 d1fe2b24 bellard
        printf("func%d = 0x%x\n", i, ((FuncType *)code)());
1376 d1fe2b24 bellard
    }
1377 3a27ad0b bellard
}
1378 3a27ad0b bellard
    
1379 4d1135e4 bellard
static void *call_end __init_call = NULL;
1380 4d1135e4 bellard
1381 4d1135e4 bellard
int main(int argc, char **argv)
1382 4d1135e4 bellard
{
1383 4d1135e4 bellard
    void **ptr;
1384 4d1135e4 bellard
    void (*func)(void);
1385 4b74fe1f bellard
1386 4d1135e4 bellard
    ptr = &call_start + 1;
1387 4d1135e4 bellard
    while (*ptr != NULL) {
1388 4d1135e4 bellard
        func = *ptr++;
1389 4d1135e4 bellard
        func();
1390 4d1135e4 bellard
    }
1391 9d8e9c09 bellard
    test_bsx();
1392 d57c4e01 bellard
    test_mul();
1393 4d1135e4 bellard
    test_jcc();
1394 9d8e9c09 bellard
    test_floats();
1395 55480af8 bellard
    test_bcd();
1396 1a9353d2 bellard
    test_xchg();
1397 e1d4294a bellard
    test_string();
1398 e1d4294a bellard
    test_misc();
1399 6dbad63e bellard
    test_lea();
1400 6dbad63e bellard
    test_segs();
1401 e5918247 bellard
    test_code16();
1402 3a27ad0b bellard
    test_vm86();
1403 3a27ad0b bellard
    test_exceptions();
1404 3a27ad0b bellard
    test_self_modifying_code();
1405 4d1135e4 bellard
    return 0;
1406 4d1135e4 bellard
}