root / tcg / tcg-opc.h @ 405cf9ff
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| 1 | c896fe29 | bellard | /*
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| 2 | c896fe29 | bellard | * Tiny Code Generator for QEMU
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| 3 | c896fe29 | bellard | *
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| 4 | c896fe29 | bellard | * Copyright (c) 2008 Fabrice Bellard
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| 5 | c896fe29 | bellard | *
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| 6 | c896fe29 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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| 7 | c896fe29 | bellard | * of this software and associated documentation files (the "Software"), to deal
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| 8 | c896fe29 | bellard | * in the Software without restriction, including without limitation the rights
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| 9 | c896fe29 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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| 10 | c896fe29 | bellard | * copies of the Software, and to permit persons to whom the Software is
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| 11 | c896fe29 | bellard | * furnished to do so, subject to the following conditions:
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| 12 | c896fe29 | bellard | *
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| 13 | c896fe29 | bellard | * The above copyright notice and this permission notice shall be included in
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| 14 | c896fe29 | bellard | * all copies or substantial portions of the Software.
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| 15 | c896fe29 | bellard | *
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| 16 | c896fe29 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 17 | c896fe29 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 18 | c896fe29 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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| 19 | c896fe29 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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| 20 | c896fe29 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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| 21 | c896fe29 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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| 22 | c896fe29 | bellard | * THE SOFTWARE.
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| 23 | c896fe29 | bellard | */
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| 24 | c61aaf7a | Aurelien Jarno | |
| 25 | c61aaf7a | Aurelien Jarno | /*
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| 26 | c61aaf7a | Aurelien Jarno | * DEF(name, oargs, iargs, cargs, flags)
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| 27 | c61aaf7a | Aurelien Jarno | */
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| 28 | c896fe29 | bellard | |
| 29 | c896fe29 | bellard | /* predefined ops */
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| 30 | c61aaf7a | Aurelien Jarno | DEF(end, 0, 0, 0, 0) /* must be kept first */ |
| 31 | c61aaf7a | Aurelien Jarno | DEF(nop, 0, 0, 0, 0) |
| 32 | c61aaf7a | Aurelien Jarno | DEF(nop1, 0, 0, 1, 0) |
| 33 | c61aaf7a | Aurelien Jarno | DEF(nop2, 0, 0, 2, 0) |
| 34 | c61aaf7a | Aurelien Jarno | DEF(nop3, 0, 0, 3, 0) |
| 35 | c61aaf7a | Aurelien Jarno | DEF(nopn, 0, 0, 1, 0) /* variable number of parameters */ |
| 36 | c896fe29 | bellard | |
| 37 | c61aaf7a | Aurelien Jarno | DEF(discard, 1, 0, 0, 0) |
| 38 | 5ff9d6a4 | bellard | |
| 39 | c61aaf7a | Aurelien Jarno | DEF(set_label, 0, 0, 1, 0) |
| 40 | c61aaf7a | Aurelien Jarno | DEF(call, 0, 1, 2, TCG_OPF_SIDE_EFFECTS) /* variable number of parameters */ |
| 41 | c61aaf7a | Aurelien Jarno | DEF(jmp, 0, 1, 0, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 42 | c61aaf7a | Aurelien Jarno | DEF(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 43 | c896fe29 | bellard | |
| 44 | c61aaf7a | Aurelien Jarno | DEF(mov_i32, 1, 1, 0, 0) |
| 45 | c61aaf7a | Aurelien Jarno | DEF(movi_i32, 1, 0, 1, 0) |
| 46 | c61aaf7a | Aurelien Jarno | DEF(setcond_i32, 1, 2, 1, 0) |
| 47 | c896fe29 | bellard | /* load/store */
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| 48 | c61aaf7a | Aurelien Jarno | DEF(ld8u_i32, 1, 1, 1, 0) |
| 49 | c61aaf7a | Aurelien Jarno | DEF(ld8s_i32, 1, 1, 1, 0) |
| 50 | c61aaf7a | Aurelien Jarno | DEF(ld16u_i32, 1, 1, 1, 0) |
| 51 | c61aaf7a | Aurelien Jarno | DEF(ld16s_i32, 1, 1, 1, 0) |
| 52 | c61aaf7a | Aurelien Jarno | DEF(ld_i32, 1, 1, 1, 0) |
| 53 | c61aaf7a | Aurelien Jarno | DEF(st8_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 54 | c61aaf7a | Aurelien Jarno | DEF(st16_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 55 | c61aaf7a | Aurelien Jarno | DEF(st_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 56 | c896fe29 | bellard | /* arith */
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| 57 | c61aaf7a | Aurelien Jarno | DEF(add_i32, 1, 2, 0, 0) |
| 58 | c61aaf7a | Aurelien Jarno | DEF(sub_i32, 1, 2, 0, 0) |
| 59 | c61aaf7a | Aurelien Jarno | DEF(mul_i32, 1, 2, 0, 0) |
| 60 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_div_i32
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| 61 | c61aaf7a | Aurelien Jarno | DEF(div_i32, 1, 2, 0, 0) |
| 62 | c61aaf7a | Aurelien Jarno | DEF(divu_i32, 1, 2, 0, 0) |
| 63 | c61aaf7a | Aurelien Jarno | DEF(rem_i32, 1, 2, 0, 0) |
| 64 | c61aaf7a | Aurelien Jarno | DEF(remu_i32, 1, 2, 0, 0) |
| 65 | 30138f28 | Aurelien Jarno | #endif
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| 66 | 30138f28 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_div2_i32
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| 67 | c61aaf7a | Aurelien Jarno | DEF(div2_i32, 2, 3, 0, 0) |
| 68 | c61aaf7a | Aurelien Jarno | DEF(divu2_i32, 2, 3, 0, 0) |
| 69 | c896fe29 | bellard | #endif
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| 70 | c61aaf7a | Aurelien Jarno | DEF(and_i32, 1, 2, 0, 0) |
| 71 | c61aaf7a | Aurelien Jarno | DEF(or_i32, 1, 2, 0, 0) |
| 72 | c61aaf7a | Aurelien Jarno | DEF(xor_i32, 1, 2, 0, 0) |
| 73 | d42f183c | aurel32 | /* shifts/rotates */
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| 74 | c61aaf7a | Aurelien Jarno | DEF(shl_i32, 1, 2, 0, 0) |
| 75 | c61aaf7a | Aurelien Jarno | DEF(shr_i32, 1, 2, 0, 0) |
| 76 | c61aaf7a | Aurelien Jarno | DEF(sar_i32, 1, 2, 0, 0) |
| 77 | f31e9370 | aurel32 | #ifdef TCG_TARGET_HAS_rot_i32
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| 78 | c61aaf7a | Aurelien Jarno | DEF(rotl_i32, 1, 2, 0, 0) |
| 79 | c61aaf7a | Aurelien Jarno | DEF(rotr_i32, 1, 2, 0, 0) |
| 80 | f31e9370 | aurel32 | #endif
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| 81 | c896fe29 | bellard | |
| 82 | c61aaf7a | Aurelien Jarno | DEF(brcond_i32, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 83 | c896fe29 | bellard | #if TCG_TARGET_REG_BITS == 32 |
| 84 | c61aaf7a | Aurelien Jarno | DEF(add2_i32, 2, 4, 0, 0) |
| 85 | c61aaf7a | Aurelien Jarno | DEF(sub2_i32, 2, 4, 0, 0) |
| 86 | c61aaf7a | Aurelien Jarno | DEF(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 87 | c61aaf7a | Aurelien Jarno | DEF(mulu2_i32, 2, 2, 0, 0) |
| 88 | c61aaf7a | Aurelien Jarno | DEF(setcond2_i32, 1, 4, 1, 0) |
| 89 | c896fe29 | bellard | #endif
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| 90 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_ext8s_i32
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| 91 | c61aaf7a | Aurelien Jarno | DEF(ext8s_i32, 1, 1, 0, 0) |
| 92 | c896fe29 | bellard | #endif
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| 93 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_ext16s_i32
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| 94 | c61aaf7a | Aurelien Jarno | DEF(ext16s_i32, 1, 1, 0, 0) |
| 95 | c896fe29 | bellard | #endif
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| 96 | cfc86988 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_ext8u_i32
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| 97 | c61aaf7a | Aurelien Jarno | DEF(ext8u_i32, 1, 1, 0, 0) |
| 98 | cfc86988 | Aurelien Jarno | #endif
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| 99 | cfc86988 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_ext16u_i32
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| 100 | c61aaf7a | Aurelien Jarno | DEF(ext16u_i32, 1, 1, 0, 0) |
| 101 | cfc86988 | Aurelien Jarno | #endif
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| 102 | 84aafb06 | aurel32 | #ifdef TCG_TARGET_HAS_bswap16_i32
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| 103 | c61aaf7a | Aurelien Jarno | DEF(bswap16_i32, 1, 1, 0, 0) |
| 104 | 84aafb06 | aurel32 | #endif
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| 105 | 66896cb8 | aurel32 | #ifdef TCG_TARGET_HAS_bswap32_i32
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| 106 | c61aaf7a | Aurelien Jarno | DEF(bswap32_i32, 1, 1, 0, 0) |
| 107 | c896fe29 | bellard | #endif
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| 108 | 0dd0dd55 | aurel32 | #ifdef TCG_TARGET_HAS_not_i32
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| 109 | c61aaf7a | Aurelien Jarno | DEF(not_i32, 1, 1, 0, 0) |
| 110 | 0dd0dd55 | aurel32 | #endif
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| 111 | 0dd0dd55 | aurel32 | #ifdef TCG_TARGET_HAS_neg_i32
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| 112 | c61aaf7a | Aurelien Jarno | DEF(neg_i32, 1, 1, 0, 0) |
| 113 | 0dd0dd55 | aurel32 | #endif
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| 114 | 241cbed4 | Richard Henderson | #ifdef TCG_TARGET_HAS_andc_i32
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| 115 | c61aaf7a | Aurelien Jarno | DEF(andc_i32, 1, 2, 0, 0) |
| 116 | 241cbed4 | Richard Henderson | #endif
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| 117 | 791d1262 | Richard Henderson | #ifdef TCG_TARGET_HAS_orc_i32
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| 118 | c61aaf7a | Aurelien Jarno | DEF(orc_i32, 1, 2, 0, 0) |
| 119 | 791d1262 | Richard Henderson | #endif
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| 120 | 8d625cf1 | Richard Henderson | #ifdef TCG_TARGET_HAS_eqv_i32
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| 121 | c61aaf7a | Aurelien Jarno | DEF(eqv_i32, 1, 2, 0, 0) |
| 122 | 8d625cf1 | Richard Henderson | #endif
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| 123 | 9940a96b | Richard Henderson | #ifdef TCG_TARGET_HAS_nand_i32
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| 124 | c61aaf7a | Aurelien Jarno | DEF(nand_i32, 1, 2, 0, 0) |
| 125 | 9940a96b | Richard Henderson | #endif
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| 126 | 32d98fbd | Richard Henderson | #ifdef TCG_TARGET_HAS_nor_i32
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| 127 | c61aaf7a | Aurelien Jarno | DEF(nor_i32, 1, 2, 0, 0) |
| 128 | 32d98fbd | Richard Henderson | #endif
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| 129 | c896fe29 | bellard | |
| 130 | c896fe29 | bellard | #if TCG_TARGET_REG_BITS == 64 |
| 131 | c61aaf7a | Aurelien Jarno | DEF(mov_i64, 1, 1, 0, 0) |
| 132 | c61aaf7a | Aurelien Jarno | DEF(movi_i64, 1, 0, 1, 0) |
| 133 | c61aaf7a | Aurelien Jarno | DEF(setcond_i64, 1, 2, 1, 0) |
| 134 | c896fe29 | bellard | /* load/store */
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| 135 | c61aaf7a | Aurelien Jarno | DEF(ld8u_i64, 1, 1, 1, 0) |
| 136 | c61aaf7a | Aurelien Jarno | DEF(ld8s_i64, 1, 1, 1, 0) |
| 137 | c61aaf7a | Aurelien Jarno | DEF(ld16u_i64, 1, 1, 1, 0) |
| 138 | c61aaf7a | Aurelien Jarno | DEF(ld16s_i64, 1, 1, 1, 0) |
| 139 | c61aaf7a | Aurelien Jarno | DEF(ld32u_i64, 1, 1, 1, 0) |
| 140 | c61aaf7a | Aurelien Jarno | DEF(ld32s_i64, 1, 1, 1, 0) |
| 141 | c61aaf7a | Aurelien Jarno | DEF(ld_i64, 1, 1, 1, 0) |
| 142 | c61aaf7a | Aurelien Jarno | DEF(st8_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 143 | c61aaf7a | Aurelien Jarno | DEF(st16_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 144 | c61aaf7a | Aurelien Jarno | DEF(st32_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 145 | c61aaf7a | Aurelien Jarno | DEF(st_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) |
| 146 | c896fe29 | bellard | /* arith */
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| 147 | c61aaf7a | Aurelien Jarno | DEF(add_i64, 1, 2, 0, 0) |
| 148 | c61aaf7a | Aurelien Jarno | DEF(sub_i64, 1, 2, 0, 0) |
| 149 | c61aaf7a | Aurelien Jarno | DEF(mul_i64, 1, 2, 0, 0) |
| 150 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_div_i64
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| 151 | c61aaf7a | Aurelien Jarno | DEF(div_i64, 1, 2, 0, 0) |
| 152 | c61aaf7a | Aurelien Jarno | DEF(divu_i64, 1, 2, 0, 0) |
| 153 | c61aaf7a | Aurelien Jarno | DEF(rem_i64, 1, 2, 0, 0) |
| 154 | c61aaf7a | Aurelien Jarno | DEF(remu_i64, 1, 2, 0, 0) |
| 155 | 30138f28 | Aurelien Jarno | #endif
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| 156 | 30138f28 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_div2_i64
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| 157 | c61aaf7a | Aurelien Jarno | DEF(div2_i64, 2, 3, 0, 0) |
| 158 | c61aaf7a | Aurelien Jarno | DEF(divu2_i64, 2, 3, 0, 0) |
| 159 | c896fe29 | bellard | #endif
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| 160 | c61aaf7a | Aurelien Jarno | DEF(and_i64, 1, 2, 0, 0) |
| 161 | c61aaf7a | Aurelien Jarno | DEF(or_i64, 1, 2, 0, 0) |
| 162 | c61aaf7a | Aurelien Jarno | DEF(xor_i64, 1, 2, 0, 0) |
| 163 | d42f183c | aurel32 | /* shifts/rotates */
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| 164 | c61aaf7a | Aurelien Jarno | DEF(shl_i64, 1, 2, 0, 0) |
| 165 | c61aaf7a | Aurelien Jarno | DEF(shr_i64, 1, 2, 0, 0) |
| 166 | c61aaf7a | Aurelien Jarno | DEF(sar_i64, 1, 2, 0, 0) |
| 167 | f31e9370 | aurel32 | #ifdef TCG_TARGET_HAS_rot_i64
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| 168 | c61aaf7a | Aurelien Jarno | DEF(rotl_i64, 1, 2, 0, 0) |
| 169 | c61aaf7a | Aurelien Jarno | DEF(rotr_i64, 1, 2, 0, 0) |
| 170 | f31e9370 | aurel32 | #endif
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| 171 | c896fe29 | bellard | |
| 172 | c61aaf7a | Aurelien Jarno | DEF(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 173 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_ext8s_i64
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| 174 | c61aaf7a | Aurelien Jarno | DEF(ext8s_i64, 1, 1, 0, 0) |
| 175 | c896fe29 | bellard | #endif
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| 176 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_ext16s_i64
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| 177 | c61aaf7a | Aurelien Jarno | DEF(ext16s_i64, 1, 1, 0, 0) |
| 178 | c896fe29 | bellard | #endif
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| 179 | c896fe29 | bellard | #ifdef TCG_TARGET_HAS_ext32s_i64
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| 180 | c61aaf7a | Aurelien Jarno | DEF(ext32s_i64, 1, 1, 0, 0) |
| 181 | c896fe29 | bellard | #endif
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| 182 | cfc86988 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_ext8u_i64
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| 183 | c61aaf7a | Aurelien Jarno | DEF(ext8u_i64, 1, 1, 0, 0) |
| 184 | cfc86988 | Aurelien Jarno | #endif
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| 185 | cfc86988 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_ext16u_i64
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| 186 | c61aaf7a | Aurelien Jarno | DEF(ext16u_i64, 1, 1, 0, 0) |
| 187 | cfc86988 | Aurelien Jarno | #endif
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| 188 | cfc86988 | Aurelien Jarno | #ifdef TCG_TARGET_HAS_ext32u_i64
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| 189 | c61aaf7a | Aurelien Jarno | DEF(ext32u_i64, 1, 1, 0, 0) |
| 190 | cfc86988 | Aurelien Jarno | #endif
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| 191 | 9a5c57fd | aurel32 | #ifdef TCG_TARGET_HAS_bswap16_i64
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| 192 | c61aaf7a | Aurelien Jarno | DEF(bswap16_i64, 1, 1, 0, 0) |
| 193 | 9a5c57fd | aurel32 | #endif
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| 194 | 9a5c57fd | aurel32 | #ifdef TCG_TARGET_HAS_bswap32_i64
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| 195 | c61aaf7a | Aurelien Jarno | DEF(bswap32_i64, 1, 1, 0, 0) |
| 196 | 9a5c57fd | aurel32 | #endif
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| 197 | 66896cb8 | aurel32 | #ifdef TCG_TARGET_HAS_bswap64_i64
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| 198 | c61aaf7a | Aurelien Jarno | DEF(bswap64_i64, 1, 1, 0, 0) |
| 199 | c896fe29 | bellard | #endif
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| 200 | d2604285 | aurel32 | #ifdef TCG_TARGET_HAS_not_i64
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| 201 | c61aaf7a | Aurelien Jarno | DEF(not_i64, 1, 1, 0, 0) |
| 202 | d2604285 | aurel32 | #endif
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| 203 | 390efc54 | pbrook | #ifdef TCG_TARGET_HAS_neg_i64
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| 204 | c61aaf7a | Aurelien Jarno | DEF(neg_i64, 1, 1, 0, 0) |
| 205 | 390efc54 | pbrook | #endif
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| 206 | 241cbed4 | Richard Henderson | #ifdef TCG_TARGET_HAS_andc_i64
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| 207 | c61aaf7a | Aurelien Jarno | DEF(andc_i64, 1, 2, 0, 0) |
| 208 | 241cbed4 | Richard Henderson | #endif
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| 209 | 791d1262 | Richard Henderson | #ifdef TCG_TARGET_HAS_orc_i64
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| 210 | c61aaf7a | Aurelien Jarno | DEF(orc_i64, 1, 2, 0, 0) |
| 211 | 791d1262 | Richard Henderson | #endif
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| 212 | 8d625cf1 | Richard Henderson | #ifdef TCG_TARGET_HAS_eqv_i64
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| 213 | c61aaf7a | Aurelien Jarno | DEF(eqv_i64, 1, 2, 0, 0) |
| 214 | 8d625cf1 | Richard Henderson | #endif
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| 215 | 9940a96b | Richard Henderson | #ifdef TCG_TARGET_HAS_nand_i64
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| 216 | c61aaf7a | Aurelien Jarno | DEF(nand_i64, 1, 2, 0, 0) |
| 217 | 9940a96b | Richard Henderson | #endif
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| 218 | 32d98fbd | Richard Henderson | #ifdef TCG_TARGET_HAS_nor_i64
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| 219 | c61aaf7a | Aurelien Jarno | DEF(nor_i64, 1, 2, 0, 0) |
| 220 | 32d98fbd | Richard Henderson | #endif
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| 221 | 0dd0dd55 | aurel32 | #endif
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| 222 | c896fe29 | bellard | |
| 223 | c896fe29 | bellard | /* QEMU specific */
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| 224 | 7e4597d7 | bellard | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
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| 225 | c61aaf7a | Aurelien Jarno | DEF(debug_insn_start, 0, 0, 2, 0) |
| 226 | 7e4597d7 | bellard | #else
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| 227 | c61aaf7a | Aurelien Jarno | DEF(debug_insn_start, 0, 0, 1, 0) |
| 228 | 7e4597d7 | bellard | #endif
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| 229 | c61aaf7a | Aurelien Jarno | DEF(exit_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 230 | c61aaf7a | Aurelien Jarno | DEF(goto_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) |
| 231 | c896fe29 | bellard | /* Note: even if TARGET_LONG_BITS is not defined, the INDEX_op
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| 232 | c896fe29 | bellard | constants must be defined */
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| 233 | c896fe29 | bellard | #if TCG_TARGET_REG_BITS == 32 |
| 234 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 235 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 236 | c896fe29 | bellard | #else
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| 237 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld8u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 238 | c896fe29 | bellard | #endif
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| 239 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 240 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 241 | c896fe29 | bellard | #else
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| 242 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld8s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 243 | c896fe29 | bellard | #endif
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| 244 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 245 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 246 | c896fe29 | bellard | #else
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| 247 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld16u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 248 | c896fe29 | bellard | #endif
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| 249 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 250 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 251 | c896fe29 | bellard | #else
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| 252 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld16s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 253 | c896fe29 | bellard | #endif
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| 254 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 255 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld32, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 256 | c896fe29 | bellard | #else
|
| 257 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld32, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 258 | c896fe29 | bellard | #endif
|
| 259 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 260 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld64, 2, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 261 | c896fe29 | bellard | #else
|
| 262 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld64, 2, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 263 | c896fe29 | bellard | #endif
|
| 264 | c896fe29 | bellard | |
| 265 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 266 | c61aaf7a | Aurelien Jarno | DEF(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 267 | c896fe29 | bellard | #else
|
| 268 | c61aaf7a | Aurelien Jarno | DEF(qemu_st8, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 269 | c896fe29 | bellard | #endif
|
| 270 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 271 | c61aaf7a | Aurelien Jarno | DEF(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 272 | c896fe29 | bellard | #else
|
| 273 | c61aaf7a | Aurelien Jarno | DEF(qemu_st16, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 274 | c896fe29 | bellard | #endif
|
| 275 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 276 | c61aaf7a | Aurelien Jarno | DEF(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 277 | c896fe29 | bellard | #else
|
| 278 | c61aaf7a | Aurelien Jarno | DEF(qemu_st32, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 279 | c896fe29 | bellard | #endif
|
| 280 | c896fe29 | bellard | #if TARGET_LONG_BITS == 32 |
| 281 | c61aaf7a | Aurelien Jarno | DEF(qemu_st64, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 282 | c896fe29 | bellard | #else
|
| 283 | c61aaf7a | Aurelien Jarno | DEF(qemu_st64, 0, 4, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 284 | c896fe29 | bellard | #endif
|
| 285 | c896fe29 | bellard | |
| 286 | c896fe29 | bellard | #else /* TCG_TARGET_REG_BITS == 32 */ |
| 287 | c896fe29 | bellard | |
| 288 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 289 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 290 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 291 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 292 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld32, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 293 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 294 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 295 | c61aaf7a | Aurelien Jarno | DEF(qemu_ld64, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 296 | c896fe29 | bellard | |
| 297 | c61aaf7a | Aurelien Jarno | DEF(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 298 | c61aaf7a | Aurelien Jarno | DEF(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 299 | c61aaf7a | Aurelien Jarno | DEF(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 300 | c61aaf7a | Aurelien Jarno | DEF(qemu_st64, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) |
| 301 | c896fe29 | bellard | |
| 302 | c896fe29 | bellard | #endif /* TCG_TARGET_REG_BITS != 32 */ |
| 303 | c896fe29 | bellard | |
| 304 | c61aaf7a | Aurelien Jarno | #undef DEF |