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1 | 79aceca5 | bellard | /*
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2 | 3fc6c082 | bellard | * PowerPC emulation for qemu: main translation routines.
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3 | 5fafdf24 | ths | *
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4 | 76a66253 | j_mayer | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | 79aceca5 | bellard | *
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6 | 79aceca5 | bellard | * This library is free software; you can redistribute it and/or
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7 | 79aceca5 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 79aceca5 | bellard | * License as published by the Free Software Foundation; either
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9 | 79aceca5 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 79aceca5 | bellard | *
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11 | 79aceca5 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 79aceca5 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 79aceca5 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 79aceca5 | bellard | * Lesser General Public License for more details.
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15 | 79aceca5 | bellard | *
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16 | 79aceca5 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 79aceca5 | bellard | * License along with this library; if not, write to the Free Software
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18 | 79aceca5 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 79aceca5 | bellard | */
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20 | c6a1c22b | bellard | #include <stdarg.h> |
21 | c6a1c22b | bellard | #include <stdlib.h> |
22 | c6a1c22b | bellard | #include <stdio.h> |
23 | c6a1c22b | bellard | #include <string.h> |
24 | c6a1c22b | bellard | #include <inttypes.h> |
25 | c6a1c22b | bellard | |
26 | 79aceca5 | bellard | #include "cpu.h" |
27 | c6a1c22b | bellard | #include "exec-all.h" |
28 | 79aceca5 | bellard | #include "disas.h" |
29 | 79aceca5 | bellard | |
30 | a750fc0b | j_mayer | /* Include definitions for instructions classes and implementations flags */
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31 | 79aceca5 | bellard | //#define DO_SINGLE_STEP
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32 | 9fddaa0c | bellard | //#define PPC_DEBUG_DISAS
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33 | a496775f | j_mayer | //#define DEBUG_MEMORY_ACCESSES
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34 | 76a66253 | j_mayer | //#define DO_PPC_STATISTICS
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35 | 79aceca5 | bellard | |
36 | a750fc0b | j_mayer | /*****************************************************************************/
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37 | a750fc0b | j_mayer | /* Code translation helpers */
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38 | d9bce9d9 | j_mayer | #if defined(USE_DIRECT_JUMP)
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39 | c53be334 | bellard | #define TBPARAM(x)
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40 | c53be334 | bellard | #else
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41 | c53be334 | bellard | #define TBPARAM(x) (long)(x) |
42 | c53be334 | bellard | #endif
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43 | c53be334 | bellard | |
44 | 79aceca5 | bellard | enum {
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45 | 79aceca5 | bellard | #define DEF(s, n, copy_size) INDEX_op_ ## s, |
46 | 79aceca5 | bellard | #include "opc.h" |
47 | 79aceca5 | bellard | #undef DEF
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48 | 79aceca5 | bellard | NB_OPS, |
49 | 79aceca5 | bellard | }; |
50 | 79aceca5 | bellard | |
51 | 79aceca5 | bellard | static uint16_t *gen_opc_ptr;
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52 | 79aceca5 | bellard | static uint32_t *gen_opparam_ptr;
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53 | 79aceca5 | bellard | |
54 | 79aceca5 | bellard | #include "gen-op.h" |
55 | 28b6751f | bellard | |
56 | d9bce9d9 | j_mayer | static inline void gen_set_T0 (target_ulong val) |
57 | d9bce9d9 | j_mayer | { |
58 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
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59 | d9bce9d9 | j_mayer | if (val >> 32) |
60 | d9bce9d9 | j_mayer | gen_op_set_T0_64(val >> 32, val);
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61 | d9bce9d9 | j_mayer | else
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62 | d9bce9d9 | j_mayer | #endif
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63 | d9bce9d9 | j_mayer | gen_op_set_T0(val); |
64 | d9bce9d9 | j_mayer | } |
65 | d9bce9d9 | j_mayer | |
66 | d9bce9d9 | j_mayer | static inline void gen_set_T1 (target_ulong val) |
67 | d9bce9d9 | j_mayer | { |
68 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
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69 | d9bce9d9 | j_mayer | if (val >> 32) |
70 | d9bce9d9 | j_mayer | gen_op_set_T1_64(val >> 32, val);
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71 | d9bce9d9 | j_mayer | else
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72 | d9bce9d9 | j_mayer | #endif
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73 | d9bce9d9 | j_mayer | gen_op_set_T1(val); |
74 | d9bce9d9 | j_mayer | } |
75 | d9bce9d9 | j_mayer | |
76 | d9bce9d9 | j_mayer | #define GEN8(func, NAME) \
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77 | 9a64fbe4 | bellard | static GenOpFunc *NAME ## _table [8] = { \ |
78 | 9a64fbe4 | bellard | NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \ |
79 | 9a64fbe4 | bellard | NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7, \ |
80 | 9a64fbe4 | bellard | }; \ |
81 | 9a64fbe4 | bellard | static inline void func(int n) \ |
82 | 9a64fbe4 | bellard | { \ |
83 | 9a64fbe4 | bellard | NAME ## _table[n](); \ |
84 | 9a64fbe4 | bellard | } |
85 | 9a64fbe4 | bellard | |
86 | 9a64fbe4 | bellard | #define GEN16(func, NAME) \
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87 | 9a64fbe4 | bellard | static GenOpFunc *NAME ## _table [16] = { \ |
88 | 9a64fbe4 | bellard | NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \ |
89 | 9a64fbe4 | bellard | NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7, \ |
90 | 9a64fbe4 | bellard | NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11, \ |
91 | 9a64fbe4 | bellard | NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15, \ |
92 | 9a64fbe4 | bellard | }; \ |
93 | 9a64fbe4 | bellard | static inline void func(int n) \ |
94 | 9a64fbe4 | bellard | { \ |
95 | 9a64fbe4 | bellard | NAME ## _table[n](); \ |
96 | 28b6751f | bellard | } |
97 | 28b6751f | bellard | |
98 | d9bce9d9 | j_mayer | #define GEN32(func, NAME) \
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99 | 9a64fbe4 | bellard | static GenOpFunc *NAME ## _table [32] = { \ |
100 | 9a64fbe4 | bellard | NAME ## 0, NAME ## 1, NAME ## 2, NAME ## 3, \ |
101 | 9a64fbe4 | bellard | NAME ## 4, NAME ## 5, NAME ## 6, NAME ## 7, \ |
102 | 9a64fbe4 | bellard | NAME ## 8, NAME ## 9, NAME ## 10, NAME ## 11, \ |
103 | 9a64fbe4 | bellard | NAME ## 12, NAME ## 13, NAME ## 14, NAME ## 15, \ |
104 | 9a64fbe4 | bellard | NAME ## 16, NAME ## 17, NAME ## 18, NAME ## 19, \ |
105 | 9a64fbe4 | bellard | NAME ## 20, NAME ## 21, NAME ## 22, NAME ## 23, \ |
106 | 9a64fbe4 | bellard | NAME ## 24, NAME ## 25, NAME ## 26, NAME ## 27, \ |
107 | 9a64fbe4 | bellard | NAME ## 28, NAME ## 29, NAME ## 30, NAME ## 31, \ |
108 | 9a64fbe4 | bellard | }; \ |
109 | 9a64fbe4 | bellard | static inline void func(int n) \ |
110 | 9a64fbe4 | bellard | { \ |
111 | 9a64fbe4 | bellard | NAME ## _table[n](); \ |
112 | 9a64fbe4 | bellard | } |
113 | 9a64fbe4 | bellard | |
114 | 9a64fbe4 | bellard | /* Condition register moves */
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115 | 9a64fbe4 | bellard | GEN8(gen_op_load_crf_T0, gen_op_load_crf_T0_crf); |
116 | 9a64fbe4 | bellard | GEN8(gen_op_load_crf_T1, gen_op_load_crf_T1_crf); |
117 | 9a64fbe4 | bellard | GEN8(gen_op_store_T0_crf, gen_op_store_T0_crf_crf); |
118 | 9a64fbe4 | bellard | GEN8(gen_op_store_T1_crf, gen_op_store_T1_crf_crf); |
119 | 28b6751f | bellard | |
120 | fb0eaffc | bellard | /* Floating point condition and status register moves */
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121 | fb0eaffc | bellard | GEN8(gen_op_load_fpscr_T0, gen_op_load_fpscr_T0_fpscr); |
122 | fb0eaffc | bellard | GEN8(gen_op_store_T0_fpscr, gen_op_store_T0_fpscr_fpscr); |
123 | fb0eaffc | bellard | GEN8(gen_op_clear_fpscr, gen_op_clear_fpscr_fpscr); |
124 | 36081602 | j_mayer | static inline void gen_op_store_T0_fpscri (int n, uint8_t param) |
125 | fb0eaffc | bellard | { |
126 | 76a66253 | j_mayer | gen_op_set_T0(param); |
127 | 76a66253 | j_mayer | gen_op_store_T0_fpscr(n); |
128 | fb0eaffc | bellard | } |
129 | fb0eaffc | bellard | |
130 | 9a64fbe4 | bellard | /* General purpose registers moves */
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131 | 9a64fbe4 | bellard | GEN32(gen_op_load_gpr_T0, gen_op_load_gpr_T0_gpr); |
132 | 9a64fbe4 | bellard | GEN32(gen_op_load_gpr_T1, gen_op_load_gpr_T1_gpr); |
133 | 9a64fbe4 | bellard | GEN32(gen_op_load_gpr_T2, gen_op_load_gpr_T2_gpr); |
134 | 9a64fbe4 | bellard | |
135 | 9a64fbe4 | bellard | GEN32(gen_op_store_T0_gpr, gen_op_store_T0_gpr_gpr); |
136 | 9a64fbe4 | bellard | GEN32(gen_op_store_T1_gpr, gen_op_store_T1_gpr_gpr); |
137 | 76a66253 | j_mayer | #if 0 // unused
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138 | 9a64fbe4 | bellard | GEN32(gen_op_store_T2_gpr, gen_op_store_T2_gpr_gpr);
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139 | 76a66253 | j_mayer | #endif
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140 | 28b6751f | bellard | |
141 | fb0eaffc | bellard | /* floating point registers moves */
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142 | fb0eaffc | bellard | GEN32(gen_op_load_fpr_FT0, gen_op_load_fpr_FT0_fpr); |
143 | fb0eaffc | bellard | GEN32(gen_op_load_fpr_FT1, gen_op_load_fpr_FT1_fpr); |
144 | fb0eaffc | bellard | GEN32(gen_op_load_fpr_FT2, gen_op_load_fpr_FT2_fpr); |
145 | fb0eaffc | bellard | GEN32(gen_op_store_FT0_fpr, gen_op_store_FT0_fpr_fpr); |
146 | fb0eaffc | bellard | GEN32(gen_op_store_FT1_fpr, gen_op_store_FT1_fpr_fpr); |
147 | 76a66253 | j_mayer | #if 0 // unused
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148 | fb0eaffc | bellard | GEN32(gen_op_store_FT2_fpr, gen_op_store_FT2_fpr_fpr);
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149 | 76a66253 | j_mayer | #endif
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150 | 79aceca5 | bellard | |
151 | 79aceca5 | bellard | /* internal defines */
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152 | 79aceca5 | bellard | typedef struct DisasContext { |
153 | 79aceca5 | bellard | struct TranslationBlock *tb;
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154 | 0fa85d43 | bellard | target_ulong nip; |
155 | 79aceca5 | bellard | uint32_t opcode; |
156 | 9a64fbe4 | bellard | uint32_t exception; |
157 | 3cc62370 | bellard | /* Routine used to access memory */
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158 | 3cc62370 | bellard | int mem_idx;
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159 | 3cc62370 | bellard | /* Translation flags */
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160 | 9a64fbe4 | bellard | #if !defined(CONFIG_USER_ONLY)
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161 | 79aceca5 | bellard | int supervisor;
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162 | 9a64fbe4 | bellard | #endif
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163 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
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164 | d9bce9d9 | j_mayer | int sf_mode;
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165 | d9bce9d9 | j_mayer | #endif
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166 | 3cc62370 | bellard | int fpu_enabled;
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167 | 35cdaad6 | j_mayer | #if defined(TARGET_PPCEMB)
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168 | 0487d6a8 | j_mayer | int spe_enabled;
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169 | 0487d6a8 | j_mayer | #endif
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170 | 3fc6c082 | bellard | ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
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171 | ea4e754f | bellard | int singlestep_enabled;
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172 | 79aceca5 | bellard | } DisasContext; |
173 | 79aceca5 | bellard | |
174 | 3fc6c082 | bellard | struct opc_handler_t {
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175 | 79aceca5 | bellard | /* invalid bits */
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176 | 79aceca5 | bellard | uint32_t inval; |
177 | 9a64fbe4 | bellard | /* instruction type */
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178 | 0487d6a8 | j_mayer | uint64_t type; |
179 | 79aceca5 | bellard | /* handler */
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180 | 79aceca5 | bellard | void (*handler)(DisasContext *ctx);
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181 | a750fc0b | j_mayer | #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
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182 | 76a66253 | j_mayer | const unsigned char *oname; |
183 | a750fc0b | j_mayer | #endif
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184 | a750fc0b | j_mayer | #if defined(DO_PPC_STATISTICS)
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185 | 76a66253 | j_mayer | uint64_t count; |
186 | 76a66253 | j_mayer | #endif
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187 | 3fc6c082 | bellard | }; |
188 | 79aceca5 | bellard | |
189 | 76a66253 | j_mayer | static inline void gen_set_Rc0 (DisasContext *ctx) |
190 | 76a66253 | j_mayer | { |
191 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
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192 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
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193 | d9bce9d9 | j_mayer | gen_op_cmpi_64(0);
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194 | d9bce9d9 | j_mayer | else
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195 | d9bce9d9 | j_mayer | #endif
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196 | d9bce9d9 | j_mayer | gen_op_cmpi(0);
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197 | 76a66253 | j_mayer | gen_op_set_Rc0(); |
198 | 76a66253 | j_mayer | } |
199 | 76a66253 | j_mayer | |
200 | d9bce9d9 | j_mayer | static inline void gen_update_nip (DisasContext *ctx, target_ulong nip) |
201 | d9bce9d9 | j_mayer | { |
202 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
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203 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
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204 | d9bce9d9 | j_mayer | gen_op_update_nip_64(nip >> 32, nip);
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205 | d9bce9d9 | j_mayer | else
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206 | d9bce9d9 | j_mayer | #endif
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207 | d9bce9d9 | j_mayer | gen_op_update_nip(nip); |
208 | d9bce9d9 | j_mayer | } |
209 | d9bce9d9 | j_mayer | |
210 | 9fddaa0c | bellard | #define RET_EXCP(ctx, excp, error) \
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211 | 79aceca5 | bellard | do { \
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212 | 9fddaa0c | bellard | if ((ctx)->exception == EXCP_NONE) { \
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213 | d9bce9d9 | j_mayer | gen_update_nip(ctx, (ctx)->nip); \ |
214 | 9fddaa0c | bellard | } \ |
215 | 9fddaa0c | bellard | gen_op_raise_exception_err((excp), (error)); \ |
216 | 9fddaa0c | bellard | ctx->exception = (excp); \ |
217 | 79aceca5 | bellard | } while (0) |
218 | 79aceca5 | bellard | |
219 | 9fddaa0c | bellard | #define RET_INVAL(ctx) \
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220 | 9fddaa0c | bellard | RET_EXCP((ctx), EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL) |
221 | 9fddaa0c | bellard | |
222 | 9fddaa0c | bellard | #define RET_PRIVOPC(ctx) \
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223 | 9fddaa0c | bellard | RET_EXCP((ctx), EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_OPC) |
224 | 9a64fbe4 | bellard | |
225 | 9fddaa0c | bellard | #define RET_PRIVREG(ctx) \
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226 | 9fddaa0c | bellard | RET_EXCP((ctx), EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG) |
227 | 9a64fbe4 | bellard | |
228 | f24e5695 | bellard | /* Stop translation */
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229 | 3fc6c082 | bellard | static inline void RET_STOP (DisasContext *ctx) |
230 | 3fc6c082 | bellard | { |
231 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip); |
232 | f24e5695 | bellard | ctx->exception = EXCP_MTMSR; |
233 | 3fc6c082 | bellard | } |
234 | 3fc6c082 | bellard | |
235 | f24e5695 | bellard | /* No need to update nip here, as execution flow will change */
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236 | 2be0071f | bellard | static inline void RET_CHG_FLOW (DisasContext *ctx) |
237 | 2be0071f | bellard | { |
238 | 2be0071f | bellard | ctx->exception = EXCP_MTMSR; |
239 | 2be0071f | bellard | } |
240 | 2be0071f | bellard | |
241 | 79aceca5 | bellard | #define GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
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242 | 79aceca5 | bellard | static void gen_##name (DisasContext *ctx); \ |
243 | 79aceca5 | bellard | GEN_OPCODE(name, opc1, opc2, opc3, inval, type); \ |
244 | 79aceca5 | bellard | static void gen_##name (DisasContext *ctx) |
245 | 79aceca5 | bellard | |
246 | 79aceca5 | bellard | typedef struct opcode_t { |
247 | 79aceca5 | bellard | unsigned char opc1, opc2, opc3; |
248 | 18fba28c | bellard | #if HOST_LONG_BITS == 64 /* Explicitely align to 64 bits */ |
249 | 18fba28c | bellard | unsigned char pad[5]; |
250 | 18fba28c | bellard | #else
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251 | 18fba28c | bellard | unsigned char pad[1]; |
252 | 18fba28c | bellard | #endif
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253 | 79aceca5 | bellard | opc_handler_t handler; |
254 | 3fc6c082 | bellard | const unsigned char *oname; |
255 | 79aceca5 | bellard | } opcode_t; |
256 | 79aceca5 | bellard | |
257 | a750fc0b | j_mayer | /*****************************************************************************/
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258 | 79aceca5 | bellard | /*** Instruction decoding ***/
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259 | 79aceca5 | bellard | #define EXTRACT_HELPER(name, shift, nb) \
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260 | d9bce9d9 | j_mayer | static inline uint32_t name (uint32_t opcode) \ |
261 | 79aceca5 | bellard | { \ |
262 | 79aceca5 | bellard | return (opcode >> (shift)) & ((1 << (nb)) - 1); \ |
263 | 79aceca5 | bellard | } |
264 | 79aceca5 | bellard | |
265 | 79aceca5 | bellard | #define EXTRACT_SHELPER(name, shift, nb) \
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266 | d9bce9d9 | j_mayer | static inline int32_t name (uint32_t opcode) \ |
267 | 79aceca5 | bellard | { \ |
268 | 18fba28c | bellard | return (int16_t)((opcode >> (shift)) & ((1 << (nb)) - 1)); \ |
269 | 79aceca5 | bellard | } |
270 | 79aceca5 | bellard | |
271 | 79aceca5 | bellard | /* Opcode part 1 */
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272 | 79aceca5 | bellard | EXTRACT_HELPER(opc1, 26, 6); |
273 | 79aceca5 | bellard | /* Opcode part 2 */
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274 | 79aceca5 | bellard | EXTRACT_HELPER(opc2, 1, 5); |
275 | 79aceca5 | bellard | /* Opcode part 3 */
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276 | 79aceca5 | bellard | EXTRACT_HELPER(opc3, 6, 5); |
277 | 79aceca5 | bellard | /* Update Cr0 flags */
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278 | 79aceca5 | bellard | EXTRACT_HELPER(Rc, 0, 1); |
279 | 79aceca5 | bellard | /* Destination */
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280 | 79aceca5 | bellard | EXTRACT_HELPER(rD, 21, 5); |
281 | 79aceca5 | bellard | /* Source */
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282 | 79aceca5 | bellard | EXTRACT_HELPER(rS, 21, 5); |
283 | 79aceca5 | bellard | /* First operand */
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284 | 79aceca5 | bellard | EXTRACT_HELPER(rA, 16, 5); |
285 | 79aceca5 | bellard | /* Second operand */
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286 | 79aceca5 | bellard | EXTRACT_HELPER(rB, 11, 5); |
287 | 79aceca5 | bellard | /* Third operand */
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288 | 79aceca5 | bellard | EXTRACT_HELPER(rC, 6, 5); |
289 | 79aceca5 | bellard | /*** Get CRn ***/
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290 | 79aceca5 | bellard | EXTRACT_HELPER(crfD, 23, 3); |
291 | 79aceca5 | bellard | EXTRACT_HELPER(crfS, 18, 3); |
292 | 79aceca5 | bellard | EXTRACT_HELPER(crbD, 21, 5); |
293 | 79aceca5 | bellard | EXTRACT_HELPER(crbA, 16, 5); |
294 | 79aceca5 | bellard | EXTRACT_HELPER(crbB, 11, 5); |
295 | 79aceca5 | bellard | /* SPR / TBL */
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296 | 3fc6c082 | bellard | EXTRACT_HELPER(_SPR, 11, 10); |
297 | 3fc6c082 | bellard | static inline uint32_t SPR (uint32_t opcode) |
298 | 3fc6c082 | bellard | { |
299 | 3fc6c082 | bellard | uint32_t sprn = _SPR(opcode); |
300 | 3fc6c082 | bellard | |
301 | 3fc6c082 | bellard | return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); |
302 | 3fc6c082 | bellard | } |
303 | 79aceca5 | bellard | /*** Get constants ***/
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304 | 79aceca5 | bellard | EXTRACT_HELPER(IMM, 12, 8); |
305 | 79aceca5 | bellard | /* 16 bits signed immediate value */
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306 | 79aceca5 | bellard | EXTRACT_SHELPER(SIMM, 0, 16); |
307 | 79aceca5 | bellard | /* 16 bits unsigned immediate value */
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308 | 79aceca5 | bellard | EXTRACT_HELPER(UIMM, 0, 16); |
309 | 79aceca5 | bellard | /* Bit count */
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310 | 79aceca5 | bellard | EXTRACT_HELPER(NB, 11, 5); |
311 | 79aceca5 | bellard | /* Shift count */
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312 | 79aceca5 | bellard | EXTRACT_HELPER(SH, 11, 5); |
313 | 79aceca5 | bellard | /* Mask start */
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314 | 79aceca5 | bellard | EXTRACT_HELPER(MB, 6, 5); |
315 | 79aceca5 | bellard | /* Mask end */
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316 | 79aceca5 | bellard | EXTRACT_HELPER(ME, 1, 5); |
317 | fb0eaffc | bellard | /* Trap operand */
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318 | fb0eaffc | bellard | EXTRACT_HELPER(TO, 21, 5); |
319 | 79aceca5 | bellard | |
320 | 79aceca5 | bellard | EXTRACT_HELPER(CRM, 12, 8); |
321 | 79aceca5 | bellard | EXTRACT_HELPER(FM, 17, 8); |
322 | 79aceca5 | bellard | EXTRACT_HELPER(SR, 16, 4); |
323 | fb0eaffc | bellard | EXTRACT_HELPER(FPIMM, 20, 4); |
324 | fb0eaffc | bellard | |
325 | 79aceca5 | bellard | /*** Jump target decoding ***/
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326 | 79aceca5 | bellard | /* Displacement */
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327 | 79aceca5 | bellard | EXTRACT_SHELPER(d, 0, 16); |
328 | 79aceca5 | bellard | /* Immediate address */
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329 | 76a66253 | j_mayer | static inline target_ulong LI (uint32_t opcode) |
330 | 79aceca5 | bellard | { |
331 | 79aceca5 | bellard | return (opcode >> 0) & 0x03FFFFFC; |
332 | 79aceca5 | bellard | } |
333 | 79aceca5 | bellard | |
334 | 79aceca5 | bellard | static inline uint32_t BD (uint32_t opcode) |
335 | 79aceca5 | bellard | { |
336 | 79aceca5 | bellard | return (opcode >> 0) & 0xFFFC; |
337 | 79aceca5 | bellard | } |
338 | 79aceca5 | bellard | |
339 | 79aceca5 | bellard | EXTRACT_HELPER(BO, 21, 5); |
340 | 79aceca5 | bellard | EXTRACT_HELPER(BI, 16, 5); |
341 | 79aceca5 | bellard | /* Absolute/relative address */
|
342 | 79aceca5 | bellard | EXTRACT_HELPER(AA, 1, 1); |
343 | 79aceca5 | bellard | /* Link */
|
344 | 79aceca5 | bellard | EXTRACT_HELPER(LK, 0, 1); |
345 | 79aceca5 | bellard | |
346 | 79aceca5 | bellard | /* Create a mask between <start> and <end> bits */
|
347 | 76a66253 | j_mayer | static inline target_ulong MASK (uint32_t start, uint32_t end) |
348 | 79aceca5 | bellard | { |
349 | 76a66253 | j_mayer | target_ulong ret; |
350 | 79aceca5 | bellard | |
351 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
|
352 | 76a66253 | j_mayer | if (likely(start == 0)) { |
353 | 76a66253 | j_mayer | ret = (uint64_t)(-1ULL) << (63 - end); |
354 | 76a66253 | j_mayer | } else if (likely(end == 63)) { |
355 | 76a66253 | j_mayer | ret = (uint64_t)(-1ULL) >> start;
|
356 | 76a66253 | j_mayer | } |
357 | 76a66253 | j_mayer | #else
|
358 | 76a66253 | j_mayer | if (likely(start == 0)) { |
359 | 76a66253 | j_mayer | ret = (uint32_t)(-1ULL) << (31 - end); |
360 | 76a66253 | j_mayer | } else if (likely(end == 31)) { |
361 | 76a66253 | j_mayer | ret = (uint32_t)(-1ULL) >> start;
|
362 | 76a66253 | j_mayer | } |
363 | 76a66253 | j_mayer | #endif
|
364 | 76a66253 | j_mayer | else {
|
365 | 76a66253 | j_mayer | ret = (((target_ulong)(-1ULL)) >> (start)) ^
|
366 | 76a66253 | j_mayer | (((target_ulong)(-1ULL) >> (end)) >> 1); |
367 | 76a66253 | j_mayer | if (unlikely(start > end))
|
368 | 76a66253 | j_mayer | return ~ret;
|
369 | 76a66253 | j_mayer | } |
370 | 79aceca5 | bellard | |
371 | 79aceca5 | bellard | return ret;
|
372 | 79aceca5 | bellard | } |
373 | 79aceca5 | bellard | |
374 | a750fc0b | j_mayer | /*****************************************************************************/
|
375 | a750fc0b | j_mayer | /* PowerPC Instructions types definitions */
|
376 | a750fc0b | j_mayer | enum {
|
377 | a750fc0b | j_mayer | PPC_NONE = 0x0000000000000000ULL,
|
378 | a750fc0b | j_mayer | /* integer operations instructions */
|
379 | a750fc0b | j_mayer | /* flow control instructions */
|
380 | a750fc0b | j_mayer | /* virtual memory instructions */
|
381 | a750fc0b | j_mayer | /* ld/st with reservation instructions */
|
382 | a750fc0b | j_mayer | /* cache control instructions */
|
383 | a750fc0b | j_mayer | /* spr/msr access instructions */
|
384 | a750fc0b | j_mayer | PPC_INSNS_BASE = 0x0000000000000001ULL,
|
385 | a750fc0b | j_mayer | #define PPC_INTEGER PPC_INSNS_BASE
|
386 | a750fc0b | j_mayer | #define PPC_FLOW PPC_INSNS_BASE
|
387 | a750fc0b | j_mayer | #define PPC_MEM PPC_INSNS_BASE
|
388 | a750fc0b | j_mayer | #define PPC_RES PPC_INSNS_BASE
|
389 | a750fc0b | j_mayer | #define PPC_CACHE PPC_INSNS_BASE
|
390 | a750fc0b | j_mayer | #define PPC_MISC PPC_INSNS_BASE
|
391 | a750fc0b | j_mayer | /* Optional floating point instructions */
|
392 | a750fc0b | j_mayer | PPC_FLOAT = 0x0000000000000002ULL,
|
393 | a750fc0b | j_mayer | PPC_FLOAT_FSQRT = 0x0000000000000004ULL,
|
394 | a750fc0b | j_mayer | PPC_FLOAT_FRES = 0x0000000000000008ULL,
|
395 | a750fc0b | j_mayer | PPC_FLOAT_FRSQRTE = 0x0000000000000010ULL,
|
396 | a750fc0b | j_mayer | PPC_FLOAT_FSEL = 0x0000000000000020ULL,
|
397 | a750fc0b | j_mayer | PPC_FLOAT_STFIWX = 0x0000000000000040ULL,
|
398 | a750fc0b | j_mayer | /* external control instructions */
|
399 | a750fc0b | j_mayer | PPC_EXTERN = 0x0000000000000080ULL,
|
400 | a750fc0b | j_mayer | /* segment register access instructions */
|
401 | a750fc0b | j_mayer | PPC_SEGMENT = 0x0000000000000100ULL,
|
402 | a750fc0b | j_mayer | /* Optional cache control instruction */
|
403 | a750fc0b | j_mayer | PPC_CACHE_DCBA = 0x0000000000000200ULL,
|
404 | a750fc0b | j_mayer | /* Optional memory control instructions */
|
405 | a750fc0b | j_mayer | PPC_MEM_TLBIA = 0x0000000000000400ULL,
|
406 | a750fc0b | j_mayer | PPC_MEM_TLBIE = 0x0000000000000800ULL,
|
407 | a750fc0b | j_mayer | PPC_MEM_TLBSYNC = 0x0000000000001000ULL,
|
408 | a750fc0b | j_mayer | /* eieio & sync */
|
409 | a750fc0b | j_mayer | PPC_MEM_SYNC = 0x0000000000002000ULL,
|
410 | a750fc0b | j_mayer | /* PowerPC 6xx TLB management instructions */
|
411 | a750fc0b | j_mayer | PPC_6xx_TLB = 0x0000000000004000ULL,
|
412 | a750fc0b | j_mayer | /* Altivec support */
|
413 | a750fc0b | j_mayer | PPC_ALTIVEC = 0x0000000000008000ULL,
|
414 | a750fc0b | j_mayer | /* Time base mftb instruction */
|
415 | a750fc0b | j_mayer | PPC_MFTB = 0x0000000000010000ULL,
|
416 | a750fc0b | j_mayer | /* Embedded PowerPC dedicated instructions */
|
417 | a750fc0b | j_mayer | PPC_EMB_COMMON = 0x0000000000020000ULL,
|
418 | a750fc0b | j_mayer | /* PowerPC 40x exception model */
|
419 | a750fc0b | j_mayer | PPC_40x_EXCP = 0x0000000000040000ULL,
|
420 | a750fc0b | j_mayer | /* PowerPC 40x TLB management instructions */
|
421 | a750fc0b | j_mayer | PPC_40x_TLB = 0x0000000000080000ULL,
|
422 | a750fc0b | j_mayer | /* PowerPC 405 Mac instructions */
|
423 | a750fc0b | j_mayer | PPC_405_MAC = 0x0000000000100000ULL,
|
424 | a750fc0b | j_mayer | /* PowerPC 440 specific instructions */
|
425 | a750fc0b | j_mayer | PPC_440_SPEC = 0x0000000000200000ULL,
|
426 | a750fc0b | j_mayer | /* Power-to-PowerPC bridge (601) */
|
427 | a750fc0b | j_mayer | PPC_POWER_BR = 0x0000000000400000ULL,
|
428 | a750fc0b | j_mayer | /* PowerPC 602 specific */
|
429 | a750fc0b | j_mayer | PPC_602_SPEC = 0x0000000000800000ULL,
|
430 | a750fc0b | j_mayer | /* Deprecated instructions */
|
431 | a750fc0b | j_mayer | /* Original POWER instruction set */
|
432 | a750fc0b | j_mayer | PPC_POWER = 0x0000000001000000ULL,
|
433 | a750fc0b | j_mayer | /* POWER2 instruction set extension */
|
434 | a750fc0b | j_mayer | PPC_POWER2 = 0x0000000002000000ULL,
|
435 | a750fc0b | j_mayer | /* Power RTC support */
|
436 | a750fc0b | j_mayer | PPC_POWER_RTC = 0x0000000004000000ULL,
|
437 | a750fc0b | j_mayer | /* 64 bits PowerPC instructions */
|
438 | a750fc0b | j_mayer | /* 64 bits PowerPC instruction set */
|
439 | a750fc0b | j_mayer | PPC_64B = 0x0000000008000000ULL,
|
440 | a750fc0b | j_mayer | /* 64 bits hypervisor extensions */
|
441 | a750fc0b | j_mayer | PPC_64H = 0x0000000010000000ULL,
|
442 | a750fc0b | j_mayer | /* 64 bits PowerPC "bridge" features */
|
443 | a750fc0b | j_mayer | PPC_64_BRIDGE = 0x0000000020000000ULL,
|
444 | a750fc0b | j_mayer | /* BookE (embedded) PowerPC specification */
|
445 | a750fc0b | j_mayer | PPC_BOOKE = 0x0000000040000000ULL,
|
446 | a750fc0b | j_mayer | /* eieio */
|
447 | a750fc0b | j_mayer | PPC_MEM_EIEIO = 0x0000000080000000ULL,
|
448 | a750fc0b | j_mayer | /* e500 vector instructions */
|
449 | a750fc0b | j_mayer | PPC_E500_VECTOR = 0x0000000100000000ULL,
|
450 | a750fc0b | j_mayer | /* PowerPC 4xx dedicated instructions */
|
451 | a750fc0b | j_mayer | PPC_4xx_COMMON = 0x0000000200000000ULL,
|
452 | a750fc0b | j_mayer | /* PowerPC 2.03 specification extensions */
|
453 | a750fc0b | j_mayer | PPC_203 = 0x0000000400000000ULL,
|
454 | a750fc0b | j_mayer | /* PowerPC 2.03 SPE extension */
|
455 | a750fc0b | j_mayer | PPC_SPE = 0x0000000800000000ULL,
|
456 | a750fc0b | j_mayer | /* PowerPC 2.03 SPE floating-point extension */
|
457 | a750fc0b | j_mayer | PPC_SPEFPU = 0x0000001000000000ULL,
|
458 | a750fc0b | j_mayer | /* SLB management */
|
459 | a750fc0b | j_mayer | PPC_SLBI = 0x0000002000000000ULL,
|
460 | a750fc0b | j_mayer | /* PowerPC 40x ibct instructions */
|
461 | a750fc0b | j_mayer | PPC_40x_ICBT = 0x0000004000000000ULL,
|
462 | a750fc0b | j_mayer | /* PowerPC 74xx TLB management instructions */
|
463 | a750fc0b | j_mayer | PPC_74xx_TLB = 0x0000008000000000ULL,
|
464 | a750fc0b | j_mayer | /* More BookE (embedded) instructions... */
|
465 | a750fc0b | j_mayer | PPC_BOOKE_EXT = 0x0000010000000000ULL,
|
466 | a750fc0b | j_mayer | /* rfmci is not implemented in all BookE PowerPC */
|
467 | a750fc0b | j_mayer | PPC_RFMCI = 0x0000020000000000ULL,
|
468 | a750fc0b | j_mayer | /* user-mode DCR access, implemented in PowerPC 460 */
|
469 | a750fc0b | j_mayer | PPC_DCRUX = 0x0000040000000000ULL,
|
470 | a750fc0b | j_mayer | }; |
471 | a750fc0b | j_mayer | |
472 | a750fc0b | j_mayer | /*****************************************************************************/
|
473 | a750fc0b | j_mayer | /* PowerPC instructions table */
|
474 | 3fc6c082 | bellard | #if HOST_LONG_BITS == 64 |
475 | 3fc6c082 | bellard | #define OPC_ALIGN 8 |
476 | 3fc6c082 | bellard | #else
|
477 | 3fc6c082 | bellard | #define OPC_ALIGN 4 |
478 | 3fc6c082 | bellard | #endif
|
479 | 1b039c09 | bellard | #if defined(__APPLE__)
|
480 | d9bce9d9 | j_mayer | #define OPCODES_SECTION \
|
481 | 3fc6c082 | bellard | __attribute__ ((section("__TEXT,__opcodes"), unused, aligned (OPC_ALIGN) ))
|
482 | 933dc6eb | bellard | #else
|
483 | d9bce9d9 | j_mayer | #define OPCODES_SECTION \
|
484 | 3fc6c082 | bellard | __attribute__ ((section(".opcodes"), unused, aligned (OPC_ALIGN) ))
|
485 | 933dc6eb | bellard | #endif
|
486 | 933dc6eb | bellard | |
487 | 76a66253 | j_mayer | #if defined(DO_PPC_STATISTICS)
|
488 | 79aceca5 | bellard | #define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \
|
489 | 18fba28c | bellard | OPCODES_SECTION opcode_t opc_##name = { \ |
490 | 79aceca5 | bellard | .opc1 = op1, \ |
491 | 79aceca5 | bellard | .opc2 = op2, \ |
492 | 79aceca5 | bellard | .opc3 = op3, \ |
493 | 18fba28c | bellard | .pad = { 0, }, \
|
494 | 79aceca5 | bellard | .handler = { \ |
495 | 79aceca5 | bellard | .inval = invl, \ |
496 | 9a64fbe4 | bellard | .type = _typ, \ |
497 | 79aceca5 | bellard | .handler = &gen_##name, \ |
498 | 76a66253 | j_mayer | .oname = stringify(name), \ |
499 | 79aceca5 | bellard | }, \ |
500 | 3fc6c082 | bellard | .oname = stringify(name), \ |
501 | 79aceca5 | bellard | } |
502 | 76a66253 | j_mayer | #else
|
503 | 76a66253 | j_mayer | #define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \
|
504 | 76a66253 | j_mayer | OPCODES_SECTION opcode_t opc_##name = { \ |
505 | 76a66253 | j_mayer | .opc1 = op1, \ |
506 | 76a66253 | j_mayer | .opc2 = op2, \ |
507 | 76a66253 | j_mayer | .opc3 = op3, \ |
508 | 76a66253 | j_mayer | .pad = { 0, }, \
|
509 | 76a66253 | j_mayer | .handler = { \ |
510 | 76a66253 | j_mayer | .inval = invl, \ |
511 | 76a66253 | j_mayer | .type = _typ, \ |
512 | 76a66253 | j_mayer | .handler = &gen_##name, \ |
513 | 76a66253 | j_mayer | }, \ |
514 | 76a66253 | j_mayer | .oname = stringify(name), \ |
515 | 76a66253 | j_mayer | } |
516 | 76a66253 | j_mayer | #endif
|
517 | 79aceca5 | bellard | |
518 | 79aceca5 | bellard | #define GEN_OPCODE_MARK(name) \
|
519 | 18fba28c | bellard | OPCODES_SECTION opcode_t opc_##name = { \ |
520 | 79aceca5 | bellard | .opc1 = 0xFF, \
|
521 | 79aceca5 | bellard | .opc2 = 0xFF, \
|
522 | 79aceca5 | bellard | .opc3 = 0xFF, \
|
523 | 18fba28c | bellard | .pad = { 0, }, \
|
524 | 79aceca5 | bellard | .handler = { \ |
525 | 79aceca5 | bellard | .inval = 0x00000000, \
|
526 | 9a64fbe4 | bellard | .type = 0x00, \
|
527 | 79aceca5 | bellard | .handler = NULL, \
|
528 | 79aceca5 | bellard | }, \ |
529 | 3fc6c082 | bellard | .oname = stringify(name), \ |
530 | 79aceca5 | bellard | } |
531 | 79aceca5 | bellard | |
532 | 79aceca5 | bellard | /* Start opcode list */
|
533 | 79aceca5 | bellard | GEN_OPCODE_MARK(start); |
534 | 79aceca5 | bellard | |
535 | 79aceca5 | bellard | /* Invalid instruction */
|
536 | 9a64fbe4 | bellard | GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE) |
537 | 9a64fbe4 | bellard | { |
538 | 9fddaa0c | bellard | RET_INVAL(ctx); |
539 | 9a64fbe4 | bellard | } |
540 | 9a64fbe4 | bellard | |
541 | 79aceca5 | bellard | static opc_handler_t invalid_handler = {
|
542 | 79aceca5 | bellard | .inval = 0xFFFFFFFF,
|
543 | 9a64fbe4 | bellard | .type = PPC_NONE, |
544 | 79aceca5 | bellard | .handler = gen_invalid, |
545 | 79aceca5 | bellard | }; |
546 | 79aceca5 | bellard | |
547 | 79aceca5 | bellard | /*** Integer arithmetic ***/
|
548 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH2(name, opc1, opc2, opc3, inval, type) \
|
549 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \ |
550 | 79aceca5 | bellard | { \ |
551 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
552 | 79aceca5 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
553 | 79aceca5 | bellard | gen_op_##name(); \ |
554 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
555 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
556 | 76a66253 | j_mayer | gen_set_Rc0(ctx); \ |
557 | 79aceca5 | bellard | } |
558 | 79aceca5 | bellard | |
559 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH2_O(name, opc1, opc2, opc3, inval, type) \
|
560 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \ |
561 | 79aceca5 | bellard | { \ |
562 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
563 | 79aceca5 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
564 | 79aceca5 | bellard | gen_op_##name(); \ |
565 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
566 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
567 | 76a66253 | j_mayer | gen_set_Rc0(ctx); \ |
568 | 79aceca5 | bellard | } |
569 | 79aceca5 | bellard | |
570 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \
|
571 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
|
572 | 79aceca5 | bellard | { \ |
573 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
574 | 79aceca5 | bellard | gen_op_##name(); \ |
575 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
576 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
577 | 76a66253 | j_mayer | gen_set_Rc0(ctx); \ |
578 | 79aceca5 | bellard | } |
579 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH1_O(name, opc1, opc2, opc3, type) \
|
580 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
|
581 | 79aceca5 | bellard | { \ |
582 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
583 | 79aceca5 | bellard | gen_op_##name(); \ |
584 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
585 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
586 | 76a66253 | j_mayer | gen_set_Rc0(ctx); \ |
587 | 79aceca5 | bellard | } |
588 | 79aceca5 | bellard | |
589 | 79aceca5 | bellard | /* Two operands arithmetic functions */
|
590 | d9bce9d9 | j_mayer | #define GEN_INT_ARITH2(name, opc1, opc2, opc3, type) \
|
591 | d9bce9d9 | j_mayer | __GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000000, type) \
|
592 | d9bce9d9 | j_mayer | __GEN_INT_ARITH2_O(name##o, opc1, opc2, opc3 | 0x10, 0x00000000, type) |
593 | d9bce9d9 | j_mayer | |
594 | d9bce9d9 | j_mayer | /* Two operands arithmetic functions with no overflow allowed */
|
595 | d9bce9d9 | j_mayer | #define GEN_INT_ARITHN(name, opc1, opc2, opc3, type) \
|
596 | d9bce9d9 | j_mayer | __GEN_INT_ARITH2(name, opc1, opc2, opc3, 0x00000400, type)
|
597 | d9bce9d9 | j_mayer | |
598 | d9bce9d9 | j_mayer | /* One operand arithmetic functions */
|
599 | d9bce9d9 | j_mayer | #define GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \
|
600 | d9bce9d9 | j_mayer | __GEN_INT_ARITH1(name, opc1, opc2, opc3, type) \ |
601 | d9bce9d9 | j_mayer | __GEN_INT_ARITH1_O(name##o, opc1, opc2, opc3 | 0x10, type) |
602 | d9bce9d9 | j_mayer | |
603 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
604 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, inval, type) \
|
605 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \ |
606 | d9bce9d9 | j_mayer | { \ |
607 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
608 | d9bce9d9 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
609 | d9bce9d9 | j_mayer | if (ctx->sf_mode) \
|
610 | d9bce9d9 | j_mayer | gen_op_##name##_64(); \ |
611 | d9bce9d9 | j_mayer | else \
|
612 | d9bce9d9 | j_mayer | gen_op_##name(); \ |
613 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
614 | d9bce9d9 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
615 | d9bce9d9 | j_mayer | gen_set_Rc0(ctx); \ |
616 | d9bce9d9 | j_mayer | } |
617 | d9bce9d9 | j_mayer | |
618 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH2_O_64(name, opc1, opc2, opc3, inval, type) \
|
619 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \ |
620 | d9bce9d9 | j_mayer | { \ |
621 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
622 | d9bce9d9 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
623 | d9bce9d9 | j_mayer | if (ctx->sf_mode) \
|
624 | d9bce9d9 | j_mayer | gen_op_##name##_64(); \ |
625 | d9bce9d9 | j_mayer | else \
|
626 | d9bce9d9 | j_mayer | gen_op_##name(); \ |
627 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
628 | d9bce9d9 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
629 | d9bce9d9 | j_mayer | gen_set_Rc0(ctx); \ |
630 | d9bce9d9 | j_mayer | } |
631 | d9bce9d9 | j_mayer | |
632 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \
|
633 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
|
634 | d9bce9d9 | j_mayer | { \ |
635 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
636 | d9bce9d9 | j_mayer | if (ctx->sf_mode) \
|
637 | d9bce9d9 | j_mayer | gen_op_##name##_64(); \ |
638 | d9bce9d9 | j_mayer | else \
|
639 | d9bce9d9 | j_mayer | gen_op_##name(); \ |
640 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
641 | d9bce9d9 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
642 | d9bce9d9 | j_mayer | gen_set_Rc0(ctx); \ |
643 | d9bce9d9 | j_mayer | } |
644 | d9bce9d9 | j_mayer | #define __GEN_INT_ARITH1_O_64(name, opc1, opc2, opc3, type) \
|
645 | d9bce9d9 | j_mayer | GEN_HANDLER(name, opc1, opc2, opc3, 0x0000F800, type) \
|
646 | d9bce9d9 | j_mayer | { \ |
647 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
648 | d9bce9d9 | j_mayer | if (ctx->sf_mode) \
|
649 | d9bce9d9 | j_mayer | gen_op_##name##_64(); \ |
650 | d9bce9d9 | j_mayer | else \
|
651 | d9bce9d9 | j_mayer | gen_op_##name(); \ |
652 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); \ |
653 | d9bce9d9 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
654 | d9bce9d9 | j_mayer | gen_set_Rc0(ctx); \ |
655 | d9bce9d9 | j_mayer | } |
656 | d9bce9d9 | j_mayer | |
657 | d9bce9d9 | j_mayer | /* Two operands arithmetic functions */
|
658 | d9bce9d9 | j_mayer | #define GEN_INT_ARITH2_64(name, opc1, opc2, opc3, type) \
|
659 | d9bce9d9 | j_mayer | __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000000, type) \
|
660 | d9bce9d9 | j_mayer | __GEN_INT_ARITH2_O_64(name##o, opc1, opc2, opc3 | 0x10, 0x00000000, type) |
661 | 79aceca5 | bellard | |
662 | 79aceca5 | bellard | /* Two operands arithmetic functions with no overflow allowed */
|
663 | d9bce9d9 | j_mayer | #define GEN_INT_ARITHN_64(name, opc1, opc2, opc3, type) \
|
664 | d9bce9d9 | j_mayer | __GEN_INT_ARITH2_64(name, opc1, opc2, opc3, 0x00000400, type)
|
665 | 79aceca5 | bellard | |
666 | 79aceca5 | bellard | /* One operand arithmetic functions */
|
667 | d9bce9d9 | j_mayer | #define GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \
|
668 | d9bce9d9 | j_mayer | __GEN_INT_ARITH1_64(name, opc1, opc2, opc3, type) \ |
669 | d9bce9d9 | j_mayer | __GEN_INT_ARITH1_O_64(name##o, opc1, opc2, opc3 | 0x10, type) |
670 | d9bce9d9 | j_mayer | #else
|
671 | d9bce9d9 | j_mayer | #define GEN_INT_ARITH2_64 GEN_INT_ARITH2
|
672 | d9bce9d9 | j_mayer | #define GEN_INT_ARITHN_64 GEN_INT_ARITHN
|
673 | d9bce9d9 | j_mayer | #define GEN_INT_ARITH1_64 GEN_INT_ARITH1
|
674 | d9bce9d9 | j_mayer | #endif
|
675 | 79aceca5 | bellard | |
676 | 79aceca5 | bellard | /* add add. addo addo. */
|
677 | d9bce9d9 | j_mayer | static inline void gen_op_addo (void) |
678 | d9bce9d9 | j_mayer | { |
679 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
680 | d9bce9d9 | j_mayer | gen_op_add(); |
681 | d9bce9d9 | j_mayer | gen_op_check_addo(); |
682 | d9bce9d9 | j_mayer | } |
683 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
684 | d9bce9d9 | j_mayer | #define gen_op_add_64 gen_op_add
|
685 | d9bce9d9 | j_mayer | static inline void gen_op_addo_64 (void) |
686 | d9bce9d9 | j_mayer | { |
687 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
688 | d9bce9d9 | j_mayer | gen_op_add(); |
689 | d9bce9d9 | j_mayer | gen_op_check_addo_64(); |
690 | d9bce9d9 | j_mayer | } |
691 | d9bce9d9 | j_mayer | #endif
|
692 | d9bce9d9 | j_mayer | GEN_INT_ARITH2_64 (add, 0x1F, 0x0A, 0x08, PPC_INTEGER); |
693 | 79aceca5 | bellard | /* addc addc. addco addco. */
|
694 | d9bce9d9 | j_mayer | static inline void gen_op_addc (void) |
695 | d9bce9d9 | j_mayer | { |
696 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
697 | d9bce9d9 | j_mayer | gen_op_add(); |
698 | d9bce9d9 | j_mayer | gen_op_check_addc(); |
699 | d9bce9d9 | j_mayer | } |
700 | d9bce9d9 | j_mayer | static inline void gen_op_addco (void) |
701 | d9bce9d9 | j_mayer | { |
702 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
703 | d9bce9d9 | j_mayer | gen_op_add(); |
704 | d9bce9d9 | j_mayer | gen_op_check_addc(); |
705 | d9bce9d9 | j_mayer | gen_op_check_addo(); |
706 | d9bce9d9 | j_mayer | } |
707 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
708 | d9bce9d9 | j_mayer | static inline void gen_op_addc_64 (void) |
709 | d9bce9d9 | j_mayer | { |
710 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
711 | d9bce9d9 | j_mayer | gen_op_add(); |
712 | d9bce9d9 | j_mayer | gen_op_check_addc_64(); |
713 | d9bce9d9 | j_mayer | } |
714 | d9bce9d9 | j_mayer | static inline void gen_op_addco_64 (void) |
715 | d9bce9d9 | j_mayer | { |
716 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
717 | d9bce9d9 | j_mayer | gen_op_add(); |
718 | d9bce9d9 | j_mayer | gen_op_check_addc_64(); |
719 | d9bce9d9 | j_mayer | gen_op_check_addo_64(); |
720 | d9bce9d9 | j_mayer | } |
721 | d9bce9d9 | j_mayer | #endif
|
722 | d9bce9d9 | j_mayer | GEN_INT_ARITH2_64 (addc, 0x1F, 0x0A, 0x00, PPC_INTEGER); |
723 | 79aceca5 | bellard | /* adde adde. addeo addeo. */
|
724 | d9bce9d9 | j_mayer | static inline void gen_op_addeo (void) |
725 | d9bce9d9 | j_mayer | { |
726 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
727 | d9bce9d9 | j_mayer | gen_op_adde(); |
728 | d9bce9d9 | j_mayer | gen_op_check_addo(); |
729 | d9bce9d9 | j_mayer | } |
730 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
731 | d9bce9d9 | j_mayer | static inline void gen_op_addeo_64 (void) |
732 | d9bce9d9 | j_mayer | { |
733 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
734 | d9bce9d9 | j_mayer | gen_op_adde_64(); |
735 | d9bce9d9 | j_mayer | gen_op_check_addo_64(); |
736 | d9bce9d9 | j_mayer | } |
737 | d9bce9d9 | j_mayer | #endif
|
738 | d9bce9d9 | j_mayer | GEN_INT_ARITH2_64 (adde, 0x1F, 0x0A, 0x04, PPC_INTEGER); |
739 | 79aceca5 | bellard | /* addme addme. addmeo addmeo. */
|
740 | d9bce9d9 | j_mayer | static inline void gen_op_addme (void) |
741 | d9bce9d9 | j_mayer | { |
742 | d9bce9d9 | j_mayer | gen_op_move_T1_T0(); |
743 | d9bce9d9 | j_mayer | gen_op_add_me(); |
744 | d9bce9d9 | j_mayer | } |
745 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
746 | d9bce9d9 | j_mayer | static inline void gen_op_addme_64 (void) |
747 | d9bce9d9 | j_mayer | { |
748 | d9bce9d9 | j_mayer | gen_op_move_T1_T0(); |
749 | d9bce9d9 | j_mayer | gen_op_add_me_64(); |
750 | d9bce9d9 | j_mayer | } |
751 | d9bce9d9 | j_mayer | #endif
|
752 | d9bce9d9 | j_mayer | GEN_INT_ARITH1_64 (addme, 0x1F, 0x0A, 0x07, PPC_INTEGER); |
753 | 79aceca5 | bellard | /* addze addze. addzeo addzeo. */
|
754 | d9bce9d9 | j_mayer | static inline void gen_op_addze (void) |
755 | d9bce9d9 | j_mayer | { |
756 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
757 | d9bce9d9 | j_mayer | gen_op_add_ze(); |
758 | d9bce9d9 | j_mayer | gen_op_check_addc(); |
759 | d9bce9d9 | j_mayer | } |
760 | d9bce9d9 | j_mayer | static inline void gen_op_addzeo (void) |
761 | d9bce9d9 | j_mayer | { |
762 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
763 | d9bce9d9 | j_mayer | gen_op_add_ze(); |
764 | d9bce9d9 | j_mayer | gen_op_check_addc(); |
765 | d9bce9d9 | j_mayer | gen_op_check_addo(); |
766 | d9bce9d9 | j_mayer | } |
767 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
768 | d9bce9d9 | j_mayer | static inline void gen_op_addze_64 (void) |
769 | d9bce9d9 | j_mayer | { |
770 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
771 | d9bce9d9 | j_mayer | gen_op_add_ze(); |
772 | d9bce9d9 | j_mayer | gen_op_check_addc_64(); |
773 | d9bce9d9 | j_mayer | } |
774 | d9bce9d9 | j_mayer | static inline void gen_op_addzeo_64 (void) |
775 | d9bce9d9 | j_mayer | { |
776 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
777 | d9bce9d9 | j_mayer | gen_op_add_ze(); |
778 | d9bce9d9 | j_mayer | gen_op_check_addc_64(); |
779 | d9bce9d9 | j_mayer | gen_op_check_addo_64(); |
780 | d9bce9d9 | j_mayer | } |
781 | d9bce9d9 | j_mayer | #endif
|
782 | d9bce9d9 | j_mayer | GEN_INT_ARITH1_64 (addze, 0x1F, 0x0A, 0x06, PPC_INTEGER); |
783 | 79aceca5 | bellard | /* divw divw. divwo divwo. */
|
784 | d9bce9d9 | j_mayer | GEN_INT_ARITH2 (divw, 0x1F, 0x0B, 0x0F, PPC_INTEGER); |
785 | 79aceca5 | bellard | /* divwu divwu. divwuo divwuo. */
|
786 | d9bce9d9 | j_mayer | GEN_INT_ARITH2 (divwu, 0x1F, 0x0B, 0x0E, PPC_INTEGER); |
787 | 79aceca5 | bellard | /* mulhw mulhw. */
|
788 | d9bce9d9 | j_mayer | GEN_INT_ARITHN (mulhw, 0x1F, 0x0B, 0x02, PPC_INTEGER); |
789 | 79aceca5 | bellard | /* mulhwu mulhwu. */
|
790 | d9bce9d9 | j_mayer | GEN_INT_ARITHN (mulhwu, 0x1F, 0x0B, 0x00, PPC_INTEGER); |
791 | 79aceca5 | bellard | /* mullw mullw. mullwo mullwo. */
|
792 | d9bce9d9 | j_mayer | GEN_INT_ARITH2 (mullw, 0x1F, 0x0B, 0x07, PPC_INTEGER); |
793 | 79aceca5 | bellard | /* neg neg. nego nego. */
|
794 | d9bce9d9 | j_mayer | GEN_INT_ARITH1_64 (neg, 0x1F, 0x08, 0x03, PPC_INTEGER); |
795 | 79aceca5 | bellard | /* subf subf. subfo subfo. */
|
796 | d9bce9d9 | j_mayer | static inline void gen_op_subfo (void) |
797 | d9bce9d9 | j_mayer | { |
798 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
799 | d9bce9d9 | j_mayer | gen_op_subf(); |
800 | d9bce9d9 | j_mayer | gen_op_check_subfo(); |
801 | d9bce9d9 | j_mayer | } |
802 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
803 | d9bce9d9 | j_mayer | #define gen_op_subf_64 gen_op_subf
|
804 | d9bce9d9 | j_mayer | static inline void gen_op_subfo_64 (void) |
805 | d9bce9d9 | j_mayer | { |
806 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
807 | d9bce9d9 | j_mayer | gen_op_subf(); |
808 | d9bce9d9 | j_mayer | gen_op_check_subfo_64(); |
809 | d9bce9d9 | j_mayer | } |
810 | d9bce9d9 | j_mayer | #endif
|
811 | d9bce9d9 | j_mayer | GEN_INT_ARITH2_64 (subf, 0x1F, 0x08, 0x01, PPC_INTEGER); |
812 | 79aceca5 | bellard | /* subfc subfc. subfco subfco. */
|
813 | d9bce9d9 | j_mayer | static inline void gen_op_subfc (void) |
814 | d9bce9d9 | j_mayer | { |
815 | d9bce9d9 | j_mayer | gen_op_subf(); |
816 | d9bce9d9 | j_mayer | gen_op_check_subfc(); |
817 | d9bce9d9 | j_mayer | } |
818 | d9bce9d9 | j_mayer | static inline void gen_op_subfco (void) |
819 | d9bce9d9 | j_mayer | { |
820 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
821 | d9bce9d9 | j_mayer | gen_op_subf(); |
822 | d9bce9d9 | j_mayer | gen_op_check_subfc(); |
823 | d9bce9d9 | j_mayer | gen_op_check_subfo(); |
824 | d9bce9d9 | j_mayer | } |
825 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
826 | d9bce9d9 | j_mayer | static inline void gen_op_subfc_64 (void) |
827 | d9bce9d9 | j_mayer | { |
828 | d9bce9d9 | j_mayer | gen_op_subf(); |
829 | d9bce9d9 | j_mayer | gen_op_check_subfc_64(); |
830 | d9bce9d9 | j_mayer | } |
831 | d9bce9d9 | j_mayer | static inline void gen_op_subfco_64 (void) |
832 | d9bce9d9 | j_mayer | { |
833 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
834 | d9bce9d9 | j_mayer | gen_op_subf(); |
835 | d9bce9d9 | j_mayer | gen_op_check_subfc_64(); |
836 | d9bce9d9 | j_mayer | gen_op_check_subfo_64(); |
837 | d9bce9d9 | j_mayer | } |
838 | d9bce9d9 | j_mayer | #endif
|
839 | d9bce9d9 | j_mayer | GEN_INT_ARITH2_64 (subfc, 0x1F, 0x08, 0x00, PPC_INTEGER); |
840 | 79aceca5 | bellard | /* subfe subfe. subfeo subfeo. */
|
841 | d9bce9d9 | j_mayer | static inline void gen_op_subfeo (void) |
842 | d9bce9d9 | j_mayer | { |
843 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
844 | d9bce9d9 | j_mayer | gen_op_subfe(); |
845 | d9bce9d9 | j_mayer | gen_op_check_subfo(); |
846 | d9bce9d9 | j_mayer | } |
847 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
848 | d9bce9d9 | j_mayer | #define gen_op_subfe_64 gen_op_subfe
|
849 | d9bce9d9 | j_mayer | static inline void gen_op_subfeo_64 (void) |
850 | d9bce9d9 | j_mayer | { |
851 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
852 | d9bce9d9 | j_mayer | gen_op_subfe_64(); |
853 | d9bce9d9 | j_mayer | gen_op_check_subfo_64(); |
854 | d9bce9d9 | j_mayer | } |
855 | d9bce9d9 | j_mayer | #endif
|
856 | d9bce9d9 | j_mayer | GEN_INT_ARITH2_64 (subfe, 0x1F, 0x08, 0x04, PPC_INTEGER); |
857 | 79aceca5 | bellard | /* subfme subfme. subfmeo subfmeo. */
|
858 | d9bce9d9 | j_mayer | GEN_INT_ARITH1_64 (subfme, 0x1F, 0x08, 0x07, PPC_INTEGER); |
859 | 79aceca5 | bellard | /* subfze subfze. subfzeo subfzeo. */
|
860 | d9bce9d9 | j_mayer | GEN_INT_ARITH1_64 (subfze, 0x1F, 0x08, 0x06, PPC_INTEGER); |
861 | 79aceca5 | bellard | /* addi */
|
862 | 79aceca5 | bellard | GEN_HANDLER(addi, 0x0E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
863 | 79aceca5 | bellard | { |
864 | 76a66253 | j_mayer | target_long simm = SIMM(ctx->opcode); |
865 | 79aceca5 | bellard | |
866 | 79aceca5 | bellard | if (rA(ctx->opcode) == 0) { |
867 | 76a66253 | j_mayer | /* li case */
|
868 | d9bce9d9 | j_mayer | gen_set_T0(simm); |
869 | 79aceca5 | bellard | } else {
|
870 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
871 | 76a66253 | j_mayer | if (likely(simm != 0)) |
872 | 76a66253 | j_mayer | gen_op_addi(simm); |
873 | 79aceca5 | bellard | } |
874 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
875 | 79aceca5 | bellard | } |
876 | 79aceca5 | bellard | /* addic */
|
877 | 79aceca5 | bellard | GEN_HANDLER(addic, 0x0C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
878 | 79aceca5 | bellard | { |
879 | 76a66253 | j_mayer | target_long simm = SIMM(ctx->opcode); |
880 | 76a66253 | j_mayer | |
881 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
882 | d9bce9d9 | j_mayer | if (likely(simm != 0)) { |
883 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
884 | d9bce9d9 | j_mayer | gen_op_addi(simm); |
885 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
886 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
887 | d9bce9d9 | j_mayer | gen_op_check_addc_64(); |
888 | d9bce9d9 | j_mayer | else
|
889 | d9bce9d9 | j_mayer | #endif
|
890 | d9bce9d9 | j_mayer | gen_op_check_addc(); |
891 | e864cabd | j_mayer | } else {
|
892 | e864cabd | j_mayer | gen_op_clear_xer_ca(); |
893 | d9bce9d9 | j_mayer | } |
894 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
895 | 79aceca5 | bellard | } |
896 | 79aceca5 | bellard | /* addic. */
|
897 | 79aceca5 | bellard | GEN_HANDLER(addic_, 0x0D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
898 | 79aceca5 | bellard | { |
899 | 76a66253 | j_mayer | target_long simm = SIMM(ctx->opcode); |
900 | 76a66253 | j_mayer | |
901 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
902 | d9bce9d9 | j_mayer | if (likely(simm != 0)) { |
903 | d9bce9d9 | j_mayer | gen_op_move_T2_T0(); |
904 | d9bce9d9 | j_mayer | gen_op_addi(simm); |
905 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
906 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
907 | d9bce9d9 | j_mayer | gen_op_check_addc_64(); |
908 | d9bce9d9 | j_mayer | else
|
909 | d9bce9d9 | j_mayer | #endif
|
910 | d9bce9d9 | j_mayer | gen_op_check_addc(); |
911 | 966439a6 | j_mayer | } else {
|
912 | 966439a6 | j_mayer | gen_op_clear_xer_ca(); |
913 | d9bce9d9 | j_mayer | } |
914 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
915 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
916 | 79aceca5 | bellard | } |
917 | 79aceca5 | bellard | /* addis */
|
918 | 79aceca5 | bellard | GEN_HANDLER(addis, 0x0F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
919 | 79aceca5 | bellard | { |
920 | 76a66253 | j_mayer | target_long simm = SIMM(ctx->opcode); |
921 | 79aceca5 | bellard | |
922 | 79aceca5 | bellard | if (rA(ctx->opcode) == 0) { |
923 | 76a66253 | j_mayer | /* lis case */
|
924 | d9bce9d9 | j_mayer | gen_set_T0(simm << 16);
|
925 | 79aceca5 | bellard | } else {
|
926 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
927 | 76a66253 | j_mayer | if (likely(simm != 0)) |
928 | 76a66253 | j_mayer | gen_op_addi(simm << 16);
|
929 | 79aceca5 | bellard | } |
930 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
931 | 79aceca5 | bellard | } |
932 | 79aceca5 | bellard | /* mulli */
|
933 | 79aceca5 | bellard | GEN_HANDLER(mulli, 0x07, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
934 | 79aceca5 | bellard | { |
935 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
936 | 79aceca5 | bellard | gen_op_mulli(SIMM(ctx->opcode)); |
937 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
938 | 79aceca5 | bellard | } |
939 | 79aceca5 | bellard | /* subfic */
|
940 | 79aceca5 | bellard | GEN_HANDLER(subfic, 0x08, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
941 | 79aceca5 | bellard | { |
942 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
943 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
944 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
945 | d9bce9d9 | j_mayer | gen_op_subfic_64(SIMM(ctx->opcode)); |
946 | d9bce9d9 | j_mayer | else
|
947 | d9bce9d9 | j_mayer | #endif
|
948 | d9bce9d9 | j_mayer | gen_op_subfic(SIMM(ctx->opcode)); |
949 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
950 | 79aceca5 | bellard | } |
951 | 79aceca5 | bellard | |
952 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
953 | d9bce9d9 | j_mayer | /* mulhd mulhd. */
|
954 | a750fc0b | j_mayer | GEN_INT_ARITHN (mulhd, 0x1F, 0x09, 0x02, PPC_64B); |
955 | d9bce9d9 | j_mayer | /* mulhdu mulhdu. */
|
956 | a750fc0b | j_mayer | GEN_INT_ARITHN (mulhdu, 0x1F, 0x09, 0x00, PPC_64B); |
957 | d9bce9d9 | j_mayer | /* mulld mulld. mulldo mulldo. */
|
958 | a750fc0b | j_mayer | GEN_INT_ARITH2 (mulld, 0x1F, 0x09, 0x07, PPC_64B); |
959 | d9bce9d9 | j_mayer | /* divd divd. divdo divdo. */
|
960 | a750fc0b | j_mayer | GEN_INT_ARITH2 (divd, 0x1F, 0x09, 0x0F, PPC_64B); |
961 | d9bce9d9 | j_mayer | /* divdu divdu. divduo divduo. */
|
962 | a750fc0b | j_mayer | GEN_INT_ARITH2 (divdu, 0x1F, 0x09, 0x0E, PPC_64B); |
963 | d9bce9d9 | j_mayer | #endif
|
964 | d9bce9d9 | j_mayer | |
965 | 79aceca5 | bellard | /*** Integer comparison ***/
|
966 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
967 | d9bce9d9 | j_mayer | #define GEN_CMP(name, opc, type) \
|
968 | d9bce9d9 | j_mayer | GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \ |
969 | d9bce9d9 | j_mayer | { \ |
970 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
971 | d9bce9d9 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
972 | d9bce9d9 | j_mayer | if (ctx->sf_mode) \
|
973 | d9bce9d9 | j_mayer | gen_op_##name##_64(); \ |
974 | d9bce9d9 | j_mayer | else \
|
975 | d9bce9d9 | j_mayer | gen_op_##name(); \ |
976 | d9bce9d9 | j_mayer | gen_op_store_T0_crf(crfD(ctx->opcode)); \ |
977 | d9bce9d9 | j_mayer | } |
978 | d9bce9d9 | j_mayer | #else
|
979 | d9bce9d9 | j_mayer | #define GEN_CMP(name, opc, type) \
|
980 | d9bce9d9 | j_mayer | GEN_HANDLER(name, 0x1F, 0x00, opc, 0x00400000, type) \ |
981 | 79aceca5 | bellard | { \ |
982 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); \ |
983 | 79aceca5 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
984 | 79aceca5 | bellard | gen_op_##name(); \ |
985 | 79aceca5 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); \ |
986 | 79aceca5 | bellard | } |
987 | d9bce9d9 | j_mayer | #endif
|
988 | 79aceca5 | bellard | |
989 | 79aceca5 | bellard | /* cmp */
|
990 | d9bce9d9 | j_mayer | GEN_CMP(cmp, 0x00, PPC_INTEGER);
|
991 | 79aceca5 | bellard | /* cmpi */
|
992 | 79aceca5 | bellard | GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) |
993 | 79aceca5 | bellard | { |
994 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
995 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
996 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
997 | d9bce9d9 | j_mayer | gen_op_cmpi_64(SIMM(ctx->opcode)); |
998 | d9bce9d9 | j_mayer | else
|
999 | d9bce9d9 | j_mayer | #endif
|
1000 | d9bce9d9 | j_mayer | gen_op_cmpi(SIMM(ctx->opcode)); |
1001 | 79aceca5 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
1002 | 79aceca5 | bellard | } |
1003 | 79aceca5 | bellard | /* cmpl */
|
1004 | d9bce9d9 | j_mayer | GEN_CMP(cmpl, 0x01, PPC_INTEGER);
|
1005 | 79aceca5 | bellard | /* cmpli */
|
1006 | 79aceca5 | bellard | GEN_HANDLER(cmpli, 0x0A, 0xFF, 0xFF, 0x00400000, PPC_INTEGER) |
1007 | 79aceca5 | bellard | { |
1008 | 79aceca5 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1009 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1010 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
1011 | d9bce9d9 | j_mayer | gen_op_cmpli_64(UIMM(ctx->opcode)); |
1012 | d9bce9d9 | j_mayer | else
|
1013 | d9bce9d9 | j_mayer | #endif
|
1014 | d9bce9d9 | j_mayer | gen_op_cmpli(UIMM(ctx->opcode)); |
1015 | 79aceca5 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
1016 | 79aceca5 | bellard | } |
1017 | 79aceca5 | bellard | |
1018 | d9bce9d9 | j_mayer | /* isel (PowerPC 2.03 specification) */
|
1019 | d9bce9d9 | j_mayer | GEN_HANDLER(isel, 0x1F, 0x0F, 0x00, 0x00000001, PPC_203) |
1020 | d9bce9d9 | j_mayer | { |
1021 | d9bce9d9 | j_mayer | uint32_t bi = rC(ctx->opcode); |
1022 | d9bce9d9 | j_mayer | uint32_t mask; |
1023 | d9bce9d9 | j_mayer | |
1024 | d9bce9d9 | j_mayer | if (rA(ctx->opcode) == 0) { |
1025 | d9bce9d9 | j_mayer | gen_set_T0(0);
|
1026 | d9bce9d9 | j_mayer | } else {
|
1027 | d9bce9d9 | j_mayer | gen_op_load_gpr_T1(rA(ctx->opcode)); |
1028 | d9bce9d9 | j_mayer | } |
1029 | d9bce9d9 | j_mayer | gen_op_load_gpr_T2(rB(ctx->opcode)); |
1030 | d9bce9d9 | j_mayer | mask = 1 << (3 - (bi & 0x03)); |
1031 | d9bce9d9 | j_mayer | gen_op_load_crf_T0(bi >> 2);
|
1032 | d9bce9d9 | j_mayer | gen_op_test_true(mask); |
1033 | d9bce9d9 | j_mayer | gen_op_isel(); |
1034 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
1035 | d9bce9d9 | j_mayer | } |
1036 | d9bce9d9 | j_mayer | |
1037 | 79aceca5 | bellard | /*** Integer logical ***/
|
1038 | d9bce9d9 | j_mayer | #define __GEN_LOGICAL2(name, opc2, opc3, type) \
|
1039 | d9bce9d9 | j_mayer | GEN_HANDLER(name, 0x1F, opc2, opc3, 0x00000000, type) \ |
1040 | 79aceca5 | bellard | { \ |
1041 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); \ |
1042 | 79aceca5 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); \ |
1043 | 79aceca5 | bellard | gen_op_##name(); \ |
1044 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
1045 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1046 | 76a66253 | j_mayer | gen_set_Rc0(ctx); \ |
1047 | 79aceca5 | bellard | } |
1048 | d9bce9d9 | j_mayer | #define GEN_LOGICAL2(name, opc, type) \
|
1049 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(name, 0x1C, opc, type)
|
1050 | 79aceca5 | bellard | |
1051 | d9bce9d9 | j_mayer | #define GEN_LOGICAL1(name, opc, type) \
|
1052 | d9bce9d9 | j_mayer | GEN_HANDLER(name, 0x1F, 0x1A, opc, 0x00000000, type) \ |
1053 | 79aceca5 | bellard | { \ |
1054 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); \ |
1055 | 79aceca5 | bellard | gen_op_##name(); \ |
1056 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
1057 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1058 | 76a66253 | j_mayer | gen_set_Rc0(ctx); \ |
1059 | 79aceca5 | bellard | } |
1060 | 79aceca5 | bellard | |
1061 | 79aceca5 | bellard | /* and & and. */
|
1062 | d9bce9d9 | j_mayer | GEN_LOGICAL2(and, 0x00, PPC_INTEGER);
|
1063 | 79aceca5 | bellard | /* andc & andc. */
|
1064 | d9bce9d9 | j_mayer | GEN_LOGICAL2(andc, 0x01, PPC_INTEGER);
|
1065 | 79aceca5 | bellard | /* andi. */
|
1066 | 79aceca5 | bellard | GEN_HANDLER(andi_, 0x1C, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1067 | 79aceca5 | bellard | { |
1068 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1069 | 76a66253 | j_mayer | gen_op_andi_T0(UIMM(ctx->opcode)); |
1070 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1071 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1072 | 79aceca5 | bellard | } |
1073 | 79aceca5 | bellard | /* andis. */
|
1074 | 79aceca5 | bellard | GEN_HANDLER(andis_, 0x1D, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1075 | 79aceca5 | bellard | { |
1076 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1077 | 76a66253 | j_mayer | gen_op_andi_T0(UIMM(ctx->opcode) << 16);
|
1078 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1079 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1080 | 79aceca5 | bellard | } |
1081 | 79aceca5 | bellard | |
1082 | 79aceca5 | bellard | /* cntlzw */
|
1083 | d9bce9d9 | j_mayer | GEN_LOGICAL1(cntlzw, 0x00, PPC_INTEGER);
|
1084 | 79aceca5 | bellard | /* eqv & eqv. */
|
1085 | d9bce9d9 | j_mayer | GEN_LOGICAL2(eqv, 0x08, PPC_INTEGER);
|
1086 | 79aceca5 | bellard | /* extsb & extsb. */
|
1087 | d9bce9d9 | j_mayer | GEN_LOGICAL1(extsb, 0x1D, PPC_INTEGER);
|
1088 | 79aceca5 | bellard | /* extsh & extsh. */
|
1089 | d9bce9d9 | j_mayer | GEN_LOGICAL1(extsh, 0x1C, PPC_INTEGER);
|
1090 | 79aceca5 | bellard | /* nand & nand. */
|
1091 | d9bce9d9 | j_mayer | GEN_LOGICAL2(nand, 0x0E, PPC_INTEGER);
|
1092 | 79aceca5 | bellard | /* nor & nor. */
|
1093 | d9bce9d9 | j_mayer | GEN_LOGICAL2(nor, 0x03, PPC_INTEGER);
|
1094 | 9a64fbe4 | bellard | |
1095 | 79aceca5 | bellard | /* or & or. */
|
1096 | 9a64fbe4 | bellard | GEN_HANDLER(or, 0x1F, 0x1C, 0x0D, 0x00000000, PPC_INTEGER) |
1097 | 9a64fbe4 | bellard | { |
1098 | 76a66253 | j_mayer | int rs, ra, rb;
|
1099 | 76a66253 | j_mayer | |
1100 | 76a66253 | j_mayer | rs = rS(ctx->opcode); |
1101 | 76a66253 | j_mayer | ra = rA(ctx->opcode); |
1102 | 76a66253 | j_mayer | rb = rB(ctx->opcode); |
1103 | 76a66253 | j_mayer | /* Optimisation for mr. ri case */
|
1104 | 76a66253 | j_mayer | if (rs != ra || rs != rb) {
|
1105 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rs); |
1106 | 76a66253 | j_mayer | if (rs != rb) {
|
1107 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rb); |
1108 | 76a66253 | j_mayer | gen_op_or(); |
1109 | 76a66253 | j_mayer | } |
1110 | 76a66253 | j_mayer | gen_op_store_T0_gpr(ra); |
1111 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1112 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1113 | 76a66253 | j_mayer | } else if (unlikely(Rc(ctx->opcode) != 0)) { |
1114 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rs); |
1115 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1116 | 9a64fbe4 | bellard | } |
1117 | 9a64fbe4 | bellard | } |
1118 | 9a64fbe4 | bellard | |
1119 | 79aceca5 | bellard | /* orc & orc. */
|
1120 | d9bce9d9 | j_mayer | GEN_LOGICAL2(orc, 0x0C, PPC_INTEGER);
|
1121 | 79aceca5 | bellard | /* xor & xor. */
|
1122 | 9a64fbe4 | bellard | GEN_HANDLER(xor, 0x1F, 0x1C, 0x09, 0x00000000, PPC_INTEGER) |
1123 | 9a64fbe4 | bellard | { |
1124 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1125 | 9a64fbe4 | bellard | /* Optimisation for "set to zero" case */
|
1126 | 9a64fbe4 | bellard | if (rS(ctx->opcode) != rB(ctx->opcode)) {
|
1127 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); |
1128 | 9a64fbe4 | bellard | gen_op_xor(); |
1129 | 9a64fbe4 | bellard | } else {
|
1130 | 76a66253 | j_mayer | gen_op_reset_T0(); |
1131 | 9a64fbe4 | bellard | } |
1132 | 9a64fbe4 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1133 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1134 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1135 | 9a64fbe4 | bellard | } |
1136 | 79aceca5 | bellard | /* ori */
|
1137 | 79aceca5 | bellard | GEN_HANDLER(ori, 0x18, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1138 | 79aceca5 | bellard | { |
1139 | 76a66253 | j_mayer | target_ulong uimm = UIMM(ctx->opcode); |
1140 | 79aceca5 | bellard | |
1141 | 9a64fbe4 | bellard | if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { |
1142 | 9a64fbe4 | bellard | /* NOP */
|
1143 | 76a66253 | j_mayer | /* XXX: should handle special NOPs for POWER series */
|
1144 | 9a64fbe4 | bellard | return;
|
1145 | 76a66253 | j_mayer | } |
1146 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1147 | 76a66253 | j_mayer | if (likely(uimm != 0)) |
1148 | 79aceca5 | bellard | gen_op_ori(uimm); |
1149 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1150 | 79aceca5 | bellard | } |
1151 | 79aceca5 | bellard | /* oris */
|
1152 | 79aceca5 | bellard | GEN_HANDLER(oris, 0x19, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1153 | 79aceca5 | bellard | { |
1154 | 76a66253 | j_mayer | target_ulong uimm = UIMM(ctx->opcode); |
1155 | 79aceca5 | bellard | |
1156 | 9a64fbe4 | bellard | if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { |
1157 | 9a64fbe4 | bellard | /* NOP */
|
1158 | 9a64fbe4 | bellard | return;
|
1159 | 76a66253 | j_mayer | } |
1160 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1161 | 76a66253 | j_mayer | if (likely(uimm != 0)) |
1162 | 79aceca5 | bellard | gen_op_ori(uimm << 16);
|
1163 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1164 | 79aceca5 | bellard | } |
1165 | 79aceca5 | bellard | /* xori */
|
1166 | 79aceca5 | bellard | GEN_HANDLER(xori, 0x1A, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1167 | 79aceca5 | bellard | { |
1168 | 76a66253 | j_mayer | target_ulong uimm = UIMM(ctx->opcode); |
1169 | 9a64fbe4 | bellard | |
1170 | 9a64fbe4 | bellard | if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { |
1171 | 9a64fbe4 | bellard | /* NOP */
|
1172 | 9a64fbe4 | bellard | return;
|
1173 | 9a64fbe4 | bellard | } |
1174 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1175 | 76a66253 | j_mayer | if (likely(uimm != 0)) |
1176 | 76a66253 | j_mayer | gen_op_xori(uimm); |
1177 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1178 | 79aceca5 | bellard | } |
1179 | 79aceca5 | bellard | |
1180 | 79aceca5 | bellard | /* xoris */
|
1181 | 79aceca5 | bellard | GEN_HANDLER(xoris, 0x1B, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1182 | 79aceca5 | bellard | { |
1183 | 76a66253 | j_mayer | target_ulong uimm = UIMM(ctx->opcode); |
1184 | 9a64fbe4 | bellard | |
1185 | 9a64fbe4 | bellard | if (rS(ctx->opcode) == rA(ctx->opcode) && uimm == 0) { |
1186 | 9a64fbe4 | bellard | /* NOP */
|
1187 | 9a64fbe4 | bellard | return;
|
1188 | 9a64fbe4 | bellard | } |
1189 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1190 | 76a66253 | j_mayer | if (likely(uimm != 0)) |
1191 | 76a66253 | j_mayer | gen_op_xori(uimm << 16);
|
1192 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1193 | 79aceca5 | bellard | } |
1194 | 79aceca5 | bellard | |
1195 | d9bce9d9 | j_mayer | /* popcntb : PowerPC 2.03 specification */
|
1196 | d9bce9d9 | j_mayer | GEN_HANDLER(popcntb, 0x1F, 0x03, 0x03, 0x0000F801, PPC_203) |
1197 | d9bce9d9 | j_mayer | { |
1198 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1199 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1200 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
1201 | d9bce9d9 | j_mayer | gen_op_popcntb_64(); |
1202 | d9bce9d9 | j_mayer | else
|
1203 | d9bce9d9 | j_mayer | #endif
|
1204 | d9bce9d9 | j_mayer | gen_op_popcntb(); |
1205 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1206 | d9bce9d9 | j_mayer | } |
1207 | d9bce9d9 | j_mayer | |
1208 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1209 | d9bce9d9 | j_mayer | /* extsw & extsw. */
|
1210 | d9bce9d9 | j_mayer | GEN_LOGICAL1(extsw, 0x1E, PPC_64B);
|
1211 | d9bce9d9 | j_mayer | /* cntlzd */
|
1212 | d9bce9d9 | j_mayer | GEN_LOGICAL1(cntlzd, 0x01, PPC_64B);
|
1213 | d9bce9d9 | j_mayer | #endif
|
1214 | d9bce9d9 | j_mayer | |
1215 | 79aceca5 | bellard | /*** Integer rotate ***/
|
1216 | 79aceca5 | bellard | /* rlwimi & rlwimi. */
|
1217 | 79aceca5 | bellard | GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1218 | 79aceca5 | bellard | { |
1219 | 76a66253 | j_mayer | target_ulong mask; |
1220 | 76a66253 | j_mayer | uint32_t mb, me, sh; |
1221 | 79aceca5 | bellard | |
1222 | 79aceca5 | bellard | mb = MB(ctx->opcode); |
1223 | 79aceca5 | bellard | me = ME(ctx->opcode); |
1224 | 76a66253 | j_mayer | sh = SH(ctx->opcode); |
1225 | 76a66253 | j_mayer | if (likely(sh == 0)) { |
1226 | 76a66253 | j_mayer | if (likely(mb == 0 && me == 31)) { |
1227 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1228 | 76a66253 | j_mayer | goto do_store;
|
1229 | 76a66253 | j_mayer | } else if (likely(mb == 31 && me == 0)) { |
1230 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1231 | 76a66253 | j_mayer | goto do_store;
|
1232 | 76a66253 | j_mayer | } |
1233 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1234 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rA(ctx->opcode)); |
1235 | 76a66253 | j_mayer | goto do_mask;
|
1236 | 76a66253 | j_mayer | } |
1237 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1238 | fb0eaffc | bellard | gen_op_load_gpr_T1(rA(ctx->opcode)); |
1239 | 76a66253 | j_mayer | gen_op_rotli32_T0(SH(ctx->opcode)); |
1240 | 76a66253 | j_mayer | do_mask:
|
1241 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
|
1242 | 76a66253 | j_mayer | mb += 32;
|
1243 | 76a66253 | j_mayer | me += 32;
|
1244 | 76a66253 | j_mayer | #endif
|
1245 | 76a66253 | j_mayer | mask = MASK(mb, me); |
1246 | 76a66253 | j_mayer | gen_op_andi_T0(mask); |
1247 | 76a66253 | j_mayer | gen_op_andi_T1(~mask); |
1248 | 76a66253 | j_mayer | gen_op_or(); |
1249 | 76a66253 | j_mayer | do_store:
|
1250 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1251 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1252 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1253 | 79aceca5 | bellard | } |
1254 | 79aceca5 | bellard | /* rlwinm & rlwinm. */
|
1255 | 79aceca5 | bellard | GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1256 | 79aceca5 | bellard | { |
1257 | 79aceca5 | bellard | uint32_t mb, me, sh; |
1258 | 3b46e624 | ths | |
1259 | 79aceca5 | bellard | sh = SH(ctx->opcode); |
1260 | 79aceca5 | bellard | mb = MB(ctx->opcode); |
1261 | 79aceca5 | bellard | me = ME(ctx->opcode); |
1262 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1263 | 76a66253 | j_mayer | if (likely(sh == 0)) { |
1264 | 76a66253 | j_mayer | goto do_mask;
|
1265 | 76a66253 | j_mayer | } |
1266 | 76a66253 | j_mayer | if (likely(mb == 0)) { |
1267 | 76a66253 | j_mayer | if (likely(me == 31)) { |
1268 | 76a66253 | j_mayer | gen_op_rotli32_T0(sh); |
1269 | 76a66253 | j_mayer | goto do_store;
|
1270 | 76a66253 | j_mayer | } else if (likely(me == (31 - sh))) { |
1271 | 76a66253 | j_mayer | gen_op_sli_T0(sh); |
1272 | 76a66253 | j_mayer | goto do_store;
|
1273 | 79aceca5 | bellard | } |
1274 | 76a66253 | j_mayer | } else if (likely(me == 31)) { |
1275 | 76a66253 | j_mayer | if (likely(sh == (32 - mb))) { |
1276 | 76a66253 | j_mayer | gen_op_srli_T0(mb); |
1277 | 76a66253 | j_mayer | goto do_store;
|
1278 | 79aceca5 | bellard | } |
1279 | 79aceca5 | bellard | } |
1280 | 76a66253 | j_mayer | gen_op_rotli32_T0(sh); |
1281 | 76a66253 | j_mayer | do_mask:
|
1282 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
|
1283 | 76a66253 | j_mayer | mb += 32;
|
1284 | 76a66253 | j_mayer | me += 32;
|
1285 | 76a66253 | j_mayer | #endif
|
1286 | 76a66253 | j_mayer | gen_op_andi_T0(MASK(mb, me)); |
1287 | 76a66253 | j_mayer | do_store:
|
1288 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1289 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1290 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1291 | 79aceca5 | bellard | } |
1292 | 79aceca5 | bellard | /* rlwnm & rlwnm. */
|
1293 | 79aceca5 | bellard | GEN_HANDLER(rlwnm, 0x17, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
1294 | 79aceca5 | bellard | { |
1295 | 79aceca5 | bellard | uint32_t mb, me; |
1296 | 79aceca5 | bellard | |
1297 | 79aceca5 | bellard | mb = MB(ctx->opcode); |
1298 | 79aceca5 | bellard | me = ME(ctx->opcode); |
1299 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1300 | 79aceca5 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); |
1301 | 76a66253 | j_mayer | gen_op_rotl32_T0_T1(); |
1302 | 76a66253 | j_mayer | if (unlikely(mb != 0 || me != 31)) { |
1303 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
|
1304 | 76a66253 | j_mayer | mb += 32;
|
1305 | 76a66253 | j_mayer | me += 32;
|
1306 | 76a66253 | j_mayer | #endif
|
1307 | 76a66253 | j_mayer | gen_op_andi_T0(MASK(mb, me)); |
1308 | 79aceca5 | bellard | } |
1309 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1310 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1311 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1312 | 79aceca5 | bellard | } |
1313 | 79aceca5 | bellard | |
1314 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1315 | d9bce9d9 | j_mayer | #define GEN_PPC64_R2(name, opc1, opc2) \
|
1316 | d9bce9d9 | j_mayer | GEN_HANDLER(name##0, opc1, opc2, 0xFF, 0x00000000, PPC_64B) \ |
1317 | d9bce9d9 | j_mayer | { \ |
1318 | d9bce9d9 | j_mayer | gen_##name(ctx, 0); \ |
1319 | d9bce9d9 | j_mayer | } \ |
1320 | d9bce9d9 | j_mayer | GEN_HANDLER(name##1, opc1, opc2 | 0x10, 0xFF, 0x00000000, PPC_64B) \ |
1321 | d9bce9d9 | j_mayer | { \ |
1322 | d9bce9d9 | j_mayer | gen_##name(ctx, 1); \ |
1323 | d9bce9d9 | j_mayer | } |
1324 | d9bce9d9 | j_mayer | #define GEN_PPC64_R4(name, opc1, opc2) \
|
1325 | d9bce9d9 | j_mayer | GEN_HANDLER(name##0, opc1, opc2, 0xFF, 0x00000000, PPC_64B) \ |
1326 | d9bce9d9 | j_mayer | { \ |
1327 | d9bce9d9 | j_mayer | gen_##name(ctx, 0, 0); \ |
1328 | d9bce9d9 | j_mayer | } \ |
1329 | d9bce9d9 | j_mayer | GEN_HANDLER(name##1, opc1, opc2 | 0x01, 0xFF, 0x00000000, PPC_64B) \ |
1330 | d9bce9d9 | j_mayer | { \ |
1331 | d9bce9d9 | j_mayer | gen_##name(ctx, 0, 1); \ |
1332 | d9bce9d9 | j_mayer | } \ |
1333 | d9bce9d9 | j_mayer | GEN_HANDLER(name##2, opc1, opc2 | 0x10, 0xFF, 0x00000000, PPC_64B) \ |
1334 | d9bce9d9 | j_mayer | { \ |
1335 | d9bce9d9 | j_mayer | gen_##name(ctx, 1, 0); \ |
1336 | d9bce9d9 | j_mayer | } \ |
1337 | d9bce9d9 | j_mayer | GEN_HANDLER(name##3, opc1, opc2 | 0x11, 0xFF, 0x00000000, PPC_64B) \ |
1338 | d9bce9d9 | j_mayer | { \ |
1339 | d9bce9d9 | j_mayer | gen_##name(ctx, 1, 1); \ |
1340 | d9bce9d9 | j_mayer | } |
1341 | 51789c41 | j_mayer | |
1342 | 40d0591e | j_mayer | static inline void gen_andi_T0_64 (DisasContext *ctx, uint64_t mask) |
1343 | 40d0591e | j_mayer | { |
1344 | 40d0591e | j_mayer | if (mask >> 32) |
1345 | 40d0591e | j_mayer | gen_op_andi_T0_64(mask >> 32, mask & 0xFFFFFFFF); |
1346 | 40d0591e | j_mayer | else
|
1347 | 40d0591e | j_mayer | gen_op_andi_T0(mask); |
1348 | 40d0591e | j_mayer | } |
1349 | 40d0591e | j_mayer | |
1350 | 40d0591e | j_mayer | static inline void gen_andi_T1_64 (DisasContext *ctx, uint64_t mask) |
1351 | 40d0591e | j_mayer | { |
1352 | 40d0591e | j_mayer | if (mask >> 32) |
1353 | 40d0591e | j_mayer | gen_op_andi_T1_64(mask >> 32, mask & 0xFFFFFFFF); |
1354 | 40d0591e | j_mayer | else
|
1355 | 40d0591e | j_mayer | gen_op_andi_T1(mask); |
1356 | 40d0591e | j_mayer | } |
1357 | 40d0591e | j_mayer | |
1358 | 51789c41 | j_mayer | static inline void gen_rldinm (DisasContext *ctx, uint32_t mb, uint32_t me, |
1359 | 51789c41 | j_mayer | uint32_t sh) |
1360 | 51789c41 | j_mayer | { |
1361 | 51789c41 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1362 | 51789c41 | j_mayer | if (likely(sh == 0)) { |
1363 | 51789c41 | j_mayer | goto do_mask;
|
1364 | 51789c41 | j_mayer | } |
1365 | 51789c41 | j_mayer | if (likely(mb == 0)) { |
1366 | 51789c41 | j_mayer | if (likely(me == 63)) { |
1367 | 40d0591e | j_mayer | gen_op_rotli64_T0(sh); |
1368 | 51789c41 | j_mayer | goto do_store;
|
1369 | 51789c41 | j_mayer | } else if (likely(me == (63 - sh))) { |
1370 | 51789c41 | j_mayer | gen_op_sli_T0(sh); |
1371 | 51789c41 | j_mayer | goto do_store;
|
1372 | 51789c41 | j_mayer | } |
1373 | 51789c41 | j_mayer | } else if (likely(me == 63)) { |
1374 | 51789c41 | j_mayer | if (likely(sh == (64 - mb))) { |
1375 | 40d0591e | j_mayer | gen_op_srli_T0_64(mb); |
1376 | 51789c41 | j_mayer | goto do_store;
|
1377 | 51789c41 | j_mayer | } |
1378 | 51789c41 | j_mayer | } |
1379 | 51789c41 | j_mayer | gen_op_rotli64_T0(sh); |
1380 | 51789c41 | j_mayer | do_mask:
|
1381 | 40d0591e | j_mayer | gen_andi_T0_64(ctx, MASK(mb, me)); |
1382 | 51789c41 | j_mayer | do_store:
|
1383 | 51789c41 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1384 | 51789c41 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1385 | 51789c41 | j_mayer | gen_set_Rc0(ctx); |
1386 | 51789c41 | j_mayer | } |
1387 | d9bce9d9 | j_mayer | /* rldicl - rldicl. */
|
1388 | d9bce9d9 | j_mayer | static inline void gen_rldicl (DisasContext *ctx, int mbn, int shn) |
1389 | d9bce9d9 | j_mayer | { |
1390 | 51789c41 | j_mayer | uint32_t sh, mb; |
1391 | d9bce9d9 | j_mayer | |
1392 | 9d53c753 | j_mayer | sh = SH(ctx->opcode) | (shn << 5);
|
1393 | 9d53c753 | j_mayer | mb = MB(ctx->opcode) | (mbn << 5);
|
1394 | 51789c41 | j_mayer | gen_rldinm(ctx, mb, 63, sh);
|
1395 | d9bce9d9 | j_mayer | } |
1396 | 51789c41 | j_mayer | GEN_PPC64_R4(rldicl, 0x1E, 0x00); |
1397 | d9bce9d9 | j_mayer | /* rldicr - rldicr. */
|
1398 | d9bce9d9 | j_mayer | static inline void gen_rldicr (DisasContext *ctx, int men, int shn) |
1399 | d9bce9d9 | j_mayer | { |
1400 | 51789c41 | j_mayer | uint32_t sh, me; |
1401 | d9bce9d9 | j_mayer | |
1402 | 9d53c753 | j_mayer | sh = SH(ctx->opcode) | (shn << 5);
|
1403 | 9d53c753 | j_mayer | me = MB(ctx->opcode) | (men << 5);
|
1404 | 51789c41 | j_mayer | gen_rldinm(ctx, 0, me, sh);
|
1405 | d9bce9d9 | j_mayer | } |
1406 | 51789c41 | j_mayer | GEN_PPC64_R4(rldicr, 0x1E, 0x02); |
1407 | d9bce9d9 | j_mayer | /* rldic - rldic. */
|
1408 | d9bce9d9 | j_mayer | static inline void gen_rldic (DisasContext *ctx, int mbn, int shn) |
1409 | d9bce9d9 | j_mayer | { |
1410 | 51789c41 | j_mayer | uint32_t sh, mb; |
1411 | d9bce9d9 | j_mayer | |
1412 | 9d53c753 | j_mayer | sh = SH(ctx->opcode) | (shn << 5);
|
1413 | 9d53c753 | j_mayer | mb = MB(ctx->opcode) | (mbn << 5);
|
1414 | 51789c41 | j_mayer | gen_rldinm(ctx, mb, 63 - sh, sh);
|
1415 | 51789c41 | j_mayer | } |
1416 | 51789c41 | j_mayer | GEN_PPC64_R4(rldic, 0x1E, 0x04); |
1417 | 51789c41 | j_mayer | |
1418 | 51789c41 | j_mayer | static inline void gen_rldnm (DisasContext *ctx, uint32_t mb, uint32_t me) |
1419 | 51789c41 | j_mayer | { |
1420 | 51789c41 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1421 | 51789c41 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
1422 | 51789c41 | j_mayer | gen_op_rotl64_T0_T1(); |
1423 | 51789c41 | j_mayer | if (unlikely(mb != 0 || me != 63)) { |
1424 | 40d0591e | j_mayer | gen_andi_T0_64(ctx, MASK(mb, me)); |
1425 | 51789c41 | j_mayer | } |
1426 | 51789c41 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1427 | 51789c41 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1428 | 51789c41 | j_mayer | gen_set_Rc0(ctx); |
1429 | d9bce9d9 | j_mayer | } |
1430 | 51789c41 | j_mayer | |
1431 | d9bce9d9 | j_mayer | /* rldcl - rldcl. */
|
1432 | d9bce9d9 | j_mayer | static inline void gen_rldcl (DisasContext *ctx, int mbn) |
1433 | d9bce9d9 | j_mayer | { |
1434 | 51789c41 | j_mayer | uint32_t mb; |
1435 | d9bce9d9 | j_mayer | |
1436 | 9d53c753 | j_mayer | mb = MB(ctx->opcode) | (mbn << 5);
|
1437 | 51789c41 | j_mayer | gen_rldnm(ctx, mb, 63);
|
1438 | d9bce9d9 | j_mayer | } |
1439 | 36081602 | j_mayer | GEN_PPC64_R2(rldcl, 0x1E, 0x08); |
1440 | d9bce9d9 | j_mayer | /* rldcr - rldcr. */
|
1441 | d9bce9d9 | j_mayer | static inline void gen_rldcr (DisasContext *ctx, int men) |
1442 | d9bce9d9 | j_mayer | { |
1443 | 51789c41 | j_mayer | uint32_t me; |
1444 | d9bce9d9 | j_mayer | |
1445 | 9d53c753 | j_mayer | me = MB(ctx->opcode) | (men << 5);
|
1446 | 51789c41 | j_mayer | gen_rldnm(ctx, 0, me);
|
1447 | d9bce9d9 | j_mayer | } |
1448 | 36081602 | j_mayer | GEN_PPC64_R2(rldcr, 0x1E, 0x09); |
1449 | d9bce9d9 | j_mayer | /* rldimi - rldimi. */
|
1450 | d9bce9d9 | j_mayer | static inline void gen_rldimi (DisasContext *ctx, int mbn, int shn) |
1451 | d9bce9d9 | j_mayer | { |
1452 | 51789c41 | j_mayer | uint64_t mask; |
1453 | 51789c41 | j_mayer | uint32_t sh, mb; |
1454 | d9bce9d9 | j_mayer | |
1455 | 9d53c753 | j_mayer | sh = SH(ctx->opcode) | (shn << 5);
|
1456 | 9d53c753 | j_mayer | mb = MB(ctx->opcode) | (mbn << 5);
|
1457 | 51789c41 | j_mayer | if (likely(sh == 0)) { |
1458 | 51789c41 | j_mayer | if (likely(mb == 0)) { |
1459 | 51789c41 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1460 | 51789c41 | j_mayer | goto do_store;
|
1461 | 51789c41 | j_mayer | } else if (likely(mb == 63)) { |
1462 | 51789c41 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1463 | 51789c41 | j_mayer | goto do_store;
|
1464 | 51789c41 | j_mayer | } |
1465 | 51789c41 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1466 | 51789c41 | j_mayer | gen_op_load_gpr_T1(rA(ctx->opcode)); |
1467 | 51789c41 | j_mayer | goto do_mask;
|
1468 | 51789c41 | j_mayer | } |
1469 | 51789c41 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1470 | 51789c41 | j_mayer | gen_op_load_gpr_T1(rA(ctx->opcode)); |
1471 | 40d0591e | j_mayer | gen_op_rotli64_T0(sh); |
1472 | 51789c41 | j_mayer | do_mask:
|
1473 | 51789c41 | j_mayer | mask = MASK(mb, 63 - sh);
|
1474 | 40d0591e | j_mayer | gen_andi_T0_64(ctx, mask); |
1475 | 40d0591e | j_mayer | gen_andi_T1_64(ctx, ~mask); |
1476 | 51789c41 | j_mayer | gen_op_or(); |
1477 | 51789c41 | j_mayer | do_store:
|
1478 | 51789c41 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1479 | 51789c41 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1480 | 51789c41 | j_mayer | gen_set_Rc0(ctx); |
1481 | d9bce9d9 | j_mayer | } |
1482 | 36081602 | j_mayer | GEN_PPC64_R4(rldimi, 0x1E, 0x06); |
1483 | d9bce9d9 | j_mayer | #endif
|
1484 | d9bce9d9 | j_mayer | |
1485 | 79aceca5 | bellard | /*** Integer shift ***/
|
1486 | 79aceca5 | bellard | /* slw & slw. */
|
1487 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(slw, 0x18, 0x00, PPC_INTEGER); |
1488 | 79aceca5 | bellard | /* sraw & sraw. */
|
1489 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(sraw, 0x18, 0x18, PPC_INTEGER); |
1490 | 79aceca5 | bellard | /* srawi & srawi. */
|
1491 | 79aceca5 | bellard | GEN_HANDLER(srawi, 0x1F, 0x18, 0x19, 0x00000000, PPC_INTEGER) |
1492 | 79aceca5 | bellard | { |
1493 | d9bce9d9 | j_mayer | int mb, me;
|
1494 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1495 | d9bce9d9 | j_mayer | if (SH(ctx->opcode) != 0) { |
1496 | d9bce9d9 | j_mayer | gen_op_move_T1_T0(); |
1497 | d9bce9d9 | j_mayer | mb = 32 - SH(ctx->opcode);
|
1498 | d9bce9d9 | j_mayer | me = 31;
|
1499 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1500 | d9bce9d9 | j_mayer | mb += 32;
|
1501 | d9bce9d9 | j_mayer | me += 32;
|
1502 | d9bce9d9 | j_mayer | #endif
|
1503 | d9bce9d9 | j_mayer | gen_op_srawi(SH(ctx->opcode), MASK(mb, me)); |
1504 | d9bce9d9 | j_mayer | } |
1505 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1506 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1507 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
1508 | 79aceca5 | bellard | } |
1509 | 79aceca5 | bellard | /* srw & srw. */
|
1510 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(srw, 0x18, 0x10, PPC_INTEGER); |
1511 | d9bce9d9 | j_mayer | |
1512 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1513 | d9bce9d9 | j_mayer | /* sld & sld. */
|
1514 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(sld, 0x1B, 0x00, PPC_64B); |
1515 | d9bce9d9 | j_mayer | /* srad & srad. */
|
1516 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(srad, 0x1A, 0x18, PPC_64B); |
1517 | d9bce9d9 | j_mayer | /* sradi & sradi. */
|
1518 | d9bce9d9 | j_mayer | static inline void gen_sradi (DisasContext *ctx, int n) |
1519 | d9bce9d9 | j_mayer | { |
1520 | d9bce9d9 | j_mayer | uint64_t mask; |
1521 | d9bce9d9 | j_mayer | int sh, mb, me;
|
1522 | d9bce9d9 | j_mayer | |
1523 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
1524 | d9bce9d9 | j_mayer | sh = SH(ctx->opcode) + (n << 5);
|
1525 | d9bce9d9 | j_mayer | if (sh != 0) { |
1526 | d9bce9d9 | j_mayer | gen_op_move_T1_T0(); |
1527 | d9bce9d9 | j_mayer | mb = 64 - SH(ctx->opcode);
|
1528 | d9bce9d9 | j_mayer | me = 63;
|
1529 | d9bce9d9 | j_mayer | mask = MASK(mb, me); |
1530 | d9bce9d9 | j_mayer | gen_op_sradi(sh, mask >> 32, mask);
|
1531 | d9bce9d9 | j_mayer | } |
1532 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
1533 | d9bce9d9 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1534 | d9bce9d9 | j_mayer | gen_set_Rc0(ctx); |
1535 | d9bce9d9 | j_mayer | } |
1536 | d9bce9d9 | j_mayer | GEN_HANDLER(sradi0, 0x1F, 0x1A, 0x19, 0x00000000, PPC_64B) |
1537 | d9bce9d9 | j_mayer | { |
1538 | d9bce9d9 | j_mayer | gen_sradi(ctx, 0);
|
1539 | d9bce9d9 | j_mayer | } |
1540 | d9bce9d9 | j_mayer | GEN_HANDLER(sradi1, 0x1F, 0x1B, 0x19, 0x00000000, PPC_64B) |
1541 | d9bce9d9 | j_mayer | { |
1542 | d9bce9d9 | j_mayer | gen_sradi(ctx, 1);
|
1543 | d9bce9d9 | j_mayer | } |
1544 | d9bce9d9 | j_mayer | /* srd & srd. */
|
1545 | d9bce9d9 | j_mayer | __GEN_LOGICAL2(srd, 0x1B, 0x10, PPC_64B); |
1546 | d9bce9d9 | j_mayer | #endif
|
1547 | 79aceca5 | bellard | |
1548 | 79aceca5 | bellard | /*** Floating-Point arithmetic ***/
|
1549 | a750fc0b | j_mayer | #define _GEN_FLOAT_ACB(name, op, op1, op2, isfloat, type) \
|
1550 | a750fc0b | j_mayer | GEN_HANDLER(f##name, op1, op2, 0xFF, 0x00000000, type) \ |
1551 | 9a64fbe4 | bellard | { \ |
1552 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
1553 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
1554 | 3cc62370 | bellard | return; \
|
1555 | 3cc62370 | bellard | } \ |
1556 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); \ |
1557 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rA(ctx->opcode)); \ |
1558 | 9a64fbe4 | bellard | gen_op_load_fpr_FT1(rC(ctx->opcode)); \ |
1559 | 9a64fbe4 | bellard | gen_op_load_fpr_FT2(rB(ctx->opcode)); \ |
1560 | 4ecc3190 | bellard | gen_op_f##op(); \ |
1561 | 4ecc3190 | bellard | if (isfloat) { \
|
1562 | 4ecc3190 | bellard | gen_op_frsp(); \ |
1563 | 4ecc3190 | bellard | } \ |
1564 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
1565 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1566 | 9a64fbe4 | bellard | gen_op_set_Rc1(); \ |
1567 | 9a64fbe4 | bellard | } |
1568 | 9a64fbe4 | bellard | |
1569 | a750fc0b | j_mayer | #define GEN_FLOAT_ACB(name, op2, type) \
|
1570 | a750fc0b | j_mayer | _GEN_FLOAT_ACB(name, name, 0x3F, op2, 0, type); \ |
1571 | a750fc0b | j_mayer | _GEN_FLOAT_ACB(name##s, name, 0x3B, op2, 1, type); |
1572 | 9a64fbe4 | bellard | |
1573 | 4ecc3190 | bellard | #define _GEN_FLOAT_AB(name, op, op1, op2, inval, isfloat) \
|
1574 | 9a64fbe4 | bellard | GEN_HANDLER(f##name, op1, op2, 0xFF, inval, PPC_FLOAT) \ |
1575 | 9a64fbe4 | bellard | { \ |
1576 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
1577 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
1578 | 3cc62370 | bellard | return; \
|
1579 | 3cc62370 | bellard | } \ |
1580 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); \ |
1581 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rA(ctx->opcode)); \ |
1582 | 9a64fbe4 | bellard | gen_op_load_fpr_FT1(rB(ctx->opcode)); \ |
1583 | 4ecc3190 | bellard | gen_op_f##op(); \ |
1584 | 4ecc3190 | bellard | if (isfloat) { \
|
1585 | 4ecc3190 | bellard | gen_op_frsp(); \ |
1586 | 4ecc3190 | bellard | } \ |
1587 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
1588 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1589 | 9a64fbe4 | bellard | gen_op_set_Rc1(); \ |
1590 | 9a64fbe4 | bellard | } |
1591 | 9a64fbe4 | bellard | #define GEN_FLOAT_AB(name, op2, inval) \
|
1592 | 4ecc3190 | bellard | _GEN_FLOAT_AB(name, name, 0x3F, op2, inval, 0); \ |
1593 | 4ecc3190 | bellard | _GEN_FLOAT_AB(name##s, name, 0x3B, op2, inval, 1); |
1594 | 9a64fbe4 | bellard | |
1595 | 4ecc3190 | bellard | #define _GEN_FLOAT_AC(name, op, op1, op2, inval, isfloat) \
|
1596 | 9a64fbe4 | bellard | GEN_HANDLER(f##name, op1, op2, 0xFF, inval, PPC_FLOAT) \ |
1597 | 9a64fbe4 | bellard | { \ |
1598 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
1599 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
1600 | 3cc62370 | bellard | return; \
|
1601 | 3cc62370 | bellard | } \ |
1602 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); \ |
1603 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rA(ctx->opcode)); \ |
1604 | 9a64fbe4 | bellard | gen_op_load_fpr_FT1(rC(ctx->opcode)); \ |
1605 | 4ecc3190 | bellard | gen_op_f##op(); \ |
1606 | 4ecc3190 | bellard | if (isfloat) { \
|
1607 | 4ecc3190 | bellard | gen_op_frsp(); \ |
1608 | 4ecc3190 | bellard | } \ |
1609 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
1610 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1611 | 9a64fbe4 | bellard | gen_op_set_Rc1(); \ |
1612 | 9a64fbe4 | bellard | } |
1613 | 9a64fbe4 | bellard | #define GEN_FLOAT_AC(name, op2, inval) \
|
1614 | 4ecc3190 | bellard | _GEN_FLOAT_AC(name, name, 0x3F, op2, inval, 0); \ |
1615 | 4ecc3190 | bellard | _GEN_FLOAT_AC(name##s, name, 0x3B, op2, inval, 1); |
1616 | 9a64fbe4 | bellard | |
1617 | a750fc0b | j_mayer | #define GEN_FLOAT_B(name, op2, op3, type) \
|
1618 | a750fc0b | j_mayer | GEN_HANDLER(f##name, 0x3F, op2, op3, 0x001F0000, type) \ |
1619 | 9a64fbe4 | bellard | { \ |
1620 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
1621 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
1622 | 3cc62370 | bellard | return; \
|
1623 | 3cc62370 | bellard | } \ |
1624 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); \ |
1625 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rB(ctx->opcode)); \ |
1626 | 9a64fbe4 | bellard | gen_op_f##name(); \ |
1627 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
1628 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1629 | 9a64fbe4 | bellard | gen_op_set_Rc1(); \ |
1630 | 79aceca5 | bellard | } |
1631 | 79aceca5 | bellard | |
1632 | a750fc0b | j_mayer | #define GEN_FLOAT_BS(name, op1, op2, type) \
|
1633 | a750fc0b | j_mayer | GEN_HANDLER(f##name, op1, op2, 0xFF, 0x001F07C0, type) \ |
1634 | 9a64fbe4 | bellard | { \ |
1635 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
1636 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
1637 | 3cc62370 | bellard | return; \
|
1638 | 3cc62370 | bellard | } \ |
1639 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); \ |
1640 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rB(ctx->opcode)); \ |
1641 | 9a64fbe4 | bellard | gen_op_f##name(); \ |
1642 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
1643 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) \ |
1644 | 9a64fbe4 | bellard | gen_op_set_Rc1(); \ |
1645 | 79aceca5 | bellard | } |
1646 | 79aceca5 | bellard | |
1647 | 9a64fbe4 | bellard | /* fadd - fadds */
|
1648 | 9a64fbe4 | bellard | GEN_FLOAT_AB(add, 0x15, 0x000007C0); |
1649 | 4ecc3190 | bellard | /* fdiv - fdivs */
|
1650 | 9a64fbe4 | bellard | GEN_FLOAT_AB(div, 0x12, 0x000007C0); |
1651 | 4ecc3190 | bellard | /* fmul - fmuls */
|
1652 | 9a64fbe4 | bellard | GEN_FLOAT_AC(mul, 0x19, 0x0000F800); |
1653 | 79aceca5 | bellard | |
1654 | a750fc0b | j_mayer | /* fres */
|
1655 | a750fc0b | j_mayer | GEN_FLOAT_BS(res, 0x3B, 0x18, PPC_FLOAT_FRES); |
1656 | 79aceca5 | bellard | |
1657 | a750fc0b | j_mayer | /* frsqrte */
|
1658 | a750fc0b | j_mayer | GEN_FLOAT_BS(rsqrte, 0x3F, 0x1A, PPC_FLOAT_FRSQRTE); |
1659 | 79aceca5 | bellard | |
1660 | a750fc0b | j_mayer | /* fsel */
|
1661 | a750fc0b | j_mayer | _GEN_FLOAT_ACB(sel, sel, 0x3F, 0x17, 0, PPC_FLOAT_FSEL); |
1662 | 4ecc3190 | bellard | /* fsub - fsubs */
|
1663 | 9a64fbe4 | bellard | GEN_FLOAT_AB(sub, 0x14, 0x000007C0); |
1664 | 79aceca5 | bellard | /* Optional: */
|
1665 | 79aceca5 | bellard | /* fsqrt */
|
1666 | a750fc0b | j_mayer | GEN_HANDLER(fsqrt, 0x3F, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT) |
1667 | c7d344af | bellard | { |
1668 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1669 | c7d344af | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1670 | c7d344af | bellard | return;
|
1671 | c7d344af | bellard | } |
1672 | c7d344af | bellard | gen_op_reset_scrfx(); |
1673 | c7d344af | bellard | gen_op_load_fpr_FT0(rB(ctx->opcode)); |
1674 | c7d344af | bellard | gen_op_fsqrt(); |
1675 | c7d344af | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
1676 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1677 | c7d344af | bellard | gen_op_set_Rc1(); |
1678 | c7d344af | bellard | } |
1679 | 79aceca5 | bellard | |
1680 | a750fc0b | j_mayer | GEN_HANDLER(fsqrts, 0x3B, 0x16, 0xFF, 0x001F07C0, PPC_FLOAT_FSQRT) |
1681 | 79aceca5 | bellard | { |
1682 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1683 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1684 | 3cc62370 | bellard | return;
|
1685 | 3cc62370 | bellard | } |
1686 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); |
1687 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rB(ctx->opcode)); |
1688 | 4ecc3190 | bellard | gen_op_fsqrt(); |
1689 | 4ecc3190 | bellard | gen_op_frsp(); |
1690 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
1691 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1692 | 9a64fbe4 | bellard | gen_op_set_Rc1(); |
1693 | 79aceca5 | bellard | } |
1694 | 79aceca5 | bellard | |
1695 | 79aceca5 | bellard | /*** Floating-Point multiply-and-add ***/
|
1696 | 4ecc3190 | bellard | /* fmadd - fmadds */
|
1697 | a750fc0b | j_mayer | GEN_FLOAT_ACB(madd, 0x1D, PPC_FLOAT);
|
1698 | 4ecc3190 | bellard | /* fmsub - fmsubs */
|
1699 | a750fc0b | j_mayer | GEN_FLOAT_ACB(msub, 0x1C, PPC_FLOAT);
|
1700 | 4ecc3190 | bellard | /* fnmadd - fnmadds */
|
1701 | a750fc0b | j_mayer | GEN_FLOAT_ACB(nmadd, 0x1F, PPC_FLOAT);
|
1702 | 4ecc3190 | bellard | /* fnmsub - fnmsubs */
|
1703 | a750fc0b | j_mayer | GEN_FLOAT_ACB(nmsub, 0x1E, PPC_FLOAT);
|
1704 | 79aceca5 | bellard | |
1705 | 79aceca5 | bellard | /*** Floating-Point round & convert ***/
|
1706 | 79aceca5 | bellard | /* fctiw */
|
1707 | a750fc0b | j_mayer | GEN_FLOAT_B(ctiw, 0x0E, 0x00, PPC_FLOAT); |
1708 | 79aceca5 | bellard | /* fctiwz */
|
1709 | a750fc0b | j_mayer | GEN_FLOAT_B(ctiwz, 0x0F, 0x00, PPC_FLOAT); |
1710 | 79aceca5 | bellard | /* frsp */
|
1711 | a750fc0b | j_mayer | GEN_FLOAT_B(rsp, 0x0C, 0x00, PPC_FLOAT); |
1712 | 426613db | j_mayer | #if defined(TARGET_PPC64)
|
1713 | 426613db | j_mayer | /* fcfid */
|
1714 | a750fc0b | j_mayer | GEN_FLOAT_B(cfid, 0x0E, 0x1A, PPC_64B); |
1715 | 426613db | j_mayer | /* fctid */
|
1716 | a750fc0b | j_mayer | GEN_FLOAT_B(ctid, 0x0E, 0x19, PPC_64B); |
1717 | 426613db | j_mayer | /* fctidz */
|
1718 | a750fc0b | j_mayer | GEN_FLOAT_B(ctidz, 0x0F, 0x19, PPC_64B); |
1719 | 426613db | j_mayer | #endif
|
1720 | 79aceca5 | bellard | |
1721 | 79aceca5 | bellard | /*** Floating-Point compare ***/
|
1722 | 79aceca5 | bellard | /* fcmpo */
|
1723 | 76a66253 | j_mayer | GEN_HANDLER(fcmpo, 0x3F, 0x00, 0x01, 0x00600001, PPC_FLOAT) |
1724 | 79aceca5 | bellard | { |
1725 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1726 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1727 | 3cc62370 | bellard | return;
|
1728 | 3cc62370 | bellard | } |
1729 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); |
1730 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rA(ctx->opcode)); |
1731 | 9a64fbe4 | bellard | gen_op_load_fpr_FT1(rB(ctx->opcode)); |
1732 | 9a64fbe4 | bellard | gen_op_fcmpo(); |
1733 | 9a64fbe4 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
1734 | 79aceca5 | bellard | } |
1735 | 79aceca5 | bellard | |
1736 | 79aceca5 | bellard | /* fcmpu */
|
1737 | 76a66253 | j_mayer | GEN_HANDLER(fcmpu, 0x3F, 0x00, 0x00, 0x00600001, PPC_FLOAT) |
1738 | 79aceca5 | bellard | { |
1739 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1740 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1741 | 3cc62370 | bellard | return;
|
1742 | 3cc62370 | bellard | } |
1743 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); |
1744 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rA(ctx->opcode)); |
1745 | 9a64fbe4 | bellard | gen_op_load_fpr_FT1(rB(ctx->opcode)); |
1746 | 9a64fbe4 | bellard | gen_op_fcmpu(); |
1747 | 9a64fbe4 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
1748 | 79aceca5 | bellard | } |
1749 | 79aceca5 | bellard | |
1750 | 9a64fbe4 | bellard | /*** Floating-point move ***/
|
1751 | 9a64fbe4 | bellard | /* fabs */
|
1752 | a750fc0b | j_mayer | GEN_FLOAT_B(abs, 0x08, 0x08, PPC_FLOAT); |
1753 | 9a64fbe4 | bellard | |
1754 | 9a64fbe4 | bellard | /* fmr - fmr. */
|
1755 | 9a64fbe4 | bellard | GEN_HANDLER(fmr, 0x3F, 0x08, 0x02, 0x001F0000, PPC_FLOAT) |
1756 | 9a64fbe4 | bellard | { |
1757 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1758 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1759 | 3cc62370 | bellard | return;
|
1760 | 3cc62370 | bellard | } |
1761 | 9a64fbe4 | bellard | gen_op_reset_scrfx(); |
1762 | 9a64fbe4 | bellard | gen_op_load_fpr_FT0(rB(ctx->opcode)); |
1763 | 9a64fbe4 | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
1764 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1765 | 9a64fbe4 | bellard | gen_op_set_Rc1(); |
1766 | 9a64fbe4 | bellard | } |
1767 | 9a64fbe4 | bellard | |
1768 | 9a64fbe4 | bellard | /* fnabs */
|
1769 | a750fc0b | j_mayer | GEN_FLOAT_B(nabs, 0x08, 0x04, PPC_FLOAT); |
1770 | 9a64fbe4 | bellard | /* fneg */
|
1771 | a750fc0b | j_mayer | GEN_FLOAT_B(neg, 0x08, 0x01, PPC_FLOAT); |
1772 | 9a64fbe4 | bellard | |
1773 | 79aceca5 | bellard | /*** Floating-Point status & ctrl register ***/
|
1774 | 79aceca5 | bellard | /* mcrfs */
|
1775 | 79aceca5 | bellard | GEN_HANDLER(mcrfs, 0x3F, 0x00, 0x02, 0x0063F801, PPC_FLOAT) |
1776 | 79aceca5 | bellard | { |
1777 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1778 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1779 | 3cc62370 | bellard | return;
|
1780 | 3cc62370 | bellard | } |
1781 | fb0eaffc | bellard | gen_op_load_fpscr_T0(crfS(ctx->opcode)); |
1782 | fb0eaffc | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
1783 | fb0eaffc | bellard | gen_op_clear_fpscr(crfS(ctx->opcode)); |
1784 | 79aceca5 | bellard | } |
1785 | 79aceca5 | bellard | |
1786 | 79aceca5 | bellard | /* mffs */
|
1787 | 79aceca5 | bellard | GEN_HANDLER(mffs, 0x3F, 0x07, 0x12, 0x001FF800, PPC_FLOAT) |
1788 | 79aceca5 | bellard | { |
1789 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1790 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1791 | 3cc62370 | bellard | return;
|
1792 | 3cc62370 | bellard | } |
1793 | 28b6751f | bellard | gen_op_load_fpscr(); |
1794 | fb0eaffc | bellard | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
1795 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1796 | fb0eaffc | bellard | gen_op_set_Rc1(); |
1797 | 79aceca5 | bellard | } |
1798 | 79aceca5 | bellard | |
1799 | 79aceca5 | bellard | /* mtfsb0 */
|
1800 | 79aceca5 | bellard | GEN_HANDLER(mtfsb0, 0x3F, 0x06, 0x02, 0x001FF800, PPC_FLOAT) |
1801 | 79aceca5 | bellard | { |
1802 | fb0eaffc | bellard | uint8_t crb; |
1803 | 3b46e624 | ths | |
1804 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1805 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1806 | 3cc62370 | bellard | return;
|
1807 | 3cc62370 | bellard | } |
1808 | fb0eaffc | bellard | crb = crbD(ctx->opcode) >> 2;
|
1809 | fb0eaffc | bellard | gen_op_load_fpscr_T0(crb); |
1810 | 76a66253 | j_mayer | gen_op_andi_T0(~(1 << (crbD(ctx->opcode) & 0x03))); |
1811 | fb0eaffc | bellard | gen_op_store_T0_fpscr(crb); |
1812 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1813 | fb0eaffc | bellard | gen_op_set_Rc1(); |
1814 | 79aceca5 | bellard | } |
1815 | 79aceca5 | bellard | |
1816 | 79aceca5 | bellard | /* mtfsb1 */
|
1817 | 79aceca5 | bellard | GEN_HANDLER(mtfsb1, 0x3F, 0x06, 0x01, 0x001FF800, PPC_FLOAT) |
1818 | 79aceca5 | bellard | { |
1819 | fb0eaffc | bellard | uint8_t crb; |
1820 | 3b46e624 | ths | |
1821 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1822 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1823 | 3cc62370 | bellard | return;
|
1824 | 3cc62370 | bellard | } |
1825 | fb0eaffc | bellard | crb = crbD(ctx->opcode) >> 2;
|
1826 | fb0eaffc | bellard | gen_op_load_fpscr_T0(crb); |
1827 | fb0eaffc | bellard | gen_op_ori(1 << (crbD(ctx->opcode) & 0x03)); |
1828 | fb0eaffc | bellard | gen_op_store_T0_fpscr(crb); |
1829 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1830 | fb0eaffc | bellard | gen_op_set_Rc1(); |
1831 | 79aceca5 | bellard | } |
1832 | 79aceca5 | bellard | |
1833 | 79aceca5 | bellard | /* mtfsf */
|
1834 | 79aceca5 | bellard | GEN_HANDLER(mtfsf, 0x3F, 0x07, 0x16, 0x02010000, PPC_FLOAT) |
1835 | 79aceca5 | bellard | { |
1836 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1837 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1838 | 3cc62370 | bellard | return;
|
1839 | 3cc62370 | bellard | } |
1840 | fb0eaffc | bellard | gen_op_load_fpr_FT0(rB(ctx->opcode)); |
1841 | 28b6751f | bellard | gen_op_store_fpscr(FM(ctx->opcode)); |
1842 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1843 | fb0eaffc | bellard | gen_op_set_Rc1(); |
1844 | 79aceca5 | bellard | } |
1845 | 79aceca5 | bellard | |
1846 | 79aceca5 | bellard | /* mtfsfi */
|
1847 | 79aceca5 | bellard | GEN_HANDLER(mtfsfi, 0x3F, 0x06, 0x04, 0x006f0800, PPC_FLOAT) |
1848 | 79aceca5 | bellard | { |
1849 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
1850 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
1851 | 3cc62370 | bellard | return;
|
1852 | 3cc62370 | bellard | } |
1853 | fb0eaffc | bellard | gen_op_store_T0_fpscri(crbD(ctx->opcode) >> 2, FPIMM(ctx->opcode));
|
1854 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
1855 | fb0eaffc | bellard | gen_op_set_Rc1(); |
1856 | 79aceca5 | bellard | } |
1857 | 79aceca5 | bellard | |
1858 | 76a66253 | j_mayer | /*** Addressing modes ***/
|
1859 | 76a66253 | j_mayer | /* Register indirect with immediate index : EA = (rA|0) + SIMM */
|
1860 | 9d53c753 | j_mayer | static inline void gen_addr_imm_index (DisasContext *ctx, int maskl) |
1861 | 76a66253 | j_mayer | { |
1862 | 76a66253 | j_mayer | target_long simm = SIMM(ctx->opcode); |
1863 | 76a66253 | j_mayer | |
1864 | 9d53c753 | j_mayer | if (maskl)
|
1865 | 9d53c753 | j_mayer | simm &= ~0x03;
|
1866 | 76a66253 | j_mayer | if (rA(ctx->opcode) == 0) { |
1867 | d9bce9d9 | j_mayer | gen_set_T0(simm); |
1868 | 76a66253 | j_mayer | } else {
|
1869 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1870 | 76a66253 | j_mayer | if (likely(simm != 0)) |
1871 | 76a66253 | j_mayer | gen_op_addi(simm); |
1872 | 76a66253 | j_mayer | } |
1873 | a496775f | j_mayer | #ifdef DEBUG_MEMORY_ACCESSES
|
1874 | a496775f | j_mayer | gen_op_print_mem_EA(); |
1875 | a496775f | j_mayer | #endif
|
1876 | 76a66253 | j_mayer | } |
1877 | 76a66253 | j_mayer | |
1878 | 76a66253 | j_mayer | static inline void gen_addr_reg_index (DisasContext *ctx) |
1879 | 76a66253 | j_mayer | { |
1880 | 76a66253 | j_mayer | if (rA(ctx->opcode) == 0) { |
1881 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rB(ctx->opcode)); |
1882 | 76a66253 | j_mayer | } else {
|
1883 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1884 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
1885 | 76a66253 | j_mayer | gen_op_add(); |
1886 | 76a66253 | j_mayer | } |
1887 | a496775f | j_mayer | #ifdef DEBUG_MEMORY_ACCESSES
|
1888 | a496775f | j_mayer | gen_op_print_mem_EA(); |
1889 | a496775f | j_mayer | #endif
|
1890 | 76a66253 | j_mayer | } |
1891 | 76a66253 | j_mayer | |
1892 | 76a66253 | j_mayer | static inline void gen_addr_register (DisasContext *ctx) |
1893 | 76a66253 | j_mayer | { |
1894 | 76a66253 | j_mayer | if (rA(ctx->opcode) == 0) { |
1895 | 76a66253 | j_mayer | gen_op_reset_T0(); |
1896 | 76a66253 | j_mayer | } else {
|
1897 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
1898 | 76a66253 | j_mayer | } |
1899 | a496775f | j_mayer | #ifdef DEBUG_MEMORY_ACCESSES
|
1900 | a496775f | j_mayer | gen_op_print_mem_EA(); |
1901 | a496775f | j_mayer | #endif
|
1902 | 76a66253 | j_mayer | } |
1903 | 76a66253 | j_mayer | |
1904 | 79aceca5 | bellard | /*** Integer load ***/
|
1905 | 111bfab3 | bellard | #define op_ldst(name) (*gen_op_##name[ctx->mem_idx])() |
1906 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
1907 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1908 | 111bfab3 | bellard | #define OP_LD_TABLE(width) \
|
1909 | 111bfab3 | bellard | static GenOpFunc *gen_op_l##width[] = { \ |
1910 | 111bfab3 | bellard | &gen_op_l##width##_raw, \ |
1911 | 111bfab3 | bellard | &gen_op_l##width##_le_raw, \ |
1912 | d9bce9d9 | j_mayer | &gen_op_l##width##_64_raw, \ |
1913 | d9bce9d9 | j_mayer | &gen_op_l##width##_le_64_raw, \ |
1914 | 111bfab3 | bellard | }; |
1915 | 111bfab3 | bellard | #define OP_ST_TABLE(width) \
|
1916 | 111bfab3 | bellard | static GenOpFunc *gen_op_st##width[] = { \ |
1917 | 111bfab3 | bellard | &gen_op_st##width##_raw, \ |
1918 | 111bfab3 | bellard | &gen_op_st##width##_le_raw, \ |
1919 | d9bce9d9 | j_mayer | &gen_op_st##width##_64_raw, \ |
1920 | d9bce9d9 | j_mayer | &gen_op_st##width##_le_64_raw, \ |
1921 | 111bfab3 | bellard | }; |
1922 | 111bfab3 | bellard | /* Byte access routine are endian safe */
|
1923 | d9bce9d9 | j_mayer | #define gen_op_stb_le_64_raw gen_op_stb_64_raw
|
1924 | d9bce9d9 | j_mayer | #define gen_op_lbz_le_64_raw gen_op_lbz_64_raw
|
1925 | d9bce9d9 | j_mayer | #else
|
1926 | d9bce9d9 | j_mayer | #define OP_LD_TABLE(width) \
|
1927 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_l##width[] = { \ |
1928 | d9bce9d9 | j_mayer | &gen_op_l##width##_raw, \ |
1929 | d9bce9d9 | j_mayer | &gen_op_l##width##_le_raw, \ |
1930 | d9bce9d9 | j_mayer | }; |
1931 | d9bce9d9 | j_mayer | #define OP_ST_TABLE(width) \
|
1932 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_st##width[] = { \ |
1933 | d9bce9d9 | j_mayer | &gen_op_st##width##_raw, \ |
1934 | d9bce9d9 | j_mayer | &gen_op_st##width##_le_raw, \ |
1935 | d9bce9d9 | j_mayer | }; |
1936 | d9bce9d9 | j_mayer | #endif
|
1937 | d9bce9d9 | j_mayer | /* Byte access routine are endian safe */
|
1938 | 111bfab3 | bellard | #define gen_op_stb_le_raw gen_op_stb_raw
|
1939 | 111bfab3 | bellard | #define gen_op_lbz_le_raw gen_op_lbz_raw
|
1940 | 9a64fbe4 | bellard | #else
|
1941 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
1942 | 9a64fbe4 | bellard | #define OP_LD_TABLE(width) \
|
1943 | 9a64fbe4 | bellard | static GenOpFunc *gen_op_l##width[] = { \ |
1944 | 9a64fbe4 | bellard | &gen_op_l##width##_user, \ |
1945 | 111bfab3 | bellard | &gen_op_l##width##_le_user, \ |
1946 | 9a64fbe4 | bellard | &gen_op_l##width##_kernel, \ |
1947 | 111bfab3 | bellard | &gen_op_l##width##_le_kernel, \ |
1948 | d9bce9d9 | j_mayer | &gen_op_l##width##_64_user, \ |
1949 | d9bce9d9 | j_mayer | &gen_op_l##width##_le_64_user, \ |
1950 | d9bce9d9 | j_mayer | &gen_op_l##width##_64_kernel, \ |
1951 | d9bce9d9 | j_mayer | &gen_op_l##width##_le_64_kernel, \ |
1952 | 111bfab3 | bellard | }; |
1953 | 9a64fbe4 | bellard | #define OP_ST_TABLE(width) \
|
1954 | 9a64fbe4 | bellard | static GenOpFunc *gen_op_st##width[] = { \ |
1955 | 9a64fbe4 | bellard | &gen_op_st##width##_user, \ |
1956 | 111bfab3 | bellard | &gen_op_st##width##_le_user, \ |
1957 | 9a64fbe4 | bellard | &gen_op_st##width##_kernel, \ |
1958 | 111bfab3 | bellard | &gen_op_st##width##_le_kernel, \ |
1959 | d9bce9d9 | j_mayer | &gen_op_st##width##_64_user, \ |
1960 | d9bce9d9 | j_mayer | &gen_op_st##width##_le_64_user, \ |
1961 | d9bce9d9 | j_mayer | &gen_op_st##width##_64_kernel, \ |
1962 | d9bce9d9 | j_mayer | &gen_op_st##width##_le_64_kernel, \ |
1963 | 111bfab3 | bellard | }; |
1964 | 111bfab3 | bellard | /* Byte access routine are endian safe */
|
1965 | d9bce9d9 | j_mayer | #define gen_op_stb_le_64_user gen_op_stb_64_user
|
1966 | d9bce9d9 | j_mayer | #define gen_op_lbz_le_64_user gen_op_lbz_64_user
|
1967 | d9bce9d9 | j_mayer | #define gen_op_stb_le_64_kernel gen_op_stb_64_kernel
|
1968 | d9bce9d9 | j_mayer | #define gen_op_lbz_le_64_kernel gen_op_lbz_64_kernel
|
1969 | d9bce9d9 | j_mayer | #else
|
1970 | d9bce9d9 | j_mayer | #define OP_LD_TABLE(width) \
|
1971 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_l##width[] = { \ |
1972 | d9bce9d9 | j_mayer | &gen_op_l##width##_user, \ |
1973 | d9bce9d9 | j_mayer | &gen_op_l##width##_le_user, \ |
1974 | d9bce9d9 | j_mayer | &gen_op_l##width##_kernel, \ |
1975 | d9bce9d9 | j_mayer | &gen_op_l##width##_le_kernel, \ |
1976 | d9bce9d9 | j_mayer | }; |
1977 | d9bce9d9 | j_mayer | #define OP_ST_TABLE(width) \
|
1978 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_st##width[] = { \ |
1979 | d9bce9d9 | j_mayer | &gen_op_st##width##_user, \ |
1980 | d9bce9d9 | j_mayer | &gen_op_st##width##_le_user, \ |
1981 | d9bce9d9 | j_mayer | &gen_op_st##width##_kernel, \ |
1982 | d9bce9d9 | j_mayer | &gen_op_st##width##_le_kernel, \ |
1983 | d9bce9d9 | j_mayer | }; |
1984 | d9bce9d9 | j_mayer | #endif
|
1985 | d9bce9d9 | j_mayer | /* Byte access routine are endian safe */
|
1986 | 111bfab3 | bellard | #define gen_op_stb_le_user gen_op_stb_user
|
1987 | 111bfab3 | bellard | #define gen_op_lbz_le_user gen_op_lbz_user
|
1988 | 111bfab3 | bellard | #define gen_op_stb_le_kernel gen_op_stb_kernel
|
1989 | 111bfab3 | bellard | #define gen_op_lbz_le_kernel gen_op_lbz_kernel
|
1990 | 9a64fbe4 | bellard | #endif
|
1991 | 9a64fbe4 | bellard | |
1992 | d9bce9d9 | j_mayer | #define GEN_LD(width, opc, type) \
|
1993 | d9bce9d9 | j_mayer | GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, type) \ |
1994 | 79aceca5 | bellard | { \ |
1995 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
1996 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
1997 | 79aceca5 | bellard | gen_op_store_T1_gpr(rD(ctx->opcode)); \ |
1998 | 79aceca5 | bellard | } |
1999 | 79aceca5 | bellard | |
2000 | d9bce9d9 | j_mayer | #define GEN_LDU(width, opc, type) \
|
2001 | d9bce9d9 | j_mayer | GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, type) \ |
2002 | 79aceca5 | bellard | { \ |
2003 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0 || \ |
2004 | 76a66253 | j_mayer | rA(ctx->opcode) == rD(ctx->opcode))) { \ |
2005 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2006 | 9fddaa0c | bellard | return; \
|
2007 | 9a64fbe4 | bellard | } \ |
2008 | 9d53c753 | j_mayer | if (type == PPC_64B) \
|
2009 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 1); \
|
2010 | 9d53c753 | j_mayer | else \
|
2011 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2012 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2013 | 79aceca5 | bellard | gen_op_store_T1_gpr(rD(ctx->opcode)); \ |
2014 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2015 | 79aceca5 | bellard | } |
2016 | 79aceca5 | bellard | |
2017 | d9bce9d9 | j_mayer | #define GEN_LDUX(width, opc2, opc3, type) \
|
2018 | d9bce9d9 | j_mayer | GEN_HANDLER(l##width##ux, 0x1F, opc2, opc3, 0x00000001, type) \ |
2019 | 79aceca5 | bellard | { \ |
2020 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0 || \ |
2021 | 76a66253 | j_mayer | rA(ctx->opcode) == rD(ctx->opcode))) { \ |
2022 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2023 | 9fddaa0c | bellard | return; \
|
2024 | 9a64fbe4 | bellard | } \ |
2025 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2026 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2027 | 79aceca5 | bellard | gen_op_store_T1_gpr(rD(ctx->opcode)); \ |
2028 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2029 | 79aceca5 | bellard | } |
2030 | 79aceca5 | bellard | |
2031 | d9bce9d9 | j_mayer | #define GEN_LDX(width, opc2, opc3, type) \
|
2032 | d9bce9d9 | j_mayer | GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, type) \ |
2033 | 79aceca5 | bellard | { \ |
2034 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2035 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2036 | 79aceca5 | bellard | gen_op_store_T1_gpr(rD(ctx->opcode)); \ |
2037 | 79aceca5 | bellard | } |
2038 | 79aceca5 | bellard | |
2039 | d9bce9d9 | j_mayer | #define GEN_LDS(width, op, type) \
|
2040 | 9a64fbe4 | bellard | OP_LD_TABLE(width); \ |
2041 | d9bce9d9 | j_mayer | GEN_LD(width, op | 0x20, type); \
|
2042 | d9bce9d9 | j_mayer | GEN_LDU(width, op | 0x21, type); \
|
2043 | d9bce9d9 | j_mayer | GEN_LDUX(width, 0x17, op | 0x01, type); \ |
2044 | d9bce9d9 | j_mayer | GEN_LDX(width, 0x17, op | 0x00, type) |
2045 | 79aceca5 | bellard | |
2046 | 79aceca5 | bellard | /* lbz lbzu lbzux lbzx */
|
2047 | d9bce9d9 | j_mayer | GEN_LDS(bz, 0x02, PPC_INTEGER);
|
2048 | 79aceca5 | bellard | /* lha lhau lhaux lhax */
|
2049 | d9bce9d9 | j_mayer | GEN_LDS(ha, 0x0A, PPC_INTEGER);
|
2050 | 79aceca5 | bellard | /* lhz lhzu lhzux lhzx */
|
2051 | d9bce9d9 | j_mayer | GEN_LDS(hz, 0x08, PPC_INTEGER);
|
2052 | 79aceca5 | bellard | /* lwz lwzu lwzux lwzx */
|
2053 | d9bce9d9 | j_mayer | GEN_LDS(wz, 0x00, PPC_INTEGER);
|
2054 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2055 | d9bce9d9 | j_mayer | OP_LD_TABLE(wa); |
2056 | d9bce9d9 | j_mayer | OP_LD_TABLE(d); |
2057 | d9bce9d9 | j_mayer | /* lwaux */
|
2058 | d9bce9d9 | j_mayer | GEN_LDUX(wa, 0x15, 0x0B, PPC_64B); |
2059 | d9bce9d9 | j_mayer | /* lwax */
|
2060 | d9bce9d9 | j_mayer | GEN_LDX(wa, 0x15, 0x0A, PPC_64B); |
2061 | d9bce9d9 | j_mayer | /* ldux */
|
2062 | d9bce9d9 | j_mayer | GEN_LDUX(d, 0x15, 0x01, PPC_64B); |
2063 | d9bce9d9 | j_mayer | /* ldx */
|
2064 | d9bce9d9 | j_mayer | GEN_LDX(d, 0x15, 0x00, PPC_64B); |
2065 | d9bce9d9 | j_mayer | GEN_HANDLER(ld, 0x3A, 0xFF, 0xFF, 0x00000000, PPC_64B) |
2066 | d9bce9d9 | j_mayer | { |
2067 | d9bce9d9 | j_mayer | if (Rc(ctx->opcode)) {
|
2068 | d9bce9d9 | j_mayer | if (unlikely(rA(ctx->opcode) == 0 || |
2069 | d9bce9d9 | j_mayer | rA(ctx->opcode) == rD(ctx->opcode))) { |
2070 | d9bce9d9 | j_mayer | RET_INVAL(ctx); |
2071 | d9bce9d9 | j_mayer | return;
|
2072 | d9bce9d9 | j_mayer | } |
2073 | d9bce9d9 | j_mayer | } |
2074 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 1);
|
2075 | d9bce9d9 | j_mayer | if (ctx->opcode & 0x02) { |
2076 | d9bce9d9 | j_mayer | /* lwa (lwau is undefined) */
|
2077 | d9bce9d9 | j_mayer | op_ldst(lwa); |
2078 | d9bce9d9 | j_mayer | } else {
|
2079 | d9bce9d9 | j_mayer | /* ld - ldu */
|
2080 | d9bce9d9 | j_mayer | op_ldst(ld); |
2081 | d9bce9d9 | j_mayer | } |
2082 | d9bce9d9 | j_mayer | gen_op_store_T1_gpr(rD(ctx->opcode)); |
2083 | d9bce9d9 | j_mayer | if (Rc(ctx->opcode))
|
2084 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
2085 | d9bce9d9 | j_mayer | } |
2086 | d9bce9d9 | j_mayer | #endif
|
2087 | 79aceca5 | bellard | |
2088 | 79aceca5 | bellard | /*** Integer store ***/
|
2089 | d9bce9d9 | j_mayer | #define GEN_ST(width, opc, type) \
|
2090 | d9bce9d9 | j_mayer | GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, type) \ |
2091 | 79aceca5 | bellard | { \ |
2092 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2093 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rS(ctx->opcode)); \ |
2094 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2095 | 79aceca5 | bellard | } |
2096 | 79aceca5 | bellard | |
2097 | d9bce9d9 | j_mayer | #define GEN_STU(width, opc, type) \
|
2098 | d9bce9d9 | j_mayer | GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, type) \ |
2099 | 79aceca5 | bellard | { \ |
2100 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { \ |
2101 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2102 | 9fddaa0c | bellard | return; \
|
2103 | 9a64fbe4 | bellard | } \ |
2104 | 9d53c753 | j_mayer | if (type == PPC_64B) \
|
2105 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 1); \
|
2106 | 9d53c753 | j_mayer | else \
|
2107 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2108 | 79aceca5 | bellard | gen_op_load_gpr_T1(rS(ctx->opcode)); \ |
2109 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2110 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2111 | 79aceca5 | bellard | } |
2112 | 79aceca5 | bellard | |
2113 | d9bce9d9 | j_mayer | #define GEN_STUX(width, opc2, opc3, type) \
|
2114 | d9bce9d9 | j_mayer | GEN_HANDLER(st##width##ux, 0x1F, opc2, opc3, 0x00000001, type) \ |
2115 | 79aceca5 | bellard | { \ |
2116 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { \ |
2117 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2118 | 9fddaa0c | bellard | return; \
|
2119 | 9a64fbe4 | bellard | } \ |
2120 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2121 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rS(ctx->opcode)); \ |
2122 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2123 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2124 | 79aceca5 | bellard | } |
2125 | 79aceca5 | bellard | |
2126 | d9bce9d9 | j_mayer | #define GEN_STX(width, opc2, opc3, type) \
|
2127 | d9bce9d9 | j_mayer | GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, type) \ |
2128 | 79aceca5 | bellard | { \ |
2129 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2130 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rS(ctx->opcode)); \ |
2131 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2132 | 79aceca5 | bellard | } |
2133 | 79aceca5 | bellard | |
2134 | d9bce9d9 | j_mayer | #define GEN_STS(width, op, type) \
|
2135 | 9a64fbe4 | bellard | OP_ST_TABLE(width); \ |
2136 | d9bce9d9 | j_mayer | GEN_ST(width, op | 0x20, type); \
|
2137 | d9bce9d9 | j_mayer | GEN_STU(width, op | 0x21, type); \
|
2138 | d9bce9d9 | j_mayer | GEN_STUX(width, 0x17, op | 0x01, type); \ |
2139 | d9bce9d9 | j_mayer | GEN_STX(width, 0x17, op | 0x00, type) |
2140 | 79aceca5 | bellard | |
2141 | 79aceca5 | bellard | /* stb stbu stbux stbx */
|
2142 | d9bce9d9 | j_mayer | GEN_STS(b, 0x06, PPC_INTEGER);
|
2143 | 79aceca5 | bellard | /* sth sthu sthux sthx */
|
2144 | d9bce9d9 | j_mayer | GEN_STS(h, 0x0C, PPC_INTEGER);
|
2145 | 79aceca5 | bellard | /* stw stwu stwux stwx */
|
2146 | d9bce9d9 | j_mayer | GEN_STS(w, 0x04, PPC_INTEGER);
|
2147 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2148 | d9bce9d9 | j_mayer | OP_ST_TABLE(d); |
2149 | 426613db | j_mayer | GEN_STUX(d, 0x15, 0x05, PPC_64B); |
2150 | 426613db | j_mayer | GEN_STX(d, 0x15, 0x04, PPC_64B); |
2151 | d9bce9d9 | j_mayer | GEN_HANDLER(std, 0x3E, 0xFF, 0xFF, 0x00000002, PPC_64B) |
2152 | d9bce9d9 | j_mayer | { |
2153 | d9bce9d9 | j_mayer | if (Rc(ctx->opcode)) {
|
2154 | d9bce9d9 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { |
2155 | d9bce9d9 | j_mayer | RET_INVAL(ctx); |
2156 | d9bce9d9 | j_mayer | return;
|
2157 | d9bce9d9 | j_mayer | } |
2158 | d9bce9d9 | j_mayer | } |
2159 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 1);
|
2160 | d9bce9d9 | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
2161 | d9bce9d9 | j_mayer | op_ldst(std); |
2162 | d9bce9d9 | j_mayer | if (Rc(ctx->opcode))
|
2163 | d9bce9d9 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
2164 | d9bce9d9 | j_mayer | } |
2165 | d9bce9d9 | j_mayer | #endif
|
2166 | 79aceca5 | bellard | /*** Integer load and store with byte reverse ***/
|
2167 | 79aceca5 | bellard | /* lhbrx */
|
2168 | 9a64fbe4 | bellard | OP_LD_TABLE(hbr); |
2169 | d9bce9d9 | j_mayer | GEN_LDX(hbr, 0x16, 0x18, PPC_INTEGER); |
2170 | 79aceca5 | bellard | /* lwbrx */
|
2171 | 9a64fbe4 | bellard | OP_LD_TABLE(wbr); |
2172 | d9bce9d9 | j_mayer | GEN_LDX(wbr, 0x16, 0x10, PPC_INTEGER); |
2173 | 79aceca5 | bellard | /* sthbrx */
|
2174 | 9a64fbe4 | bellard | OP_ST_TABLE(hbr); |
2175 | d9bce9d9 | j_mayer | GEN_STX(hbr, 0x16, 0x1C, PPC_INTEGER); |
2176 | 79aceca5 | bellard | /* stwbrx */
|
2177 | 9a64fbe4 | bellard | OP_ST_TABLE(wbr); |
2178 | d9bce9d9 | j_mayer | GEN_STX(wbr, 0x16, 0x14, PPC_INTEGER); |
2179 | 79aceca5 | bellard | |
2180 | 79aceca5 | bellard | /*** Integer load and store multiple ***/
|
2181 | 111bfab3 | bellard | #define op_ldstm(name, reg) (*gen_op_##name[ctx->mem_idx])(reg) |
2182 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2183 | d9bce9d9 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
2184 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_lmw[] = {
|
2185 | d9bce9d9 | j_mayer | &gen_op_lmw_raw, |
2186 | d9bce9d9 | j_mayer | &gen_op_lmw_le_raw, |
2187 | d9bce9d9 | j_mayer | &gen_op_lmw_64_raw, |
2188 | d9bce9d9 | j_mayer | &gen_op_lmw_le_64_raw, |
2189 | d9bce9d9 | j_mayer | }; |
2190 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_stmw[] = {
|
2191 | d9bce9d9 | j_mayer | &gen_op_stmw_64_raw, |
2192 | d9bce9d9 | j_mayer | &gen_op_stmw_le_64_raw, |
2193 | d9bce9d9 | j_mayer | }; |
2194 | d9bce9d9 | j_mayer | #else
|
2195 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_lmw[] = {
|
2196 | d9bce9d9 | j_mayer | &gen_op_lmw_user, |
2197 | d9bce9d9 | j_mayer | &gen_op_lmw_le_user, |
2198 | d9bce9d9 | j_mayer | &gen_op_lmw_kernel, |
2199 | d9bce9d9 | j_mayer | &gen_op_lmw_le_kernel, |
2200 | d9bce9d9 | j_mayer | &gen_op_lmw_64_user, |
2201 | d9bce9d9 | j_mayer | &gen_op_lmw_le_64_user, |
2202 | d9bce9d9 | j_mayer | &gen_op_lmw_64_kernel, |
2203 | d9bce9d9 | j_mayer | &gen_op_lmw_le_64_kernel, |
2204 | d9bce9d9 | j_mayer | }; |
2205 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_stmw[] = {
|
2206 | d9bce9d9 | j_mayer | &gen_op_stmw_user, |
2207 | d9bce9d9 | j_mayer | &gen_op_stmw_le_user, |
2208 | d9bce9d9 | j_mayer | &gen_op_stmw_kernel, |
2209 | d9bce9d9 | j_mayer | &gen_op_stmw_le_kernel, |
2210 | d9bce9d9 | j_mayer | &gen_op_stmw_64_user, |
2211 | d9bce9d9 | j_mayer | &gen_op_stmw_le_64_user, |
2212 | d9bce9d9 | j_mayer | &gen_op_stmw_64_kernel, |
2213 | d9bce9d9 | j_mayer | &gen_op_stmw_le_64_kernel, |
2214 | d9bce9d9 | j_mayer | }; |
2215 | d9bce9d9 | j_mayer | #endif
|
2216 | d9bce9d9 | j_mayer | #else
|
2217 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
2218 | 111bfab3 | bellard | static GenOpFunc1 *gen_op_lmw[] = {
|
2219 | 111bfab3 | bellard | &gen_op_lmw_raw, |
2220 | 111bfab3 | bellard | &gen_op_lmw_le_raw, |
2221 | 111bfab3 | bellard | }; |
2222 | 111bfab3 | bellard | static GenOpFunc1 *gen_op_stmw[] = {
|
2223 | 111bfab3 | bellard | &gen_op_stmw_raw, |
2224 | 111bfab3 | bellard | &gen_op_stmw_le_raw, |
2225 | 111bfab3 | bellard | }; |
2226 | 9a64fbe4 | bellard | #else
|
2227 | 9a64fbe4 | bellard | static GenOpFunc1 *gen_op_lmw[] = {
|
2228 | 9a64fbe4 | bellard | &gen_op_lmw_user, |
2229 | 111bfab3 | bellard | &gen_op_lmw_le_user, |
2230 | 9a64fbe4 | bellard | &gen_op_lmw_kernel, |
2231 | 111bfab3 | bellard | &gen_op_lmw_le_kernel, |
2232 | 9a64fbe4 | bellard | }; |
2233 | 9a64fbe4 | bellard | static GenOpFunc1 *gen_op_stmw[] = {
|
2234 | 9a64fbe4 | bellard | &gen_op_stmw_user, |
2235 | 111bfab3 | bellard | &gen_op_stmw_le_user, |
2236 | 9a64fbe4 | bellard | &gen_op_stmw_kernel, |
2237 | 111bfab3 | bellard | &gen_op_stmw_le_kernel, |
2238 | 9a64fbe4 | bellard | }; |
2239 | 9a64fbe4 | bellard | #endif
|
2240 | d9bce9d9 | j_mayer | #endif
|
2241 | 9a64fbe4 | bellard | |
2242 | 79aceca5 | bellard | /* lmw */
|
2243 | 79aceca5 | bellard | GEN_HANDLER(lmw, 0x2E, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
2244 | 79aceca5 | bellard | { |
2245 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
2246 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
2247 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0);
|
2248 | 9a64fbe4 | bellard | op_ldstm(lmw, rD(ctx->opcode)); |
2249 | 79aceca5 | bellard | } |
2250 | 79aceca5 | bellard | |
2251 | 79aceca5 | bellard | /* stmw */
|
2252 | 79aceca5 | bellard | GEN_HANDLER(stmw, 0x2F, 0xFF, 0xFF, 0x00000000, PPC_INTEGER) |
2253 | 79aceca5 | bellard | { |
2254 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
2255 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
2256 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0);
|
2257 | 9a64fbe4 | bellard | op_ldstm(stmw, rS(ctx->opcode)); |
2258 | 79aceca5 | bellard | } |
2259 | 79aceca5 | bellard | |
2260 | 79aceca5 | bellard | /*** Integer load and store strings ***/
|
2261 | 9a64fbe4 | bellard | #define op_ldsts(name, start) (*gen_op_##name[ctx->mem_idx])(start) |
2262 | 9a64fbe4 | bellard | #define op_ldstsx(name, rd, ra, rb) (*gen_op_##name[ctx->mem_idx])(rd, ra, rb) |
2263 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2264 | d9bce9d9 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
2265 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_lswi[] = {
|
2266 | d9bce9d9 | j_mayer | &gen_op_lswi_raw, |
2267 | d9bce9d9 | j_mayer | &gen_op_lswi_le_raw, |
2268 | d9bce9d9 | j_mayer | &gen_op_lswi_64_raw, |
2269 | d9bce9d9 | j_mayer | &gen_op_lswi_le_64_raw, |
2270 | d9bce9d9 | j_mayer | }; |
2271 | d9bce9d9 | j_mayer | static GenOpFunc3 *gen_op_lswx[] = {
|
2272 | d9bce9d9 | j_mayer | &gen_op_lswx_raw, |
2273 | d9bce9d9 | j_mayer | &gen_op_lswx_le_raw, |
2274 | d9bce9d9 | j_mayer | &gen_op_lswx_64_raw, |
2275 | d9bce9d9 | j_mayer | &gen_op_lswx_le_64_raw, |
2276 | d9bce9d9 | j_mayer | }; |
2277 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_stsw[] = {
|
2278 | d9bce9d9 | j_mayer | &gen_op_stsw_raw, |
2279 | d9bce9d9 | j_mayer | &gen_op_stsw_le_raw, |
2280 | d9bce9d9 | j_mayer | &gen_op_stsw_64_raw, |
2281 | d9bce9d9 | j_mayer | &gen_op_stsw_le_64_raw, |
2282 | d9bce9d9 | j_mayer | }; |
2283 | d9bce9d9 | j_mayer | #else
|
2284 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_lswi[] = {
|
2285 | d9bce9d9 | j_mayer | &gen_op_lswi_user, |
2286 | d9bce9d9 | j_mayer | &gen_op_lswi_le_user, |
2287 | d9bce9d9 | j_mayer | &gen_op_lswi_kernel, |
2288 | d9bce9d9 | j_mayer | &gen_op_lswi_le_kernel, |
2289 | d9bce9d9 | j_mayer | &gen_op_lswi_64_user, |
2290 | d9bce9d9 | j_mayer | &gen_op_lswi_le_64_user, |
2291 | d9bce9d9 | j_mayer | &gen_op_lswi_64_kernel, |
2292 | d9bce9d9 | j_mayer | &gen_op_lswi_le_64_kernel, |
2293 | d9bce9d9 | j_mayer | }; |
2294 | d9bce9d9 | j_mayer | static GenOpFunc3 *gen_op_lswx[] = {
|
2295 | d9bce9d9 | j_mayer | &gen_op_lswx_user, |
2296 | d9bce9d9 | j_mayer | &gen_op_lswx_le_user, |
2297 | d9bce9d9 | j_mayer | &gen_op_lswx_kernel, |
2298 | d9bce9d9 | j_mayer | &gen_op_lswx_le_kernel, |
2299 | d9bce9d9 | j_mayer | &gen_op_lswx_64_user, |
2300 | d9bce9d9 | j_mayer | &gen_op_lswx_le_64_user, |
2301 | d9bce9d9 | j_mayer | &gen_op_lswx_64_kernel, |
2302 | d9bce9d9 | j_mayer | &gen_op_lswx_le_64_kernel, |
2303 | d9bce9d9 | j_mayer | }; |
2304 | d9bce9d9 | j_mayer | static GenOpFunc1 *gen_op_stsw[] = {
|
2305 | d9bce9d9 | j_mayer | &gen_op_stsw_user, |
2306 | d9bce9d9 | j_mayer | &gen_op_stsw_le_user, |
2307 | d9bce9d9 | j_mayer | &gen_op_stsw_kernel, |
2308 | d9bce9d9 | j_mayer | &gen_op_stsw_le_kernel, |
2309 | d9bce9d9 | j_mayer | &gen_op_stsw_64_user, |
2310 | d9bce9d9 | j_mayer | &gen_op_stsw_le_64_user, |
2311 | d9bce9d9 | j_mayer | &gen_op_stsw_64_kernel, |
2312 | d9bce9d9 | j_mayer | &gen_op_stsw_le_64_kernel, |
2313 | d9bce9d9 | j_mayer | }; |
2314 | d9bce9d9 | j_mayer | #endif
|
2315 | d9bce9d9 | j_mayer | #else
|
2316 | 111bfab3 | bellard | #if defined(CONFIG_USER_ONLY)
|
2317 | 111bfab3 | bellard | static GenOpFunc1 *gen_op_lswi[] = {
|
2318 | 111bfab3 | bellard | &gen_op_lswi_raw, |
2319 | 111bfab3 | bellard | &gen_op_lswi_le_raw, |
2320 | 111bfab3 | bellard | }; |
2321 | 111bfab3 | bellard | static GenOpFunc3 *gen_op_lswx[] = {
|
2322 | 111bfab3 | bellard | &gen_op_lswx_raw, |
2323 | 111bfab3 | bellard | &gen_op_lswx_le_raw, |
2324 | 111bfab3 | bellard | }; |
2325 | 111bfab3 | bellard | static GenOpFunc1 *gen_op_stsw[] = {
|
2326 | 111bfab3 | bellard | &gen_op_stsw_raw, |
2327 | 111bfab3 | bellard | &gen_op_stsw_le_raw, |
2328 | 111bfab3 | bellard | }; |
2329 | 111bfab3 | bellard | #else
|
2330 | 9a64fbe4 | bellard | static GenOpFunc1 *gen_op_lswi[] = {
|
2331 | 9a64fbe4 | bellard | &gen_op_lswi_user, |
2332 | 111bfab3 | bellard | &gen_op_lswi_le_user, |
2333 | 9a64fbe4 | bellard | &gen_op_lswi_kernel, |
2334 | 111bfab3 | bellard | &gen_op_lswi_le_kernel, |
2335 | 9a64fbe4 | bellard | }; |
2336 | 9a64fbe4 | bellard | static GenOpFunc3 *gen_op_lswx[] = {
|
2337 | 9a64fbe4 | bellard | &gen_op_lswx_user, |
2338 | 111bfab3 | bellard | &gen_op_lswx_le_user, |
2339 | 9a64fbe4 | bellard | &gen_op_lswx_kernel, |
2340 | 111bfab3 | bellard | &gen_op_lswx_le_kernel, |
2341 | 9a64fbe4 | bellard | }; |
2342 | 9a64fbe4 | bellard | static GenOpFunc1 *gen_op_stsw[] = {
|
2343 | 9a64fbe4 | bellard | &gen_op_stsw_user, |
2344 | 111bfab3 | bellard | &gen_op_stsw_le_user, |
2345 | 9a64fbe4 | bellard | &gen_op_stsw_kernel, |
2346 | 111bfab3 | bellard | &gen_op_stsw_le_kernel, |
2347 | 9a64fbe4 | bellard | }; |
2348 | 9a64fbe4 | bellard | #endif
|
2349 | d9bce9d9 | j_mayer | #endif
|
2350 | 9a64fbe4 | bellard | |
2351 | 79aceca5 | bellard | /* lswi */
|
2352 | 3fc6c082 | bellard | /* PowerPC32 specification says we must generate an exception if
|
2353 | 9a64fbe4 | bellard | * rA is in the range of registers to be loaded.
|
2354 | 9a64fbe4 | bellard | * In an other hand, IBM says this is valid, but rA won't be loaded.
|
2355 | 9a64fbe4 | bellard | * For now, I'll follow the spec...
|
2356 | 9a64fbe4 | bellard | */
|
2357 | 79aceca5 | bellard | GEN_HANDLER(lswi, 0x1F, 0x15, 0x12, 0x00000001, PPC_INTEGER) |
2358 | 79aceca5 | bellard | { |
2359 | 79aceca5 | bellard | int nb = NB(ctx->opcode);
|
2360 | 79aceca5 | bellard | int start = rD(ctx->opcode);
|
2361 | 9a64fbe4 | bellard | int ra = rA(ctx->opcode);
|
2362 | 79aceca5 | bellard | int nr;
|
2363 | 79aceca5 | bellard | |
2364 | 79aceca5 | bellard | if (nb == 0) |
2365 | 79aceca5 | bellard | nb = 32;
|
2366 | 79aceca5 | bellard | nr = nb / 4;
|
2367 | 76a66253 | j_mayer | if (unlikely(((start + nr) > 32 && |
2368 | 76a66253 | j_mayer | start <= ra && (start + nr - 32) > ra) ||
|
2369 | 76a66253 | j_mayer | ((start + nr) <= 32 && start <= ra && (start + nr) > ra))) {
|
2370 | 9fddaa0c | bellard | RET_EXCP(ctx, EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_LSWX); |
2371 | 9fddaa0c | bellard | return;
|
2372 | 297d8e62 | bellard | } |
2373 | 8dd4983c | bellard | /* NIP cannot be restored if the memory exception comes from an helper */
|
2374 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
2375 | 76a66253 | j_mayer | gen_addr_register(ctx); |
2376 | 76a66253 | j_mayer | gen_op_set_T1(nb); |
2377 | 9a64fbe4 | bellard | op_ldsts(lswi, start); |
2378 | 79aceca5 | bellard | } |
2379 | 79aceca5 | bellard | |
2380 | 79aceca5 | bellard | /* lswx */
|
2381 | 79aceca5 | bellard | GEN_HANDLER(lswx, 0x1F, 0x15, 0x10, 0x00000001, PPC_INTEGER) |
2382 | 79aceca5 | bellard | { |
2383 | 9a64fbe4 | bellard | int ra = rA(ctx->opcode);
|
2384 | 9a64fbe4 | bellard | int rb = rB(ctx->opcode);
|
2385 | 9a64fbe4 | bellard | |
2386 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
2387 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
2388 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
2389 | 9a64fbe4 | bellard | if (ra == 0) { |
2390 | 9a64fbe4 | bellard | ra = rb; |
2391 | 79aceca5 | bellard | } |
2392 | 9a64fbe4 | bellard | gen_op_load_xer_bc(); |
2393 | 9a64fbe4 | bellard | op_ldstsx(lswx, rD(ctx->opcode), ra, rb); |
2394 | 79aceca5 | bellard | } |
2395 | 79aceca5 | bellard | |
2396 | 79aceca5 | bellard | /* stswi */
|
2397 | 79aceca5 | bellard | GEN_HANDLER(stswi, 0x1F, 0x15, 0x16, 0x00000001, PPC_INTEGER) |
2398 | 79aceca5 | bellard | { |
2399 | 4b3686fa | bellard | int nb = NB(ctx->opcode);
|
2400 | 4b3686fa | bellard | |
2401 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
2402 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
2403 | 76a66253 | j_mayer | gen_addr_register(ctx); |
2404 | 4b3686fa | bellard | if (nb == 0) |
2405 | 4b3686fa | bellard | nb = 32;
|
2406 | 4b3686fa | bellard | gen_op_set_T1(nb); |
2407 | 9a64fbe4 | bellard | op_ldsts(stsw, rS(ctx->opcode)); |
2408 | 79aceca5 | bellard | } |
2409 | 79aceca5 | bellard | |
2410 | 79aceca5 | bellard | /* stswx */
|
2411 | 79aceca5 | bellard | GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, PPC_INTEGER) |
2412 | 79aceca5 | bellard | { |
2413 | 8dd4983c | bellard | /* NIP cannot be restored if the memory exception comes from an helper */
|
2414 | 5fafdf24 | ths | gen_update_nip(ctx, ctx->nip - 4);
|
2415 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
2416 | 76a66253 | j_mayer | gen_op_load_xer_bc(); |
2417 | 9a64fbe4 | bellard | op_ldsts(stsw, rS(ctx->opcode)); |
2418 | 79aceca5 | bellard | } |
2419 | 79aceca5 | bellard | |
2420 | 79aceca5 | bellard | /*** Memory synchronisation ***/
|
2421 | 79aceca5 | bellard | /* eieio */
|
2422 | 76a66253 | j_mayer | GEN_HANDLER(eieio, 0x1F, 0x16, 0x1A, 0x03FF0801, PPC_MEM_EIEIO) |
2423 | 79aceca5 | bellard | { |
2424 | 79aceca5 | bellard | } |
2425 | 79aceca5 | bellard | |
2426 | 79aceca5 | bellard | /* isync */
|
2427 | 76a66253 | j_mayer | GEN_HANDLER(isync, 0x13, 0x16, 0x04, 0x03FF0801, PPC_MEM) |
2428 | 79aceca5 | bellard | { |
2429 | 79aceca5 | bellard | } |
2430 | 79aceca5 | bellard | |
2431 | 111bfab3 | bellard | #define op_lwarx() (*gen_op_lwarx[ctx->mem_idx])()
|
2432 | 111bfab3 | bellard | #define op_stwcx() (*gen_op_stwcx[ctx->mem_idx])()
|
2433 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2434 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
2435 | 111bfab3 | bellard | static GenOpFunc *gen_op_lwarx[] = {
|
2436 | 111bfab3 | bellard | &gen_op_lwarx_raw, |
2437 | 111bfab3 | bellard | &gen_op_lwarx_le_raw, |
2438 | d9bce9d9 | j_mayer | &gen_op_lwarx_64_raw, |
2439 | d9bce9d9 | j_mayer | &gen_op_lwarx_le_64_raw, |
2440 | 111bfab3 | bellard | }; |
2441 | 111bfab3 | bellard | static GenOpFunc *gen_op_stwcx[] = {
|
2442 | 111bfab3 | bellard | &gen_op_stwcx_raw, |
2443 | 111bfab3 | bellard | &gen_op_stwcx_le_raw, |
2444 | d9bce9d9 | j_mayer | &gen_op_stwcx_64_raw, |
2445 | d9bce9d9 | j_mayer | &gen_op_stwcx_le_64_raw, |
2446 | 111bfab3 | bellard | }; |
2447 | 9a64fbe4 | bellard | #else
|
2448 | 985a19d6 | bellard | static GenOpFunc *gen_op_lwarx[] = {
|
2449 | 985a19d6 | bellard | &gen_op_lwarx_user, |
2450 | 111bfab3 | bellard | &gen_op_lwarx_le_user, |
2451 | 985a19d6 | bellard | &gen_op_lwarx_kernel, |
2452 | 111bfab3 | bellard | &gen_op_lwarx_le_kernel, |
2453 | d9bce9d9 | j_mayer | &gen_op_lwarx_64_user, |
2454 | d9bce9d9 | j_mayer | &gen_op_lwarx_le_64_user, |
2455 | d9bce9d9 | j_mayer | &gen_op_lwarx_64_kernel, |
2456 | d9bce9d9 | j_mayer | &gen_op_lwarx_le_64_kernel, |
2457 | 985a19d6 | bellard | }; |
2458 | 9a64fbe4 | bellard | static GenOpFunc *gen_op_stwcx[] = {
|
2459 | 9a64fbe4 | bellard | &gen_op_stwcx_user, |
2460 | 111bfab3 | bellard | &gen_op_stwcx_le_user, |
2461 | 9a64fbe4 | bellard | &gen_op_stwcx_kernel, |
2462 | 111bfab3 | bellard | &gen_op_stwcx_le_kernel, |
2463 | d9bce9d9 | j_mayer | &gen_op_stwcx_64_user, |
2464 | d9bce9d9 | j_mayer | &gen_op_stwcx_le_64_user, |
2465 | d9bce9d9 | j_mayer | &gen_op_stwcx_64_kernel, |
2466 | d9bce9d9 | j_mayer | &gen_op_stwcx_le_64_kernel, |
2467 | 9a64fbe4 | bellard | }; |
2468 | 9a64fbe4 | bellard | #endif
|
2469 | d9bce9d9 | j_mayer | #else
|
2470 | d9bce9d9 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
2471 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_lwarx[] = {
|
2472 | d9bce9d9 | j_mayer | &gen_op_lwarx_raw, |
2473 | d9bce9d9 | j_mayer | &gen_op_lwarx_le_raw, |
2474 | d9bce9d9 | j_mayer | }; |
2475 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_stwcx[] = {
|
2476 | d9bce9d9 | j_mayer | &gen_op_stwcx_raw, |
2477 | d9bce9d9 | j_mayer | &gen_op_stwcx_le_raw, |
2478 | d9bce9d9 | j_mayer | }; |
2479 | d9bce9d9 | j_mayer | #else
|
2480 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_lwarx[] = {
|
2481 | d9bce9d9 | j_mayer | &gen_op_lwarx_user, |
2482 | d9bce9d9 | j_mayer | &gen_op_lwarx_le_user, |
2483 | d9bce9d9 | j_mayer | &gen_op_lwarx_kernel, |
2484 | d9bce9d9 | j_mayer | &gen_op_lwarx_le_kernel, |
2485 | d9bce9d9 | j_mayer | }; |
2486 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_stwcx[] = {
|
2487 | d9bce9d9 | j_mayer | &gen_op_stwcx_user, |
2488 | d9bce9d9 | j_mayer | &gen_op_stwcx_le_user, |
2489 | d9bce9d9 | j_mayer | &gen_op_stwcx_kernel, |
2490 | d9bce9d9 | j_mayer | &gen_op_stwcx_le_kernel, |
2491 | d9bce9d9 | j_mayer | }; |
2492 | d9bce9d9 | j_mayer | #endif
|
2493 | d9bce9d9 | j_mayer | #endif
|
2494 | 9a64fbe4 | bellard | |
2495 | 111bfab3 | bellard | /* lwarx */
|
2496 | 76a66253 | j_mayer | GEN_HANDLER(lwarx, 0x1F, 0x14, 0x00, 0x00000001, PPC_RES) |
2497 | 79aceca5 | bellard | { |
2498 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
2499 | 985a19d6 | bellard | op_lwarx(); |
2500 | 79aceca5 | bellard | gen_op_store_T1_gpr(rD(ctx->opcode)); |
2501 | 79aceca5 | bellard | } |
2502 | 79aceca5 | bellard | |
2503 | 79aceca5 | bellard | /* stwcx. */
|
2504 | 9a64fbe4 | bellard | GEN_HANDLER(stwcx_, 0x1F, 0x16, 0x04, 0x00000000, PPC_RES) |
2505 | 79aceca5 | bellard | { |
2506 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
2507 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rS(ctx->opcode)); |
2508 | 9a64fbe4 | bellard | op_stwcx(); |
2509 | 79aceca5 | bellard | } |
2510 | 79aceca5 | bellard | |
2511 | 426613db | j_mayer | #if defined(TARGET_PPC64)
|
2512 | 426613db | j_mayer | #define op_ldarx() (*gen_op_ldarx[ctx->mem_idx])()
|
2513 | 426613db | j_mayer | #define op_stdcx() (*gen_op_stdcx[ctx->mem_idx])()
|
2514 | 426613db | j_mayer | #if defined(CONFIG_USER_ONLY)
|
2515 | 426613db | j_mayer | static GenOpFunc *gen_op_ldarx[] = {
|
2516 | 426613db | j_mayer | &gen_op_ldarx_raw, |
2517 | 426613db | j_mayer | &gen_op_ldarx_le_raw, |
2518 | 426613db | j_mayer | &gen_op_ldarx_64_raw, |
2519 | 426613db | j_mayer | &gen_op_ldarx_le_64_raw, |
2520 | 426613db | j_mayer | }; |
2521 | 426613db | j_mayer | static GenOpFunc *gen_op_stdcx[] = {
|
2522 | 426613db | j_mayer | &gen_op_stdcx_raw, |
2523 | 426613db | j_mayer | &gen_op_stdcx_le_raw, |
2524 | 426613db | j_mayer | &gen_op_stdcx_64_raw, |
2525 | 426613db | j_mayer | &gen_op_stdcx_le_64_raw, |
2526 | 426613db | j_mayer | }; |
2527 | 426613db | j_mayer | #else
|
2528 | 426613db | j_mayer | static GenOpFunc *gen_op_ldarx[] = {
|
2529 | 426613db | j_mayer | &gen_op_ldarx_user, |
2530 | 426613db | j_mayer | &gen_op_ldarx_le_user, |
2531 | 426613db | j_mayer | &gen_op_ldarx_kernel, |
2532 | 426613db | j_mayer | &gen_op_ldarx_le_kernel, |
2533 | 426613db | j_mayer | &gen_op_ldarx_64_user, |
2534 | 426613db | j_mayer | &gen_op_ldarx_le_64_user, |
2535 | 426613db | j_mayer | &gen_op_ldarx_64_kernel, |
2536 | 426613db | j_mayer | &gen_op_ldarx_le_64_kernel, |
2537 | 426613db | j_mayer | }; |
2538 | 426613db | j_mayer | static GenOpFunc *gen_op_stdcx[] = {
|
2539 | 426613db | j_mayer | &gen_op_stdcx_user, |
2540 | 426613db | j_mayer | &gen_op_stdcx_le_user, |
2541 | 426613db | j_mayer | &gen_op_stdcx_kernel, |
2542 | 426613db | j_mayer | &gen_op_stdcx_le_kernel, |
2543 | 426613db | j_mayer | &gen_op_stdcx_64_user, |
2544 | 426613db | j_mayer | &gen_op_stdcx_le_64_user, |
2545 | 426613db | j_mayer | &gen_op_stdcx_64_kernel, |
2546 | 426613db | j_mayer | &gen_op_stdcx_le_64_kernel, |
2547 | 426613db | j_mayer | }; |
2548 | 426613db | j_mayer | #endif
|
2549 | 426613db | j_mayer | |
2550 | 426613db | j_mayer | /* ldarx */
|
2551 | a750fc0b | j_mayer | GEN_HANDLER(ldarx, 0x1F, 0x14, 0x02, 0x00000001, PPC_64B) |
2552 | 426613db | j_mayer | { |
2553 | 426613db | j_mayer | gen_addr_reg_index(ctx); |
2554 | 426613db | j_mayer | op_ldarx(); |
2555 | 426613db | j_mayer | gen_op_store_T1_gpr(rD(ctx->opcode)); |
2556 | 426613db | j_mayer | } |
2557 | 426613db | j_mayer | |
2558 | 426613db | j_mayer | /* stdcx. */
|
2559 | a750fc0b | j_mayer | GEN_HANDLER(stdcx_, 0x1F, 0x16, 0x06, 0x00000000, PPC_64B) |
2560 | 426613db | j_mayer | { |
2561 | 426613db | j_mayer | gen_addr_reg_index(ctx); |
2562 | 426613db | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
2563 | 426613db | j_mayer | op_stdcx(); |
2564 | 426613db | j_mayer | } |
2565 | 426613db | j_mayer | #endif /* defined(TARGET_PPC64) */ |
2566 | 426613db | j_mayer | |
2567 | 79aceca5 | bellard | /* sync */
|
2568 | 76a66253 | j_mayer | GEN_HANDLER(sync, 0x1F, 0x16, 0x12, 0x03FF0801, PPC_MEM_SYNC) |
2569 | 79aceca5 | bellard | { |
2570 | 79aceca5 | bellard | } |
2571 | 79aceca5 | bellard | |
2572 | 79aceca5 | bellard | /*** Floating-point load ***/
|
2573 | 9a64fbe4 | bellard | #define GEN_LDF(width, opc) \
|
2574 | c7d344af | bellard | GEN_HANDLER(l##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
2575 | 79aceca5 | bellard | { \ |
2576 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2577 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2578 | 4ecc3190 | bellard | return; \
|
2579 | 4ecc3190 | bellard | } \ |
2580 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2581 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2582 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
2583 | 79aceca5 | bellard | } |
2584 | 79aceca5 | bellard | |
2585 | 9a64fbe4 | bellard | #define GEN_LDUF(width, opc) \
|
2586 | c7d344af | bellard | GEN_HANDLER(l##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
2587 | 79aceca5 | bellard | { \ |
2588 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2589 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2590 | 4ecc3190 | bellard | return; \
|
2591 | 4ecc3190 | bellard | } \ |
2592 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { \ |
2593 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2594 | 9fddaa0c | bellard | return; \
|
2595 | 9a64fbe4 | bellard | } \ |
2596 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2597 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2598 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
2599 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2600 | 79aceca5 | bellard | } |
2601 | 79aceca5 | bellard | |
2602 | 9a64fbe4 | bellard | #define GEN_LDUXF(width, opc) \
|
2603 | c7d344af | bellard | GEN_HANDLER(l##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \ |
2604 | 79aceca5 | bellard | { \ |
2605 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2606 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2607 | 4ecc3190 | bellard | return; \
|
2608 | 4ecc3190 | bellard | } \ |
2609 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { \ |
2610 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2611 | 9fddaa0c | bellard | return; \
|
2612 | 9a64fbe4 | bellard | } \ |
2613 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2614 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2615 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
2616 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2617 | 79aceca5 | bellard | } |
2618 | 79aceca5 | bellard | |
2619 | 9a64fbe4 | bellard | #define GEN_LDXF(width, opc2, opc3) \
|
2620 | c7d344af | bellard | GEN_HANDLER(l##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \ |
2621 | 79aceca5 | bellard | { \ |
2622 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2623 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2624 | 4ecc3190 | bellard | return; \
|
2625 | 4ecc3190 | bellard | } \ |
2626 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2627 | 9a64fbe4 | bellard | op_ldst(l##width); \ |
2628 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); \ |
2629 | 79aceca5 | bellard | } |
2630 | 79aceca5 | bellard | |
2631 | 9a64fbe4 | bellard | #define GEN_LDFS(width, op) \
|
2632 | 9a64fbe4 | bellard | OP_LD_TABLE(width); \ |
2633 | 9a64fbe4 | bellard | GEN_LDF(width, op | 0x20); \
|
2634 | 9a64fbe4 | bellard | GEN_LDUF(width, op | 0x21); \
|
2635 | 9a64fbe4 | bellard | GEN_LDUXF(width, op | 0x01); \
|
2636 | 9a64fbe4 | bellard | GEN_LDXF(width, 0x17, op | 0x00) |
2637 | 79aceca5 | bellard | |
2638 | 79aceca5 | bellard | /* lfd lfdu lfdux lfdx */
|
2639 | 9a64fbe4 | bellard | GEN_LDFS(fd, 0x12);
|
2640 | 79aceca5 | bellard | /* lfs lfsu lfsux lfsx */
|
2641 | 9a64fbe4 | bellard | GEN_LDFS(fs, 0x10);
|
2642 | 79aceca5 | bellard | |
2643 | 79aceca5 | bellard | /*** Floating-point store ***/
|
2644 | 79aceca5 | bellard | #define GEN_STF(width, opc) \
|
2645 | c7d344af | bellard | GEN_HANDLER(st##width, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
2646 | 79aceca5 | bellard | { \ |
2647 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2648 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2649 | 4ecc3190 | bellard | return; \
|
2650 | 4ecc3190 | bellard | } \ |
2651 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2652 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); \ |
2653 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2654 | 79aceca5 | bellard | } |
2655 | 79aceca5 | bellard | |
2656 | 9a64fbe4 | bellard | #define GEN_STUF(width, opc) \
|
2657 | c7d344af | bellard | GEN_HANDLER(st##width##u, opc, 0xFF, 0xFF, 0x00000000, PPC_FLOAT) \ |
2658 | 79aceca5 | bellard | { \ |
2659 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2660 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2661 | 4ecc3190 | bellard | return; \
|
2662 | 4ecc3190 | bellard | } \ |
2663 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { \ |
2664 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2665 | 9fddaa0c | bellard | return; \
|
2666 | 9a64fbe4 | bellard | } \ |
2667 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0); \
|
2668 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); \ |
2669 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2670 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2671 | 79aceca5 | bellard | } |
2672 | 79aceca5 | bellard | |
2673 | 9a64fbe4 | bellard | #define GEN_STUXF(width, opc) \
|
2674 | c7d344af | bellard | GEN_HANDLER(st##width##ux, 0x1F, 0x17, opc, 0x00000001, PPC_FLOAT) \ |
2675 | 79aceca5 | bellard | { \ |
2676 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2677 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2678 | 4ecc3190 | bellard | return; \
|
2679 | 4ecc3190 | bellard | } \ |
2680 | 76a66253 | j_mayer | if (unlikely(rA(ctx->opcode) == 0)) { \ |
2681 | 9fddaa0c | bellard | RET_INVAL(ctx); \ |
2682 | 9fddaa0c | bellard | return; \
|
2683 | 9a64fbe4 | bellard | } \ |
2684 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2685 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); \ |
2686 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2687 | 79aceca5 | bellard | gen_op_store_T0_gpr(rA(ctx->opcode)); \ |
2688 | 79aceca5 | bellard | } |
2689 | 79aceca5 | bellard | |
2690 | 9a64fbe4 | bellard | #define GEN_STXF(width, opc2, opc3) \
|
2691 | c7d344af | bellard | GEN_HANDLER(st##width##x, 0x1F, opc2, opc3, 0x00000001, PPC_FLOAT) \ |
2692 | 79aceca5 | bellard | { \ |
2693 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) { \
|
2694 | 4ecc3190 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0); \
|
2695 | 4ecc3190 | bellard | return; \
|
2696 | 4ecc3190 | bellard | } \ |
2697 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); \ |
2698 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); \ |
2699 | 9a64fbe4 | bellard | op_ldst(st##width); \ |
2700 | 79aceca5 | bellard | } |
2701 | 79aceca5 | bellard | |
2702 | 9a64fbe4 | bellard | #define GEN_STFS(width, op) \
|
2703 | 9a64fbe4 | bellard | OP_ST_TABLE(width); \ |
2704 | 9a64fbe4 | bellard | GEN_STF(width, op | 0x20); \
|
2705 | 9a64fbe4 | bellard | GEN_STUF(width, op | 0x21); \
|
2706 | 9a64fbe4 | bellard | GEN_STUXF(width, op | 0x01); \
|
2707 | 9a64fbe4 | bellard | GEN_STXF(width, 0x17, op | 0x00) |
2708 | 79aceca5 | bellard | |
2709 | 79aceca5 | bellard | /* stfd stfdu stfdux stfdx */
|
2710 | 9a64fbe4 | bellard | GEN_STFS(fd, 0x16);
|
2711 | 79aceca5 | bellard | /* stfs stfsu stfsux stfsx */
|
2712 | 9a64fbe4 | bellard | GEN_STFS(fs, 0x14);
|
2713 | 79aceca5 | bellard | |
2714 | 79aceca5 | bellard | /* Optional: */
|
2715 | 79aceca5 | bellard | /* stfiwx */
|
2716 | a750fc0b | j_mayer | GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT_STFIWX) |
2717 | 79aceca5 | bellard | { |
2718 | 76a66253 | j_mayer | if (unlikely(!ctx->fpu_enabled)) {
|
2719 | 3cc62370 | bellard | RET_EXCP(ctx, EXCP_NO_FP, 0);
|
2720 | 3cc62370 | bellard | return;
|
2721 | 3cc62370 | bellard | } |
2722 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
2723 | 76a66253 | j_mayer | /* XXX: TODO: memcpy low order 32 bits of FRP(rs) into memory */
|
2724 | 9fddaa0c | bellard | RET_INVAL(ctx); |
2725 | 79aceca5 | bellard | } |
2726 | 79aceca5 | bellard | |
2727 | 79aceca5 | bellard | /*** Branch ***/
|
2728 | 36081602 | j_mayer | static inline void gen_goto_tb (DisasContext *ctx, int n, target_ulong dest) |
2729 | c1942362 | bellard | { |
2730 | c1942362 | bellard | TranslationBlock *tb; |
2731 | c1942362 | bellard | tb = ctx->tb; |
2732 | c1942362 | bellard | if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK)) {
|
2733 | c1942362 | bellard | if (n == 0) |
2734 | c1942362 | bellard | gen_op_goto_tb0(TBPARAM(tb)); |
2735 | c1942362 | bellard | else
|
2736 | c1942362 | bellard | gen_op_goto_tb1(TBPARAM(tb)); |
2737 | d9bce9d9 | j_mayer | gen_set_T1(dest); |
2738 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2739 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2740 | d9bce9d9 | j_mayer | gen_op_b_T1_64(); |
2741 | d9bce9d9 | j_mayer | else
|
2742 | d9bce9d9 | j_mayer | #endif
|
2743 | d9bce9d9 | j_mayer | gen_op_b_T1(); |
2744 | c1942362 | bellard | gen_op_set_T0((long)tb + n);
|
2745 | ea4e754f | bellard | if (ctx->singlestep_enabled)
|
2746 | ea4e754f | bellard | gen_op_debug(); |
2747 | c1942362 | bellard | gen_op_exit_tb(); |
2748 | c1942362 | bellard | } else {
|
2749 | d9bce9d9 | j_mayer | gen_set_T1(dest); |
2750 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2751 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2752 | d9bce9d9 | j_mayer | gen_op_b_T1_64(); |
2753 | d9bce9d9 | j_mayer | else
|
2754 | d9bce9d9 | j_mayer | #endif
|
2755 | d9bce9d9 | j_mayer | gen_op_b_T1(); |
2756 | 76a66253 | j_mayer | gen_op_reset_T0(); |
2757 | ea4e754f | bellard | if (ctx->singlestep_enabled)
|
2758 | ea4e754f | bellard | gen_op_debug(); |
2759 | c1942362 | bellard | gen_op_exit_tb(); |
2760 | c1942362 | bellard | } |
2761 | c53be334 | bellard | } |
2762 | c53be334 | bellard | |
2763 | 79aceca5 | bellard | /* b ba bl bla */
|
2764 | 79aceca5 | bellard | GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW) |
2765 | 79aceca5 | bellard | { |
2766 | 76a66253 | j_mayer | target_ulong li, target; |
2767 | 38a64f9d | bellard | |
2768 | 38a64f9d | bellard | /* sign extend LI */
|
2769 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
|
2770 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2771 | d9bce9d9 | j_mayer | li = ((int64_t)LI(ctx->opcode) << 38) >> 38; |
2772 | d9bce9d9 | j_mayer | else
|
2773 | 76a66253 | j_mayer | #endif
|
2774 | d9bce9d9 | j_mayer | li = ((int32_t)LI(ctx->opcode) << 6) >> 6; |
2775 | 76a66253 | j_mayer | if (likely(AA(ctx->opcode) == 0)) |
2776 | 046d6672 | bellard | target = ctx->nip + li - 4;
|
2777 | 79aceca5 | bellard | else
|
2778 | 9a64fbe4 | bellard | target = li; |
2779 | 9a64fbe4 | bellard | if (LK(ctx->opcode)) {
|
2780 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2781 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2782 | d9bce9d9 | j_mayer | gen_op_setlr_64(ctx->nip >> 32, ctx->nip);
|
2783 | d9bce9d9 | j_mayer | else
|
2784 | d9bce9d9 | j_mayer | #endif
|
2785 | d9bce9d9 | j_mayer | gen_op_setlr(ctx->nip); |
2786 | 9a64fbe4 | bellard | } |
2787 | c1942362 | bellard | gen_goto_tb(ctx, 0, target);
|
2788 | 9a64fbe4 | bellard | ctx->exception = EXCP_BRANCH; |
2789 | 79aceca5 | bellard | } |
2790 | 79aceca5 | bellard | |
2791 | e98a6e40 | bellard | #define BCOND_IM 0 |
2792 | e98a6e40 | bellard | #define BCOND_LR 1 |
2793 | e98a6e40 | bellard | #define BCOND_CTR 2 |
2794 | e98a6e40 | bellard | |
2795 | 36081602 | j_mayer | static inline void gen_bcond (DisasContext *ctx, int type) |
2796 | d9bce9d9 | j_mayer | { |
2797 | 76a66253 | j_mayer | target_ulong target = 0;
|
2798 | 76a66253 | j_mayer | target_ulong li; |
2799 | d9bce9d9 | j_mayer | uint32_t bo = BO(ctx->opcode); |
2800 | d9bce9d9 | j_mayer | uint32_t bi = BI(ctx->opcode); |
2801 | d9bce9d9 | j_mayer | uint32_t mask; |
2802 | e98a6e40 | bellard | |
2803 | e98a6e40 | bellard | if ((bo & 0x4) == 0) |
2804 | d9bce9d9 | j_mayer | gen_op_dec_ctr(); |
2805 | e98a6e40 | bellard | switch(type) {
|
2806 | e98a6e40 | bellard | case BCOND_IM:
|
2807 | 76a66253 | j_mayer | li = (target_long)((int16_t)(BD(ctx->opcode))); |
2808 | 76a66253 | j_mayer | if (likely(AA(ctx->opcode) == 0)) { |
2809 | 046d6672 | bellard | target = ctx->nip + li - 4;
|
2810 | e98a6e40 | bellard | } else {
|
2811 | e98a6e40 | bellard | target = li; |
2812 | e98a6e40 | bellard | } |
2813 | e98a6e40 | bellard | break;
|
2814 | e98a6e40 | bellard | case BCOND_CTR:
|
2815 | e98a6e40 | bellard | gen_op_movl_T1_ctr(); |
2816 | e98a6e40 | bellard | break;
|
2817 | e98a6e40 | bellard | default:
|
2818 | e98a6e40 | bellard | case BCOND_LR:
|
2819 | e98a6e40 | bellard | gen_op_movl_T1_lr(); |
2820 | e98a6e40 | bellard | break;
|
2821 | e98a6e40 | bellard | } |
2822 | d9bce9d9 | j_mayer | if (LK(ctx->opcode)) {
|
2823 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2824 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2825 | d9bce9d9 | j_mayer | gen_op_setlr_64(ctx->nip >> 32, ctx->nip);
|
2826 | d9bce9d9 | j_mayer | else
|
2827 | d9bce9d9 | j_mayer | #endif
|
2828 | d9bce9d9 | j_mayer | gen_op_setlr(ctx->nip); |
2829 | e98a6e40 | bellard | } |
2830 | e98a6e40 | bellard | if (bo & 0x10) { |
2831 | d9bce9d9 | j_mayer | /* No CR condition */
|
2832 | d9bce9d9 | j_mayer | switch (bo & 0x6) { |
2833 | d9bce9d9 | j_mayer | case 0: |
2834 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2835 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2836 | d9bce9d9 | j_mayer | gen_op_test_ctr_64(); |
2837 | d9bce9d9 | j_mayer | else
|
2838 | d9bce9d9 | j_mayer | #endif
|
2839 | d9bce9d9 | j_mayer | gen_op_test_ctr(); |
2840 | d9bce9d9 | j_mayer | break;
|
2841 | d9bce9d9 | j_mayer | case 2: |
2842 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2843 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2844 | d9bce9d9 | j_mayer | gen_op_test_ctrz_64(); |
2845 | d9bce9d9 | j_mayer | else
|
2846 | d9bce9d9 | j_mayer | #endif
|
2847 | d9bce9d9 | j_mayer | gen_op_test_ctrz(); |
2848 | e98a6e40 | bellard | break;
|
2849 | e98a6e40 | bellard | default:
|
2850 | d9bce9d9 | j_mayer | case 4: |
2851 | d9bce9d9 | j_mayer | case 6: |
2852 | e98a6e40 | bellard | if (type == BCOND_IM) {
|
2853 | c1942362 | bellard | gen_goto_tb(ctx, 0, target);
|
2854 | e98a6e40 | bellard | } else {
|
2855 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2856 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2857 | d9bce9d9 | j_mayer | gen_op_b_T1_64(); |
2858 | d9bce9d9 | j_mayer | else
|
2859 | d9bce9d9 | j_mayer | #endif
|
2860 | d9bce9d9 | j_mayer | gen_op_b_T1(); |
2861 | 76a66253 | j_mayer | gen_op_reset_T0(); |
2862 | e98a6e40 | bellard | } |
2863 | e98a6e40 | bellard | goto no_test;
|
2864 | e98a6e40 | bellard | } |
2865 | d9bce9d9 | j_mayer | } else {
|
2866 | d9bce9d9 | j_mayer | mask = 1 << (3 - (bi & 0x03)); |
2867 | d9bce9d9 | j_mayer | gen_op_load_crf_T0(bi >> 2);
|
2868 | d9bce9d9 | j_mayer | if (bo & 0x8) { |
2869 | d9bce9d9 | j_mayer | switch (bo & 0x6) { |
2870 | d9bce9d9 | j_mayer | case 0: |
2871 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2872 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2873 | d9bce9d9 | j_mayer | gen_op_test_ctr_true_64(mask); |
2874 | d9bce9d9 | j_mayer | else
|
2875 | d9bce9d9 | j_mayer | #endif
|
2876 | d9bce9d9 | j_mayer | gen_op_test_ctr_true(mask); |
2877 | d9bce9d9 | j_mayer | break;
|
2878 | d9bce9d9 | j_mayer | case 2: |
2879 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2880 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2881 | d9bce9d9 | j_mayer | gen_op_test_ctrz_true_64(mask); |
2882 | d9bce9d9 | j_mayer | else
|
2883 | d9bce9d9 | j_mayer | #endif
|
2884 | d9bce9d9 | j_mayer | gen_op_test_ctrz_true(mask); |
2885 | d9bce9d9 | j_mayer | break;
|
2886 | d9bce9d9 | j_mayer | default:
|
2887 | d9bce9d9 | j_mayer | case 4: |
2888 | d9bce9d9 | j_mayer | case 6: |
2889 | e98a6e40 | bellard | gen_op_test_true(mask); |
2890 | d9bce9d9 | j_mayer | break;
|
2891 | d9bce9d9 | j_mayer | } |
2892 | d9bce9d9 | j_mayer | } else {
|
2893 | d9bce9d9 | j_mayer | switch (bo & 0x6) { |
2894 | d9bce9d9 | j_mayer | case 0: |
2895 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2896 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2897 | d9bce9d9 | j_mayer | gen_op_test_ctr_false_64(mask); |
2898 | d9bce9d9 | j_mayer | else
|
2899 | d9bce9d9 | j_mayer | #endif
|
2900 | d9bce9d9 | j_mayer | gen_op_test_ctr_false(mask); |
2901 | 3b46e624 | ths | break;
|
2902 | d9bce9d9 | j_mayer | case 2: |
2903 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2904 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2905 | d9bce9d9 | j_mayer | gen_op_test_ctrz_false_64(mask); |
2906 | d9bce9d9 | j_mayer | else
|
2907 | d9bce9d9 | j_mayer | #endif
|
2908 | d9bce9d9 | j_mayer | gen_op_test_ctrz_false(mask); |
2909 | d9bce9d9 | j_mayer | break;
|
2910 | e98a6e40 | bellard | default:
|
2911 | d9bce9d9 | j_mayer | case 4: |
2912 | d9bce9d9 | j_mayer | case 6: |
2913 | e98a6e40 | bellard | gen_op_test_false(mask); |
2914 | d9bce9d9 | j_mayer | break;
|
2915 | d9bce9d9 | j_mayer | } |
2916 | d9bce9d9 | j_mayer | } |
2917 | d9bce9d9 | j_mayer | } |
2918 | e98a6e40 | bellard | if (type == BCOND_IM) {
|
2919 | c53be334 | bellard | int l1 = gen_new_label();
|
2920 | c53be334 | bellard | gen_op_jz_T0(l1); |
2921 | c1942362 | bellard | gen_goto_tb(ctx, 0, target);
|
2922 | c53be334 | bellard | gen_set_label(l1); |
2923 | c1942362 | bellard | gen_goto_tb(ctx, 1, ctx->nip);
|
2924 | e98a6e40 | bellard | } else {
|
2925 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
2926 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
2927 | d9bce9d9 | j_mayer | gen_op_btest_T1_64(ctx->nip >> 32, ctx->nip);
|
2928 | d9bce9d9 | j_mayer | else
|
2929 | d9bce9d9 | j_mayer | #endif
|
2930 | d9bce9d9 | j_mayer | gen_op_btest_T1(ctx->nip); |
2931 | 76a66253 | j_mayer | gen_op_reset_T0(); |
2932 | 36081602 | j_mayer | no_test:
|
2933 | 08e46e54 | j_mayer | if (ctx->singlestep_enabled)
|
2934 | 08e46e54 | j_mayer | gen_op_debug(); |
2935 | 08e46e54 | j_mayer | gen_op_exit_tb(); |
2936 | 08e46e54 | j_mayer | } |
2937 | d9bce9d9 | j_mayer | ctx->exception = EXCP_BRANCH; |
2938 | e98a6e40 | bellard | } |
2939 | e98a6e40 | bellard | |
2940 | e98a6e40 | bellard | GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW) |
2941 | 3b46e624 | ths | { |
2942 | e98a6e40 | bellard | gen_bcond(ctx, BCOND_IM); |
2943 | e98a6e40 | bellard | } |
2944 | e98a6e40 | bellard | |
2945 | e98a6e40 | bellard | GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW) |
2946 | 3b46e624 | ths | { |
2947 | e98a6e40 | bellard | gen_bcond(ctx, BCOND_CTR); |
2948 | e98a6e40 | bellard | } |
2949 | e98a6e40 | bellard | |
2950 | e98a6e40 | bellard | GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW) |
2951 | 3b46e624 | ths | { |
2952 | e98a6e40 | bellard | gen_bcond(ctx, BCOND_LR); |
2953 | e98a6e40 | bellard | } |
2954 | 79aceca5 | bellard | |
2955 | 79aceca5 | bellard | /*** Condition register logical ***/
|
2956 | 79aceca5 | bellard | #define GEN_CRLOGIC(op, opc) \
|
2957 | 79aceca5 | bellard | GEN_HANDLER(cr##op, 0x13, 0x01, opc, 0x00000001, PPC_INTEGER) \ |
2958 | 79aceca5 | bellard | { \ |
2959 | 79aceca5 | bellard | gen_op_load_crf_T0(crbA(ctx->opcode) >> 2); \
|
2960 | 79aceca5 | bellard | gen_op_getbit_T0(3 - (crbA(ctx->opcode) & 0x03)); \ |
2961 | 79aceca5 | bellard | gen_op_load_crf_T1(crbB(ctx->opcode) >> 2); \
|
2962 | 79aceca5 | bellard | gen_op_getbit_T1(3 - (crbB(ctx->opcode) & 0x03)); \ |
2963 | 79aceca5 | bellard | gen_op_##op(); \ |
2964 | 79aceca5 | bellard | gen_op_load_crf_T1(crbD(ctx->opcode) >> 2); \
|
2965 | 79aceca5 | bellard | gen_op_setcrfbit(~(1 << (3 - (crbD(ctx->opcode) & 0x03))), \ |
2966 | 79aceca5 | bellard | 3 - (crbD(ctx->opcode) & 0x03)); \ |
2967 | 79aceca5 | bellard | gen_op_store_T1_crf(crbD(ctx->opcode) >> 2); \
|
2968 | 79aceca5 | bellard | } |
2969 | 79aceca5 | bellard | |
2970 | 79aceca5 | bellard | /* crand */
|
2971 | 76a66253 | j_mayer | GEN_CRLOGIC(and, 0x08);
|
2972 | 79aceca5 | bellard | /* crandc */
|
2973 | 76a66253 | j_mayer | GEN_CRLOGIC(andc, 0x04);
|
2974 | 79aceca5 | bellard | /* creqv */
|
2975 | 76a66253 | j_mayer | GEN_CRLOGIC(eqv, 0x09);
|
2976 | 79aceca5 | bellard | /* crnand */
|
2977 | 76a66253 | j_mayer | GEN_CRLOGIC(nand, 0x07);
|
2978 | 79aceca5 | bellard | /* crnor */
|
2979 | 76a66253 | j_mayer | GEN_CRLOGIC(nor, 0x01);
|
2980 | 79aceca5 | bellard | /* cror */
|
2981 | 76a66253 | j_mayer | GEN_CRLOGIC(or, 0x0E);
|
2982 | 79aceca5 | bellard | /* crorc */
|
2983 | 76a66253 | j_mayer | GEN_CRLOGIC(orc, 0x0D);
|
2984 | 79aceca5 | bellard | /* crxor */
|
2985 | 76a66253 | j_mayer | GEN_CRLOGIC(xor, 0x06);
|
2986 | 79aceca5 | bellard | /* mcrf */
|
2987 | 79aceca5 | bellard | GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER) |
2988 | 79aceca5 | bellard | { |
2989 | 79aceca5 | bellard | gen_op_load_crf_T0(crfS(ctx->opcode)); |
2990 | 79aceca5 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
2991 | 79aceca5 | bellard | } |
2992 | 79aceca5 | bellard | |
2993 | 79aceca5 | bellard | /*** System linkage ***/
|
2994 | 79aceca5 | bellard | /* rfi (supervisor only) */
|
2995 | 76a66253 | j_mayer | GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW) |
2996 | 79aceca5 | bellard | { |
2997 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
2998 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
2999 | 9a64fbe4 | bellard | #else
|
3000 | 9a64fbe4 | bellard | /* Restore CPU state */
|
3001 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3002 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3003 | 9fddaa0c | bellard | return;
|
3004 | 9a64fbe4 | bellard | } |
3005 | a42bd6cc | j_mayer | gen_op_rfi(); |
3006 | 2be0071f | bellard | RET_CHG_FLOW(ctx); |
3007 | 9a64fbe4 | bellard | #endif
|
3008 | 79aceca5 | bellard | } |
3009 | 79aceca5 | bellard | |
3010 | 426613db | j_mayer | #if defined(TARGET_PPC64)
|
3011 | a750fc0b | j_mayer | GEN_HANDLER(rfid, 0x13, 0x12, 0x00, 0x03FF8001, PPC_64B) |
3012 | 426613db | j_mayer | { |
3013 | 426613db | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3014 | 426613db | j_mayer | RET_PRIVOPC(ctx); |
3015 | 426613db | j_mayer | #else
|
3016 | 426613db | j_mayer | /* Restore CPU state */
|
3017 | 426613db | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3018 | 426613db | j_mayer | RET_PRIVOPC(ctx); |
3019 | 426613db | j_mayer | return;
|
3020 | 426613db | j_mayer | } |
3021 | a42bd6cc | j_mayer | gen_op_rfid(); |
3022 | 426613db | j_mayer | RET_CHG_FLOW(ctx); |
3023 | 426613db | j_mayer | #endif
|
3024 | 426613db | j_mayer | } |
3025 | 426613db | j_mayer | #endif
|
3026 | 426613db | j_mayer | |
3027 | 79aceca5 | bellard | /* sc */
|
3028 | 79aceca5 | bellard | GEN_HANDLER(sc, 0x11, 0xFF, 0xFF, 0x03FFFFFD, PPC_FLOW) |
3029 | 79aceca5 | bellard | { |
3030 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3031 | 9fddaa0c | bellard | RET_EXCP(ctx, EXCP_SYSCALL_USER, 0);
|
3032 | 9a64fbe4 | bellard | #else
|
3033 | 9fddaa0c | bellard | RET_EXCP(ctx, EXCP_SYSCALL, 0);
|
3034 | 9a64fbe4 | bellard | #endif
|
3035 | 79aceca5 | bellard | } |
3036 | 79aceca5 | bellard | |
3037 | 79aceca5 | bellard | /*** Trap ***/
|
3038 | 79aceca5 | bellard | /* tw */
|
3039 | 76a66253 | j_mayer | GEN_HANDLER(tw, 0x1F, 0x04, 0x00, 0x00000001, PPC_FLOW) |
3040 | 79aceca5 | bellard | { |
3041 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3042 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3043 | a0ae05aa | ths | /* Update the nip since this might generate a trap exception */
|
3044 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip); |
3045 | 9a64fbe4 | bellard | gen_op_tw(TO(ctx->opcode)); |
3046 | 79aceca5 | bellard | } |
3047 | 79aceca5 | bellard | |
3048 | 79aceca5 | bellard | /* twi */
|
3049 | 79aceca5 | bellard | GEN_HANDLER(twi, 0x03, 0xFF, 0xFF, 0x00000000, PPC_FLOW) |
3050 | 79aceca5 | bellard | { |
3051 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3052 | d9bce9d9 | j_mayer | gen_set_T1(SIMM(ctx->opcode)); |
3053 | d9bce9d9 | j_mayer | /* Update the nip since this might generate a trap exception */
|
3054 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip); |
3055 | 76a66253 | j_mayer | gen_op_tw(TO(ctx->opcode)); |
3056 | 79aceca5 | bellard | } |
3057 | 79aceca5 | bellard | |
3058 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
3059 | d9bce9d9 | j_mayer | /* td */
|
3060 | d9bce9d9 | j_mayer | GEN_HANDLER(td, 0x1F, 0x04, 0x02, 0x00000001, PPC_64B) |
3061 | d9bce9d9 | j_mayer | { |
3062 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3063 | d9bce9d9 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3064 | d9bce9d9 | j_mayer | /* Update the nip since this might generate a trap exception */
|
3065 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip); |
3066 | d9bce9d9 | j_mayer | gen_op_td(TO(ctx->opcode)); |
3067 | d9bce9d9 | j_mayer | } |
3068 | d9bce9d9 | j_mayer | |
3069 | d9bce9d9 | j_mayer | /* tdi */
|
3070 | d9bce9d9 | j_mayer | GEN_HANDLER(tdi, 0x02, 0xFF, 0xFF, 0x00000000, PPC_64B) |
3071 | d9bce9d9 | j_mayer | { |
3072 | d9bce9d9 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3073 | d9bce9d9 | j_mayer | gen_set_T1(SIMM(ctx->opcode)); |
3074 | d9bce9d9 | j_mayer | /* Update the nip since this might generate a trap exception */
|
3075 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip); |
3076 | d9bce9d9 | j_mayer | gen_op_td(TO(ctx->opcode)); |
3077 | d9bce9d9 | j_mayer | } |
3078 | d9bce9d9 | j_mayer | #endif
|
3079 | d9bce9d9 | j_mayer | |
3080 | 79aceca5 | bellard | /*** Processor control ***/
|
3081 | 79aceca5 | bellard | /* mcrxr */
|
3082 | 79aceca5 | bellard | GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC) |
3083 | 79aceca5 | bellard | { |
3084 | 79aceca5 | bellard | gen_op_load_xer_cr(); |
3085 | 79aceca5 | bellard | gen_op_store_T0_crf(crfD(ctx->opcode)); |
3086 | e864cabd | j_mayer | gen_op_clear_xer_ov(); |
3087 | e864cabd | j_mayer | gen_op_clear_xer_ca(); |
3088 | 79aceca5 | bellard | } |
3089 | 79aceca5 | bellard | |
3090 | 79aceca5 | bellard | /* mfcr */
|
3091 | 76a66253 | j_mayer | GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) |
3092 | 79aceca5 | bellard | { |
3093 | 76a66253 | j_mayer | uint32_t crm, crn; |
3094 | 3b46e624 | ths | |
3095 | 76a66253 | j_mayer | if (likely(ctx->opcode & 0x00100000)) { |
3096 | 76a66253 | j_mayer | crm = CRM(ctx->opcode); |
3097 | 76a66253 | j_mayer | if (likely((crm ^ (crm - 1)) == 0)) { |
3098 | 76a66253 | j_mayer | crn = ffs(crm); |
3099 | 76a66253 | j_mayer | gen_op_load_cro(7 - crn);
|
3100 | 76a66253 | j_mayer | } |
3101 | d9bce9d9 | j_mayer | } else {
|
3102 | d9bce9d9 | j_mayer | gen_op_load_cr(); |
3103 | d9bce9d9 | j_mayer | } |
3104 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3105 | 79aceca5 | bellard | } |
3106 | 79aceca5 | bellard | |
3107 | 79aceca5 | bellard | /* mfmsr */
|
3108 | 79aceca5 | bellard | GEN_HANDLER(mfmsr, 0x1F, 0x13, 0x02, 0x001FF801, PPC_MISC) |
3109 | 79aceca5 | bellard | { |
3110 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3111 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3112 | 9a64fbe4 | bellard | #else
|
3113 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3114 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3115 | 9fddaa0c | bellard | return;
|
3116 | 9a64fbe4 | bellard | } |
3117 | 79aceca5 | bellard | gen_op_load_msr(); |
3118 | 79aceca5 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3119 | 9a64fbe4 | bellard | #endif
|
3120 | 79aceca5 | bellard | } |
3121 | 79aceca5 | bellard | |
3122 | 3fc6c082 | bellard | #if 0
|
3123 | 3fc6c082 | bellard | #define SPR_NOACCESS ((void *)(-1))
|
3124 | 3fc6c082 | bellard | #else
|
3125 | 3fc6c082 | bellard | static void spr_noaccess (void *opaque, int sprn) |
3126 | 3fc6c082 | bellard | { |
3127 | 3fc6c082 | bellard | sprn = ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5); |
3128 | 3fc6c082 | bellard | printf("ERROR: try to access SPR %d !\n", sprn);
|
3129 | 3fc6c082 | bellard | } |
3130 | 3fc6c082 | bellard | #define SPR_NOACCESS (&spr_noaccess)
|
3131 | 3fc6c082 | bellard | #endif
|
3132 | 3fc6c082 | bellard | |
3133 | 79aceca5 | bellard | /* mfspr */
|
3134 | 3fc6c082 | bellard | static inline void gen_op_mfspr (DisasContext *ctx) |
3135 | 79aceca5 | bellard | { |
3136 | 3fc6c082 | bellard | void (*read_cb)(void *opaque, int sprn); |
3137 | 79aceca5 | bellard | uint32_t sprn = SPR(ctx->opcode); |
3138 | 79aceca5 | bellard | |
3139 | 3fc6c082 | bellard | #if !defined(CONFIG_USER_ONLY)
|
3140 | 3fc6c082 | bellard | if (ctx->supervisor)
|
3141 | 3fc6c082 | bellard | read_cb = ctx->spr_cb[sprn].oea_read; |
3142 | 3fc6c082 | bellard | else
|
3143 | 9a64fbe4 | bellard | #endif
|
3144 | 3fc6c082 | bellard | read_cb = ctx->spr_cb[sprn].uea_read; |
3145 | 76a66253 | j_mayer | if (likely(read_cb != NULL)) { |
3146 | 76a66253 | j_mayer | if (likely(read_cb != SPR_NOACCESS)) {
|
3147 | 3fc6c082 | bellard | (*read_cb)(ctx, sprn); |
3148 | 3fc6c082 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3149 | 3fc6c082 | bellard | } else {
|
3150 | 3fc6c082 | bellard | /* Privilege exception */
|
3151 | 4a057712 | j_mayer | if (loglevel != 0) { |
3152 | 7f75ffd3 | blueswir1 | fprintf(logfile, "Trying to read privileged spr %d %03x\n",
|
3153 | f24e5695 | bellard | sprn, sprn); |
3154 | f24e5695 | bellard | } |
3155 | 7f75ffd3 | blueswir1 | printf("Trying to read privileged spr %d %03x\n", sprn, sprn);
|
3156 | 76a66253 | j_mayer | RET_PRIVREG(ctx); |
3157 | 79aceca5 | bellard | } |
3158 | 3fc6c082 | bellard | } else {
|
3159 | 3fc6c082 | bellard | /* Not defined */
|
3160 | 4a057712 | j_mayer | if (loglevel != 0) { |
3161 | f24e5695 | bellard | fprintf(logfile, "Trying to read invalid spr %d %03x\n",
|
3162 | f24e5695 | bellard | sprn, sprn); |
3163 | f24e5695 | bellard | } |
3164 | 3fc6c082 | bellard | printf("Trying to read invalid spr %d %03x\n", sprn, sprn);
|
3165 | 3fc6c082 | bellard | RET_EXCP(ctx, EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_SPR); |
3166 | 79aceca5 | bellard | } |
3167 | 79aceca5 | bellard | } |
3168 | 79aceca5 | bellard | |
3169 | 3fc6c082 | bellard | GEN_HANDLER(mfspr, 0x1F, 0x13, 0x0A, 0x00000001, PPC_MISC) |
3170 | 79aceca5 | bellard | { |
3171 | 3fc6c082 | bellard | gen_op_mfspr(ctx); |
3172 | 76a66253 | j_mayer | } |
3173 | 3fc6c082 | bellard | |
3174 | 3fc6c082 | bellard | /* mftb */
|
3175 | a750fc0b | j_mayer | GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB) |
3176 | 3fc6c082 | bellard | { |
3177 | 3fc6c082 | bellard | gen_op_mfspr(ctx); |
3178 | 79aceca5 | bellard | } |
3179 | 79aceca5 | bellard | |
3180 | 79aceca5 | bellard | /* mtcrf */
|
3181 | 8dd4983c | bellard | GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) |
3182 | 79aceca5 | bellard | { |
3183 | 76a66253 | j_mayer | uint32_t crm, crn; |
3184 | 3b46e624 | ths | |
3185 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3186 | 76a66253 | j_mayer | crm = CRM(ctx->opcode); |
3187 | 76a66253 | j_mayer | if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) { |
3188 | 76a66253 | j_mayer | crn = ffs(crm); |
3189 | 76a66253 | j_mayer | gen_op_srli_T0(crn * 4);
|
3190 | 76a66253 | j_mayer | gen_op_andi_T0(0xF);
|
3191 | 76a66253 | j_mayer | gen_op_store_cro(7 - crn);
|
3192 | 76a66253 | j_mayer | } else {
|
3193 | 76a66253 | j_mayer | gen_op_store_cr(crm); |
3194 | 76a66253 | j_mayer | } |
3195 | 79aceca5 | bellard | } |
3196 | 79aceca5 | bellard | |
3197 | 79aceca5 | bellard | /* mtmsr */
|
3198 | 426613db | j_mayer | #if defined(TARGET_PPC64)
|
3199 | a750fc0b | j_mayer | GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001FF801, PPC_64B) |
3200 | 426613db | j_mayer | { |
3201 | 426613db | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3202 | 426613db | j_mayer | RET_PRIVREG(ctx); |
3203 | 426613db | j_mayer | #else
|
3204 | 426613db | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3205 | 426613db | j_mayer | RET_PRIVREG(ctx); |
3206 | 426613db | j_mayer | return;
|
3207 | 426613db | j_mayer | } |
3208 | 426613db | j_mayer | gen_update_nip(ctx, ctx->nip); |
3209 | 426613db | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3210 | 426613db | j_mayer | gen_op_store_msr(); |
3211 | 426613db | j_mayer | /* Must stop the translation as machine state (may have) changed */
|
3212 | 426613db | j_mayer | RET_CHG_FLOW(ctx); |
3213 | 426613db | j_mayer | #endif
|
3214 | 426613db | j_mayer | } |
3215 | 426613db | j_mayer | #endif
|
3216 | 426613db | j_mayer | |
3217 | 79aceca5 | bellard | GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001FF801, PPC_MISC) |
3218 | 79aceca5 | bellard | { |
3219 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3220 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3221 | 9a64fbe4 | bellard | #else
|
3222 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3223 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3224 | 9fddaa0c | bellard | return;
|
3225 | 9a64fbe4 | bellard | } |
3226 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip); |
3227 | 79aceca5 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3228 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
3229 | d9bce9d9 | j_mayer | if (!ctx->sf_mode)
|
3230 | d9bce9d9 | j_mayer | gen_op_store_msr_32(); |
3231 | d9bce9d9 | j_mayer | else
|
3232 | d9bce9d9 | j_mayer | #endif
|
3233 | d9bce9d9 | j_mayer | gen_op_store_msr(); |
3234 | 79aceca5 | bellard | /* Must stop the translation as machine state (may have) changed */
|
3235 | e80e1cc4 | bellard | RET_CHG_FLOW(ctx); |
3236 | 9a64fbe4 | bellard | #endif
|
3237 | 79aceca5 | bellard | } |
3238 | 79aceca5 | bellard | |
3239 | 79aceca5 | bellard | /* mtspr */
|
3240 | 79aceca5 | bellard | GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000001, PPC_MISC) |
3241 | 79aceca5 | bellard | { |
3242 | 3fc6c082 | bellard | void (*write_cb)(void *opaque, int sprn); |
3243 | 79aceca5 | bellard | uint32_t sprn = SPR(ctx->opcode); |
3244 | 79aceca5 | bellard | |
3245 | 3fc6c082 | bellard | #if !defined(CONFIG_USER_ONLY)
|
3246 | 3fc6c082 | bellard | if (ctx->supervisor)
|
3247 | 3fc6c082 | bellard | write_cb = ctx->spr_cb[sprn].oea_write; |
3248 | 3fc6c082 | bellard | else
|
3249 | 9a64fbe4 | bellard | #endif
|
3250 | 3fc6c082 | bellard | write_cb = ctx->spr_cb[sprn].uea_write; |
3251 | 76a66253 | j_mayer | if (likely(write_cb != NULL)) { |
3252 | 76a66253 | j_mayer | if (likely(write_cb != SPR_NOACCESS)) {
|
3253 | 3fc6c082 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3254 | 3fc6c082 | bellard | (*write_cb)(ctx, sprn); |
3255 | 3fc6c082 | bellard | } else {
|
3256 | 3fc6c082 | bellard | /* Privilege exception */
|
3257 | 4a057712 | j_mayer | if (loglevel != 0) { |
3258 | 7f75ffd3 | blueswir1 | fprintf(logfile, "Trying to write privileged spr %d %03x\n",
|
3259 | f24e5695 | bellard | sprn, sprn); |
3260 | f24e5695 | bellard | } |
3261 | 7f75ffd3 | blueswir1 | printf("Trying to write privileged spr %d %03x\n", sprn, sprn);
|
3262 | 76a66253 | j_mayer | RET_PRIVREG(ctx); |
3263 | 76a66253 | j_mayer | } |
3264 | 3fc6c082 | bellard | } else {
|
3265 | 3fc6c082 | bellard | /* Not defined */
|
3266 | 4a057712 | j_mayer | if (loglevel != 0) { |
3267 | f24e5695 | bellard | fprintf(logfile, "Trying to write invalid spr %d %03x\n",
|
3268 | f24e5695 | bellard | sprn, sprn); |
3269 | f24e5695 | bellard | } |
3270 | 3fc6c082 | bellard | printf("Trying to write invalid spr %d %03x\n", sprn, sprn);
|
3271 | 3fc6c082 | bellard | RET_EXCP(ctx, EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_SPR); |
3272 | 79aceca5 | bellard | } |
3273 | 79aceca5 | bellard | } |
3274 | 79aceca5 | bellard | |
3275 | 79aceca5 | bellard | /*** Cache management ***/
|
3276 | 79aceca5 | bellard | /* For now, all those will be implemented as nop:
|
3277 | 79aceca5 | bellard | * this is valid, regarding the PowerPC specs...
|
3278 | 9a64fbe4 | bellard | * We just have to flush tb while invalidating instruction cache lines...
|
3279 | 79aceca5 | bellard | */
|
3280 | 79aceca5 | bellard | /* dcbf */
|
3281 | 9a64fbe4 | bellard | GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03E00001, PPC_CACHE) |
3282 | 79aceca5 | bellard | { |
3283 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3284 | a541f297 | bellard | op_ldst(lbz); |
3285 | 79aceca5 | bellard | } |
3286 | 79aceca5 | bellard | |
3287 | 79aceca5 | bellard | /* dcbi (Supervisor only) */
|
3288 | 9a64fbe4 | bellard | GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE) |
3289 | 79aceca5 | bellard | { |
3290 | a541f297 | bellard | #if defined(CONFIG_USER_ONLY)
|
3291 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3292 | a541f297 | bellard | #else
|
3293 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3294 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3295 | 9fddaa0c | bellard | return;
|
3296 | 9a64fbe4 | bellard | } |
3297 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3298 | 76a66253 | j_mayer | /* XXX: specification says this should be treated as a store by the MMU */
|
3299 | 76a66253 | j_mayer | //op_ldst(lbz);
|
3300 | a541f297 | bellard | op_ldst(stb); |
3301 | a541f297 | bellard | #endif
|
3302 | 79aceca5 | bellard | } |
3303 | 79aceca5 | bellard | |
3304 | 79aceca5 | bellard | /* dcdst */
|
3305 | 9a64fbe4 | bellard | GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE) |
3306 | 79aceca5 | bellard | { |
3307 | 76a66253 | j_mayer | /* XXX: specification say this is treated as a load by the MMU */
|
3308 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3309 | a541f297 | bellard | op_ldst(lbz); |
3310 | 79aceca5 | bellard | } |
3311 | 79aceca5 | bellard | |
3312 | 79aceca5 | bellard | /* dcbt */
|
3313 | 9a64fbe4 | bellard | GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x03E00001, PPC_CACHE) |
3314 | 79aceca5 | bellard | { |
3315 | 76a66253 | j_mayer | /* XXX: specification say this is treated as a load by the MMU
|
3316 | 76a66253 | j_mayer | * but does not generate any exception
|
3317 | 76a66253 | j_mayer | */
|
3318 | 79aceca5 | bellard | } |
3319 | 79aceca5 | bellard | |
3320 | 79aceca5 | bellard | /* dcbtst */
|
3321 | 9a64fbe4 | bellard | GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x03E00001, PPC_CACHE) |
3322 | 79aceca5 | bellard | { |
3323 | 76a66253 | j_mayer | /* XXX: specification say this is treated as a load by the MMU
|
3324 | 76a66253 | j_mayer | * but does not generate any exception
|
3325 | 76a66253 | j_mayer | */
|
3326 | 79aceca5 | bellard | } |
3327 | 79aceca5 | bellard | |
3328 | 79aceca5 | bellard | /* dcbz */
|
3329 | 76a66253 | j_mayer | #define op_dcbz() (*gen_op_dcbz[ctx->mem_idx])()
|
3330 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
3331 | d9bce9d9 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3332 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_dcbz[] = {
|
3333 | d9bce9d9 | j_mayer | &gen_op_dcbz_raw, |
3334 | d9bce9d9 | j_mayer | &gen_op_dcbz_raw, |
3335 | d9bce9d9 | j_mayer | &gen_op_dcbz_64_raw, |
3336 | d9bce9d9 | j_mayer | &gen_op_dcbz_64_raw, |
3337 | d9bce9d9 | j_mayer | }; |
3338 | d9bce9d9 | j_mayer | #else
|
3339 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_dcbz[] = {
|
3340 | d9bce9d9 | j_mayer | &gen_op_dcbz_user, |
3341 | d9bce9d9 | j_mayer | &gen_op_dcbz_user, |
3342 | d9bce9d9 | j_mayer | &gen_op_dcbz_kernel, |
3343 | d9bce9d9 | j_mayer | &gen_op_dcbz_kernel, |
3344 | d9bce9d9 | j_mayer | &gen_op_dcbz_64_user, |
3345 | d9bce9d9 | j_mayer | &gen_op_dcbz_64_user, |
3346 | d9bce9d9 | j_mayer | &gen_op_dcbz_64_kernel, |
3347 | d9bce9d9 | j_mayer | &gen_op_dcbz_64_kernel, |
3348 | d9bce9d9 | j_mayer | }; |
3349 | d9bce9d9 | j_mayer | #endif
|
3350 | d9bce9d9 | j_mayer | #else
|
3351 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3352 | 76a66253 | j_mayer | static GenOpFunc *gen_op_dcbz[] = {
|
3353 | 76a66253 | j_mayer | &gen_op_dcbz_raw, |
3354 | 76a66253 | j_mayer | &gen_op_dcbz_raw, |
3355 | 76a66253 | j_mayer | }; |
3356 | 9a64fbe4 | bellard | #else
|
3357 | 9a64fbe4 | bellard | static GenOpFunc *gen_op_dcbz[] = {
|
3358 | 9a64fbe4 | bellard | &gen_op_dcbz_user, |
3359 | 2d5262f9 | bellard | &gen_op_dcbz_user, |
3360 | 2d5262f9 | bellard | &gen_op_dcbz_kernel, |
3361 | 9a64fbe4 | bellard | &gen_op_dcbz_kernel, |
3362 | 9a64fbe4 | bellard | }; |
3363 | 9a64fbe4 | bellard | #endif
|
3364 | d9bce9d9 | j_mayer | #endif
|
3365 | 9a64fbe4 | bellard | |
3366 | 9a64fbe4 | bellard | GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03E00001, PPC_CACHE) |
3367 | 79aceca5 | bellard | { |
3368 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3369 | 9a64fbe4 | bellard | op_dcbz(); |
3370 | 4b3686fa | bellard | gen_op_check_reservation(); |
3371 | 79aceca5 | bellard | } |
3372 | 79aceca5 | bellard | |
3373 | 79aceca5 | bellard | /* icbi */
|
3374 | 36f69651 | j_mayer | #define op_icbi() (*gen_op_icbi[ctx->mem_idx])()
|
3375 | 36f69651 | j_mayer | #if defined(TARGET_PPC64)
|
3376 | 36f69651 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3377 | 36f69651 | j_mayer | static GenOpFunc *gen_op_icbi[] = {
|
3378 | 36f69651 | j_mayer | &gen_op_icbi_raw, |
3379 | 36f69651 | j_mayer | &gen_op_icbi_raw, |
3380 | 36f69651 | j_mayer | &gen_op_icbi_64_raw, |
3381 | 36f69651 | j_mayer | &gen_op_icbi_64_raw, |
3382 | 36f69651 | j_mayer | }; |
3383 | 36f69651 | j_mayer | #else
|
3384 | 36f69651 | j_mayer | static GenOpFunc *gen_op_icbi[] = {
|
3385 | 36f69651 | j_mayer | &gen_op_icbi_user, |
3386 | 36f69651 | j_mayer | &gen_op_icbi_user, |
3387 | 36f69651 | j_mayer | &gen_op_icbi_kernel, |
3388 | 36f69651 | j_mayer | &gen_op_icbi_kernel, |
3389 | 36f69651 | j_mayer | &gen_op_icbi_64_user, |
3390 | 36f69651 | j_mayer | &gen_op_icbi_64_user, |
3391 | 36f69651 | j_mayer | &gen_op_icbi_64_kernel, |
3392 | 36f69651 | j_mayer | &gen_op_icbi_64_kernel, |
3393 | 36f69651 | j_mayer | }; |
3394 | 36f69651 | j_mayer | #endif
|
3395 | 36f69651 | j_mayer | #else
|
3396 | 36f69651 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3397 | 36f69651 | j_mayer | static GenOpFunc *gen_op_icbi[] = {
|
3398 | 36f69651 | j_mayer | &gen_op_icbi_raw, |
3399 | 36f69651 | j_mayer | &gen_op_icbi_raw, |
3400 | 36f69651 | j_mayer | }; |
3401 | 36f69651 | j_mayer | #else
|
3402 | 36f69651 | j_mayer | static GenOpFunc *gen_op_icbi[] = {
|
3403 | 36f69651 | j_mayer | &gen_op_icbi_user, |
3404 | 36f69651 | j_mayer | &gen_op_icbi_user, |
3405 | 36f69651 | j_mayer | &gen_op_icbi_kernel, |
3406 | 36f69651 | j_mayer | &gen_op_icbi_kernel, |
3407 | 36f69651 | j_mayer | }; |
3408 | 36f69651 | j_mayer | #endif
|
3409 | 36f69651 | j_mayer | #endif
|
3410 | 9a64fbe4 | bellard | GEN_HANDLER(icbi, 0x1F, 0x16, 0x1E, 0x03E00001, PPC_CACHE) |
3411 | 79aceca5 | bellard | { |
3412 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
3413 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
3414 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3415 | 36f69651 | j_mayer | op_icbi(); |
3416 | 76a66253 | j_mayer | RET_STOP(ctx); |
3417 | 79aceca5 | bellard | } |
3418 | 79aceca5 | bellard | |
3419 | 79aceca5 | bellard | /* Optional: */
|
3420 | 79aceca5 | bellard | /* dcba */
|
3421 | a750fc0b | j_mayer | GEN_HANDLER(dcba, 0x1F, 0x16, 0x17, 0x03E00001, PPC_CACHE_DCBA) |
3422 | 79aceca5 | bellard | { |
3423 | 79aceca5 | bellard | } |
3424 | 79aceca5 | bellard | |
3425 | 79aceca5 | bellard | /*** Segment register manipulation ***/
|
3426 | 79aceca5 | bellard | /* Supervisor only: */
|
3427 | 79aceca5 | bellard | /* mfsr */
|
3428 | 79aceca5 | bellard | GEN_HANDLER(mfsr, 0x1F, 0x13, 0x12, 0x0010F801, PPC_SEGMENT) |
3429 | 79aceca5 | bellard | { |
3430 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3431 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3432 | 9a64fbe4 | bellard | #else
|
3433 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3434 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3435 | 9fddaa0c | bellard | return;
|
3436 | 9a64fbe4 | bellard | } |
3437 | 76a66253 | j_mayer | gen_op_set_T1(SR(ctx->opcode)); |
3438 | 76a66253 | j_mayer | gen_op_load_sr(); |
3439 | 9a64fbe4 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3440 | 9a64fbe4 | bellard | #endif
|
3441 | 79aceca5 | bellard | } |
3442 | 79aceca5 | bellard | |
3443 | 79aceca5 | bellard | /* mfsrin */
|
3444 | 9a64fbe4 | bellard | GEN_HANDLER(mfsrin, 0x1F, 0x13, 0x14, 0x001F0001, PPC_SEGMENT) |
3445 | 79aceca5 | bellard | { |
3446 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3447 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3448 | 9a64fbe4 | bellard | #else
|
3449 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3450 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3451 | 9fddaa0c | bellard | return;
|
3452 | 9a64fbe4 | bellard | } |
3453 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3454 | 76a66253 | j_mayer | gen_op_srli_T1(28);
|
3455 | 76a66253 | j_mayer | gen_op_load_sr(); |
3456 | 9a64fbe4 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3457 | 9a64fbe4 | bellard | #endif
|
3458 | 79aceca5 | bellard | } |
3459 | 79aceca5 | bellard | |
3460 | 79aceca5 | bellard | /* mtsr */
|
3461 | e63c59cb | bellard | GEN_HANDLER(mtsr, 0x1F, 0x12, 0x06, 0x0010F801, PPC_SEGMENT) |
3462 | 79aceca5 | bellard | { |
3463 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3464 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3465 | 9a64fbe4 | bellard | #else
|
3466 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3467 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3468 | 9fddaa0c | bellard | return;
|
3469 | 9a64fbe4 | bellard | } |
3470 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3471 | 76a66253 | j_mayer | gen_op_set_T1(SR(ctx->opcode)); |
3472 | 76a66253 | j_mayer | gen_op_store_sr(); |
3473 | f24e5695 | bellard | RET_STOP(ctx); |
3474 | 9a64fbe4 | bellard | #endif
|
3475 | 79aceca5 | bellard | } |
3476 | 79aceca5 | bellard | |
3477 | 79aceca5 | bellard | /* mtsrin */
|
3478 | 9a64fbe4 | bellard | GEN_HANDLER(mtsrin, 0x1F, 0x12, 0x07, 0x001F0001, PPC_SEGMENT) |
3479 | 79aceca5 | bellard | { |
3480 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3481 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3482 | 9a64fbe4 | bellard | #else
|
3483 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3484 | 9fddaa0c | bellard | RET_PRIVREG(ctx); |
3485 | 9fddaa0c | bellard | return;
|
3486 | 9a64fbe4 | bellard | } |
3487 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3488 | 9a64fbe4 | bellard | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3489 | 76a66253 | j_mayer | gen_op_srli_T1(28);
|
3490 | 76a66253 | j_mayer | gen_op_store_sr(); |
3491 | f24e5695 | bellard | RET_STOP(ctx); |
3492 | 9a64fbe4 | bellard | #endif
|
3493 | 79aceca5 | bellard | } |
3494 | 79aceca5 | bellard | |
3495 | 79aceca5 | bellard | /*** Lookaside buffer management ***/
|
3496 | 79aceca5 | bellard | /* Optional & supervisor only: */
|
3497 | 79aceca5 | bellard | /* tlbia */
|
3498 | 3fc6c082 | bellard | GEN_HANDLER(tlbia, 0x1F, 0x12, 0x0B, 0x03FFFC01, PPC_MEM_TLBIA) |
3499 | 79aceca5 | bellard | { |
3500 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3501 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3502 | 9a64fbe4 | bellard | #else
|
3503 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3504 | 4a057712 | j_mayer | if (loglevel != 0) |
3505 | 9fddaa0c | bellard | fprintf(logfile, "%s: ! supervisor\n", __func__);
|
3506 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3507 | 9fddaa0c | bellard | return;
|
3508 | 9a64fbe4 | bellard | } |
3509 | 9a64fbe4 | bellard | gen_op_tlbia(); |
3510 | f24e5695 | bellard | RET_STOP(ctx); |
3511 | 9a64fbe4 | bellard | #endif
|
3512 | 79aceca5 | bellard | } |
3513 | 79aceca5 | bellard | |
3514 | 79aceca5 | bellard | /* tlbie */
|
3515 | 76a66253 | j_mayer | GEN_HANDLER(tlbie, 0x1F, 0x12, 0x09, 0x03FF0001, PPC_MEM_TLBIE) |
3516 | 79aceca5 | bellard | { |
3517 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3518 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3519 | 9a64fbe4 | bellard | #else
|
3520 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3521 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3522 | 9fddaa0c | bellard | return;
|
3523 | 9a64fbe4 | bellard | } |
3524 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rB(ctx->opcode)); |
3525 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
3526 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
3527 | d9bce9d9 | j_mayer | gen_op_tlbie_64(); |
3528 | d9bce9d9 | j_mayer | else
|
3529 | d9bce9d9 | j_mayer | #endif
|
3530 | d9bce9d9 | j_mayer | gen_op_tlbie(); |
3531 | f24e5695 | bellard | RET_STOP(ctx); |
3532 | 9a64fbe4 | bellard | #endif
|
3533 | 79aceca5 | bellard | } |
3534 | 79aceca5 | bellard | |
3535 | 79aceca5 | bellard | /* tlbsync */
|
3536 | 76a66253 | j_mayer | GEN_HANDLER(tlbsync, 0x1F, 0x16, 0x11, 0x03FFF801, PPC_MEM_TLBSYNC) |
3537 | 79aceca5 | bellard | { |
3538 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
3539 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3540 | 9a64fbe4 | bellard | #else
|
3541 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3542 | 9fddaa0c | bellard | RET_PRIVOPC(ctx); |
3543 | 9fddaa0c | bellard | return;
|
3544 | 9a64fbe4 | bellard | } |
3545 | 9a64fbe4 | bellard | /* This has no effect: it should ensure that all previous
|
3546 | 9a64fbe4 | bellard | * tlbie have completed
|
3547 | 9a64fbe4 | bellard | */
|
3548 | f24e5695 | bellard | RET_STOP(ctx); |
3549 | 9a64fbe4 | bellard | #endif
|
3550 | 79aceca5 | bellard | } |
3551 | 79aceca5 | bellard | |
3552 | 426613db | j_mayer | #if defined(TARGET_PPC64)
|
3553 | 426613db | j_mayer | /* slbia */
|
3554 | 426613db | j_mayer | GEN_HANDLER(slbia, 0x1F, 0x12, 0x0F, 0x03FFFC01, PPC_SLBI) |
3555 | 426613db | j_mayer | { |
3556 | 426613db | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3557 | 426613db | j_mayer | RET_PRIVOPC(ctx); |
3558 | 426613db | j_mayer | #else
|
3559 | 426613db | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3560 | 4a057712 | j_mayer | if (loglevel != 0) |
3561 | 426613db | j_mayer | fprintf(logfile, "%s: ! supervisor\n", __func__);
|
3562 | 426613db | j_mayer | RET_PRIVOPC(ctx); |
3563 | 426613db | j_mayer | return;
|
3564 | 426613db | j_mayer | } |
3565 | 426613db | j_mayer | gen_op_slbia(); |
3566 | 426613db | j_mayer | RET_STOP(ctx); |
3567 | 426613db | j_mayer | #endif
|
3568 | 426613db | j_mayer | } |
3569 | 426613db | j_mayer | |
3570 | 426613db | j_mayer | /* slbie */
|
3571 | 426613db | j_mayer | GEN_HANDLER(slbie, 0x1F, 0x12, 0x0D, 0x03FF0001, PPC_SLBI) |
3572 | 426613db | j_mayer | { |
3573 | 426613db | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3574 | 426613db | j_mayer | RET_PRIVOPC(ctx); |
3575 | 426613db | j_mayer | #else
|
3576 | 426613db | j_mayer | if (unlikely(!ctx->supervisor)) {
|
3577 | 426613db | j_mayer | RET_PRIVOPC(ctx); |
3578 | 426613db | j_mayer | return;
|
3579 | 426613db | j_mayer | } |
3580 | 426613db | j_mayer | gen_op_load_gpr_T0(rB(ctx->opcode)); |
3581 | 426613db | j_mayer | gen_op_slbie(); |
3582 | 426613db | j_mayer | RET_STOP(ctx); |
3583 | 426613db | j_mayer | #endif
|
3584 | 426613db | j_mayer | } |
3585 | 426613db | j_mayer | #endif
|
3586 | 426613db | j_mayer | |
3587 | 79aceca5 | bellard | /*** External control ***/
|
3588 | 79aceca5 | bellard | /* Optional: */
|
3589 | 9a64fbe4 | bellard | #define op_eciwx() (*gen_op_eciwx[ctx->mem_idx])()
|
3590 | 9a64fbe4 | bellard | #define op_ecowx() (*gen_op_ecowx[ctx->mem_idx])()
|
3591 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
3592 | 111bfab3 | bellard | #if defined(CONFIG_USER_ONLY)
|
3593 | 111bfab3 | bellard | static GenOpFunc *gen_op_eciwx[] = {
|
3594 | 111bfab3 | bellard | &gen_op_eciwx_raw, |
3595 | 111bfab3 | bellard | &gen_op_eciwx_le_raw, |
3596 | d9bce9d9 | j_mayer | &gen_op_eciwx_64_raw, |
3597 | d9bce9d9 | j_mayer | &gen_op_eciwx_le_64_raw, |
3598 | 111bfab3 | bellard | }; |
3599 | 111bfab3 | bellard | static GenOpFunc *gen_op_ecowx[] = {
|
3600 | 111bfab3 | bellard | &gen_op_ecowx_raw, |
3601 | 111bfab3 | bellard | &gen_op_ecowx_le_raw, |
3602 | d9bce9d9 | j_mayer | &gen_op_ecowx_64_raw, |
3603 | d9bce9d9 | j_mayer | &gen_op_ecowx_le_64_raw, |
3604 | 111bfab3 | bellard | }; |
3605 | 111bfab3 | bellard | #else
|
3606 | 9a64fbe4 | bellard | static GenOpFunc *gen_op_eciwx[] = {
|
3607 | 9a64fbe4 | bellard | &gen_op_eciwx_user, |
3608 | 111bfab3 | bellard | &gen_op_eciwx_le_user, |
3609 | 9a64fbe4 | bellard | &gen_op_eciwx_kernel, |
3610 | 111bfab3 | bellard | &gen_op_eciwx_le_kernel, |
3611 | d9bce9d9 | j_mayer | &gen_op_eciwx_64_user, |
3612 | d9bce9d9 | j_mayer | &gen_op_eciwx_le_64_user, |
3613 | d9bce9d9 | j_mayer | &gen_op_eciwx_64_kernel, |
3614 | d9bce9d9 | j_mayer | &gen_op_eciwx_le_64_kernel, |
3615 | 9a64fbe4 | bellard | }; |
3616 | 9a64fbe4 | bellard | static GenOpFunc *gen_op_ecowx[] = {
|
3617 | 9a64fbe4 | bellard | &gen_op_ecowx_user, |
3618 | 111bfab3 | bellard | &gen_op_ecowx_le_user, |
3619 | 9a64fbe4 | bellard | &gen_op_ecowx_kernel, |
3620 | 111bfab3 | bellard | &gen_op_ecowx_le_kernel, |
3621 | d9bce9d9 | j_mayer | &gen_op_ecowx_64_user, |
3622 | d9bce9d9 | j_mayer | &gen_op_ecowx_le_64_user, |
3623 | d9bce9d9 | j_mayer | &gen_op_ecowx_64_kernel, |
3624 | d9bce9d9 | j_mayer | &gen_op_ecowx_le_64_kernel, |
3625 | 9a64fbe4 | bellard | }; |
3626 | 9a64fbe4 | bellard | #endif
|
3627 | d9bce9d9 | j_mayer | #else
|
3628 | d9bce9d9 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3629 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_eciwx[] = {
|
3630 | d9bce9d9 | j_mayer | &gen_op_eciwx_raw, |
3631 | d9bce9d9 | j_mayer | &gen_op_eciwx_le_raw, |
3632 | d9bce9d9 | j_mayer | }; |
3633 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_ecowx[] = {
|
3634 | d9bce9d9 | j_mayer | &gen_op_ecowx_raw, |
3635 | d9bce9d9 | j_mayer | &gen_op_ecowx_le_raw, |
3636 | d9bce9d9 | j_mayer | }; |
3637 | d9bce9d9 | j_mayer | #else
|
3638 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_eciwx[] = {
|
3639 | d9bce9d9 | j_mayer | &gen_op_eciwx_user, |
3640 | d9bce9d9 | j_mayer | &gen_op_eciwx_le_user, |
3641 | d9bce9d9 | j_mayer | &gen_op_eciwx_kernel, |
3642 | d9bce9d9 | j_mayer | &gen_op_eciwx_le_kernel, |
3643 | d9bce9d9 | j_mayer | }; |
3644 | d9bce9d9 | j_mayer | static GenOpFunc *gen_op_ecowx[] = {
|
3645 | d9bce9d9 | j_mayer | &gen_op_ecowx_user, |
3646 | d9bce9d9 | j_mayer | &gen_op_ecowx_le_user, |
3647 | d9bce9d9 | j_mayer | &gen_op_ecowx_kernel, |
3648 | d9bce9d9 | j_mayer | &gen_op_ecowx_le_kernel, |
3649 | d9bce9d9 | j_mayer | }; |
3650 | d9bce9d9 | j_mayer | #endif
|
3651 | d9bce9d9 | j_mayer | #endif
|
3652 | 9a64fbe4 | bellard | |
3653 | 111bfab3 | bellard | /* eciwx */
|
3654 | 79aceca5 | bellard | GEN_HANDLER(eciwx, 0x1F, 0x16, 0x0D, 0x00000001, PPC_EXTERN) |
3655 | 79aceca5 | bellard | { |
3656 | 9a64fbe4 | bellard | /* Should check EAR[E] & alignment ! */
|
3657 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3658 | 76a66253 | j_mayer | op_eciwx(); |
3659 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3660 | 76a66253 | j_mayer | } |
3661 | 76a66253 | j_mayer | |
3662 | 76a66253 | j_mayer | /* ecowx */
|
3663 | 76a66253 | j_mayer | GEN_HANDLER(ecowx, 0x1F, 0x16, 0x09, 0x00000001, PPC_EXTERN) |
3664 | 76a66253 | j_mayer | { |
3665 | 76a66253 | j_mayer | /* Should check EAR[E] & alignment ! */
|
3666 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3667 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
3668 | 76a66253 | j_mayer | op_ecowx(); |
3669 | 76a66253 | j_mayer | } |
3670 | 76a66253 | j_mayer | |
3671 | 76a66253 | j_mayer | /* PowerPC 601 specific instructions */
|
3672 | 76a66253 | j_mayer | /* abs - abs. */
|
3673 | 76a66253 | j_mayer | GEN_HANDLER(abs, 0x1F, 0x08, 0x0B, 0x0000F800, PPC_POWER_BR) |
3674 | 76a66253 | j_mayer | { |
3675 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3676 | 76a66253 | j_mayer | gen_op_POWER_abs(); |
3677 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3678 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3679 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3680 | 76a66253 | j_mayer | } |
3681 | 76a66253 | j_mayer | |
3682 | 76a66253 | j_mayer | /* abso - abso. */
|
3683 | 76a66253 | j_mayer | GEN_HANDLER(abso, 0x1F, 0x08, 0x1B, 0x0000F800, PPC_POWER_BR) |
3684 | 76a66253 | j_mayer | { |
3685 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3686 | 76a66253 | j_mayer | gen_op_POWER_abso(); |
3687 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3688 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3689 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3690 | 76a66253 | j_mayer | } |
3691 | 76a66253 | j_mayer | |
3692 | 76a66253 | j_mayer | /* clcs */
|
3693 | a750fc0b | j_mayer | GEN_HANDLER(clcs, 0x1F, 0x10, 0x13, 0x0000F800, PPC_POWER_BR) |
3694 | 76a66253 | j_mayer | { |
3695 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3696 | 76a66253 | j_mayer | gen_op_POWER_clcs(); |
3697 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3698 | 76a66253 | j_mayer | } |
3699 | 76a66253 | j_mayer | |
3700 | 76a66253 | j_mayer | /* div - div. */
|
3701 | 76a66253 | j_mayer | GEN_HANDLER(div, 0x1F, 0x0B, 0x0A, 0x00000000, PPC_POWER_BR) |
3702 | 76a66253 | j_mayer | { |
3703 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3704 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3705 | 76a66253 | j_mayer | gen_op_POWER_div(); |
3706 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3707 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3708 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3709 | 76a66253 | j_mayer | } |
3710 | 76a66253 | j_mayer | |
3711 | 76a66253 | j_mayer | /* divo - divo. */
|
3712 | 76a66253 | j_mayer | GEN_HANDLER(divo, 0x1F, 0x0B, 0x1A, 0x00000000, PPC_POWER_BR) |
3713 | 76a66253 | j_mayer | { |
3714 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3715 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3716 | 76a66253 | j_mayer | gen_op_POWER_divo(); |
3717 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3718 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3719 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3720 | 76a66253 | j_mayer | } |
3721 | 76a66253 | j_mayer | |
3722 | 76a66253 | j_mayer | /* divs - divs. */
|
3723 | 76a66253 | j_mayer | GEN_HANDLER(divs, 0x1F, 0x0B, 0x0B, 0x00000000, PPC_POWER_BR) |
3724 | 76a66253 | j_mayer | { |
3725 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3726 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3727 | 76a66253 | j_mayer | gen_op_POWER_divs(); |
3728 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3729 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3730 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3731 | 76a66253 | j_mayer | } |
3732 | 76a66253 | j_mayer | |
3733 | 76a66253 | j_mayer | /* divso - divso. */
|
3734 | 76a66253 | j_mayer | GEN_HANDLER(divso, 0x1F, 0x0B, 0x1B, 0x00000000, PPC_POWER_BR) |
3735 | 76a66253 | j_mayer | { |
3736 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3737 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3738 | 76a66253 | j_mayer | gen_op_POWER_divso(); |
3739 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3740 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3741 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3742 | 76a66253 | j_mayer | } |
3743 | 76a66253 | j_mayer | |
3744 | 76a66253 | j_mayer | /* doz - doz. */
|
3745 | 76a66253 | j_mayer | GEN_HANDLER(doz, 0x1F, 0x08, 0x08, 0x00000000, PPC_POWER_BR) |
3746 | 76a66253 | j_mayer | { |
3747 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3748 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3749 | 76a66253 | j_mayer | gen_op_POWER_doz(); |
3750 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3751 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3752 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3753 | 76a66253 | j_mayer | } |
3754 | 76a66253 | j_mayer | |
3755 | 76a66253 | j_mayer | /* dozo - dozo. */
|
3756 | 76a66253 | j_mayer | GEN_HANDLER(dozo, 0x1F, 0x08, 0x18, 0x00000000, PPC_POWER_BR) |
3757 | 76a66253 | j_mayer | { |
3758 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3759 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3760 | 76a66253 | j_mayer | gen_op_POWER_dozo(); |
3761 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3762 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3763 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3764 | 76a66253 | j_mayer | } |
3765 | 76a66253 | j_mayer | |
3766 | 76a66253 | j_mayer | /* dozi */
|
3767 | 76a66253 | j_mayer | GEN_HANDLER(dozi, 0x09, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) |
3768 | 76a66253 | j_mayer | { |
3769 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3770 | 76a66253 | j_mayer | gen_op_set_T1(SIMM(ctx->opcode)); |
3771 | 76a66253 | j_mayer | gen_op_POWER_doz(); |
3772 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3773 | 76a66253 | j_mayer | } |
3774 | 76a66253 | j_mayer | |
3775 | 76a66253 | j_mayer | /* As lscbx load from memory byte after byte, it's always endian safe */
|
3776 | 76a66253 | j_mayer | #define op_POWER_lscbx(start, ra, rb) \
|
3777 | 76a66253 | j_mayer | (*gen_op_POWER_lscbx[ctx->mem_idx])(start, ra, rb) |
3778 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
3779 | 76a66253 | j_mayer | static GenOpFunc3 *gen_op_POWER_lscbx[] = {
|
3780 | 76a66253 | j_mayer | &gen_op_POWER_lscbx_raw, |
3781 | 76a66253 | j_mayer | &gen_op_POWER_lscbx_raw, |
3782 | 76a66253 | j_mayer | }; |
3783 | 76a66253 | j_mayer | #else
|
3784 | 76a66253 | j_mayer | static GenOpFunc3 *gen_op_POWER_lscbx[] = {
|
3785 | 76a66253 | j_mayer | &gen_op_POWER_lscbx_user, |
3786 | 76a66253 | j_mayer | &gen_op_POWER_lscbx_user, |
3787 | 76a66253 | j_mayer | &gen_op_POWER_lscbx_kernel, |
3788 | 76a66253 | j_mayer | &gen_op_POWER_lscbx_kernel, |
3789 | 76a66253 | j_mayer | }; |
3790 | 76a66253 | j_mayer | #endif
|
3791 | 76a66253 | j_mayer | |
3792 | 76a66253 | j_mayer | /* lscbx - lscbx. */
|
3793 | 76a66253 | j_mayer | GEN_HANDLER(lscbx, 0x1F, 0x15, 0x08, 0x00000000, PPC_POWER_BR) |
3794 | 76a66253 | j_mayer | { |
3795 | 76a66253 | j_mayer | int ra = rA(ctx->opcode);
|
3796 | 76a66253 | j_mayer | int rb = rB(ctx->opcode);
|
3797 | 76a66253 | j_mayer | |
3798 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
3799 | 76a66253 | j_mayer | if (ra == 0) { |
3800 | 76a66253 | j_mayer | ra = rb; |
3801 | 76a66253 | j_mayer | } |
3802 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
3803 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
3804 | 76a66253 | j_mayer | gen_op_load_xer_bc(); |
3805 | 76a66253 | j_mayer | gen_op_load_xer_cmp(); |
3806 | 76a66253 | j_mayer | op_POWER_lscbx(rD(ctx->opcode), ra, rb); |
3807 | 76a66253 | j_mayer | gen_op_store_xer_bc(); |
3808 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3809 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3810 | 76a66253 | j_mayer | } |
3811 | 76a66253 | j_mayer | |
3812 | 76a66253 | j_mayer | /* maskg - maskg. */
|
3813 | 76a66253 | j_mayer | GEN_HANDLER(maskg, 0x1F, 0x1D, 0x00, 0x00000000, PPC_POWER_BR) |
3814 | 76a66253 | j_mayer | { |
3815 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3816 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3817 | 76a66253 | j_mayer | gen_op_POWER_maskg(); |
3818 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3819 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3820 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3821 | 76a66253 | j_mayer | } |
3822 | 76a66253 | j_mayer | |
3823 | 76a66253 | j_mayer | /* maskir - maskir. */
|
3824 | 76a66253 | j_mayer | GEN_HANDLER(maskir, 0x1F, 0x1D, 0x10, 0x00000000, PPC_POWER_BR) |
3825 | 76a66253 | j_mayer | { |
3826 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3827 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
3828 | 76a66253 | j_mayer | gen_op_load_gpr_T2(rB(ctx->opcode)); |
3829 | 76a66253 | j_mayer | gen_op_POWER_maskir(); |
3830 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3831 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3832 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3833 | 76a66253 | j_mayer | } |
3834 | 76a66253 | j_mayer | |
3835 | 76a66253 | j_mayer | /* mul - mul. */
|
3836 | 76a66253 | j_mayer | GEN_HANDLER(mul, 0x1F, 0x0B, 0x03, 0x00000000, PPC_POWER_BR) |
3837 | 76a66253 | j_mayer | { |
3838 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3839 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3840 | 76a66253 | j_mayer | gen_op_POWER_mul(); |
3841 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3842 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3843 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3844 | 76a66253 | j_mayer | } |
3845 | 76a66253 | j_mayer | |
3846 | 76a66253 | j_mayer | /* mulo - mulo. */
|
3847 | 76a66253 | j_mayer | GEN_HANDLER(mulo, 0x1F, 0x0B, 0x13, 0x00000000, PPC_POWER_BR) |
3848 | 76a66253 | j_mayer | { |
3849 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3850 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3851 | 76a66253 | j_mayer | gen_op_POWER_mulo(); |
3852 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3853 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3854 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3855 | 76a66253 | j_mayer | } |
3856 | 76a66253 | j_mayer | |
3857 | 76a66253 | j_mayer | /* nabs - nabs. */
|
3858 | 76a66253 | j_mayer | GEN_HANDLER(nabs, 0x1F, 0x08, 0x0F, 0x00000000, PPC_POWER_BR) |
3859 | 76a66253 | j_mayer | { |
3860 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3861 | 76a66253 | j_mayer | gen_op_POWER_nabs(); |
3862 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3863 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3864 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3865 | 76a66253 | j_mayer | } |
3866 | 76a66253 | j_mayer | |
3867 | 76a66253 | j_mayer | /* nabso - nabso. */
|
3868 | 76a66253 | j_mayer | GEN_HANDLER(nabso, 0x1F, 0x08, 0x1F, 0x00000000, PPC_POWER_BR) |
3869 | 76a66253 | j_mayer | { |
3870 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
3871 | 76a66253 | j_mayer | gen_op_POWER_nabso(); |
3872 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
3873 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3874 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3875 | 76a66253 | j_mayer | } |
3876 | 76a66253 | j_mayer | |
3877 | 76a66253 | j_mayer | /* rlmi - rlmi. */
|
3878 | 76a66253 | j_mayer | GEN_HANDLER(rlmi, 0x16, 0xFF, 0xFF, 0x00000000, PPC_POWER_BR) |
3879 | 76a66253 | j_mayer | { |
3880 | 76a66253 | j_mayer | uint32_t mb, me; |
3881 | 76a66253 | j_mayer | |
3882 | 76a66253 | j_mayer | mb = MB(ctx->opcode); |
3883 | 76a66253 | j_mayer | me = ME(ctx->opcode); |
3884 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3885 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rA(ctx->opcode)); |
3886 | 76a66253 | j_mayer | gen_op_load_gpr_T2(rB(ctx->opcode)); |
3887 | 76a66253 | j_mayer | gen_op_POWER_rlmi(MASK(mb, me), ~MASK(mb, me)); |
3888 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3889 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3890 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3891 | 76a66253 | j_mayer | } |
3892 | 76a66253 | j_mayer | |
3893 | 76a66253 | j_mayer | /* rrib - rrib. */
|
3894 | 76a66253 | j_mayer | GEN_HANDLER(rrib, 0x1F, 0x19, 0x10, 0x00000000, PPC_POWER_BR) |
3895 | 76a66253 | j_mayer | { |
3896 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3897 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rA(ctx->opcode)); |
3898 | 76a66253 | j_mayer | gen_op_load_gpr_T2(rB(ctx->opcode)); |
3899 | 76a66253 | j_mayer | gen_op_POWER_rrib(); |
3900 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3901 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3902 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3903 | 76a66253 | j_mayer | } |
3904 | 76a66253 | j_mayer | |
3905 | 76a66253 | j_mayer | /* sle - sle. */
|
3906 | 76a66253 | j_mayer | GEN_HANDLER(sle, 0x1F, 0x19, 0x04, 0x00000000, PPC_POWER_BR) |
3907 | 76a66253 | j_mayer | { |
3908 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3909 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3910 | 76a66253 | j_mayer | gen_op_POWER_sle(); |
3911 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3912 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3913 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3914 | 76a66253 | j_mayer | } |
3915 | 76a66253 | j_mayer | |
3916 | 76a66253 | j_mayer | /* sleq - sleq. */
|
3917 | 76a66253 | j_mayer | GEN_HANDLER(sleq, 0x1F, 0x19, 0x06, 0x00000000, PPC_POWER_BR) |
3918 | 76a66253 | j_mayer | { |
3919 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3920 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3921 | 76a66253 | j_mayer | gen_op_POWER_sleq(); |
3922 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3923 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3924 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3925 | 76a66253 | j_mayer | } |
3926 | 76a66253 | j_mayer | |
3927 | 76a66253 | j_mayer | /* sliq - sliq. */
|
3928 | 76a66253 | j_mayer | GEN_HANDLER(sliq, 0x1F, 0x18, 0x05, 0x00000000, PPC_POWER_BR) |
3929 | 76a66253 | j_mayer | { |
3930 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3931 | 76a66253 | j_mayer | gen_op_set_T1(SH(ctx->opcode)); |
3932 | 76a66253 | j_mayer | gen_op_POWER_sle(); |
3933 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3934 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3935 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3936 | 76a66253 | j_mayer | } |
3937 | 76a66253 | j_mayer | |
3938 | 76a66253 | j_mayer | /* slliq - slliq. */
|
3939 | 76a66253 | j_mayer | GEN_HANDLER(slliq, 0x1F, 0x18, 0x07, 0x00000000, PPC_POWER_BR) |
3940 | 76a66253 | j_mayer | { |
3941 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3942 | 76a66253 | j_mayer | gen_op_set_T1(SH(ctx->opcode)); |
3943 | 76a66253 | j_mayer | gen_op_POWER_sleq(); |
3944 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3945 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3946 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3947 | 76a66253 | j_mayer | } |
3948 | 76a66253 | j_mayer | |
3949 | 76a66253 | j_mayer | /* sllq - sllq. */
|
3950 | 76a66253 | j_mayer | GEN_HANDLER(sllq, 0x1F, 0x18, 0x06, 0x00000000, PPC_POWER_BR) |
3951 | 76a66253 | j_mayer | { |
3952 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3953 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3954 | 76a66253 | j_mayer | gen_op_POWER_sllq(); |
3955 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3956 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3957 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3958 | 76a66253 | j_mayer | } |
3959 | 76a66253 | j_mayer | |
3960 | 76a66253 | j_mayer | /* slq - slq. */
|
3961 | 76a66253 | j_mayer | GEN_HANDLER(slq, 0x1F, 0x18, 0x04, 0x00000000, PPC_POWER_BR) |
3962 | 76a66253 | j_mayer | { |
3963 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3964 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3965 | 76a66253 | j_mayer | gen_op_POWER_slq(); |
3966 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3967 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3968 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3969 | 76a66253 | j_mayer | } |
3970 | 76a66253 | j_mayer | |
3971 | d9bce9d9 | j_mayer | /* sraiq - sraiq. */
|
3972 | 76a66253 | j_mayer | GEN_HANDLER(sraiq, 0x1F, 0x18, 0x1D, 0x00000000, PPC_POWER_BR) |
3973 | 76a66253 | j_mayer | { |
3974 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3975 | 76a66253 | j_mayer | gen_op_set_T1(SH(ctx->opcode)); |
3976 | 76a66253 | j_mayer | gen_op_POWER_sraq(); |
3977 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3978 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3979 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3980 | 76a66253 | j_mayer | } |
3981 | 76a66253 | j_mayer | |
3982 | 76a66253 | j_mayer | /* sraq - sraq. */
|
3983 | 76a66253 | j_mayer | GEN_HANDLER(sraq, 0x1F, 0x18, 0x1C, 0x00000000, PPC_POWER_BR) |
3984 | 76a66253 | j_mayer | { |
3985 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3986 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3987 | 76a66253 | j_mayer | gen_op_POWER_sraq(); |
3988 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
3989 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
3990 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
3991 | 76a66253 | j_mayer | } |
3992 | 76a66253 | j_mayer | |
3993 | 76a66253 | j_mayer | /* sre - sre. */
|
3994 | 76a66253 | j_mayer | GEN_HANDLER(sre, 0x1F, 0x19, 0x14, 0x00000000, PPC_POWER_BR) |
3995 | 76a66253 | j_mayer | { |
3996 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
3997 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
3998 | 76a66253 | j_mayer | gen_op_POWER_sre(); |
3999 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4000 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4001 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4002 | 76a66253 | j_mayer | } |
4003 | 76a66253 | j_mayer | |
4004 | 76a66253 | j_mayer | /* srea - srea. */
|
4005 | 76a66253 | j_mayer | GEN_HANDLER(srea, 0x1F, 0x19, 0x1C, 0x00000000, PPC_POWER_BR) |
4006 | 76a66253 | j_mayer | { |
4007 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4008 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
4009 | 76a66253 | j_mayer | gen_op_POWER_srea(); |
4010 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4011 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4012 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4013 | 76a66253 | j_mayer | } |
4014 | 76a66253 | j_mayer | |
4015 | 76a66253 | j_mayer | /* sreq */
|
4016 | 76a66253 | j_mayer | GEN_HANDLER(sreq, 0x1F, 0x19, 0x16, 0x00000000, PPC_POWER_BR) |
4017 | 76a66253 | j_mayer | { |
4018 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4019 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
4020 | 76a66253 | j_mayer | gen_op_POWER_sreq(); |
4021 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4022 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4023 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4024 | 76a66253 | j_mayer | } |
4025 | 76a66253 | j_mayer | |
4026 | 76a66253 | j_mayer | /* sriq */
|
4027 | 76a66253 | j_mayer | GEN_HANDLER(sriq, 0x1F, 0x18, 0x15, 0x00000000, PPC_POWER_BR) |
4028 | 76a66253 | j_mayer | { |
4029 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4030 | 76a66253 | j_mayer | gen_op_set_T1(SH(ctx->opcode)); |
4031 | 76a66253 | j_mayer | gen_op_POWER_srq(); |
4032 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4033 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4034 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4035 | 76a66253 | j_mayer | } |
4036 | 76a66253 | j_mayer | |
4037 | 76a66253 | j_mayer | /* srliq */
|
4038 | 76a66253 | j_mayer | GEN_HANDLER(srliq, 0x1F, 0x18, 0x17, 0x00000000, PPC_POWER_BR) |
4039 | 76a66253 | j_mayer | { |
4040 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4041 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
4042 | 76a66253 | j_mayer | gen_op_set_T1(SH(ctx->opcode)); |
4043 | 76a66253 | j_mayer | gen_op_POWER_srlq(); |
4044 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4045 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4046 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4047 | 76a66253 | j_mayer | } |
4048 | 76a66253 | j_mayer | |
4049 | 76a66253 | j_mayer | /* srlq */
|
4050 | 76a66253 | j_mayer | GEN_HANDLER(srlq, 0x1F, 0x18, 0x16, 0x00000000, PPC_POWER_BR) |
4051 | 76a66253 | j_mayer | { |
4052 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4053 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
4054 | 76a66253 | j_mayer | gen_op_POWER_srlq(); |
4055 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4056 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4057 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4058 | 76a66253 | j_mayer | } |
4059 | 76a66253 | j_mayer | |
4060 | 76a66253 | j_mayer | /* srq */
|
4061 | 76a66253 | j_mayer | GEN_HANDLER(srq, 0x1F, 0x18, 0x14, 0x00000000, PPC_POWER_BR) |
4062 | 76a66253 | j_mayer | { |
4063 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4064 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
4065 | 76a66253 | j_mayer | gen_op_POWER_srq(); |
4066 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4067 | 76a66253 | j_mayer | if (unlikely(Rc(ctx->opcode) != 0)) |
4068 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4069 | 76a66253 | j_mayer | } |
4070 | 76a66253 | j_mayer | |
4071 | 76a66253 | j_mayer | /* PowerPC 602 specific instructions */
|
4072 | 76a66253 | j_mayer | /* dsa */
|
4073 | 76a66253 | j_mayer | GEN_HANDLER(dsa, 0x1F, 0x14, 0x13, 0x03FFF801, PPC_602_SPEC) |
4074 | 76a66253 | j_mayer | { |
4075 | 76a66253 | j_mayer | /* XXX: TODO */
|
4076 | 76a66253 | j_mayer | RET_INVAL(ctx); |
4077 | 76a66253 | j_mayer | } |
4078 | 76a66253 | j_mayer | |
4079 | 76a66253 | j_mayer | /* esa */
|
4080 | 76a66253 | j_mayer | GEN_HANDLER(esa, 0x1F, 0x14, 0x12, 0x03FFF801, PPC_602_SPEC) |
4081 | 76a66253 | j_mayer | { |
4082 | 76a66253 | j_mayer | /* XXX: TODO */
|
4083 | 76a66253 | j_mayer | RET_INVAL(ctx); |
4084 | 76a66253 | j_mayer | } |
4085 | 76a66253 | j_mayer | |
4086 | 76a66253 | j_mayer | /* mfrom */
|
4087 | 76a66253 | j_mayer | GEN_HANDLER(mfrom, 0x1F, 0x09, 0x08, 0x03E0F801, PPC_602_SPEC) |
4088 | 76a66253 | j_mayer | { |
4089 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4090 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4091 | 76a66253 | j_mayer | #else
|
4092 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4093 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4094 | 76a66253 | j_mayer | return;
|
4095 | 76a66253 | j_mayer | } |
4096 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4097 | 76a66253 | j_mayer | gen_op_602_mfrom(); |
4098 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4099 | 76a66253 | j_mayer | #endif
|
4100 | 76a66253 | j_mayer | } |
4101 | 76a66253 | j_mayer | |
4102 | 76a66253 | j_mayer | /* 602 - 603 - G2 TLB management */
|
4103 | 76a66253 | j_mayer | /* tlbld */
|
4104 | 76a66253 | j_mayer | GEN_HANDLER(tlbld, 0x1F, 0x12, 0x1E, 0x03FF0001, PPC_6xx_TLB) |
4105 | 76a66253 | j_mayer | { |
4106 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4107 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4108 | 76a66253 | j_mayer | #else
|
4109 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4110 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4111 | 76a66253 | j_mayer | return;
|
4112 | 76a66253 | j_mayer | } |
4113 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rB(ctx->opcode)); |
4114 | 76a66253 | j_mayer | gen_op_6xx_tlbld(); |
4115 | 76a66253 | j_mayer | RET_STOP(ctx); |
4116 | 76a66253 | j_mayer | #endif
|
4117 | 76a66253 | j_mayer | } |
4118 | 76a66253 | j_mayer | |
4119 | 76a66253 | j_mayer | /* tlbli */
|
4120 | 76a66253 | j_mayer | GEN_HANDLER(tlbli, 0x1F, 0x12, 0x1F, 0x03FF0001, PPC_6xx_TLB) |
4121 | 76a66253 | j_mayer | { |
4122 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4123 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4124 | 76a66253 | j_mayer | #else
|
4125 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4126 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4127 | 76a66253 | j_mayer | return;
|
4128 | 76a66253 | j_mayer | } |
4129 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rB(ctx->opcode)); |
4130 | 76a66253 | j_mayer | gen_op_6xx_tlbli(); |
4131 | 76a66253 | j_mayer | RET_STOP(ctx); |
4132 | 76a66253 | j_mayer | #endif
|
4133 | 76a66253 | j_mayer | } |
4134 | 76a66253 | j_mayer | |
4135 | 76a66253 | j_mayer | /* POWER instructions not in PowerPC 601 */
|
4136 | 76a66253 | j_mayer | /* clf */
|
4137 | 76a66253 | j_mayer | GEN_HANDLER(clf, 0x1F, 0x16, 0x03, 0x03E00000, PPC_POWER) |
4138 | 76a66253 | j_mayer | { |
4139 | 76a66253 | j_mayer | /* Cache line flush: implemented as no-op */
|
4140 | 76a66253 | j_mayer | } |
4141 | 76a66253 | j_mayer | |
4142 | 76a66253 | j_mayer | /* cli */
|
4143 | 76a66253 | j_mayer | GEN_HANDLER(cli, 0x1F, 0x16, 0x0F, 0x03E00000, PPC_POWER) |
4144 | 76a66253 | j_mayer | { |
4145 | 7f75ffd3 | blueswir1 | /* Cache line invalidate: privileged and treated as no-op */
|
4146 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4147 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4148 | 76a66253 | j_mayer | #else
|
4149 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4150 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4151 | 76a66253 | j_mayer | return;
|
4152 | 76a66253 | j_mayer | } |
4153 | 76a66253 | j_mayer | #endif
|
4154 | 76a66253 | j_mayer | } |
4155 | 76a66253 | j_mayer | |
4156 | 76a66253 | j_mayer | /* dclst */
|
4157 | 76a66253 | j_mayer | GEN_HANDLER(dclst, 0x1F, 0x16, 0x13, 0x03E00000, PPC_POWER) |
4158 | 76a66253 | j_mayer | { |
4159 | 76a66253 | j_mayer | /* Data cache line store: treated as no-op */
|
4160 | 76a66253 | j_mayer | } |
4161 | 76a66253 | j_mayer | |
4162 | 76a66253 | j_mayer | GEN_HANDLER(mfsri, 0x1F, 0x13, 0x13, 0x00000001, PPC_POWER) |
4163 | 76a66253 | j_mayer | { |
4164 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4165 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4166 | 76a66253 | j_mayer | #else
|
4167 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4168 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4169 | 76a66253 | j_mayer | return;
|
4170 | 76a66253 | j_mayer | } |
4171 | 76a66253 | j_mayer | int ra = rA(ctx->opcode);
|
4172 | 76a66253 | j_mayer | int rd = rD(ctx->opcode);
|
4173 | 76a66253 | j_mayer | |
4174 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4175 | 76a66253 | j_mayer | gen_op_POWER_mfsri(); |
4176 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rd); |
4177 | 76a66253 | j_mayer | if (ra != 0 && ra != rd) |
4178 | 76a66253 | j_mayer | gen_op_store_T1_gpr(ra); |
4179 | 76a66253 | j_mayer | #endif
|
4180 | 76a66253 | j_mayer | } |
4181 | 76a66253 | j_mayer | |
4182 | 76a66253 | j_mayer | GEN_HANDLER(rac, 0x1F, 0x12, 0x19, 0x00000001, PPC_POWER) |
4183 | 76a66253 | j_mayer | { |
4184 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4185 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4186 | 76a66253 | j_mayer | #else
|
4187 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4188 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4189 | 76a66253 | j_mayer | return;
|
4190 | 76a66253 | j_mayer | } |
4191 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4192 | 76a66253 | j_mayer | gen_op_POWER_rac(); |
4193 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4194 | 76a66253 | j_mayer | #endif
|
4195 | 76a66253 | j_mayer | } |
4196 | 76a66253 | j_mayer | |
4197 | 76a66253 | j_mayer | GEN_HANDLER(rfsvc, 0x13, 0x12, 0x02, 0x03FFF0001, PPC_POWER) |
4198 | 76a66253 | j_mayer | { |
4199 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4200 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4201 | 76a66253 | j_mayer | #else
|
4202 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4203 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4204 | 76a66253 | j_mayer | return;
|
4205 | 76a66253 | j_mayer | } |
4206 | 76a66253 | j_mayer | gen_op_POWER_rfsvc(); |
4207 | 76a66253 | j_mayer | RET_CHG_FLOW(ctx); |
4208 | 76a66253 | j_mayer | #endif
|
4209 | 76a66253 | j_mayer | } |
4210 | 76a66253 | j_mayer | |
4211 | 76a66253 | j_mayer | /* svc is not implemented for now */
|
4212 | 76a66253 | j_mayer | |
4213 | 76a66253 | j_mayer | /* POWER2 specific instructions */
|
4214 | 76a66253 | j_mayer | /* Quad manipulation (load/store two floats at a time) */
|
4215 | 76a66253 | j_mayer | #define op_POWER2_lfq() (*gen_op_POWER2_lfq[ctx->mem_idx])()
|
4216 | 76a66253 | j_mayer | #define op_POWER2_stfq() (*gen_op_POWER2_stfq[ctx->mem_idx])()
|
4217 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4218 | 76a66253 | j_mayer | static GenOpFunc *gen_op_POWER2_lfq[] = {
|
4219 | 76a66253 | j_mayer | &gen_op_POWER2_lfq_le_raw, |
4220 | 76a66253 | j_mayer | &gen_op_POWER2_lfq_raw, |
4221 | 76a66253 | j_mayer | }; |
4222 | 76a66253 | j_mayer | static GenOpFunc *gen_op_POWER2_stfq[] = {
|
4223 | 76a66253 | j_mayer | &gen_op_POWER2_stfq_le_raw, |
4224 | 76a66253 | j_mayer | &gen_op_POWER2_stfq_raw, |
4225 | 76a66253 | j_mayer | }; |
4226 | 76a66253 | j_mayer | #else
|
4227 | 76a66253 | j_mayer | static GenOpFunc *gen_op_POWER2_lfq[] = {
|
4228 | 76a66253 | j_mayer | &gen_op_POWER2_lfq_le_user, |
4229 | 76a66253 | j_mayer | &gen_op_POWER2_lfq_user, |
4230 | 76a66253 | j_mayer | &gen_op_POWER2_lfq_le_kernel, |
4231 | 76a66253 | j_mayer | &gen_op_POWER2_lfq_kernel, |
4232 | 76a66253 | j_mayer | }; |
4233 | 76a66253 | j_mayer | static GenOpFunc *gen_op_POWER2_stfq[] = {
|
4234 | 76a66253 | j_mayer | &gen_op_POWER2_stfq_le_user, |
4235 | 76a66253 | j_mayer | &gen_op_POWER2_stfq_user, |
4236 | 76a66253 | j_mayer | &gen_op_POWER2_stfq_le_kernel, |
4237 | 76a66253 | j_mayer | &gen_op_POWER2_stfq_kernel, |
4238 | 76a66253 | j_mayer | }; |
4239 | 76a66253 | j_mayer | #endif
|
4240 | 76a66253 | j_mayer | |
4241 | 76a66253 | j_mayer | /* lfq */
|
4242 | 76a66253 | j_mayer | GEN_HANDLER(lfq, 0x38, 0xFF, 0xFF, 0x00000003, PPC_POWER2) |
4243 | 76a66253 | j_mayer | { |
4244 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4245 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4246 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0);
|
4247 | 76a66253 | j_mayer | op_POWER2_lfq(); |
4248 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
4249 | 76a66253 | j_mayer | gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
|
4250 | 76a66253 | j_mayer | } |
4251 | 76a66253 | j_mayer | |
4252 | 76a66253 | j_mayer | /* lfqu */
|
4253 | 76a66253 | j_mayer | GEN_HANDLER(lfqu, 0x39, 0xFF, 0xFF, 0x00000003, PPC_POWER2) |
4254 | 76a66253 | j_mayer | { |
4255 | 76a66253 | j_mayer | int ra = rA(ctx->opcode);
|
4256 | 76a66253 | j_mayer | |
4257 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4258 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4259 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0);
|
4260 | 76a66253 | j_mayer | op_POWER2_lfq(); |
4261 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
4262 | 76a66253 | j_mayer | gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
|
4263 | 76a66253 | j_mayer | if (ra != 0) |
4264 | 76a66253 | j_mayer | gen_op_store_T0_gpr(ra); |
4265 | 76a66253 | j_mayer | } |
4266 | 76a66253 | j_mayer | |
4267 | 76a66253 | j_mayer | /* lfqux */
|
4268 | 76a66253 | j_mayer | GEN_HANDLER(lfqux, 0x1F, 0x17, 0x19, 0x00000001, PPC_POWER2) |
4269 | 76a66253 | j_mayer | { |
4270 | 76a66253 | j_mayer | int ra = rA(ctx->opcode);
|
4271 | 76a66253 | j_mayer | |
4272 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4273 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4274 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4275 | 76a66253 | j_mayer | op_POWER2_lfq(); |
4276 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
4277 | 76a66253 | j_mayer | gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
|
4278 | 76a66253 | j_mayer | if (ra != 0) |
4279 | 76a66253 | j_mayer | gen_op_store_T0_gpr(ra); |
4280 | 76a66253 | j_mayer | } |
4281 | 76a66253 | j_mayer | |
4282 | 76a66253 | j_mayer | /* lfqx */
|
4283 | 76a66253 | j_mayer | GEN_HANDLER(lfqx, 0x1F, 0x17, 0x18, 0x00000001, PPC_POWER2) |
4284 | 76a66253 | j_mayer | { |
4285 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4286 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4287 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4288 | 76a66253 | j_mayer | op_POWER2_lfq(); |
4289 | 76a66253 | j_mayer | gen_op_store_FT0_fpr(rD(ctx->opcode)); |
4290 | 76a66253 | j_mayer | gen_op_store_FT1_fpr(rD(ctx->opcode) + 1);
|
4291 | 76a66253 | j_mayer | } |
4292 | 76a66253 | j_mayer | |
4293 | 76a66253 | j_mayer | /* stfq */
|
4294 | 76a66253 | j_mayer | GEN_HANDLER(stfq, 0x3C, 0xFF, 0xFF, 0x00000003, PPC_POWER2) |
4295 | 76a66253 | j_mayer | { |
4296 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4297 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4298 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0);
|
4299 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); |
4300 | 76a66253 | j_mayer | gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
|
4301 | 76a66253 | j_mayer | op_POWER2_stfq(); |
4302 | 76a66253 | j_mayer | } |
4303 | 76a66253 | j_mayer | |
4304 | 76a66253 | j_mayer | /* stfqu */
|
4305 | 76a66253 | j_mayer | GEN_HANDLER(stfqu, 0x3D, 0xFF, 0xFF, 0x00000003, PPC_POWER2) |
4306 | 76a66253 | j_mayer | { |
4307 | 76a66253 | j_mayer | int ra = rA(ctx->opcode);
|
4308 | 76a66253 | j_mayer | |
4309 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4310 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4311 | 9d53c753 | j_mayer | gen_addr_imm_index(ctx, 0);
|
4312 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); |
4313 | 76a66253 | j_mayer | gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
|
4314 | 76a66253 | j_mayer | op_POWER2_stfq(); |
4315 | 76a66253 | j_mayer | if (ra != 0) |
4316 | 76a66253 | j_mayer | gen_op_store_T0_gpr(ra); |
4317 | 76a66253 | j_mayer | } |
4318 | 76a66253 | j_mayer | |
4319 | 76a66253 | j_mayer | /* stfqux */
|
4320 | 76a66253 | j_mayer | GEN_HANDLER(stfqux, 0x1F, 0x17, 0x1D, 0x00000001, PPC_POWER2) |
4321 | 76a66253 | j_mayer | { |
4322 | 76a66253 | j_mayer | int ra = rA(ctx->opcode);
|
4323 | 76a66253 | j_mayer | |
4324 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4325 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4326 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4327 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); |
4328 | 76a66253 | j_mayer | gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
|
4329 | 76a66253 | j_mayer | op_POWER2_stfq(); |
4330 | 76a66253 | j_mayer | if (ra != 0) |
4331 | 76a66253 | j_mayer | gen_op_store_T0_gpr(ra); |
4332 | 76a66253 | j_mayer | } |
4333 | 76a66253 | j_mayer | |
4334 | 76a66253 | j_mayer | /* stfqx */
|
4335 | 76a66253 | j_mayer | GEN_HANDLER(stfqx, 0x1F, 0x17, 0x1C, 0x00000001, PPC_POWER2) |
4336 | 76a66253 | j_mayer | { |
4337 | 76a66253 | j_mayer | /* NIP cannot be restored if the memory exception comes from an helper */
|
4338 | d9bce9d9 | j_mayer | gen_update_nip(ctx, ctx->nip - 4);
|
4339 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4340 | 76a66253 | j_mayer | gen_op_load_fpr_FT0(rS(ctx->opcode)); |
4341 | 76a66253 | j_mayer | gen_op_load_fpr_FT1(rS(ctx->opcode) + 1);
|
4342 | 76a66253 | j_mayer | op_POWER2_stfq(); |
4343 | 76a66253 | j_mayer | } |
4344 | 76a66253 | j_mayer | |
4345 | 76a66253 | j_mayer | /* BookE specific instructions */
|
4346 | 2662a059 | j_mayer | /* XXX: not implemented on 440 ? */
|
4347 | a750fc0b | j_mayer | GEN_HANDLER(mfapidi, 0x1F, 0x13, 0x08, 0x0000F801, PPC_BOOKE_EXT) |
4348 | 76a66253 | j_mayer | { |
4349 | 76a66253 | j_mayer | /* XXX: TODO */
|
4350 | 76a66253 | j_mayer | RET_INVAL(ctx); |
4351 | 76a66253 | j_mayer | } |
4352 | 76a66253 | j_mayer | |
4353 | 2662a059 | j_mayer | /* XXX: not implemented on 440 ? */
|
4354 | a750fc0b | j_mayer | GEN_HANDLER(tlbiva, 0x1F, 0x12, 0x18, 0x03FFF801, PPC_BOOKE_EXT) |
4355 | 76a66253 | j_mayer | { |
4356 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4357 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4358 | 76a66253 | j_mayer | #else
|
4359 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4360 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4361 | 76a66253 | j_mayer | return;
|
4362 | 76a66253 | j_mayer | } |
4363 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4364 | 76a66253 | j_mayer | /* Use the same micro-ops as for tlbie */
|
4365 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
4366 | d9bce9d9 | j_mayer | if (ctx->sf_mode)
|
4367 | d9bce9d9 | j_mayer | gen_op_tlbie_64(); |
4368 | d9bce9d9 | j_mayer | else
|
4369 | d9bce9d9 | j_mayer | #endif
|
4370 | d9bce9d9 | j_mayer | gen_op_tlbie(); |
4371 | 76a66253 | j_mayer | RET_STOP(ctx); |
4372 | 76a66253 | j_mayer | #endif
|
4373 | 76a66253 | j_mayer | } |
4374 | 76a66253 | j_mayer | |
4375 | 76a66253 | j_mayer | /* All 405 MAC instructions are translated here */
|
4376 | 76a66253 | j_mayer | static inline void gen_405_mulladd_insn (DisasContext *ctx, int opc2, int opc3, |
4377 | 76a66253 | j_mayer | int ra, int rb, int rt, int Rc) |
4378 | 76a66253 | j_mayer | { |
4379 | 76a66253 | j_mayer | gen_op_load_gpr_T0(ra); |
4380 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rb); |
4381 | 76a66253 | j_mayer | switch (opc3 & 0x0D) { |
4382 | 76a66253 | j_mayer | case 0x05: |
4383 | 76a66253 | j_mayer | /* macchw - macchw. - macchwo - macchwo. */
|
4384 | 76a66253 | j_mayer | /* macchws - macchws. - macchwso - macchwso. */
|
4385 | 76a66253 | j_mayer | /* nmacchw - nmacchw. - nmacchwo - nmacchwo. */
|
4386 | 76a66253 | j_mayer | /* nmacchws - nmacchws. - nmacchwso - nmacchwso. */
|
4387 | 76a66253 | j_mayer | /* mulchw - mulchw. */
|
4388 | 76a66253 | j_mayer | gen_op_405_mulchw(); |
4389 | 76a66253 | j_mayer | break;
|
4390 | 76a66253 | j_mayer | case 0x04: |
4391 | 76a66253 | j_mayer | /* macchwu - macchwu. - macchwuo - macchwuo. */
|
4392 | 76a66253 | j_mayer | /* macchwsu - macchwsu. - macchwsuo - macchwsuo. */
|
4393 | 76a66253 | j_mayer | /* mulchwu - mulchwu. */
|
4394 | 76a66253 | j_mayer | gen_op_405_mulchwu(); |
4395 | 76a66253 | j_mayer | break;
|
4396 | 76a66253 | j_mayer | case 0x01: |
4397 | 76a66253 | j_mayer | /* machhw - machhw. - machhwo - machhwo. */
|
4398 | 76a66253 | j_mayer | /* machhws - machhws. - machhwso - machhwso. */
|
4399 | 76a66253 | j_mayer | /* nmachhw - nmachhw. - nmachhwo - nmachhwo. */
|
4400 | 76a66253 | j_mayer | /* nmachhws - nmachhws. - nmachhwso - nmachhwso. */
|
4401 | 76a66253 | j_mayer | /* mulhhw - mulhhw. */
|
4402 | 76a66253 | j_mayer | gen_op_405_mulhhw(); |
4403 | 76a66253 | j_mayer | break;
|
4404 | 76a66253 | j_mayer | case 0x00: |
4405 | 76a66253 | j_mayer | /* machhwu - machhwu. - machhwuo - machhwuo. */
|
4406 | 76a66253 | j_mayer | /* machhwsu - machhwsu. - machhwsuo - machhwsuo. */
|
4407 | 76a66253 | j_mayer | /* mulhhwu - mulhhwu. */
|
4408 | 76a66253 | j_mayer | gen_op_405_mulhhwu(); |
4409 | 76a66253 | j_mayer | break;
|
4410 | 76a66253 | j_mayer | case 0x0D: |
4411 | 76a66253 | j_mayer | /* maclhw - maclhw. - maclhwo - maclhwo. */
|
4412 | 76a66253 | j_mayer | /* maclhws - maclhws. - maclhwso - maclhwso. */
|
4413 | 76a66253 | j_mayer | /* nmaclhw - nmaclhw. - nmaclhwo - nmaclhwo. */
|
4414 | 76a66253 | j_mayer | /* nmaclhws - nmaclhws. - nmaclhwso - nmaclhwso. */
|
4415 | 76a66253 | j_mayer | /* mullhw - mullhw. */
|
4416 | 76a66253 | j_mayer | gen_op_405_mullhw(); |
4417 | 76a66253 | j_mayer | break;
|
4418 | 76a66253 | j_mayer | case 0x0C: |
4419 | 76a66253 | j_mayer | /* maclhwu - maclhwu. - maclhwuo - maclhwuo. */
|
4420 | 76a66253 | j_mayer | /* maclhwsu - maclhwsu. - maclhwsuo - maclhwsuo. */
|
4421 | 76a66253 | j_mayer | /* mullhwu - mullhwu. */
|
4422 | 76a66253 | j_mayer | gen_op_405_mullhwu(); |
4423 | 76a66253 | j_mayer | break;
|
4424 | 76a66253 | j_mayer | } |
4425 | 76a66253 | j_mayer | if (opc2 & 0x02) { |
4426 | 76a66253 | j_mayer | /* nmultiply-and-accumulate (0x0E) */
|
4427 | 76a66253 | j_mayer | gen_op_neg(); |
4428 | 76a66253 | j_mayer | } |
4429 | 76a66253 | j_mayer | if (opc2 & 0x04) { |
4430 | 76a66253 | j_mayer | /* (n)multiply-and-accumulate (0x0C - 0x0E) */
|
4431 | 76a66253 | j_mayer | gen_op_load_gpr_T2(rt); |
4432 | 76a66253 | j_mayer | gen_op_move_T1_T0(); |
4433 | 76a66253 | j_mayer | gen_op_405_add_T0_T2(); |
4434 | 76a66253 | j_mayer | } |
4435 | 76a66253 | j_mayer | if (opc3 & 0x10) { |
4436 | 76a66253 | j_mayer | /* Check overflow */
|
4437 | 76a66253 | j_mayer | if (opc3 & 0x01) |
4438 | 76a66253 | j_mayer | gen_op_405_check_ov(); |
4439 | 76a66253 | j_mayer | else
|
4440 | 76a66253 | j_mayer | gen_op_405_check_ovu(); |
4441 | 76a66253 | j_mayer | } |
4442 | 76a66253 | j_mayer | if (opc3 & 0x02) { |
4443 | 76a66253 | j_mayer | /* Saturate */
|
4444 | 76a66253 | j_mayer | if (opc3 & 0x01) |
4445 | 76a66253 | j_mayer | gen_op_405_check_sat(); |
4446 | 76a66253 | j_mayer | else
|
4447 | 76a66253 | j_mayer | gen_op_405_check_satu(); |
4448 | 76a66253 | j_mayer | } |
4449 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rt); |
4450 | 76a66253 | j_mayer | if (unlikely(Rc) != 0) { |
4451 | 76a66253 | j_mayer | /* Update Rc0 */
|
4452 | 76a66253 | j_mayer | gen_set_Rc0(ctx); |
4453 | 76a66253 | j_mayer | } |
4454 | 76a66253 | j_mayer | } |
4455 | 76a66253 | j_mayer | |
4456 | a750fc0b | j_mayer | #define GEN_MAC_HANDLER(name, opc2, opc3) \
|
4457 | a750fc0b | j_mayer | GEN_HANDLER(name, 0x04, opc2, opc3, 0x00000000, PPC_405_MAC) \ |
4458 | 76a66253 | j_mayer | { \ |
4459 | 76a66253 | j_mayer | gen_405_mulladd_insn(ctx, opc2, opc3, rA(ctx->opcode), rB(ctx->opcode), \ |
4460 | 76a66253 | j_mayer | rD(ctx->opcode), Rc(ctx->opcode)); \ |
4461 | 76a66253 | j_mayer | } |
4462 | 76a66253 | j_mayer | |
4463 | 76a66253 | j_mayer | /* macchw - macchw. */
|
4464 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchw, 0x0C, 0x05); |
4465 | 76a66253 | j_mayer | /* macchwo - macchwo. */
|
4466 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchwo, 0x0C, 0x15); |
4467 | 76a66253 | j_mayer | /* macchws - macchws. */
|
4468 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchws, 0x0C, 0x07); |
4469 | 76a66253 | j_mayer | /* macchwso - macchwso. */
|
4470 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchwso, 0x0C, 0x17); |
4471 | 76a66253 | j_mayer | /* macchwsu - macchwsu. */
|
4472 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchwsu, 0x0C, 0x06); |
4473 | 76a66253 | j_mayer | /* macchwsuo - macchwsuo. */
|
4474 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchwsuo, 0x0C, 0x16); |
4475 | 76a66253 | j_mayer | /* macchwu - macchwu. */
|
4476 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchwu, 0x0C, 0x04); |
4477 | 76a66253 | j_mayer | /* macchwuo - macchwuo. */
|
4478 | a750fc0b | j_mayer | GEN_MAC_HANDLER(macchwuo, 0x0C, 0x14); |
4479 | 76a66253 | j_mayer | /* machhw - machhw. */
|
4480 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhw, 0x0C, 0x01); |
4481 | 76a66253 | j_mayer | /* machhwo - machhwo. */
|
4482 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhwo, 0x0C, 0x11); |
4483 | 76a66253 | j_mayer | /* machhws - machhws. */
|
4484 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhws, 0x0C, 0x03); |
4485 | 76a66253 | j_mayer | /* machhwso - machhwso. */
|
4486 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhwso, 0x0C, 0x13); |
4487 | 76a66253 | j_mayer | /* machhwsu - machhwsu. */
|
4488 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhwsu, 0x0C, 0x02); |
4489 | 76a66253 | j_mayer | /* machhwsuo - machhwsuo. */
|
4490 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhwsuo, 0x0C, 0x12); |
4491 | 76a66253 | j_mayer | /* machhwu - machhwu. */
|
4492 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhwu, 0x0C, 0x00); |
4493 | 76a66253 | j_mayer | /* machhwuo - machhwuo. */
|
4494 | a750fc0b | j_mayer | GEN_MAC_HANDLER(machhwuo, 0x0C, 0x10); |
4495 | 76a66253 | j_mayer | /* maclhw - maclhw. */
|
4496 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhw, 0x0C, 0x0D); |
4497 | 76a66253 | j_mayer | /* maclhwo - maclhwo. */
|
4498 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhwo, 0x0C, 0x1D); |
4499 | 76a66253 | j_mayer | /* maclhws - maclhws. */
|
4500 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhws, 0x0C, 0x0F); |
4501 | 76a66253 | j_mayer | /* maclhwso - maclhwso. */
|
4502 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhwso, 0x0C, 0x1F); |
4503 | 76a66253 | j_mayer | /* maclhwu - maclhwu. */
|
4504 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhwu, 0x0C, 0x0C); |
4505 | 76a66253 | j_mayer | /* maclhwuo - maclhwuo. */
|
4506 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhwuo, 0x0C, 0x1C); |
4507 | 76a66253 | j_mayer | /* maclhwsu - maclhwsu. */
|
4508 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhwsu, 0x0C, 0x0E); |
4509 | 76a66253 | j_mayer | /* maclhwsuo - maclhwsuo. */
|
4510 | a750fc0b | j_mayer | GEN_MAC_HANDLER(maclhwsuo, 0x0C, 0x1E); |
4511 | 76a66253 | j_mayer | /* nmacchw - nmacchw. */
|
4512 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmacchw, 0x0E, 0x05); |
4513 | 76a66253 | j_mayer | /* nmacchwo - nmacchwo. */
|
4514 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmacchwo, 0x0E, 0x15); |
4515 | 76a66253 | j_mayer | /* nmacchws - nmacchws. */
|
4516 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmacchws, 0x0E, 0x07); |
4517 | 76a66253 | j_mayer | /* nmacchwso - nmacchwso. */
|
4518 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmacchwso, 0x0E, 0x17); |
4519 | 76a66253 | j_mayer | /* nmachhw - nmachhw. */
|
4520 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmachhw, 0x0E, 0x01); |
4521 | 76a66253 | j_mayer | /* nmachhwo - nmachhwo. */
|
4522 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmachhwo, 0x0E, 0x11); |
4523 | 76a66253 | j_mayer | /* nmachhws - nmachhws. */
|
4524 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmachhws, 0x0E, 0x03); |
4525 | 76a66253 | j_mayer | /* nmachhwso - nmachhwso. */
|
4526 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmachhwso, 0x0E, 0x13); |
4527 | 76a66253 | j_mayer | /* nmaclhw - nmaclhw. */
|
4528 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmaclhw, 0x0E, 0x0D); |
4529 | 76a66253 | j_mayer | /* nmaclhwo - nmaclhwo. */
|
4530 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmaclhwo, 0x0E, 0x1D); |
4531 | 76a66253 | j_mayer | /* nmaclhws - nmaclhws. */
|
4532 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmaclhws, 0x0E, 0x0F); |
4533 | 76a66253 | j_mayer | /* nmaclhwso - nmaclhwso. */
|
4534 | a750fc0b | j_mayer | GEN_MAC_HANDLER(nmaclhwso, 0x0E, 0x1F); |
4535 | 76a66253 | j_mayer | |
4536 | 76a66253 | j_mayer | /* mulchw - mulchw. */
|
4537 | a750fc0b | j_mayer | GEN_MAC_HANDLER(mulchw, 0x08, 0x05); |
4538 | 76a66253 | j_mayer | /* mulchwu - mulchwu. */
|
4539 | a750fc0b | j_mayer | GEN_MAC_HANDLER(mulchwu, 0x08, 0x04); |
4540 | 76a66253 | j_mayer | /* mulhhw - mulhhw. */
|
4541 | a750fc0b | j_mayer | GEN_MAC_HANDLER(mulhhw, 0x08, 0x01); |
4542 | 76a66253 | j_mayer | /* mulhhwu - mulhhwu. */
|
4543 | a750fc0b | j_mayer | GEN_MAC_HANDLER(mulhhwu, 0x08, 0x00); |
4544 | 76a66253 | j_mayer | /* mullhw - mullhw. */
|
4545 | a750fc0b | j_mayer | GEN_MAC_HANDLER(mullhw, 0x08, 0x0D); |
4546 | 76a66253 | j_mayer | /* mullhwu - mullhwu. */
|
4547 | a750fc0b | j_mayer | GEN_MAC_HANDLER(mullhwu, 0x08, 0x0C); |
4548 | 76a66253 | j_mayer | |
4549 | 76a66253 | j_mayer | /* mfdcr */
|
4550 | 76a66253 | j_mayer | GEN_HANDLER(mfdcr, 0x1F, 0x03, 0x0A, 0x00000001, PPC_EMB_COMMON) |
4551 | 76a66253 | j_mayer | { |
4552 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4553 | 76a66253 | j_mayer | RET_PRIVREG(ctx); |
4554 | 76a66253 | j_mayer | #else
|
4555 | 76a66253 | j_mayer | uint32_t dcrn = SPR(ctx->opcode); |
4556 | 76a66253 | j_mayer | |
4557 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4558 | 76a66253 | j_mayer | RET_PRIVREG(ctx); |
4559 | 76a66253 | j_mayer | return;
|
4560 | 76a66253 | j_mayer | } |
4561 | a42bd6cc | j_mayer | gen_op_set_T0(dcrn); |
4562 | a42bd6cc | j_mayer | gen_op_load_dcr(); |
4563 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4564 | 76a66253 | j_mayer | #endif
|
4565 | 76a66253 | j_mayer | } |
4566 | 76a66253 | j_mayer | |
4567 | 76a66253 | j_mayer | /* mtdcr */
|
4568 | 76a66253 | j_mayer | GEN_HANDLER(mtdcr, 0x1F, 0x03, 0x0E, 0x00000001, PPC_EMB_COMMON) |
4569 | 76a66253 | j_mayer | { |
4570 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4571 | 76a66253 | j_mayer | RET_PRIVREG(ctx); |
4572 | 76a66253 | j_mayer | #else
|
4573 | 76a66253 | j_mayer | uint32_t dcrn = SPR(ctx->opcode); |
4574 | 76a66253 | j_mayer | |
4575 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4576 | 76a66253 | j_mayer | RET_PRIVREG(ctx); |
4577 | 76a66253 | j_mayer | return;
|
4578 | 76a66253 | j_mayer | } |
4579 | a42bd6cc | j_mayer | gen_op_set_T0(dcrn); |
4580 | a42bd6cc | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
4581 | a42bd6cc | j_mayer | gen_op_store_dcr(); |
4582 | a42bd6cc | j_mayer | #endif
|
4583 | a42bd6cc | j_mayer | } |
4584 | a42bd6cc | j_mayer | |
4585 | a42bd6cc | j_mayer | /* mfdcrx */
|
4586 | 2662a059 | j_mayer | /* XXX: not implemented on 440 ? */
|
4587 | a750fc0b | j_mayer | GEN_HANDLER(mfdcrx, 0x1F, 0x03, 0x08, 0x00000000, PPC_BOOKE_EXT) |
4588 | a42bd6cc | j_mayer | { |
4589 | a42bd6cc | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4590 | a42bd6cc | j_mayer | RET_PRIVREG(ctx); |
4591 | a42bd6cc | j_mayer | #else
|
4592 | a42bd6cc | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4593 | a42bd6cc | j_mayer | RET_PRIVREG(ctx); |
4594 | a42bd6cc | j_mayer | return;
|
4595 | a42bd6cc | j_mayer | } |
4596 | a42bd6cc | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4597 | a42bd6cc | j_mayer | gen_op_load_dcr(); |
4598 | a42bd6cc | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4599 | a750fc0b | j_mayer | /* Note: Rc update flag set leads to undefined state of Rc0 */
|
4600 | a42bd6cc | j_mayer | #endif
|
4601 | a42bd6cc | j_mayer | } |
4602 | a42bd6cc | j_mayer | |
4603 | a42bd6cc | j_mayer | /* mtdcrx */
|
4604 | 2662a059 | j_mayer | /* XXX: not implemented on 440 ? */
|
4605 | a750fc0b | j_mayer | GEN_HANDLER(mtdcrx, 0x1F, 0x03, 0x0C, 0x00000000, PPC_BOOKE_EXT) |
4606 | a42bd6cc | j_mayer | { |
4607 | a42bd6cc | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4608 | a42bd6cc | j_mayer | RET_PRIVREG(ctx); |
4609 | a42bd6cc | j_mayer | #else
|
4610 | a42bd6cc | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4611 | a42bd6cc | j_mayer | RET_PRIVREG(ctx); |
4612 | a42bd6cc | j_mayer | return;
|
4613 | a42bd6cc | j_mayer | } |
4614 | a42bd6cc | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4615 | a42bd6cc | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
4616 | a42bd6cc | j_mayer | gen_op_store_dcr(); |
4617 | a750fc0b | j_mayer | /* Note: Rc update flag set leads to undefined state of Rc0 */
|
4618 | 76a66253 | j_mayer | #endif
|
4619 | 76a66253 | j_mayer | } |
4620 | 76a66253 | j_mayer | |
4621 | a750fc0b | j_mayer | /* mfdcrux (PPC 460) : user-mode access to DCR */
|
4622 | a750fc0b | j_mayer | GEN_HANDLER(mfdcrux, 0x1F, 0x03, 0x09, 0x00000000, PPC_DCRUX) |
4623 | a750fc0b | j_mayer | { |
4624 | a750fc0b | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4625 | a750fc0b | j_mayer | gen_op_load_dcr(); |
4626 | a750fc0b | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4627 | a750fc0b | j_mayer | /* Note: Rc update flag set leads to undefined state of Rc0 */
|
4628 | a750fc0b | j_mayer | } |
4629 | a750fc0b | j_mayer | |
4630 | a750fc0b | j_mayer | /* mtdcrux (PPC 460) : user-mode access to DCR */
|
4631 | a750fc0b | j_mayer | GEN_HANDLER(mtdcrux, 0x1F, 0x03, 0x0D, 0x00000000, PPC_DCRUX) |
4632 | a750fc0b | j_mayer | { |
4633 | a750fc0b | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4634 | a750fc0b | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
4635 | a750fc0b | j_mayer | gen_op_store_dcr(); |
4636 | a750fc0b | j_mayer | /* Note: Rc update flag set leads to undefined state of Rc0 */
|
4637 | a750fc0b | j_mayer | } |
4638 | a750fc0b | j_mayer | |
4639 | 76a66253 | j_mayer | /* dccci */
|
4640 | 76a66253 | j_mayer | GEN_HANDLER(dccci, 0x1F, 0x06, 0x0E, 0x03E00001, PPC_4xx_COMMON) |
4641 | 76a66253 | j_mayer | { |
4642 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4643 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4644 | 76a66253 | j_mayer | #else
|
4645 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4646 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4647 | 76a66253 | j_mayer | return;
|
4648 | 76a66253 | j_mayer | } |
4649 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4650 | 76a66253 | j_mayer | #endif
|
4651 | 76a66253 | j_mayer | } |
4652 | 76a66253 | j_mayer | |
4653 | 76a66253 | j_mayer | /* dcread */
|
4654 | 76a66253 | j_mayer | GEN_HANDLER(dcread, 0x1F, 0x06, 0x0F, 0x00000001, PPC_4xx_COMMON) |
4655 | 76a66253 | j_mayer | { |
4656 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4657 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4658 | 76a66253 | j_mayer | #else
|
4659 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4660 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4661 | 76a66253 | j_mayer | return;
|
4662 | 76a66253 | j_mayer | } |
4663 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4664 | 76a66253 | j_mayer | op_ldst(lwz); |
4665 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4666 | 76a66253 | j_mayer | #endif
|
4667 | 76a66253 | j_mayer | } |
4668 | 76a66253 | j_mayer | |
4669 | 76a66253 | j_mayer | /* icbt */
|
4670 | 2662a059 | j_mayer | GEN_HANDLER(icbt_40x, 0x1F, 0x06, 0x08, 0x03E00001, PPC_40x_ICBT) |
4671 | 76a66253 | j_mayer | { |
4672 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4673 | 76a66253 | j_mayer | /* XXX: specification say this is treated as a load by the MMU
|
4674 | 76a66253 | j_mayer | * but does not generate any exception
|
4675 | 76a66253 | j_mayer | */
|
4676 | 76a66253 | j_mayer | } |
4677 | 76a66253 | j_mayer | |
4678 | 76a66253 | j_mayer | /* iccci */
|
4679 | 76a66253 | j_mayer | GEN_HANDLER(iccci, 0x1F, 0x06, 0x1E, 0x00000001, PPC_4xx_COMMON) |
4680 | 76a66253 | j_mayer | { |
4681 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4682 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4683 | 76a66253 | j_mayer | #else
|
4684 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4685 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4686 | 76a66253 | j_mayer | return;
|
4687 | 76a66253 | j_mayer | } |
4688 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4689 | 76a66253 | j_mayer | #endif
|
4690 | 76a66253 | j_mayer | } |
4691 | 76a66253 | j_mayer | |
4692 | 76a66253 | j_mayer | /* icread */
|
4693 | 76a66253 | j_mayer | GEN_HANDLER(icread, 0x1F, 0x06, 0x1F, 0x03E00001, PPC_4xx_COMMON) |
4694 | 76a66253 | j_mayer | { |
4695 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4696 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4697 | 76a66253 | j_mayer | #else
|
4698 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4699 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4700 | 76a66253 | j_mayer | return;
|
4701 | 76a66253 | j_mayer | } |
4702 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4703 | 76a66253 | j_mayer | #endif
|
4704 | 76a66253 | j_mayer | } |
4705 | 76a66253 | j_mayer | |
4706 | 76a66253 | j_mayer | /* rfci (supervisor only) */
|
4707 | a42bd6cc | j_mayer | GEN_HANDLER(rfci_40x, 0x13, 0x13, 0x01, 0x03FF8001, PPC_40x_EXCP) |
4708 | a42bd6cc | j_mayer | { |
4709 | a42bd6cc | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4710 | a42bd6cc | j_mayer | RET_PRIVOPC(ctx); |
4711 | a42bd6cc | j_mayer | #else
|
4712 | a42bd6cc | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4713 | a42bd6cc | j_mayer | RET_PRIVOPC(ctx); |
4714 | a42bd6cc | j_mayer | return;
|
4715 | a42bd6cc | j_mayer | } |
4716 | a42bd6cc | j_mayer | /* Restore CPU state */
|
4717 | a42bd6cc | j_mayer | gen_op_40x_rfci(); |
4718 | a42bd6cc | j_mayer | RET_CHG_FLOW(ctx); |
4719 | a42bd6cc | j_mayer | #endif
|
4720 | a42bd6cc | j_mayer | } |
4721 | a42bd6cc | j_mayer | |
4722 | a42bd6cc | j_mayer | GEN_HANDLER(rfci, 0x13, 0x13, 0x01, 0x03FF8001, PPC_BOOKE) |
4723 | a42bd6cc | j_mayer | { |
4724 | a42bd6cc | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4725 | a42bd6cc | j_mayer | RET_PRIVOPC(ctx); |
4726 | a42bd6cc | j_mayer | #else
|
4727 | a42bd6cc | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4728 | a42bd6cc | j_mayer | RET_PRIVOPC(ctx); |
4729 | a42bd6cc | j_mayer | return;
|
4730 | a42bd6cc | j_mayer | } |
4731 | a42bd6cc | j_mayer | /* Restore CPU state */
|
4732 | a42bd6cc | j_mayer | gen_op_rfci(); |
4733 | a42bd6cc | j_mayer | RET_CHG_FLOW(ctx); |
4734 | a42bd6cc | j_mayer | #endif
|
4735 | a42bd6cc | j_mayer | } |
4736 | a42bd6cc | j_mayer | |
4737 | a42bd6cc | j_mayer | /* BookE specific */
|
4738 | 2662a059 | j_mayer | /* XXX: not implemented on 440 ? */
|
4739 | a750fc0b | j_mayer | GEN_HANDLER(rfdi, 0x13, 0x07, 0x01, 0x03FF8001, PPC_BOOKE_EXT) |
4740 | 76a66253 | j_mayer | { |
4741 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4742 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4743 | 76a66253 | j_mayer | #else
|
4744 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4745 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4746 | 76a66253 | j_mayer | return;
|
4747 | 76a66253 | j_mayer | } |
4748 | 76a66253 | j_mayer | /* Restore CPU state */
|
4749 | a42bd6cc | j_mayer | gen_op_rfdi(); |
4750 | 76a66253 | j_mayer | RET_CHG_FLOW(ctx); |
4751 | 76a66253 | j_mayer | #endif
|
4752 | 76a66253 | j_mayer | } |
4753 | 76a66253 | j_mayer | |
4754 | 2662a059 | j_mayer | /* XXX: not implemented on 440 ? */
|
4755 | a750fc0b | j_mayer | GEN_HANDLER(rfmci, 0x13, 0x06, 0x01, 0x03FF8001, PPC_RFMCI) |
4756 | a42bd6cc | j_mayer | { |
4757 | a42bd6cc | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4758 | a42bd6cc | j_mayer | RET_PRIVOPC(ctx); |
4759 | a42bd6cc | j_mayer | #else
|
4760 | a42bd6cc | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4761 | a42bd6cc | j_mayer | RET_PRIVOPC(ctx); |
4762 | a42bd6cc | j_mayer | return;
|
4763 | a42bd6cc | j_mayer | } |
4764 | a42bd6cc | j_mayer | /* Restore CPU state */
|
4765 | a42bd6cc | j_mayer | gen_op_rfmci(); |
4766 | a42bd6cc | j_mayer | RET_CHG_FLOW(ctx); |
4767 | a42bd6cc | j_mayer | #endif
|
4768 | a42bd6cc | j_mayer | } |
4769 | 5eb7995e | j_mayer | |
4770 | d9bce9d9 | j_mayer | /* TLB management - PowerPC 405 implementation */
|
4771 | 76a66253 | j_mayer | /* tlbre */
|
4772 | a750fc0b | j_mayer | GEN_HANDLER(tlbre_40x, 0x1F, 0x12, 0x1D, 0x00000001, PPC_40x_TLB) |
4773 | 76a66253 | j_mayer | { |
4774 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4775 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4776 | 76a66253 | j_mayer | #else
|
4777 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4778 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4779 | 76a66253 | j_mayer | return;
|
4780 | 76a66253 | j_mayer | } |
4781 | 76a66253 | j_mayer | switch (rB(ctx->opcode)) {
|
4782 | 76a66253 | j_mayer | case 0: |
4783 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4784 | 76a66253 | j_mayer | gen_op_4xx_tlbre_hi(); |
4785 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4786 | 76a66253 | j_mayer | break;
|
4787 | 76a66253 | j_mayer | case 1: |
4788 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4789 | 76a66253 | j_mayer | gen_op_4xx_tlbre_lo(); |
4790 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4791 | 76a66253 | j_mayer | break;
|
4792 | 76a66253 | j_mayer | default:
|
4793 | 76a66253 | j_mayer | RET_INVAL(ctx); |
4794 | 76a66253 | j_mayer | break;
|
4795 | 9a64fbe4 | bellard | } |
4796 | 76a66253 | j_mayer | #endif
|
4797 | 76a66253 | j_mayer | } |
4798 | 76a66253 | j_mayer | |
4799 | d9bce9d9 | j_mayer | /* tlbsx - tlbsx. */
|
4800 | a750fc0b | j_mayer | GEN_HANDLER(tlbsx_40x, 0x1F, 0x12, 0x1C, 0x00000000, PPC_40x_TLB) |
4801 | 76a66253 | j_mayer | { |
4802 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4803 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4804 | 76a66253 | j_mayer | #else
|
4805 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4806 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4807 | 76a66253 | j_mayer | return;
|
4808 | 76a66253 | j_mayer | } |
4809 | 76a66253 | j_mayer | gen_addr_reg_index(ctx); |
4810 | 76a66253 | j_mayer | if (Rc(ctx->opcode))
|
4811 | 76a66253 | j_mayer | gen_op_4xx_tlbsx_(); |
4812 | 76a66253 | j_mayer | else
|
4813 | 76a66253 | j_mayer | gen_op_4xx_tlbsx(); |
4814 | 9a64fbe4 | bellard | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4815 | 76a66253 | j_mayer | #endif
|
4816 | 79aceca5 | bellard | } |
4817 | 79aceca5 | bellard | |
4818 | 76a66253 | j_mayer | /* tlbwe */
|
4819 | a750fc0b | j_mayer | GEN_HANDLER(tlbwe_40x, 0x1F, 0x12, 0x1E, 0x00000001, PPC_40x_TLB) |
4820 | 79aceca5 | bellard | { |
4821 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4822 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4823 | 76a66253 | j_mayer | #else
|
4824 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4825 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4826 | 76a66253 | j_mayer | return;
|
4827 | 76a66253 | j_mayer | } |
4828 | 76a66253 | j_mayer | switch (rB(ctx->opcode)) {
|
4829 | 76a66253 | j_mayer | case 0: |
4830 | 9a64fbe4 | bellard | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4831 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
4832 | 76a66253 | j_mayer | gen_op_4xx_tlbwe_hi(); |
4833 | 76a66253 | j_mayer | break;
|
4834 | 76a66253 | j_mayer | case 1: |
4835 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4836 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
4837 | 76a66253 | j_mayer | gen_op_4xx_tlbwe_lo(); |
4838 | 76a66253 | j_mayer | break;
|
4839 | 76a66253 | j_mayer | default:
|
4840 | 76a66253 | j_mayer | RET_INVAL(ctx); |
4841 | 76a66253 | j_mayer | break;
|
4842 | 9a64fbe4 | bellard | } |
4843 | 76a66253 | j_mayer | #endif
|
4844 | 76a66253 | j_mayer | } |
4845 | 76a66253 | j_mayer | |
4846 | a4bb6c3e | j_mayer | /* TLB management - PowerPC 440 implementation */
|
4847 | 5eb7995e | j_mayer | /* tlbre */
|
4848 | a4bb6c3e | j_mayer | GEN_HANDLER(tlbre_440, 0x1F, 0x12, 0x1D, 0x00000001, PPC_BOOKE) |
4849 | 5eb7995e | j_mayer | { |
4850 | 5eb7995e | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4851 | 5eb7995e | j_mayer | RET_PRIVOPC(ctx); |
4852 | 5eb7995e | j_mayer | #else
|
4853 | 5eb7995e | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4854 | 5eb7995e | j_mayer | RET_PRIVOPC(ctx); |
4855 | 5eb7995e | j_mayer | return;
|
4856 | 5eb7995e | j_mayer | } |
4857 | 5eb7995e | j_mayer | switch (rB(ctx->opcode)) {
|
4858 | 5eb7995e | j_mayer | case 0: |
4859 | 5eb7995e | j_mayer | case 1: |
4860 | 5eb7995e | j_mayer | case 2: |
4861 | 5eb7995e | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4862 | a4bb6c3e | j_mayer | gen_op_440_tlbre(rB(ctx->opcode)); |
4863 | 5eb7995e | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4864 | 5eb7995e | j_mayer | break;
|
4865 | 5eb7995e | j_mayer | default:
|
4866 | 5eb7995e | j_mayer | RET_INVAL(ctx); |
4867 | 5eb7995e | j_mayer | break;
|
4868 | 5eb7995e | j_mayer | } |
4869 | 5eb7995e | j_mayer | #endif
|
4870 | 5eb7995e | j_mayer | } |
4871 | 5eb7995e | j_mayer | |
4872 | 5eb7995e | j_mayer | /* tlbsx - tlbsx. */
|
4873 | a4bb6c3e | j_mayer | GEN_HANDLER(tlbsx_440, 0x1F, 0x12, 0x1C, 0x00000000, PPC_BOOKE) |
4874 | 5eb7995e | j_mayer | { |
4875 | 5eb7995e | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4876 | 5eb7995e | j_mayer | RET_PRIVOPC(ctx); |
4877 | 5eb7995e | j_mayer | #else
|
4878 | 5eb7995e | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4879 | 5eb7995e | j_mayer | RET_PRIVOPC(ctx); |
4880 | 5eb7995e | j_mayer | return;
|
4881 | 5eb7995e | j_mayer | } |
4882 | 5eb7995e | j_mayer | gen_addr_reg_index(ctx); |
4883 | 5eb7995e | j_mayer | if (Rc(ctx->opcode))
|
4884 | a4bb6c3e | j_mayer | gen_op_440_tlbsx_(); |
4885 | 5eb7995e | j_mayer | else
|
4886 | a4bb6c3e | j_mayer | gen_op_440_tlbsx(); |
4887 | 5eb7995e | j_mayer | gen_op_store_T0_gpr(rD(ctx->opcode)); |
4888 | 5eb7995e | j_mayer | #endif
|
4889 | 5eb7995e | j_mayer | } |
4890 | 5eb7995e | j_mayer | |
4891 | 5eb7995e | j_mayer | /* tlbwe */
|
4892 | a4bb6c3e | j_mayer | GEN_HANDLER(tlbwe_440, 0x1F, 0x12, 0x1E, 0x00000001, PPC_BOOKE) |
4893 | 5eb7995e | j_mayer | { |
4894 | 5eb7995e | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4895 | 5eb7995e | j_mayer | RET_PRIVOPC(ctx); |
4896 | 5eb7995e | j_mayer | #else
|
4897 | 5eb7995e | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4898 | 5eb7995e | j_mayer | RET_PRIVOPC(ctx); |
4899 | 5eb7995e | j_mayer | return;
|
4900 | 5eb7995e | j_mayer | } |
4901 | 5eb7995e | j_mayer | switch (rB(ctx->opcode)) {
|
4902 | 5eb7995e | j_mayer | case 0: |
4903 | 5eb7995e | j_mayer | case 1: |
4904 | 5eb7995e | j_mayer | case 2: |
4905 | 5eb7995e | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
4906 | 5eb7995e | j_mayer | gen_op_load_gpr_T1(rS(ctx->opcode)); |
4907 | a4bb6c3e | j_mayer | gen_op_440_tlbwe(rB(ctx->opcode)); |
4908 | 5eb7995e | j_mayer | break;
|
4909 | 5eb7995e | j_mayer | default:
|
4910 | 5eb7995e | j_mayer | RET_INVAL(ctx); |
4911 | 5eb7995e | j_mayer | break;
|
4912 | 5eb7995e | j_mayer | } |
4913 | 5eb7995e | j_mayer | #endif
|
4914 | 5eb7995e | j_mayer | } |
4915 | 5eb7995e | j_mayer | |
4916 | 76a66253 | j_mayer | /* wrtee */
|
4917 | 76a66253 | j_mayer | GEN_HANDLER(wrtee, 0x1F, 0x03, 0x04, 0x000FFC01, PPC_EMB_COMMON) |
4918 | 76a66253 | j_mayer | { |
4919 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4920 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4921 | 76a66253 | j_mayer | #else
|
4922 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4923 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4924 | 76a66253 | j_mayer | return;
|
4925 | 76a66253 | j_mayer | } |
4926 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rD(ctx->opcode)); |
4927 | a42bd6cc | j_mayer | gen_op_wrte(); |
4928 | 76a66253 | j_mayer | RET_EXCP(ctx, EXCP_MTMSR, 0);
|
4929 | 76a66253 | j_mayer | #endif
|
4930 | 76a66253 | j_mayer | } |
4931 | 76a66253 | j_mayer | |
4932 | 76a66253 | j_mayer | /* wrteei */
|
4933 | 76a66253 | j_mayer | GEN_HANDLER(wrteei, 0x1F, 0x03, 0x05, 0x000EFC01, PPC_EMB_COMMON) |
4934 | 76a66253 | j_mayer | { |
4935 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
4936 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4937 | 76a66253 | j_mayer | #else
|
4938 | 76a66253 | j_mayer | if (unlikely(!ctx->supervisor)) {
|
4939 | 76a66253 | j_mayer | RET_PRIVOPC(ctx); |
4940 | 76a66253 | j_mayer | return;
|
4941 | 76a66253 | j_mayer | } |
4942 | 76a66253 | j_mayer | gen_op_set_T0(ctx->opcode & 0x00010000);
|
4943 | a42bd6cc | j_mayer | gen_op_wrte(); |
4944 | 76a66253 | j_mayer | RET_EXCP(ctx, EXCP_MTMSR, 0);
|
4945 | 76a66253 | j_mayer | #endif
|
4946 | 76a66253 | j_mayer | } |
4947 | 76a66253 | j_mayer | |
4948 | 08e46e54 | j_mayer | /* PowerPC 440 specific instructions */
|
4949 | 76a66253 | j_mayer | /* dlmzb */
|
4950 | 76a66253 | j_mayer | GEN_HANDLER(dlmzb, 0x1F, 0x0E, 0x02, 0x00000000, PPC_440_SPEC) |
4951 | 76a66253 | j_mayer | { |
4952 | 76a66253 | j_mayer | gen_op_load_gpr_T0(rS(ctx->opcode)); |
4953 | 76a66253 | j_mayer | gen_op_load_gpr_T1(rB(ctx->opcode)); |
4954 | 76a66253 | j_mayer | gen_op_440_dlmzb(); |
4955 | 76a66253 | j_mayer | gen_op_store_T0_gpr(rA(ctx->opcode)); |
4956 | 76a66253 | j_mayer | gen_op_store_xer_bc(); |
4957 | 76a66253 | j_mayer | if (Rc(ctx->opcode)) {
|
4958 | 76a66253 | j_mayer | gen_op_440_dlmzb_update_Rc(); |
4959 | 76a66253 | j_mayer | gen_op_store_T0_crf(0);
|
4960 | 76a66253 | j_mayer | } |
4961 | 76a66253 | j_mayer | } |
4962 | 76a66253 | j_mayer | |
4963 | 76a66253 | j_mayer | /* mbar replaces eieio on 440 */
|
4964 | 76a66253 | j_mayer | GEN_HANDLER(mbar, 0x1F, 0x16, 0x13, 0x001FF801, PPC_BOOKE) |
4965 | 76a66253 | j_mayer | { |
4966 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4967 | 76a66253 | j_mayer | } |
4968 | 76a66253 | j_mayer | |
4969 | 76a66253 | j_mayer | /* msync replaces sync on 440 */
|
4970 | 76a66253 | j_mayer | GEN_HANDLER(msync, 0x1F, 0x16, 0x12, 0x03FF0801, PPC_BOOKE) |
4971 | 76a66253 | j_mayer | { |
4972 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4973 | 76a66253 | j_mayer | } |
4974 | 76a66253 | j_mayer | |
4975 | 76a66253 | j_mayer | /* icbt */
|
4976 | 76a66253 | j_mayer | GEN_HANDLER(icbt_440, 0x1F, 0x16, 0x00, 0x03E00001, PPC_BOOKE) |
4977 | 76a66253 | j_mayer | { |
4978 | 76a66253 | j_mayer | /* interpreted as no-op */
|
4979 | 76a66253 | j_mayer | /* XXX: specification say this is treated as a load by the MMU
|
4980 | 76a66253 | j_mayer | * but does not generate any exception
|
4981 | 76a66253 | j_mayer | */
|
4982 | 79aceca5 | bellard | } |
4983 | 79aceca5 | bellard | |
4984 | 35cdaad6 | j_mayer | #if defined(TARGET_PPCEMB)
|
4985 | 0487d6a8 | j_mayer | /*** SPE extension ***/
|
4986 | 0487d6a8 | j_mayer | |
4987 | 0487d6a8 | j_mayer | /* Register moves */
|
4988 | 0487d6a8 | j_mayer | GEN32(gen_op_load_gpr64_T0, gen_op_load_gpr64_T0_gpr); |
4989 | 0487d6a8 | j_mayer | GEN32(gen_op_load_gpr64_T1, gen_op_load_gpr64_T1_gpr); |
4990 | 0487d6a8 | j_mayer | #if 0 // unused
|
4991 | 0487d6a8 | j_mayer | GEN32(gen_op_load_gpr64_T2, gen_op_load_gpr64_T2_gpr);
|
4992 | 0487d6a8 | j_mayer | #endif
|
4993 | 0487d6a8 | j_mayer | |
4994 | 0487d6a8 | j_mayer | GEN32(gen_op_store_T0_gpr64, gen_op_store_T0_gpr64_gpr); |
4995 | 0487d6a8 | j_mayer | GEN32(gen_op_store_T1_gpr64, gen_op_store_T1_gpr64_gpr); |
4996 | 0487d6a8 | j_mayer | #if 0 // unused
|
4997 | 0487d6a8 | j_mayer | GEN32(gen_op_store_T2_gpr64, gen_op_store_T2_gpr64_gpr);
|
4998 | 0487d6a8 | j_mayer | #endif
|
4999 | 0487d6a8 | j_mayer | |
5000 | 0487d6a8 | j_mayer | #define GEN_SPE(name0, name1, opc2, opc3, inval, type) \
|
5001 | 0487d6a8 | j_mayer | GEN_HANDLER(name0##_##name1, 0x04, opc2, opc3, inval, type) \ |
5002 | 0487d6a8 | j_mayer | { \ |
5003 | 0487d6a8 | j_mayer | if (Rc(ctx->opcode)) \
|
5004 | 0487d6a8 | j_mayer | gen_##name1(ctx); \ |
5005 | 0487d6a8 | j_mayer | else \
|
5006 | 0487d6a8 | j_mayer | gen_##name0(ctx); \ |
5007 | 0487d6a8 | j_mayer | } |
5008 | 0487d6a8 | j_mayer | |
5009 | 0487d6a8 | j_mayer | /* Handler for undefined SPE opcodes */
|
5010 | 0487d6a8 | j_mayer | static inline void gen_speundef (DisasContext *ctx) |
5011 | 0487d6a8 | j_mayer | { |
5012 | 0487d6a8 | j_mayer | RET_INVAL(ctx); |
5013 | 0487d6a8 | j_mayer | } |
5014 | 0487d6a8 | j_mayer | |
5015 | 0487d6a8 | j_mayer | /* SPE load and stores */
|
5016 | 0487d6a8 | j_mayer | static inline void gen_addr_spe_imm_index (DisasContext *ctx, int sh) |
5017 | 0487d6a8 | j_mayer | { |
5018 | 0487d6a8 | j_mayer | target_long simm = rB(ctx->opcode); |
5019 | 0487d6a8 | j_mayer | |
5020 | 0487d6a8 | j_mayer | if (rA(ctx->opcode) == 0) { |
5021 | 0487d6a8 | j_mayer | gen_set_T0(simm << sh); |
5022 | 0487d6a8 | j_mayer | } else {
|
5023 | 0487d6a8 | j_mayer | gen_op_load_gpr_T0(rA(ctx->opcode)); |
5024 | 0487d6a8 | j_mayer | if (likely(simm != 0)) |
5025 | 0487d6a8 | j_mayer | gen_op_addi(simm << sh); |
5026 | 0487d6a8 | j_mayer | } |
5027 | 0487d6a8 | j_mayer | } |
5028 | 0487d6a8 | j_mayer | |
5029 | 0487d6a8 | j_mayer | #define op_spe_ldst(name) (*gen_op_##name[ctx->mem_idx])() |
5030 | 0487d6a8 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
5031 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5032 | 0487d6a8 | j_mayer | #define OP_SPE_LD_TABLE(name) \
|
5033 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_l##name[] = { \ |
5034 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_raw, \ |
5035 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_raw, \ |
5036 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_64_raw, \ |
5037 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_64_raw, \ |
5038 | 0487d6a8 | j_mayer | }; |
5039 | 0487d6a8 | j_mayer | #define OP_SPE_ST_TABLE(name) \
|
5040 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_st##name[] = { \ |
5041 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_raw, \ |
5042 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_raw, \ |
5043 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_64_raw, \ |
5044 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_64_raw, \ |
5045 | 0487d6a8 | j_mayer | }; |
5046 | 0487d6a8 | j_mayer | #else /* defined(TARGET_PPC64) */ |
5047 | 0487d6a8 | j_mayer | #define OP_SPE_LD_TABLE(name) \
|
5048 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_l##name[] = { \ |
5049 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_raw, \ |
5050 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_raw, \ |
5051 | 0487d6a8 | j_mayer | }; |
5052 | 0487d6a8 | j_mayer | #define OP_SPE_ST_TABLE(name) \
|
5053 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_st##name[] = { \ |
5054 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_raw, \ |
5055 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_raw, \ |
5056 | 0487d6a8 | j_mayer | }; |
5057 | 0487d6a8 | j_mayer | #endif /* defined(TARGET_PPC64) */ |
5058 | 0487d6a8 | j_mayer | #else /* defined(CONFIG_USER_ONLY) */ |
5059 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5060 | 0487d6a8 | j_mayer | #define OP_SPE_LD_TABLE(name) \
|
5061 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_l##name[] = { \ |
5062 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_user, \ |
5063 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_user, \ |
5064 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_kernel, \ |
5065 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_kernel, \ |
5066 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_64_user, \ |
5067 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_64_user, \ |
5068 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_64_kernel, \ |
5069 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_64_kernel, \ |
5070 | 0487d6a8 | j_mayer | }; |
5071 | 0487d6a8 | j_mayer | #define OP_SPE_ST_TABLE(name) \
|
5072 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_st##name[] = { \ |
5073 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_user, \ |
5074 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_user, \ |
5075 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_kernel, \ |
5076 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_kernel, \ |
5077 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_64_user, \ |
5078 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_64_user, \ |
5079 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_64_kernel, \ |
5080 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_64_kernel, \ |
5081 | 0487d6a8 | j_mayer | }; |
5082 | 0487d6a8 | j_mayer | #else /* defined(TARGET_PPC64) */ |
5083 | 0487d6a8 | j_mayer | #define OP_SPE_LD_TABLE(name) \
|
5084 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_l##name[] = { \ |
5085 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_user, \ |
5086 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_user, \ |
5087 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_kernel, \ |
5088 | 0487d6a8 | j_mayer | &gen_op_spe_l##name##_le_kernel, \ |
5089 | 0487d6a8 | j_mayer | }; |
5090 | 0487d6a8 | j_mayer | #define OP_SPE_ST_TABLE(name) \
|
5091 | 0487d6a8 | j_mayer | static GenOpFunc *gen_op_spe_st##name[] = { \ |
5092 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_user, \ |
5093 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_user, \ |
5094 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_kernel, \ |
5095 | 0487d6a8 | j_mayer | &gen_op_spe_st##name##_le_kernel, \ |
5096 | 0487d6a8 | j_mayer | }; |
5097 | 0487d6a8 | j_mayer | #endif /* defined(TARGET_PPC64) */ |
5098 | 0487d6a8 | j_mayer | #endif /* defined(CONFIG_USER_ONLY) */ |
5099 | 0487d6a8 | j_mayer | |
5100 | 0487d6a8 | j_mayer | #define GEN_SPE_LD(name, sh) \
|
5101 | 0487d6a8 | j_mayer | static inline void gen_evl##name (DisasContext *ctx) \ |
5102 | 0487d6a8 | j_mayer | { \ |
5103 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5104 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5105 | 0487d6a8 | j_mayer | return; \
|
5106 | 0487d6a8 | j_mayer | } \ |
5107 | 0487d6a8 | j_mayer | gen_addr_spe_imm_index(ctx, sh); \ |
5108 | 0487d6a8 | j_mayer | op_spe_ldst(spe_l##name); \ |
5109 | 0487d6a8 | j_mayer | gen_op_store_T1_gpr64(rD(ctx->opcode)); \ |
5110 | 0487d6a8 | j_mayer | } |
5111 | 0487d6a8 | j_mayer | |
5112 | 0487d6a8 | j_mayer | #define GEN_SPE_LDX(name) \
|
5113 | 0487d6a8 | j_mayer | static inline void gen_evl##name##x (DisasContext *ctx) \ |
5114 | 0487d6a8 | j_mayer | { \ |
5115 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5116 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5117 | 0487d6a8 | j_mayer | return; \
|
5118 | 0487d6a8 | j_mayer | } \ |
5119 | 0487d6a8 | j_mayer | gen_addr_reg_index(ctx); \ |
5120 | 0487d6a8 | j_mayer | op_spe_ldst(spe_l##name); \ |
5121 | 0487d6a8 | j_mayer | gen_op_store_T1_gpr64(rD(ctx->opcode)); \ |
5122 | 0487d6a8 | j_mayer | } |
5123 | 0487d6a8 | j_mayer | |
5124 | 0487d6a8 | j_mayer | #define GEN_SPEOP_LD(name, sh) \
|
5125 | 0487d6a8 | j_mayer | OP_SPE_LD_TABLE(name); \ |
5126 | 0487d6a8 | j_mayer | GEN_SPE_LD(name, sh); \ |
5127 | 0487d6a8 | j_mayer | GEN_SPE_LDX(name) |
5128 | 0487d6a8 | j_mayer | |
5129 | 0487d6a8 | j_mayer | #define GEN_SPE_ST(name, sh) \
|
5130 | 0487d6a8 | j_mayer | static inline void gen_evst##name (DisasContext *ctx) \ |
5131 | 0487d6a8 | j_mayer | { \ |
5132 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5133 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5134 | 0487d6a8 | j_mayer | return; \
|
5135 | 0487d6a8 | j_mayer | } \ |
5136 | 0487d6a8 | j_mayer | gen_addr_spe_imm_index(ctx, sh); \ |
5137 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T1(rS(ctx->opcode)); \ |
5138 | 0487d6a8 | j_mayer | op_spe_ldst(spe_st##name); \ |
5139 | 0487d6a8 | j_mayer | } |
5140 | 0487d6a8 | j_mayer | |
5141 | 0487d6a8 | j_mayer | #define GEN_SPE_STX(name) \
|
5142 | 0487d6a8 | j_mayer | static inline void gen_evst##name##x (DisasContext *ctx) \ |
5143 | 0487d6a8 | j_mayer | { \ |
5144 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5145 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5146 | 0487d6a8 | j_mayer | return; \
|
5147 | 0487d6a8 | j_mayer | } \ |
5148 | 0487d6a8 | j_mayer | gen_addr_reg_index(ctx); \ |
5149 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T1(rS(ctx->opcode)); \ |
5150 | 0487d6a8 | j_mayer | op_spe_ldst(spe_st##name); \ |
5151 | 0487d6a8 | j_mayer | } |
5152 | 0487d6a8 | j_mayer | |
5153 | 0487d6a8 | j_mayer | #define GEN_SPEOP_ST(name, sh) \
|
5154 | 0487d6a8 | j_mayer | OP_SPE_ST_TABLE(name); \ |
5155 | 0487d6a8 | j_mayer | GEN_SPE_ST(name, sh); \ |
5156 | 0487d6a8 | j_mayer | GEN_SPE_STX(name) |
5157 | 0487d6a8 | j_mayer | |
5158 | 0487d6a8 | j_mayer | #define GEN_SPEOP_LDST(name, sh) \
|
5159 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(name, sh); \ |
5160 | 0487d6a8 | j_mayer | GEN_SPEOP_ST(name, sh) |
5161 | 0487d6a8 | j_mayer | |
5162 | 0487d6a8 | j_mayer | /* SPE arithmetic and logic */
|
5163 | 0487d6a8 | j_mayer | #define GEN_SPEOP_ARITH2(name) \
|
5164 | 0487d6a8 | j_mayer | static inline void gen_##name (DisasContext *ctx) \ |
5165 | 0487d6a8 | j_mayer | { \ |
5166 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5167 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5168 | 0487d6a8 | j_mayer | return; \
|
5169 | 0487d6a8 | j_mayer | } \ |
5170 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rA(ctx->opcode)); \ |
5171 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T1(rB(ctx->opcode)); \ |
5172 | 0487d6a8 | j_mayer | gen_op_##name(); \ |
5173 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); \ |
5174 | 0487d6a8 | j_mayer | } |
5175 | 0487d6a8 | j_mayer | |
5176 | 0487d6a8 | j_mayer | #define GEN_SPEOP_ARITH1(name) \
|
5177 | 0487d6a8 | j_mayer | static inline void gen_##name (DisasContext *ctx) \ |
5178 | 0487d6a8 | j_mayer | { \ |
5179 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5180 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5181 | 0487d6a8 | j_mayer | return; \
|
5182 | 0487d6a8 | j_mayer | } \ |
5183 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rA(ctx->opcode)); \ |
5184 | 0487d6a8 | j_mayer | gen_op_##name(); \ |
5185 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); \ |
5186 | 0487d6a8 | j_mayer | } |
5187 | 0487d6a8 | j_mayer | |
5188 | 0487d6a8 | j_mayer | #define GEN_SPEOP_COMP(name) \
|
5189 | 0487d6a8 | j_mayer | static inline void gen_##name (DisasContext *ctx) \ |
5190 | 0487d6a8 | j_mayer | { \ |
5191 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5192 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5193 | 0487d6a8 | j_mayer | return; \
|
5194 | 0487d6a8 | j_mayer | } \ |
5195 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rA(ctx->opcode)); \ |
5196 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T1(rB(ctx->opcode)); \ |
5197 | 0487d6a8 | j_mayer | gen_op_##name(); \ |
5198 | 0487d6a8 | j_mayer | gen_op_store_T0_crf(crfD(ctx->opcode)); \ |
5199 | 0487d6a8 | j_mayer | } |
5200 | 0487d6a8 | j_mayer | |
5201 | 0487d6a8 | j_mayer | /* Logical */
|
5202 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evand); |
5203 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evandc); |
5204 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evxor); |
5205 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evor); |
5206 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evnor); |
5207 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(eveqv); |
5208 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evorc); |
5209 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evnand); |
5210 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evsrwu); |
5211 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evsrws); |
5212 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evslw); |
5213 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evrlw); |
5214 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evmergehi); |
5215 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evmergelo); |
5216 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evmergehilo); |
5217 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evmergelohi); |
5218 | 0487d6a8 | j_mayer | |
5219 | 0487d6a8 | j_mayer | /* Arithmetic */
|
5220 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evaddw); |
5221 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evsubfw); |
5222 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evabs); |
5223 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evneg); |
5224 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evextsb); |
5225 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evextsh); |
5226 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evrndw); |
5227 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evcntlzw); |
5228 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evcntlsw); |
5229 | 0487d6a8 | j_mayer | static inline void gen_brinc (DisasContext *ctx) |
5230 | 0487d6a8 | j_mayer | { |
5231 | 0487d6a8 | j_mayer | /* Note: brinc is usable even if SPE is disabled */
|
5232 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rA(ctx->opcode)); |
5233 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T1(rB(ctx->opcode)); |
5234 | 0487d6a8 | j_mayer | gen_op_brinc(); |
5235 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); |
5236 | 0487d6a8 | j_mayer | } |
5237 | 0487d6a8 | j_mayer | |
5238 | 0487d6a8 | j_mayer | #define GEN_SPEOP_ARITH_IMM2(name) \
|
5239 | 0487d6a8 | j_mayer | static inline void gen_##name##i (DisasContext *ctx) \ |
5240 | 0487d6a8 | j_mayer | { \ |
5241 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5242 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5243 | 0487d6a8 | j_mayer | return; \
|
5244 | 0487d6a8 | j_mayer | } \ |
5245 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rB(ctx->opcode)); \ |
5246 | 0487d6a8 | j_mayer | gen_op_splatwi_T1_64(rA(ctx->opcode)); \ |
5247 | 0487d6a8 | j_mayer | gen_op_##name(); \ |
5248 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); \ |
5249 | 0487d6a8 | j_mayer | } |
5250 | 0487d6a8 | j_mayer | |
5251 | 0487d6a8 | j_mayer | #define GEN_SPEOP_LOGIC_IMM2(name) \
|
5252 | 0487d6a8 | j_mayer | static inline void gen_##name##i (DisasContext *ctx) \ |
5253 | 0487d6a8 | j_mayer | { \ |
5254 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) { \
|
5255 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0); \
|
5256 | 0487d6a8 | j_mayer | return; \
|
5257 | 0487d6a8 | j_mayer | } \ |
5258 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rA(ctx->opcode)); \ |
5259 | 0487d6a8 | j_mayer | gen_op_splatwi_T1_64(rB(ctx->opcode)); \ |
5260 | 0487d6a8 | j_mayer | gen_op_##name(); \ |
5261 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); \ |
5262 | 0487d6a8 | j_mayer | } |
5263 | 0487d6a8 | j_mayer | |
5264 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH_IMM2(evaddw); |
5265 | 0487d6a8 | j_mayer | #define gen_evaddiw gen_evaddwi
|
5266 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH_IMM2(evsubfw); |
5267 | 0487d6a8 | j_mayer | #define gen_evsubifw gen_evsubfwi
|
5268 | 0487d6a8 | j_mayer | GEN_SPEOP_LOGIC_IMM2(evslw); |
5269 | 0487d6a8 | j_mayer | GEN_SPEOP_LOGIC_IMM2(evsrwu); |
5270 | 0487d6a8 | j_mayer | #define gen_evsrwis gen_evsrwsi
|
5271 | 0487d6a8 | j_mayer | GEN_SPEOP_LOGIC_IMM2(evsrws); |
5272 | 0487d6a8 | j_mayer | #define gen_evsrwiu gen_evsrwui
|
5273 | 0487d6a8 | j_mayer | GEN_SPEOP_LOGIC_IMM2(evrlw); |
5274 | 0487d6a8 | j_mayer | |
5275 | 0487d6a8 | j_mayer | static inline void gen_evsplati (DisasContext *ctx) |
5276 | 0487d6a8 | j_mayer | { |
5277 | 0487d6a8 | j_mayer | int32_t imm = (int32_t)(rA(ctx->opcode) << 27) >> 27; |
5278 | 0487d6a8 | j_mayer | |
5279 | 0487d6a8 | j_mayer | gen_op_splatwi_T0_64(imm); |
5280 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); |
5281 | 0487d6a8 | j_mayer | } |
5282 | 0487d6a8 | j_mayer | |
5283 | 0487d6a8 | j_mayer | static inline void gen_evsplatfi (DisasContext *ctx) |
5284 | 0487d6a8 | j_mayer | { |
5285 | 0487d6a8 | j_mayer | uint32_t imm = rA(ctx->opcode) << 27;
|
5286 | 0487d6a8 | j_mayer | |
5287 | 0487d6a8 | j_mayer | gen_op_splatwi_T0_64(imm); |
5288 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); |
5289 | 0487d6a8 | j_mayer | } |
5290 | 0487d6a8 | j_mayer | |
5291 | 0487d6a8 | j_mayer | /* Comparison */
|
5292 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evcmpgtu); |
5293 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evcmpgts); |
5294 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evcmpltu); |
5295 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evcmplts); |
5296 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evcmpeq); |
5297 | 0487d6a8 | j_mayer | |
5298 | 0487d6a8 | j_mayer | GEN_SPE(evaddw, speundef, 0x00, 0x08, 0x00000000, PPC_SPE); //// |
5299 | 0487d6a8 | j_mayer | GEN_SPE(evaddiw, speundef, 0x01, 0x08, 0x00000000, PPC_SPE); |
5300 | 0487d6a8 | j_mayer | GEN_SPE(evsubfw, speundef, 0x02, 0x08, 0x00000000, PPC_SPE); //// |
5301 | 0487d6a8 | j_mayer | GEN_SPE(evsubifw, speundef, 0x03, 0x08, 0x00000000, PPC_SPE); |
5302 | 0487d6a8 | j_mayer | GEN_SPE(evabs, evneg, 0x04, 0x08, 0x0000F800, PPC_SPE); //// |
5303 | 0487d6a8 | j_mayer | GEN_SPE(evextsb, evextsh, 0x05, 0x08, 0x0000F800, PPC_SPE); //// |
5304 | 0487d6a8 | j_mayer | GEN_SPE(evrndw, evcntlzw, 0x06, 0x08, 0x0000F800, PPC_SPE); //// |
5305 | 0487d6a8 | j_mayer | GEN_SPE(evcntlsw, brinc, 0x07, 0x08, 0x00000000, PPC_SPE); // |
5306 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evand, 0x08, 0x08, 0x00000000, PPC_SPE); //// |
5307 | 0487d6a8 | j_mayer | GEN_SPE(evandc, speundef, 0x09, 0x08, 0x00000000, PPC_SPE); //// |
5308 | 0487d6a8 | j_mayer | GEN_SPE(evxor, evor, 0x0B, 0x08, 0x00000000, PPC_SPE); //// |
5309 | 0487d6a8 | j_mayer | GEN_SPE(evnor, eveqv, 0x0C, 0x08, 0x00000000, PPC_SPE); //// |
5310 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evorc, 0x0D, 0x08, 0x00000000, PPC_SPE); //// |
5311 | 0487d6a8 | j_mayer | GEN_SPE(evnand, speundef, 0x0F, 0x08, 0x00000000, PPC_SPE); //// |
5312 | 0487d6a8 | j_mayer | GEN_SPE(evsrwu, evsrws, 0x10, 0x08, 0x00000000, PPC_SPE); //// |
5313 | 0487d6a8 | j_mayer | GEN_SPE(evsrwiu, evsrwis, 0x11, 0x08, 0x00000000, PPC_SPE); |
5314 | 0487d6a8 | j_mayer | GEN_SPE(evslw, speundef, 0x12, 0x08, 0x00000000, PPC_SPE); //// |
5315 | 0487d6a8 | j_mayer | GEN_SPE(evslwi, speundef, 0x13, 0x08, 0x00000000, PPC_SPE); |
5316 | 0487d6a8 | j_mayer | GEN_SPE(evrlw, evsplati, 0x14, 0x08, 0x00000000, PPC_SPE); // |
5317 | 0487d6a8 | j_mayer | GEN_SPE(evrlwi, evsplatfi, 0x15, 0x08, 0x00000000, PPC_SPE); |
5318 | 0487d6a8 | j_mayer | GEN_SPE(evmergehi, evmergelo, 0x16, 0x08, 0x00000000, PPC_SPE); //// |
5319 | 0487d6a8 | j_mayer | GEN_SPE(evmergehilo, evmergelohi, 0x17, 0x08, 0x00000000, PPC_SPE); //// |
5320 | 0487d6a8 | j_mayer | GEN_SPE(evcmpgtu, evcmpgts, 0x18, 0x08, 0x00600000, PPC_SPE); //// |
5321 | 0487d6a8 | j_mayer | GEN_SPE(evcmpltu, evcmplts, 0x19, 0x08, 0x00600000, PPC_SPE); //// |
5322 | 0487d6a8 | j_mayer | GEN_SPE(evcmpeq, speundef, 0x1A, 0x08, 0x00600000, PPC_SPE); //// |
5323 | 0487d6a8 | j_mayer | |
5324 | 0487d6a8 | j_mayer | static inline void gen_evsel (DisasContext *ctx) |
5325 | 0487d6a8 | j_mayer | { |
5326 | 0487d6a8 | j_mayer | if (unlikely(!ctx->spe_enabled)) {
|
5327 | 0487d6a8 | j_mayer | RET_EXCP(ctx, EXCP_NO_SPE, 0);
|
5328 | 0487d6a8 | j_mayer | return;
|
5329 | 0487d6a8 | j_mayer | } |
5330 | 0487d6a8 | j_mayer | gen_op_load_crf_T0(ctx->opcode & 0x7);
|
5331 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rA(ctx->opcode)); |
5332 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T1(rB(ctx->opcode)); |
5333 | 0487d6a8 | j_mayer | gen_op_evsel(); |
5334 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); |
5335 | 0487d6a8 | j_mayer | } |
5336 | 0487d6a8 | j_mayer | |
5337 | 0487d6a8 | j_mayer | GEN_HANDLER(evsel0, 0x04, 0x1c, 0x09, 0x00000000, PPC_SPE) |
5338 | 0487d6a8 | j_mayer | { |
5339 | 0487d6a8 | j_mayer | gen_evsel(ctx); |
5340 | 0487d6a8 | j_mayer | } |
5341 | 0487d6a8 | j_mayer | GEN_HANDLER(evsel1, 0x04, 0x1d, 0x09, 0x00000000, PPC_SPE) |
5342 | 0487d6a8 | j_mayer | { |
5343 | 0487d6a8 | j_mayer | gen_evsel(ctx); |
5344 | 0487d6a8 | j_mayer | } |
5345 | 0487d6a8 | j_mayer | GEN_HANDLER(evsel2, 0x04, 0x1e, 0x09, 0x00000000, PPC_SPE) |
5346 | 0487d6a8 | j_mayer | { |
5347 | 0487d6a8 | j_mayer | gen_evsel(ctx); |
5348 | 0487d6a8 | j_mayer | } |
5349 | 0487d6a8 | j_mayer | GEN_HANDLER(evsel3, 0x04, 0x1f, 0x09, 0x00000000, PPC_SPE) |
5350 | 0487d6a8 | j_mayer | { |
5351 | 0487d6a8 | j_mayer | gen_evsel(ctx); |
5352 | 0487d6a8 | j_mayer | } |
5353 | 0487d6a8 | j_mayer | |
5354 | 0487d6a8 | j_mayer | /* Load and stores */
|
5355 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5356 | 0487d6a8 | j_mayer | /* In that case, we already have 64 bits load & stores
|
5357 | 0487d6a8 | j_mayer | * so, spe_ldd is equivalent to ld and spe_std is equivalent to std
|
5358 | 0487d6a8 | j_mayer | */
|
5359 | 0487d6a8 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
5360 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_raw gen_op_ld_raw
|
5361 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_64_raw gen_op_ld_64_raw
|
5362 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_le_raw gen_op_ld_le_raw
|
5363 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_le_64_raw gen_op_ld_le_64_raw
|
5364 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_raw gen_op_ld_raw
|
5365 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_64_raw gen_op_std_64_raw
|
5366 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_le_raw gen_op_std_le_raw
|
5367 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_le_64_raw gen_op_std_le_64_raw
|
5368 | 0487d6a8 | j_mayer | #else /* defined(CONFIG_USER_ONLY) */ |
5369 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_kernel gen_op_ld_kernel
|
5370 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_64_kernel gen_op_ld_64_kernel
|
5371 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_le_kernel gen_op_ld_kernel
|
5372 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_le_64_kernel gen_op_ld_64_kernel
|
5373 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_user gen_op_ld_user
|
5374 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_64_user gen_op_ld_64_user
|
5375 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_le_user gen_op_ld_le_user
|
5376 | 0487d6a8 | j_mayer | #define gen_op_spe_ldd_le_64_user gen_op_ld_le_64_user
|
5377 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_kernel gen_op_std_kernel
|
5378 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_64_kernel gen_op_std_64_kernel
|
5379 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_le_kernel gen_op_std_kernel
|
5380 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_le_64_kernel gen_op_std_64_kernel
|
5381 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_user gen_op_std_user
|
5382 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_64_user gen_op_std_64_user
|
5383 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_le_user gen_op_std_le_user
|
5384 | 0487d6a8 | j_mayer | #define gen_op_spe_stdd_le_64_user gen_op_std_le_64_user
|
5385 | 0487d6a8 | j_mayer | #endif /* defined(CONFIG_USER_ONLY) */ |
5386 | 0487d6a8 | j_mayer | #endif /* defined(TARGET_PPC64) */ |
5387 | 0487d6a8 | j_mayer | GEN_SPEOP_LDST(dd, 3);
|
5388 | 0487d6a8 | j_mayer | GEN_SPEOP_LDST(dw, 3);
|
5389 | 0487d6a8 | j_mayer | GEN_SPEOP_LDST(dh, 3);
|
5390 | 0487d6a8 | j_mayer | GEN_SPEOP_LDST(whe, 2);
|
5391 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(whou, 2);
|
5392 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(whos, 2);
|
5393 | 0487d6a8 | j_mayer | GEN_SPEOP_ST(who, 2);
|
5394 | 0487d6a8 | j_mayer | |
5395 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5396 | 0487d6a8 | j_mayer | /* In that case, spe_stwwo is equivalent to stw */
|
5397 | 0487d6a8 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
5398 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_raw gen_op_stw_raw
|
5399 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_le_raw gen_op_stw_le_raw
|
5400 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_64_raw gen_op_stw_64_raw
|
5401 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_le_64_raw gen_op_stw_le_64_raw
|
5402 | 0487d6a8 | j_mayer | #else
|
5403 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_user gen_op_stw_user
|
5404 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_le_user gen_op_stw_le_user
|
5405 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_64_user gen_op_stw_64_user
|
5406 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_le_64_user gen_op_stw_le_64_user
|
5407 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_kernel gen_op_stw_kernel
|
5408 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_le_kernel gen_op_stw_le_kernel
|
5409 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_64_kernel gen_op_stw_64_kernel
|
5410 | 0487d6a8 | j_mayer | #define gen_op_spe_stwwo_le_64_kernel gen_op_stw_le_64_kernel
|
5411 | 0487d6a8 | j_mayer | #endif
|
5412 | 0487d6a8 | j_mayer | #endif
|
5413 | 0487d6a8 | j_mayer | #define _GEN_OP_SPE_STWWE(suffix) \
|
5414 | 0487d6a8 | j_mayer | static inline void gen_op_spe_stwwe_##suffix (void) \ |
5415 | 0487d6a8 | j_mayer | { \ |
5416 | 0487d6a8 | j_mayer | gen_op_srli32_T1_64(); \ |
5417 | 0487d6a8 | j_mayer | gen_op_spe_stwwo_##suffix(); \ |
5418 | 0487d6a8 | j_mayer | } |
5419 | 0487d6a8 | j_mayer | #define _GEN_OP_SPE_STWWE_LE(suffix) \
|
5420 | 0487d6a8 | j_mayer | static inline void gen_op_spe_stwwe_le_##suffix (void) \ |
5421 | 0487d6a8 | j_mayer | { \ |
5422 | 0487d6a8 | j_mayer | gen_op_srli32_T1_64(); \ |
5423 | 0487d6a8 | j_mayer | gen_op_spe_stwwo_le_##suffix(); \ |
5424 | 0487d6a8 | j_mayer | } |
5425 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5426 | 0487d6a8 | j_mayer | #define GEN_OP_SPE_STWWE(suffix) \
|
5427 | 0487d6a8 | j_mayer | _GEN_OP_SPE_STWWE(suffix); \ |
5428 | 0487d6a8 | j_mayer | _GEN_OP_SPE_STWWE_LE(suffix); \ |
5429 | 0487d6a8 | j_mayer | static inline void gen_op_spe_stwwe_64_##suffix (void) \ |
5430 | 0487d6a8 | j_mayer | { \ |
5431 | 0487d6a8 | j_mayer | gen_op_srli32_T1_64(); \ |
5432 | 0487d6a8 | j_mayer | gen_op_spe_stwwo_64_##suffix(); \ |
5433 | 0487d6a8 | j_mayer | } \ |
5434 | 0487d6a8 | j_mayer | static inline void gen_op_spe_stwwe_le_64_##suffix (void) \ |
5435 | 0487d6a8 | j_mayer | { \ |
5436 | 0487d6a8 | j_mayer | gen_op_srli32_T1_64(); \ |
5437 | 0487d6a8 | j_mayer | gen_op_spe_stwwo_le_64_##suffix(); \ |
5438 | 0487d6a8 | j_mayer | } |
5439 | 0487d6a8 | j_mayer | #else
|
5440 | 0487d6a8 | j_mayer | #define GEN_OP_SPE_STWWE(suffix) \
|
5441 | 0487d6a8 | j_mayer | _GEN_OP_SPE_STWWE(suffix); \ |
5442 | 0487d6a8 | j_mayer | _GEN_OP_SPE_STWWE_LE(suffix) |
5443 | 0487d6a8 | j_mayer | #endif
|
5444 | 0487d6a8 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
5445 | 0487d6a8 | j_mayer | GEN_OP_SPE_STWWE(raw); |
5446 | 0487d6a8 | j_mayer | #else /* defined(CONFIG_USER_ONLY) */ |
5447 | 0487d6a8 | j_mayer | GEN_OP_SPE_STWWE(kernel); |
5448 | 0487d6a8 | j_mayer | GEN_OP_SPE_STWWE(user); |
5449 | 0487d6a8 | j_mayer | #endif /* defined(CONFIG_USER_ONLY) */ |
5450 | 0487d6a8 | j_mayer | GEN_SPEOP_ST(wwe, 2);
|
5451 | 0487d6a8 | j_mayer | GEN_SPEOP_ST(wwo, 2);
|
5452 | 0487d6a8 | j_mayer | |
5453 | 0487d6a8 | j_mayer | #define GEN_SPE_LDSPLAT(name, op, suffix) \
|
5454 | 0487d6a8 | j_mayer | static inline void gen_op_spe_l##name##_##suffix (void) \ |
5455 | 0487d6a8 | j_mayer | { \ |
5456 | 0487d6a8 | j_mayer | gen_op_##op##_##suffix(); \ |
5457 | 0487d6a8 | j_mayer | gen_op_splatw_T1_64(); \ |
5458 | 0487d6a8 | j_mayer | } |
5459 | 0487d6a8 | j_mayer | |
5460 | 0487d6a8 | j_mayer | #define GEN_OP_SPE_LHE(suffix) \
|
5461 | 0487d6a8 | j_mayer | static inline void gen_op_spe_lhe_##suffix (void) \ |
5462 | 0487d6a8 | j_mayer | { \ |
5463 | 0487d6a8 | j_mayer | gen_op_spe_lh_##suffix(); \ |
5464 | 0487d6a8 | j_mayer | gen_op_sli16_T1_64(); \ |
5465 | 0487d6a8 | j_mayer | } |
5466 | 0487d6a8 | j_mayer | |
5467 | 0487d6a8 | j_mayer | #define GEN_OP_SPE_LHX(suffix) \
|
5468 | 0487d6a8 | j_mayer | static inline void gen_op_spe_lhx_##suffix (void) \ |
5469 | 0487d6a8 | j_mayer | { \ |
5470 | 0487d6a8 | j_mayer | gen_op_spe_lh_##suffix(); \ |
5471 | 0487d6a8 | j_mayer | gen_op_extsh_T1_64(); \ |
5472 | 0487d6a8 | j_mayer | } |
5473 | 0487d6a8 | j_mayer | |
5474 | 0487d6a8 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
5475 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(raw); |
5476 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, raw); |
5477 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(le_raw); |
5478 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_raw); |
5479 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, raw); |
5480 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_raw); |
5481 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(raw); |
5482 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, raw); |
5483 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(le_raw); |
5484 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_raw); |
5485 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5486 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(64_raw);
|
5487 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_raw);
|
5488 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(le_64_raw); |
5489 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_raw); |
5490 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_raw);
|
5491 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_raw); |
5492 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(64_raw);
|
5493 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_raw);
|
5494 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(le_64_raw); |
5495 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_raw); |
5496 | 0487d6a8 | j_mayer | #endif
|
5497 | 0487d6a8 | j_mayer | #else
|
5498 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(kernel); |
5499 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(user); |
5500 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, kernel); |
5501 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, user); |
5502 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(le_kernel); |
5503 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(le_user); |
5504 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_kernel); |
5505 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_user); |
5506 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, kernel); |
5507 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, user); |
5508 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_kernel); |
5509 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_user); |
5510 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(kernel); |
5511 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(user); |
5512 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, kernel); |
5513 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, user); |
5514 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(le_kernel); |
5515 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(le_user); |
5516 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_kernel); |
5517 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_user); |
5518 | 0487d6a8 | j_mayer | #if defined(TARGET_PPC64)
|
5519 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(64_kernel);
|
5520 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(64_user);
|
5521 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_kernel);
|
5522 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, 64_user);
|
5523 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(le_64_kernel); |
5524 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHE(le_64_user); |
5525 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_kernel); |
5526 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhesplat, spe_lhe, le_64_user); |
5527 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_kernel);
|
5528 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, 64_user);
|
5529 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_kernel); |
5530 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhousplat, spe_lh, le_64_user); |
5531 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(64_kernel);
|
5532 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(64_user);
|
5533 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_kernel);
|
5534 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, 64_user);
|
5535 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(le_64_kernel); |
5536 | 0487d6a8 | j_mayer | GEN_OP_SPE_LHX(le_64_user); |
5537 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_kernel); |
5538 | 0487d6a8 | j_mayer | GEN_SPE_LDSPLAT(hhossplat, spe_lhx, le_64_user); |
5539 | 0487d6a8 | j_mayer | #endif
|
5540 | 0487d6a8 | j_mayer | #endif
|
5541 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(hhesplat, 1);
|
5542 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(hhousplat, 1);
|
5543 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(hhossplat, 1);
|
5544 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(wwsplat, 2);
|
5545 | 0487d6a8 | j_mayer | GEN_SPEOP_LD(whsplat, 2);
|
5546 | 0487d6a8 | j_mayer | |
5547 | 0487d6a8 | j_mayer | GEN_SPE(evlddx, evldd, 0x00, 0x0C, 0x00000000, PPC_SPE); // |
5548 | 0487d6a8 | j_mayer | GEN_SPE(evldwx, evldw, 0x01, 0x0C, 0x00000000, PPC_SPE); // |
5549 | 0487d6a8 | j_mayer | GEN_SPE(evldhx, evldh, 0x02, 0x0C, 0x00000000, PPC_SPE); // |
5550 | 0487d6a8 | j_mayer | GEN_SPE(evlhhesplatx, evlhhesplat, 0x04, 0x0C, 0x00000000, PPC_SPE); // |
5551 | 0487d6a8 | j_mayer | GEN_SPE(evlhhousplatx, evlhhousplat, 0x06, 0x0C, 0x00000000, PPC_SPE); // |
5552 | 0487d6a8 | j_mayer | GEN_SPE(evlhhossplatx, evlhhossplat, 0x07, 0x0C, 0x00000000, PPC_SPE); // |
5553 | 0487d6a8 | j_mayer | GEN_SPE(evlwhex, evlwhe, 0x08, 0x0C, 0x00000000, PPC_SPE); // |
5554 | 0487d6a8 | j_mayer | GEN_SPE(evlwhoux, evlwhou, 0x0A, 0x0C, 0x00000000, PPC_SPE); // |
5555 | 0487d6a8 | j_mayer | GEN_SPE(evlwhosx, evlwhos, 0x0B, 0x0C, 0x00000000, PPC_SPE); // |
5556 | 0487d6a8 | j_mayer | GEN_SPE(evlwwsplatx, evlwwsplat, 0x0C, 0x0C, 0x00000000, PPC_SPE); // |
5557 | 0487d6a8 | j_mayer | GEN_SPE(evlwhsplatx, evlwhsplat, 0x0E, 0x0C, 0x00000000, PPC_SPE); // |
5558 | 0487d6a8 | j_mayer | GEN_SPE(evstddx, evstdd, 0x10, 0x0C, 0x00000000, PPC_SPE); // |
5559 | 0487d6a8 | j_mayer | GEN_SPE(evstdwx, evstdw, 0x11, 0x0C, 0x00000000, PPC_SPE); // |
5560 | 0487d6a8 | j_mayer | GEN_SPE(evstdhx, evstdh, 0x12, 0x0C, 0x00000000, PPC_SPE); // |
5561 | 0487d6a8 | j_mayer | GEN_SPE(evstwhex, evstwhe, 0x18, 0x0C, 0x00000000, PPC_SPE); // |
5562 | 0487d6a8 | j_mayer | GEN_SPE(evstwhox, evstwho, 0x1A, 0x0C, 0x00000000, PPC_SPE); // |
5563 | 0487d6a8 | j_mayer | GEN_SPE(evstwwex, evstwwe, 0x1C, 0x0C, 0x00000000, PPC_SPE); // |
5564 | 0487d6a8 | j_mayer | GEN_SPE(evstwwox, evstwwo, 0x1E, 0x0C, 0x00000000, PPC_SPE); // |
5565 | 0487d6a8 | j_mayer | |
5566 | 0487d6a8 | j_mayer | /* Multiply and add - TODO */
|
5567 | 0487d6a8 | j_mayer | #if 0
|
5568 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhessf, 0x01, 0x10, 0x00000000, PPC_SPE);
|
5569 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhossf, 0x03, 0x10, 0x00000000, PPC_SPE);
|
5570 | 0487d6a8 | j_mayer | GEN_SPE(evmheumi, evmhesmi, 0x04, 0x10, 0x00000000, PPC_SPE);
|
5571 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhesmf, 0x05, 0x10, 0x00000000, PPC_SPE);
|
5572 | 0487d6a8 | j_mayer | GEN_SPE(evmhoumi, evmhosmi, 0x06, 0x10, 0x00000000, PPC_SPE);
|
5573 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhosmf, 0x07, 0x10, 0x00000000, PPC_SPE);
|
5574 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhessfa, 0x11, 0x10, 0x00000000, PPC_SPE);
|
5575 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhossfa, 0x13, 0x10, 0x00000000, PPC_SPE);
|
5576 | 0487d6a8 | j_mayer | GEN_SPE(evmheumia, evmhesmia, 0x14, 0x10, 0x00000000, PPC_SPE);
|
5577 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhesmfa, 0x15, 0x10, 0x00000000, PPC_SPE);
|
5578 | 0487d6a8 | j_mayer | GEN_SPE(evmhoumia, evmhosmia, 0x16, 0x10, 0x00000000, PPC_SPE);
|
5579 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhosmfa, 0x17, 0x10, 0x00000000, PPC_SPE);
|
5580 | 0487d6a8 | j_mayer | |
5581 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwhssf, 0x03, 0x11, 0x00000000, PPC_SPE);
|
5582 | 0487d6a8 | j_mayer | GEN_SPE(evmwlumi, speundef, 0x04, 0x11, 0x00000000, PPC_SPE);
|
5583 | 0487d6a8 | j_mayer | GEN_SPE(evmwhumi, evmwhsmi, 0x06, 0x11, 0x00000000, PPC_SPE);
|
5584 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwhsmf, 0x07, 0x11, 0x00000000, PPC_SPE);
|
5585 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwssf, 0x09, 0x11, 0x00000000, PPC_SPE);
|
5586 | 0487d6a8 | j_mayer | GEN_SPE(evmwumi, evmwsmi, 0x0C, 0x11, 0x00000000, PPC_SPE);
|
5587 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwsmf, 0x0D, 0x11, 0x00000000, PPC_SPE);
|
5588 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwhssfa, 0x13, 0x11, 0x00000000, PPC_SPE);
|
5589 | 0487d6a8 | j_mayer | GEN_SPE(evmwlumia, speundef, 0x14, 0x11, 0x00000000, PPC_SPE);
|
5590 | 0487d6a8 | j_mayer | GEN_SPE(evmwhumia, evmwhsmia, 0x16, 0x11, 0x00000000, PPC_SPE);
|
5591 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwhsmfa, 0x17, 0x11, 0x00000000, PPC_SPE);
|
5592 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwssfa, 0x19, 0x11, 0x00000000, PPC_SPE);
|
5593 | 0487d6a8 | j_mayer | GEN_SPE(evmwumia, evmwsmia, 0x1C, 0x11, 0x00000000, PPC_SPE);
|
5594 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwsmfa, 0x1D, 0x11, 0x00000000, PPC_SPE);
|
5595 | 0487d6a8 | j_mayer | |
5596 | 0487d6a8 | j_mayer | GEN_SPE(evadduiaaw, evaddsiaaw, 0x00, 0x13, 0x0000F800, PPC_SPE);
|
5597 | 0487d6a8 | j_mayer | GEN_SPE(evsubfusiaaw, evsubfssiaaw, 0x01, 0x13, 0x0000F800, PPC_SPE);
|
5598 | 0487d6a8 | j_mayer | GEN_SPE(evaddumiaaw, evaddsmiaaw, 0x04, 0x13, 0x0000F800, PPC_SPE);
|
5599 | 0487d6a8 | j_mayer | GEN_SPE(evsubfumiaaw, evsubfsmiaaw, 0x05, 0x13, 0x0000F800, PPC_SPE);
|
5600 | 0487d6a8 | j_mayer | GEN_SPE(evdivws, evdivwu, 0x06, 0x13, 0x00000000, PPC_SPE);
|
5601 | 0487d6a8 | j_mayer | GEN_SPE(evmra, speundef, 0x07, 0x13, 0x0000F800, PPC_SPE);
|
5602 | 0487d6a8 | j_mayer | |
5603 | 0487d6a8 | j_mayer | GEN_SPE(evmheusiaaw, evmhessiaaw, 0x00, 0x14, 0x00000000, PPC_SPE);
|
5604 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhessfaaw, 0x01, 0x14, 0x00000000, PPC_SPE);
|
5605 | 0487d6a8 | j_mayer | GEN_SPE(evmhousiaaw, evmhossiaaw, 0x02, 0x14, 0x00000000, PPC_SPE);
|
5606 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhossfaaw, 0x03, 0x14, 0x00000000, PPC_SPE);
|
5607 | 0487d6a8 | j_mayer | GEN_SPE(evmheumiaaw, evmhesmiaaw, 0x04, 0x14, 0x00000000, PPC_SPE);
|
5608 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhesmfaaw, 0x05, 0x14, 0x00000000, PPC_SPE);
|
5609 | 0487d6a8 | j_mayer | GEN_SPE(evmhoumiaaw, evmhosmiaaw, 0x06, 0x14, 0x00000000, PPC_SPE);
|
5610 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhosmfaaw, 0x07, 0x14, 0x00000000, PPC_SPE);
|
5611 | 0487d6a8 | j_mayer | GEN_SPE(evmhegumiaa, evmhegsmiaa, 0x14, 0x14, 0x00000000, PPC_SPE);
|
5612 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhegsmfaa, 0x15, 0x14, 0x00000000, PPC_SPE);
|
5613 | 0487d6a8 | j_mayer | GEN_SPE(evmhogumiaa, evmhogsmiaa, 0x16, 0x14, 0x00000000, PPC_SPE);
|
5614 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhogsmfaa, 0x17, 0x14, 0x00000000, PPC_SPE);
|
5615 | 0487d6a8 | j_mayer | |
5616 | 0487d6a8 | j_mayer | GEN_SPE(evmwlusiaaw, evmwlssiaaw, 0x00, 0x15, 0x00000000, PPC_SPE);
|
5617 | 0487d6a8 | j_mayer | GEN_SPE(evmwlumiaaw, evmwlsmiaaw, 0x04, 0x15, 0x00000000, PPC_SPE);
|
5618 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwssfaa, 0x09, 0x15, 0x00000000, PPC_SPE);
|
5619 | 0487d6a8 | j_mayer | GEN_SPE(evmwumiaa, evmwsmiaa, 0x0C, 0x15, 0x00000000, PPC_SPE);
|
5620 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwsmfaa, 0x0D, 0x15, 0x00000000, PPC_SPE);
|
5621 | 0487d6a8 | j_mayer | |
5622 | 0487d6a8 | j_mayer | GEN_SPE(evmheusianw, evmhessianw, 0x00, 0x16, 0x00000000, PPC_SPE);
|
5623 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhessfanw, 0x01, 0x16, 0x00000000, PPC_SPE);
|
5624 | 0487d6a8 | j_mayer | GEN_SPE(evmhousianw, evmhossianw, 0x02, 0x16, 0x00000000, PPC_SPE);
|
5625 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhossfanw, 0x03, 0x16, 0x00000000, PPC_SPE);
|
5626 | 0487d6a8 | j_mayer | GEN_SPE(evmheumianw, evmhesmianw, 0x04, 0x16, 0x00000000, PPC_SPE);
|
5627 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhesmfanw, 0x05, 0x16, 0x00000000, PPC_SPE);
|
5628 | 0487d6a8 | j_mayer | GEN_SPE(evmhoumianw, evmhosmianw, 0x06, 0x16, 0x00000000, PPC_SPE);
|
5629 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhosmfanw, 0x07, 0x16, 0x00000000, PPC_SPE);
|
5630 | 0487d6a8 | j_mayer | GEN_SPE(evmhegumian, evmhegsmian, 0x14, 0x16, 0x00000000, PPC_SPE);
|
5631 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhegsmfan, 0x15, 0x16, 0x00000000, PPC_SPE);
|
5632 | 0487d6a8 | j_mayer | GEN_SPE(evmhigumian, evmhigsmian, 0x16, 0x16, 0x00000000, PPC_SPE);
|
5633 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmhogsmfan, 0x17, 0x16, 0x00000000, PPC_SPE);
|
5634 | 0487d6a8 | j_mayer | |
5635 | 0487d6a8 | j_mayer | GEN_SPE(evmwlusianw, evmwlssianw, 0x00, 0x17, 0x00000000, PPC_SPE);
|
5636 | 0487d6a8 | j_mayer | GEN_SPE(evmwlumianw, evmwlsmianw, 0x04, 0x17, 0x00000000, PPC_SPE);
|
5637 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwssfan, 0x09, 0x17, 0x00000000, PPC_SPE);
|
5638 | 0487d6a8 | j_mayer | GEN_SPE(evmwumian, evmwsmian, 0x0C, 0x17, 0x00000000, PPC_SPE);
|
5639 | 0487d6a8 | j_mayer | GEN_SPE(speundef, evmwsmfan, 0x0D, 0x17, 0x00000000, PPC_SPE);
|
5640 | 0487d6a8 | j_mayer | #endif
|
5641 | 0487d6a8 | j_mayer | |
5642 | 0487d6a8 | j_mayer | /*** SPE floating-point extension ***/
|
5643 | 0487d6a8 | j_mayer | #define GEN_SPEFPUOP_CONV(name) \
|
5644 | 0487d6a8 | j_mayer | static inline void gen_##name (DisasContext *ctx) \ |
5645 | 0487d6a8 | j_mayer | { \ |
5646 | 0487d6a8 | j_mayer | gen_op_load_gpr64_T0(rB(ctx->opcode)); \ |
5647 | 0487d6a8 | j_mayer | gen_op_##name(); \ |
5648 | 0487d6a8 | j_mayer | gen_op_store_T0_gpr64(rD(ctx->opcode)); \ |
5649 | 0487d6a8 | j_mayer | } |
5650 | 0487d6a8 | j_mayer | |
5651 | 0487d6a8 | j_mayer | /* Single precision floating-point vectors operations */
|
5652 | 0487d6a8 | j_mayer | /* Arithmetic */
|
5653 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evfsadd); |
5654 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evfssub); |
5655 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evfsmul); |
5656 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(evfsdiv); |
5657 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evfsabs); |
5658 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evfsnabs); |
5659 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(evfsneg); |
5660 | 0487d6a8 | j_mayer | /* Conversion */
|
5661 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfscfui); |
5662 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfscfsi); |
5663 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfscfuf); |
5664 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfscfsf); |
5665 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfsctui); |
5666 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfsctsi); |
5667 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfsctuf); |
5668 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfsctsf); |
5669 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfsctuiz); |
5670 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(evfsctsiz); |
5671 | 0487d6a8 | j_mayer | /* Comparison */
|
5672 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evfscmpgt); |
5673 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evfscmplt); |
5674 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evfscmpeq); |
5675 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evfststgt); |
5676 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evfststlt); |
5677 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(evfststeq); |
5678 | 0487d6a8 | j_mayer | |
5679 | 0487d6a8 | j_mayer | /* Opcodes definitions */
|
5680 | 0487d6a8 | j_mayer | GEN_SPE(evfsadd, evfssub, 0x00, 0x0A, 0x00000000, PPC_SPEFPU); // |
5681 | 0487d6a8 | j_mayer | GEN_SPE(evfsabs, evfsnabs, 0x02, 0x0A, 0x0000F800, PPC_SPEFPU); // |
5682 | 0487d6a8 | j_mayer | GEN_SPE(evfsneg, speundef, 0x03, 0x0A, 0x0000F800, PPC_SPEFPU); // |
5683 | 0487d6a8 | j_mayer | GEN_SPE(evfsmul, evfsdiv, 0x04, 0x0A, 0x00000000, PPC_SPEFPU); // |
5684 | 0487d6a8 | j_mayer | GEN_SPE(evfscmpgt, evfscmplt, 0x06, 0x0A, 0x00600000, PPC_SPEFPU); // |
5685 | 0487d6a8 | j_mayer | GEN_SPE(evfscmpeq, speundef, 0x07, 0x0A, 0x00600000, PPC_SPEFPU); // |
5686 | 0487d6a8 | j_mayer | GEN_SPE(evfscfui, evfscfsi, 0x08, 0x0A, 0x00180000, PPC_SPEFPU); // |
5687 | 0487d6a8 | j_mayer | GEN_SPE(evfscfuf, evfscfsf, 0x09, 0x0A, 0x00180000, PPC_SPEFPU); // |
5688 | 0487d6a8 | j_mayer | GEN_SPE(evfsctui, evfsctsi, 0x0A, 0x0A, 0x00180000, PPC_SPEFPU); // |
5689 | 0487d6a8 | j_mayer | GEN_SPE(evfsctuf, evfsctsf, 0x0B, 0x0A, 0x00180000, PPC_SPEFPU); // |
5690 | 0487d6a8 | j_mayer | GEN_SPE(evfsctuiz, speundef, 0x0C, 0x0A, 0x00180000, PPC_SPEFPU); // |
5691 | 0487d6a8 | j_mayer | GEN_SPE(evfsctsiz, speundef, 0x0D, 0x0A, 0x00180000, PPC_SPEFPU); // |
5692 | 0487d6a8 | j_mayer | GEN_SPE(evfststgt, evfststlt, 0x0E, 0x0A, 0x00600000, PPC_SPEFPU); // |
5693 | 0487d6a8 | j_mayer | GEN_SPE(evfststeq, speundef, 0x0F, 0x0A, 0x00600000, PPC_SPEFPU); // |
5694 | 0487d6a8 | j_mayer | |
5695 | 0487d6a8 | j_mayer | /* Single precision floating-point operations */
|
5696 | 0487d6a8 | j_mayer | /* Arithmetic */
|
5697 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efsadd); |
5698 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efssub); |
5699 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efsmul); |
5700 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efsdiv); |
5701 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(efsabs); |
5702 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(efsnabs); |
5703 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(efsneg); |
5704 | 0487d6a8 | j_mayer | /* Conversion */
|
5705 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efscfui); |
5706 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efscfsi); |
5707 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efscfuf); |
5708 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efscfsf); |
5709 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efsctui); |
5710 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efsctsi); |
5711 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efsctuf); |
5712 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efsctsf); |
5713 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efsctuiz); |
5714 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efsctsiz); |
5715 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efscfd); |
5716 | 0487d6a8 | j_mayer | /* Comparison */
|
5717 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efscmpgt); |
5718 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efscmplt); |
5719 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efscmpeq); |
5720 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efststgt); |
5721 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efststlt); |
5722 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efststeq); |
5723 | 0487d6a8 | j_mayer | |
5724 | 0487d6a8 | j_mayer | /* Opcodes definitions */
|
5725 | 0487d6a8 | j_mayer | GEN_SPE(efsadd, efssub, 0x00, 0x0A, 0x00000000, PPC_SPEFPU); // |
5726 | 0487d6a8 | j_mayer | GEN_SPE(efsabs, efsnabs, 0x02, 0x0B, 0x0000F800, PPC_SPEFPU); // |
5727 | 0487d6a8 | j_mayer | GEN_SPE(efsneg, speundef, 0x03, 0x0B, 0x0000F800, PPC_SPEFPU); // |
5728 | 0487d6a8 | j_mayer | GEN_SPE(efsmul, efsdiv, 0x04, 0x0B, 0x00000000, PPC_SPEFPU); // |
5729 | 0487d6a8 | j_mayer | GEN_SPE(efscmpgt, efscmplt, 0x06, 0x0B, 0x00600000, PPC_SPEFPU); // |
5730 | 0487d6a8 | j_mayer | GEN_SPE(efscmpeq, efscfd, 0x07, 0x0B, 0x00600000, PPC_SPEFPU); // |
5731 | 0487d6a8 | j_mayer | GEN_SPE(efscfui, efscfsi, 0x08, 0x0B, 0x00180000, PPC_SPEFPU); // |
5732 | 0487d6a8 | j_mayer | GEN_SPE(efscfuf, efscfsf, 0x09, 0x0B, 0x00180000, PPC_SPEFPU); // |
5733 | 0487d6a8 | j_mayer | GEN_SPE(efsctui, efsctsi, 0x0A, 0x0B, 0x00180000, PPC_SPEFPU); // |
5734 | 0487d6a8 | j_mayer | GEN_SPE(efsctuf, efsctsf, 0x0B, 0x0B, 0x00180000, PPC_SPEFPU); // |
5735 | 0487d6a8 | j_mayer | GEN_SPE(efsctuiz, efsctsiz, 0x0C, 0x0B, 0x00180000, PPC_SPEFPU); // |
5736 | 0487d6a8 | j_mayer | GEN_SPE(efststgt, efststlt, 0x0E, 0x0B, 0x00600000, PPC_SPEFPU); // |
5737 | 0487d6a8 | j_mayer | GEN_SPE(efststeq, speundef, 0x0F, 0x0B, 0x00600000, PPC_SPEFPU); // |
5738 | 0487d6a8 | j_mayer | |
5739 | 0487d6a8 | j_mayer | /* Double precision floating-point operations */
|
5740 | 0487d6a8 | j_mayer | /* Arithmetic */
|
5741 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efdadd); |
5742 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efdsub); |
5743 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efdmul); |
5744 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH2(efddiv); |
5745 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(efdabs); |
5746 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(efdnabs); |
5747 | 0487d6a8 | j_mayer | GEN_SPEOP_ARITH1(efdneg); |
5748 | 0487d6a8 | j_mayer | /* Conversion */
|
5749 | 0487d6a8 | j_mayer | |
5750 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfui); |
5751 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfsi); |
5752 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfuf); |
5753 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfsf); |
5754 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctui); |
5755 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctsi); |
5756 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctuf); |
5757 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctsf); |
5758 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctuiz); |
5759 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctsiz); |
5760 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfs); |
5761 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfuid); |
5762 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdcfsid); |
5763 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctuidz); |
5764 | 0487d6a8 | j_mayer | GEN_SPEFPUOP_CONV(efdctsidz); |
5765 | 0487d6a8 | j_mayer | /* Comparison */
|
5766 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efdcmpgt); |
5767 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efdcmplt); |
5768 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efdcmpeq); |
5769 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efdtstgt); |
5770 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efdtstlt); |
5771 | 0487d6a8 | j_mayer | GEN_SPEOP_COMP(efdtsteq); |
5772 | 0487d6a8 | j_mayer | |
5773 | 0487d6a8 | j_mayer | /* Opcodes definitions */
|
5774 | 0487d6a8 | j_mayer | GEN_SPE(efdadd, efdsub, 0x10, 0x0B, 0x00000000, PPC_SPEFPU); // |
5775 | 0487d6a8 | j_mayer | GEN_SPE(efdcfuid, efdcfsid, 0x11, 0x0B, 0x00180000, PPC_SPEFPU); // |
5776 | 0487d6a8 | j_mayer | GEN_SPE(efdabs, efdnabs, 0x12, 0x0B, 0x0000F800, PPC_SPEFPU); // |
5777 | 0487d6a8 | j_mayer | GEN_SPE(efdneg, speundef, 0x13, 0x0B, 0x0000F800, PPC_SPEFPU); // |
5778 | 0487d6a8 | j_mayer | GEN_SPE(efdmul, efddiv, 0x14, 0x0B, 0x00000000, PPC_SPEFPU); // |
5779 | 0487d6a8 | j_mayer | GEN_SPE(efdctuidz, efdctsidz, 0x15, 0x0B, 0x00180000, PPC_SPEFPU); // |
5780 | 0487d6a8 | j_mayer | GEN_SPE(efdcmpgt, efdcmplt, 0x16, 0x0B, 0x00600000, PPC_SPEFPU); // |
5781 | 0487d6a8 | j_mayer | GEN_SPE(efdcmpeq, efdcfs, 0x17, 0x0B, 0x00600000, PPC_SPEFPU); // |
5782 | 0487d6a8 | j_mayer | GEN_SPE(efdcfui, efdcfsi, 0x18, 0x0B, 0x00180000, PPC_SPEFPU); // |
5783 | 0487d6a8 | j_mayer | GEN_SPE(efdcfuf, efdcfsf, 0x19, 0x0B, 0x00180000, PPC_SPEFPU); // |
5784 | 0487d6a8 | j_mayer | GEN_SPE(efdctui, efdctsi, 0x1A, 0x0B, 0x00180000, PPC_SPEFPU); // |
5785 | 0487d6a8 | j_mayer | GEN_SPE(efdctuf, efdctsf, 0x1B, 0x0B, 0x00180000, PPC_SPEFPU); // |
5786 | 0487d6a8 | j_mayer | GEN_SPE(efdctuiz, speundef, 0x1C, 0x0B, 0x00180000, PPC_SPEFPU); // |
5787 | 0487d6a8 | j_mayer | GEN_SPE(efdctsiz, speundef, 0x1D, 0x0B, 0x00180000, PPC_SPEFPU); // |
5788 | 0487d6a8 | j_mayer | GEN_SPE(efdtstgt, efdtstlt, 0x1E, 0x0B, 0x00600000, PPC_SPEFPU); // |
5789 | 0487d6a8 | j_mayer | GEN_SPE(efdtsteq, speundef, 0x1F, 0x0B, 0x00600000, PPC_SPEFPU); // |
5790 | 0487d6a8 | j_mayer | #endif
|
5791 | 0487d6a8 | j_mayer | |
5792 | 79aceca5 | bellard | /* End opcode list */
|
5793 | 79aceca5 | bellard | GEN_OPCODE_MARK(end); |
5794 | 79aceca5 | bellard | |
5795 | 3fc6c082 | bellard | #include "translate_init.c" |
5796 | 79aceca5 | bellard | |
5797 | 9a64fbe4 | bellard | /*****************************************************************************/
|
5798 | 3fc6c082 | bellard | /* Misc PowerPC helpers */
|
5799 | 76a66253 | j_mayer | static inline uint32_t load_xer (CPUState *env) |
5800 | 76a66253 | j_mayer | { |
5801 | 76a66253 | j_mayer | return (xer_so << XER_SO) |
|
5802 | 76a66253 | j_mayer | (xer_ov << XER_OV) | |
5803 | 76a66253 | j_mayer | (xer_ca << XER_CA) | |
5804 | 76a66253 | j_mayer | (xer_bc << XER_BC) | |
5805 | 76a66253 | j_mayer | (xer_cmp << XER_CMP); |
5806 | 76a66253 | j_mayer | } |
5807 | 76a66253 | j_mayer | |
5808 | 36081602 | j_mayer | void cpu_dump_state (CPUState *env, FILE *f,
|
5809 | 36081602 | j_mayer | int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
5810 | 36081602 | j_mayer | int flags)
|
5811 | 79aceca5 | bellard | { |
5812 | 3fc6c082 | bellard | #if defined(TARGET_PPC64) || 1 |
5813 | 3fc6c082 | bellard | #define FILL "" |
5814 | 3fc6c082 | bellard | #define RGPL 4 |
5815 | 3fc6c082 | bellard | #define RFPL 4 |
5816 | 3fc6c082 | bellard | #else
|
5817 | 3fc6c082 | bellard | #define FILL " " |
5818 | 3fc6c082 | bellard | #define RGPL 8 |
5819 | 3fc6c082 | bellard | #define RFPL 4 |
5820 | 3fc6c082 | bellard | #endif
|
5821 | 3fc6c082 | bellard | |
5822 | 79aceca5 | bellard | int i;
|
5823 | 79aceca5 | bellard | |
5824 | 1b9eb036 | j_mayer | cpu_fprintf(f, "NIP " ADDRX " LR " ADDRX " CTR " ADDRX "\n", |
5825 | 3fc6c082 | bellard | env->nip, env->lr, env->ctr); |
5826 | d9bce9d9 | j_mayer | cpu_fprintf(f, "MSR " REGX FILL " XER %08x " |
5827 | d9bce9d9 | j_mayer | #if !defined(NO_TIMER_DUMP)
|
5828 | d9bce9d9 | j_mayer | "TB %08x %08x "
|
5829 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
5830 | 76a66253 | j_mayer | "DECR %08x"
|
5831 | 76a66253 | j_mayer | #endif
|
5832 | d9bce9d9 | j_mayer | #endif
|
5833 | 76a66253 | j_mayer | "\n",
|
5834 | d9bce9d9 | j_mayer | do_load_msr(env), load_xer(env) |
5835 | d9bce9d9 | j_mayer | #if !defined(NO_TIMER_DUMP)
|
5836 | d9bce9d9 | j_mayer | , cpu_ppc_load_tbu(env), cpu_ppc_load_tbl(env) |
5837 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
5838 | 76a66253 | j_mayer | , cpu_ppc_load_decr(env) |
5839 | 76a66253 | j_mayer | #endif
|
5840 | d9bce9d9 | j_mayer | #endif
|
5841 | 76a66253 | j_mayer | ); |
5842 | 76a66253 | j_mayer | for (i = 0; i < 32; i++) { |
5843 | 3fc6c082 | bellard | if ((i & (RGPL - 1)) == 0) |
5844 | 3fc6c082 | bellard | cpu_fprintf(f, "GPR%02d", i);
|
5845 | a750fc0b | j_mayer | cpu_fprintf(f, " " REGX, (target_ulong)env->gpr[i]);
|
5846 | 3fc6c082 | bellard | if ((i & (RGPL - 1)) == (RGPL - 1)) |
5847 | 7fe48483 | bellard | cpu_fprintf(f, "\n");
|
5848 | 76a66253 | j_mayer | } |
5849 | 3fc6c082 | bellard | cpu_fprintf(f, "CR ");
|
5850 | 76a66253 | j_mayer | for (i = 0; i < 8; i++) |
5851 | 7fe48483 | bellard | cpu_fprintf(f, "%01x", env->crf[i]);
|
5852 | 7fe48483 | bellard | cpu_fprintf(f, " [");
|
5853 | 76a66253 | j_mayer | for (i = 0; i < 8; i++) { |
5854 | 76a66253 | j_mayer | char a = '-'; |
5855 | 76a66253 | j_mayer | if (env->crf[i] & 0x08) |
5856 | 76a66253 | j_mayer | a = 'L';
|
5857 | 76a66253 | j_mayer | else if (env->crf[i] & 0x04) |
5858 | 76a66253 | j_mayer | a = 'G';
|
5859 | 76a66253 | j_mayer | else if (env->crf[i] & 0x02) |
5860 | 76a66253 | j_mayer | a = 'E';
|
5861 | 7fe48483 | bellard | cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); |
5862 | 76a66253 | j_mayer | } |
5863 | 3fc6c082 | bellard | cpu_fprintf(f, " ] " FILL "RES " REGX "\n", env->reserve); |
5864 | 3fc6c082 | bellard | for (i = 0; i < 32; i++) { |
5865 | 3fc6c082 | bellard | if ((i & (RFPL - 1)) == 0) |
5866 | 3fc6c082 | bellard | cpu_fprintf(f, "FPR%02d", i);
|
5867 | 26a76461 | bellard | cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i]));
|
5868 | 3fc6c082 | bellard | if ((i & (RFPL - 1)) == (RFPL - 1)) |
5869 | 7fe48483 | bellard | cpu_fprintf(f, "\n");
|
5870 | 79aceca5 | bellard | } |
5871 | 3fc6c082 | bellard | cpu_fprintf(f, "SRR0 " REGX " SRR1 " REGX " " FILL FILL FILL |
5872 | 3fc6c082 | bellard | "SDR1 " REGX "\n", |
5873 | 3fc6c082 | bellard | env->spr[SPR_SRR0], env->spr[SPR_SRR1], env->sdr1); |
5874 | 79aceca5 | bellard | |
5875 | 3fc6c082 | bellard | #undef RGPL
|
5876 | 3fc6c082 | bellard | #undef RFPL
|
5877 | 3fc6c082 | bellard | #undef FILL
|
5878 | 79aceca5 | bellard | } |
5879 | 79aceca5 | bellard | |
5880 | 76a66253 | j_mayer | void cpu_dump_statistics (CPUState *env, FILE*f,
|
5881 | 76a66253 | j_mayer | int (*cpu_fprintf)(FILE *f, const char *fmt, ...), |
5882 | 76a66253 | j_mayer | int flags)
|
5883 | 76a66253 | j_mayer | { |
5884 | 76a66253 | j_mayer | #if defined(DO_PPC_STATISTICS)
|
5885 | 76a66253 | j_mayer | opc_handler_t **t1, **t2, **t3, *handler; |
5886 | 76a66253 | j_mayer | int op1, op2, op3;
|
5887 | 76a66253 | j_mayer | |
5888 | 76a66253 | j_mayer | t1 = env->opcodes; |
5889 | 76a66253 | j_mayer | for (op1 = 0; op1 < 64; op1++) { |
5890 | 76a66253 | j_mayer | handler = t1[op1]; |
5891 | 76a66253 | j_mayer | if (is_indirect_opcode(handler)) {
|
5892 | 76a66253 | j_mayer | t2 = ind_table(handler); |
5893 | 76a66253 | j_mayer | for (op2 = 0; op2 < 32; op2++) { |
5894 | 76a66253 | j_mayer | handler = t2[op2]; |
5895 | 76a66253 | j_mayer | if (is_indirect_opcode(handler)) {
|
5896 | 76a66253 | j_mayer | t3 = ind_table(handler); |
5897 | 76a66253 | j_mayer | for (op3 = 0; op3 < 32; op3++) { |
5898 | 76a66253 | j_mayer | handler = t3[op3]; |
5899 | 76a66253 | j_mayer | if (handler->count == 0) |
5900 | 76a66253 | j_mayer | continue;
|
5901 | 76a66253 | j_mayer | cpu_fprintf(f, "%02x %02x %02x (%02x %04d) %16s: "
|
5902 | 76a66253 | j_mayer | "%016llx %lld\n",
|
5903 | 76a66253 | j_mayer | op1, op2, op3, op1, (op3 << 5) | op2,
|
5904 | 76a66253 | j_mayer | handler->oname, |
5905 | 76a66253 | j_mayer | handler->count, handler->count); |
5906 | 76a66253 | j_mayer | } |
5907 | 76a66253 | j_mayer | } else {
|
5908 | 76a66253 | j_mayer | if (handler->count == 0) |
5909 | 76a66253 | j_mayer | continue;
|
5910 | 76a66253 | j_mayer | cpu_fprintf(f, "%02x %02x (%02x %04d) %16s: "
|
5911 | 76a66253 | j_mayer | "%016llx %lld\n",
|
5912 | 76a66253 | j_mayer | op1, op2, op1, op2, handler->oname, |
5913 | 76a66253 | j_mayer | handler->count, handler->count); |
5914 | 76a66253 | j_mayer | } |
5915 | 76a66253 | j_mayer | } |
5916 | 76a66253 | j_mayer | } else {
|
5917 | 76a66253 | j_mayer | if (handler->count == 0) |
5918 | 76a66253 | j_mayer | continue;
|
5919 | 76a66253 | j_mayer | cpu_fprintf(f, "%02x (%02x ) %16s: %016llx %lld\n",
|
5920 | 76a66253 | j_mayer | op1, op1, handler->oname, |
5921 | 76a66253 | j_mayer | handler->count, handler->count); |
5922 | 76a66253 | j_mayer | } |
5923 | 76a66253 | j_mayer | } |
5924 | 76a66253 | j_mayer | #endif
|
5925 | 76a66253 | j_mayer | } |
5926 | 76a66253 | j_mayer | |
5927 | 9a64fbe4 | bellard | /*****************************************************************************/
|
5928 | 0487d6a8 | j_mayer | static inline int gen_intermediate_code_internal (CPUState *env, |
5929 | 0487d6a8 | j_mayer | TranslationBlock *tb, |
5930 | 0487d6a8 | j_mayer | int search_pc)
|
5931 | 79aceca5 | bellard | { |
5932 | 9fddaa0c | bellard | DisasContext ctx, *ctxp = &ctx; |
5933 | 79aceca5 | bellard | opc_handler_t **table, *handler; |
5934 | 0fa85d43 | bellard | target_ulong pc_start; |
5935 | 79aceca5 | bellard | uint16_t *gen_opc_end; |
5936 | 79aceca5 | bellard | int j, lj = -1; |
5937 | 79aceca5 | bellard | |
5938 | 79aceca5 | bellard | pc_start = tb->pc; |
5939 | 79aceca5 | bellard | gen_opc_ptr = gen_opc_buf; |
5940 | 79aceca5 | bellard | gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; |
5941 | 79aceca5 | bellard | gen_opparam_ptr = gen_opparam_buf; |
5942 | c53be334 | bellard | nb_gen_labels = 0;
|
5943 | 046d6672 | bellard | ctx.nip = pc_start; |
5944 | 79aceca5 | bellard | ctx.tb = tb; |
5945 | 9a64fbe4 | bellard | ctx.exception = EXCP_NONE; |
5946 | 3fc6c082 | bellard | ctx.spr_cb = env->spr_cb; |
5947 | 9a64fbe4 | bellard | #if defined(CONFIG_USER_ONLY)
|
5948 | 111bfab3 | bellard | ctx.mem_idx = msr_le; |
5949 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
5950 | d9bce9d9 | j_mayer | ctx.mem_idx |= msr_sf << 1;
|
5951 | d9bce9d9 | j_mayer | #endif
|
5952 | 9a64fbe4 | bellard | #else
|
5953 | 9a64fbe4 | bellard | ctx.supervisor = 1 - msr_pr;
|
5954 | 111bfab3 | bellard | ctx.mem_idx = ((1 - msr_pr) << 1) | msr_le; |
5955 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
5956 | d9bce9d9 | j_mayer | ctx.mem_idx |= msr_sf << 2;
|
5957 | d9bce9d9 | j_mayer | #endif
|
5958 | d9bce9d9 | j_mayer | #endif
|
5959 | d9bce9d9 | j_mayer | #if defined(TARGET_PPC64)
|
5960 | d9bce9d9 | j_mayer | ctx.sf_mode = msr_sf; |
5961 | 9a64fbe4 | bellard | #endif
|
5962 | 3cc62370 | bellard | ctx.fpu_enabled = msr_fp; |
5963 | 35cdaad6 | j_mayer | #if defined(TARGET_PPCEMB)
|
5964 | 0487d6a8 | j_mayer | ctx.spe_enabled = msr_spe; |
5965 | 0487d6a8 | j_mayer | #endif
|
5966 | ea4e754f | bellard | ctx.singlestep_enabled = env->singlestep_enabled; |
5967 | 3fc6c082 | bellard | #if defined (DO_SINGLE_STEP) && 0 |
5968 | 9a64fbe4 | bellard | /* Single step trace mode */
|
5969 | 9a64fbe4 | bellard | msr_se = 1;
|
5970 | 9a64fbe4 | bellard | #endif
|
5971 | 9a64fbe4 | bellard | /* Set env in case of segfault during code fetch */
|
5972 | 9a64fbe4 | bellard | while (ctx.exception == EXCP_NONE && gen_opc_ptr < gen_opc_end) {
|
5973 | 76a66253 | j_mayer | if (unlikely(env->nb_breakpoints > 0)) { |
5974 | 76a66253 | j_mayer | for (j = 0; j < env->nb_breakpoints; j++) { |
5975 | ea4e754f | bellard | if (env->breakpoints[j] == ctx.nip) {
|
5976 | 5fafdf24 | ths | gen_update_nip(&ctx, ctx.nip); |
5977 | ea4e754f | bellard | gen_op_debug(); |
5978 | ea4e754f | bellard | break;
|
5979 | ea4e754f | bellard | } |
5980 | ea4e754f | bellard | } |
5981 | ea4e754f | bellard | } |
5982 | 76a66253 | j_mayer | if (unlikely(search_pc)) {
|
5983 | 79aceca5 | bellard | j = gen_opc_ptr - gen_opc_buf; |
5984 | 79aceca5 | bellard | if (lj < j) {
|
5985 | 79aceca5 | bellard | lj++; |
5986 | 79aceca5 | bellard | while (lj < j)
|
5987 | 79aceca5 | bellard | gen_opc_instr_start[lj++] = 0;
|
5988 | 046d6672 | bellard | gen_opc_pc[lj] = ctx.nip; |
5989 | 79aceca5 | bellard | gen_opc_instr_start[lj] = 1;
|
5990 | 79aceca5 | bellard | } |
5991 | 79aceca5 | bellard | } |
5992 | 9fddaa0c | bellard | #if defined PPC_DEBUG_DISAS
|
5993 | 9fddaa0c | bellard | if (loglevel & CPU_LOG_TB_IN_ASM) {
|
5994 | 79aceca5 | bellard | fprintf(logfile, "----------------\n");
|
5995 | 1b9eb036 | j_mayer | fprintf(logfile, "nip=" ADDRX " super=%d ir=%d\n", |
5996 | 9a64fbe4 | bellard | ctx.nip, 1 - msr_pr, msr_ir);
|
5997 | 9a64fbe4 | bellard | } |
5998 | 9a64fbe4 | bellard | #endif
|
5999 | 0fa85d43 | bellard | ctx.opcode = ldl_code(ctx.nip); |
6000 | 111bfab3 | bellard | if (msr_le) {
|
6001 | 111bfab3 | bellard | ctx.opcode = ((ctx.opcode & 0xFF000000) >> 24) | |
6002 | 111bfab3 | bellard | ((ctx.opcode & 0x00FF0000) >> 8) | |
6003 | 111bfab3 | bellard | ((ctx.opcode & 0x0000FF00) << 8) | |
6004 | 111bfab3 | bellard | ((ctx.opcode & 0x000000FF) << 24); |
6005 | 111bfab3 | bellard | } |
6006 | 9fddaa0c | bellard | #if defined PPC_DEBUG_DISAS
|
6007 | 9fddaa0c | bellard | if (loglevel & CPU_LOG_TB_IN_ASM) {
|
6008 | 111bfab3 | bellard | fprintf(logfile, "translate opcode %08x (%02x %02x %02x) (%s)\n",
|
6009 | 9a64fbe4 | bellard | ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode), |
6010 | 111bfab3 | bellard | opc3(ctx.opcode), msr_le ? "little" : "big"); |
6011 | 79aceca5 | bellard | } |
6012 | 79aceca5 | bellard | #endif
|
6013 | 046d6672 | bellard | ctx.nip += 4;
|
6014 | 3fc6c082 | bellard | table = env->opcodes; |
6015 | 79aceca5 | bellard | handler = table[opc1(ctx.opcode)]; |
6016 | 79aceca5 | bellard | if (is_indirect_opcode(handler)) {
|
6017 | 79aceca5 | bellard | table = ind_table(handler); |
6018 | 79aceca5 | bellard | handler = table[opc2(ctx.opcode)]; |
6019 | 79aceca5 | bellard | if (is_indirect_opcode(handler)) {
|
6020 | 79aceca5 | bellard | table = ind_table(handler); |
6021 | 79aceca5 | bellard | handler = table[opc3(ctx.opcode)]; |
6022 | 79aceca5 | bellard | } |
6023 | 79aceca5 | bellard | } |
6024 | 79aceca5 | bellard | /* Is opcode *REALLY* valid ? */
|
6025 | 76a66253 | j_mayer | if (unlikely(handler->handler == &gen_invalid)) {
|
6026 | 4a057712 | j_mayer | if (loglevel != 0) { |
6027 | 76a66253 | j_mayer | fprintf(logfile, "invalid/unsupported opcode: "
|
6028 | 1b9eb036 | j_mayer | "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n", |
6029 | 76a66253 | j_mayer | opc1(ctx.opcode), opc2(ctx.opcode), |
6030 | 4b3686fa | bellard | opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, msr_ir);
|
6031 | 4b3686fa | bellard | } else {
|
6032 | 4b3686fa | bellard | printf("invalid/unsupported opcode: "
|
6033 | 1b9eb036 | j_mayer | "%02x - %02x - %02x (%08x) 0x" ADDRX " %d\n", |
6034 | 4b3686fa | bellard | opc1(ctx.opcode), opc2(ctx.opcode), |
6035 | 4b3686fa | bellard | opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, msr_ir);
|
6036 | 4b3686fa | bellard | } |
6037 | 76a66253 | j_mayer | } else {
|
6038 | 76a66253 | j_mayer | if (unlikely((ctx.opcode & handler->inval) != 0)) { |
6039 | 4a057712 | j_mayer | if (loglevel != 0) { |
6040 | 79aceca5 | bellard | fprintf(logfile, "invalid bits: %08x for opcode: "
|
6041 | 1b9eb036 | j_mayer | "%02x -%02x - %02x (%08x) 0x" ADDRX "\n", |
6042 | 79aceca5 | bellard | ctx.opcode & handler->inval, opc1(ctx.opcode), |
6043 | 79aceca5 | bellard | opc2(ctx.opcode), opc3(ctx.opcode), |
6044 | 046d6672 | bellard | ctx.opcode, ctx.nip - 4);
|
6045 | 9a64fbe4 | bellard | } else {
|
6046 | 9a64fbe4 | bellard | printf("invalid bits: %08x for opcode: "
|
6047 | 1b9eb036 | j_mayer | "%02x -%02x - %02x (%08x) 0x" ADDRX "\n", |
6048 | 76a66253 | j_mayer | ctx.opcode & handler->inval, opc1(ctx.opcode), |
6049 | 76a66253 | j_mayer | opc2(ctx.opcode), opc3(ctx.opcode), |
6050 | 046d6672 | bellard | ctx.opcode, ctx.nip - 4);
|
6051 | 76a66253 | j_mayer | } |
6052 | 4b3686fa | bellard | RET_INVAL(ctxp); |
6053 | 4b3686fa | bellard | break;
|
6054 | 79aceca5 | bellard | } |
6055 | 79aceca5 | bellard | } |
6056 | 4b3686fa | bellard | (*(handler->handler))(&ctx); |
6057 | 76a66253 | j_mayer | #if defined(DO_PPC_STATISTICS)
|
6058 | 76a66253 | j_mayer | handler->count++; |
6059 | 76a66253 | j_mayer | #endif
|
6060 | 9a64fbe4 | bellard | /* Check trace mode exceptions */
|
6061 | 08e46e54 | j_mayer | #if 0 // XXX: buggy on embedded PowerPC
|
6062 | 76a66253 | j_mayer | if (unlikely((msr_be && ctx.exception == EXCP_BRANCH) ||
|
6063 | 76a66253 | j_mayer | /* Check in single step trace mode
|
6064 | 76a66253 | j_mayer | * we need to stop except if:
|
6065 | 76a66253 | j_mayer | * - rfi, trap or syscall
|
6066 | 76a66253 | j_mayer | * - first instruction of an exception handler
|
6067 | 76a66253 | j_mayer | */
|
6068 | 76a66253 | j_mayer | (msr_se && (ctx.nip < 0x100 ||
|
6069 | 76a66253 | j_mayer | ctx.nip > 0xF00 ||
|
6070 | 76a66253 | j_mayer | (ctx.nip & 0xFC) != 0x04) &&
|
6071 | 76a66253 | j_mayer | ctx.exception != EXCP_SYSCALL &&
|
6072 | 76a66253 | j_mayer | ctx.exception != EXCP_SYSCALL_USER &&
|
6073 | 76a66253 | j_mayer | ctx.exception != EXCP_TRAP))) {
|
6074 | 9fddaa0c | bellard | RET_EXCP(ctxp, EXCP_TRACE, 0);
|
6075 | 9a64fbe4 | bellard | }
|
6076 | 08e46e54 | j_mayer | #endif
|
6077 | ea4e754f | bellard | /* if we reach a page boundary or are single stepping, stop
|
6078 | ea4e754f | bellard | * generation
|
6079 | ea4e754f | bellard | */
|
6080 | 76a66253 | j_mayer | if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) || |
6081 | 76a66253 | j_mayer | (env->singlestep_enabled))) { |
6082 | 8dd4983c | bellard | break;
|
6083 | 76a66253 | j_mayer | } |
6084 | 3fc6c082 | bellard | #if defined (DO_SINGLE_STEP)
|
6085 | 3fc6c082 | bellard | break;
|
6086 | 3fc6c082 | bellard | #endif
|
6087 | 3fc6c082 | bellard | } |
6088 | 9fddaa0c | bellard | if (ctx.exception == EXCP_NONE) {
|
6089 | c1942362 | bellard | gen_goto_tb(&ctx, 0, ctx.nip);
|
6090 | 9fddaa0c | bellard | } else if (ctx.exception != EXCP_BRANCH) { |
6091 | 76a66253 | j_mayer | gen_op_reset_T0(); |
6092 | 76a66253 | j_mayer | /* Generate the return instruction */
|
6093 | 76a66253 | j_mayer | gen_op_exit_tb(); |
6094 | 9a64fbe4 | bellard | } |
6095 | 79aceca5 | bellard | *gen_opc_ptr = INDEX_op_end; |
6096 | 76a66253 | j_mayer | if (unlikely(search_pc)) {
|
6097 | 9a64fbe4 | bellard | j = gen_opc_ptr - gen_opc_buf; |
6098 | 9a64fbe4 | bellard | lj++; |
6099 | 9a64fbe4 | bellard | while (lj <= j)
|
6100 | 9a64fbe4 | bellard | gen_opc_instr_start[lj++] = 0;
|
6101 | 9a64fbe4 | bellard | } else {
|
6102 | 046d6672 | bellard | tb->size = ctx.nip - pc_start; |
6103 | 9a64fbe4 | bellard | } |
6104 | d9bce9d9 | j_mayer | #if defined(DEBUG_DISAS)
|
6105 | 9fddaa0c | bellard | if (loglevel & CPU_LOG_TB_CPU) {
|
6106 | 9a64fbe4 | bellard | fprintf(logfile, "---------------- excp: %04x\n", ctx.exception);
|
6107 | 7fe48483 | bellard | cpu_dump_state(env, logfile, fprintf, 0);
|
6108 | 9fddaa0c | bellard | } |
6109 | 9fddaa0c | bellard | if (loglevel & CPU_LOG_TB_IN_ASM) {
|
6110 | 76a66253 | j_mayer | int flags;
|
6111 | 76a66253 | j_mayer | flags = msr_le; |
6112 | 0fa85d43 | bellard | fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
|
6113 | 76a66253 | j_mayer | target_disas(logfile, pc_start, ctx.nip - pc_start, flags); |
6114 | 79aceca5 | bellard | fprintf(logfile, "\n");
|
6115 | 9fddaa0c | bellard | } |
6116 | 9fddaa0c | bellard | if (loglevel & CPU_LOG_TB_OP) {
|
6117 | 79aceca5 | bellard | fprintf(logfile, "OP:\n");
|
6118 | 79aceca5 | bellard | dump_ops(gen_opc_buf, gen_opparam_buf); |
6119 | 79aceca5 | bellard | fprintf(logfile, "\n");
|
6120 | 79aceca5 | bellard | } |
6121 | 79aceca5 | bellard | #endif
|
6122 | 79aceca5 | bellard | return 0; |
6123 | 79aceca5 | bellard | } |
6124 | 79aceca5 | bellard | |
6125 | 9a64fbe4 | bellard | int gen_intermediate_code (CPUState *env, struct TranslationBlock *tb) |
6126 | 79aceca5 | bellard | { |
6127 | 79aceca5 | bellard | return gen_intermediate_code_internal(env, tb, 0); |
6128 | 79aceca5 | bellard | } |
6129 | 79aceca5 | bellard | |
6130 | 9a64fbe4 | bellard | int gen_intermediate_code_pc (CPUState *env, struct TranslationBlock *tb) |
6131 | 79aceca5 | bellard | { |
6132 | 79aceca5 | bellard | return gen_intermediate_code_internal(env, tb, 1); |
6133 | 79aceca5 | bellard | } |