root / target-arm / nwfpe / fpopcode.c @ 40d0591e
History | View | Annotate | Download (4.1 kB)
1 |
/*
|
---|---|
2 |
NetWinder Floating Point Emulator
|
3 |
(c) Rebel.COM, 1998,1999
|
4 |
|
5 |
Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
|
6 |
|
7 |
This program is free software; you can redistribute it and/or modify
|
8 |
it under the terms of the GNU General Public License as published by
|
9 |
the Free Software Foundation; either version 2 of the License, or
|
10 |
(at your option) any later version.
|
11 |
|
12 |
This program is distributed in the hope that it will be useful,
|
13 |
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
14 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
15 |
GNU General Public License for more details.
|
16 |
|
17 |
You should have received a copy of the GNU General Public License
|
18 |
along with this program; if not, write to the Free Software
|
19 |
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
20 |
*/
|
21 |
|
22 |
#include "fpa11.h" |
23 |
#include "softfloat.h" |
24 |
#include "fpopcode.h" |
25 |
#include "fpsr.h" |
26 |
//#include "fpmodule.h"
|
27 |
//#include "fpmodule.inl"
|
28 |
|
29 |
const floatx80 floatx80Constant[] = {
|
30 |
{ 0x0000000000000000ULL, 0x0000}, /* extended 0.0 */ |
31 |
{ 0x8000000000000000ULL, 0x3fff}, /* extended 1.0 */ |
32 |
{ 0x8000000000000000ULL, 0x4000}, /* extended 2.0 */ |
33 |
{ 0xc000000000000000ULL, 0x4000}, /* extended 3.0 */ |
34 |
{ 0x8000000000000000ULL, 0x4001}, /* extended 4.0 */ |
35 |
{ 0xa000000000000000ULL, 0x4001}, /* extended 5.0 */ |
36 |
{ 0x8000000000000000ULL, 0x3ffe}, /* extended 0.5 */ |
37 |
{ 0xa000000000000000ULL, 0x4002} /* extended 10.0 */ |
38 |
}; |
39 |
|
40 |
const float64 float64Constant[] = {
|
41 |
0x0000000000000000ULL, /* double 0.0 */ |
42 |
0x3ff0000000000000ULL, /* double 1.0 */ |
43 |
0x4000000000000000ULL, /* double 2.0 */ |
44 |
0x4008000000000000ULL, /* double 3.0 */ |
45 |
0x4010000000000000ULL, /* double 4.0 */ |
46 |
0x4014000000000000ULL, /* double 5.0 */ |
47 |
0x3fe0000000000000ULL, /* double 0.5 */ |
48 |
0x4024000000000000ULL /* double 10.0 */ |
49 |
}; |
50 |
|
51 |
const float32 float32Constant[] = {
|
52 |
0x00000000, /* single 0.0 */ |
53 |
0x3f800000, /* single 1.0 */ |
54 |
0x40000000, /* single 2.0 */ |
55 |
0x40400000, /* single 3.0 */ |
56 |
0x40800000, /* single 4.0 */ |
57 |
0x40a00000, /* single 5.0 */ |
58 |
0x3f000000, /* single 0.5 */ |
59 |
0x41200000 /* single 10.0 */ |
60 |
}; |
61 |
|
62 |
unsigned int getTransferLength(const unsigned int opcode) |
63 |
{ |
64 |
unsigned int nRc; |
65 |
|
66 |
switch (opcode & MASK_TRANSFER_LENGTH)
|
67 |
{ |
68 |
case 0x00000000: nRc = 1; break; /* single precision */ |
69 |
case 0x00008000: nRc = 2; break; /* double precision */ |
70 |
case 0x00400000: nRc = 3; break; /* extended precision */ |
71 |
default: nRc = 0; |
72 |
} |
73 |
|
74 |
return(nRc);
|
75 |
} |
76 |
|
77 |
unsigned int getRegisterCount(const unsigned int opcode) |
78 |
{ |
79 |
unsigned int nRc; |
80 |
|
81 |
switch (opcode & MASK_REGISTER_COUNT)
|
82 |
{ |
83 |
case 0x00000000: nRc = 4; break; |
84 |
case 0x00008000: nRc = 1; break; |
85 |
case 0x00400000: nRc = 2; break; |
86 |
case 0x00408000: nRc = 3; break; |
87 |
default: nRc = 0; |
88 |
} |
89 |
|
90 |
return(nRc);
|
91 |
} |
92 |
|
93 |
unsigned int getRoundingPrecision(const unsigned int opcode) |
94 |
{ |
95 |
unsigned int nRc; |
96 |
|
97 |
switch (opcode & MASK_ROUNDING_PRECISION)
|
98 |
{ |
99 |
case 0x00000000: nRc = 1; break; |
100 |
case 0x00000080: nRc = 2; break; |
101 |
case 0x00080000: nRc = 3; break; |
102 |
default: nRc = 0; |
103 |
} |
104 |
|
105 |
return(nRc);
|
106 |
} |
107 |
|
108 |
unsigned int getDestinationSize(const unsigned int opcode) |
109 |
{ |
110 |
unsigned int nRc; |
111 |
|
112 |
switch (opcode & MASK_DESTINATION_SIZE)
|
113 |
{ |
114 |
case 0x00000000: nRc = typeSingle; break; |
115 |
case 0x00000080: nRc = typeDouble; break; |
116 |
case 0x00080000: nRc = typeExtended; break; |
117 |
default: nRc = typeNone;
|
118 |
} |
119 |
|
120 |
return(nRc);
|
121 |
} |
122 |
|
123 |
/* condition code lookup table
|
124 |
index into the table is test code: EQ, NE, ... LT, GT, AL, NV
|
125 |
bit position in short is condition code: NZCV */
|
126 |
static const unsigned short aCC[16] = { |
127 |
0xF0F0, // EQ == Z set |
128 |
0x0F0F, // NE |
129 |
0xCCCC, // CS == C set |
130 |
0x3333, // CC |
131 |
0xFF00, // MI == N set |
132 |
0x00FF, // PL |
133 |
0xAAAA, // VS == V set |
134 |
0x5555, // VC |
135 |
0x0C0C, // HI == C set && Z clear |
136 |
0xF3F3, // LS == C clear || Z set |
137 |
0xAA55, // GE == (N==V) |
138 |
0x55AA, // LT == (N!=V) |
139 |
0x0A05, // GT == (!Z && (N==V)) |
140 |
0xF5FA, // LE == (Z || (N!=V)) |
141 |
0xFFFF, // AL always |
142 |
0 // NV |
143 |
}; |
144 |
|
145 |
unsigned int checkCondition(const unsigned int opcode, const unsigned int ccodes) |
146 |
{ |
147 |
return (aCC[opcode>>28] >> (ccodes>>28)) & 1; |
148 |
} |