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1 | edf79e66 | Huacai Chen | /*
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2 | edf79e66 | Huacai Chen | * VT82C686B south bridge support
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3 | edf79e66 | Huacai Chen | *
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4 | edf79e66 | Huacai Chen | * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
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5 | edf79e66 | Huacai Chen | * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
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6 | edf79e66 | Huacai Chen | * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
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7 | edf79e66 | Huacai Chen | * This code is licensed under the GNU GPL v2.
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8 | edf79e66 | Huacai Chen | */
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9 | edf79e66 | Huacai Chen | |
10 | edf79e66 | Huacai Chen | #include "hw.h" |
11 | edf79e66 | Huacai Chen | #include "pc.h" |
12 | edf79e66 | Huacai Chen | #include "vt82c686.h" |
13 | edf79e66 | Huacai Chen | #include "i2c.h" |
14 | edf79e66 | Huacai Chen | #include "smbus.h" |
15 | edf79e66 | Huacai Chen | #include "pci.h" |
16 | edf79e66 | Huacai Chen | #include "isa.h" |
17 | edf79e66 | Huacai Chen | #include "sysbus.h" |
18 | edf79e66 | Huacai Chen | #include "mips.h" |
19 | edf79e66 | Huacai Chen | #include "apm.h" |
20 | edf79e66 | Huacai Chen | #include "acpi.h" |
21 | edf79e66 | Huacai Chen | #include "pm_smbus.h" |
22 | edf79e66 | Huacai Chen | #include "sysemu.h" |
23 | edf79e66 | Huacai Chen | #include "qemu-timer.h" |
24 | edf79e66 | Huacai Chen | |
25 | edf79e66 | Huacai Chen | typedef uint32_t pci_addr_t;
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26 | edf79e66 | Huacai Chen | #include "pci_host.h" |
27 | edf79e66 | Huacai Chen | //#define DEBUG_VT82C686B
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28 | edf79e66 | Huacai Chen | |
29 | edf79e66 | Huacai Chen | #ifdef DEBUG_VT82C686B
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30 | edf79e66 | Huacai Chen | #define DPRINTF(fmt, ...) fprintf(stderr, "%s: " fmt, __FUNCTION__, ##__VA_ARGS__) |
31 | edf79e66 | Huacai Chen | #else
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32 | edf79e66 | Huacai Chen | #define DPRINTF(fmt, ...)
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33 | edf79e66 | Huacai Chen | #endif
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34 | edf79e66 | Huacai Chen | |
35 | edf79e66 | Huacai Chen | typedef struct SuperIOConfig |
36 | edf79e66 | Huacai Chen | { |
37 | edf79e66 | Huacai Chen | uint8_t config[0xff];
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38 | edf79e66 | Huacai Chen | uint8_t index; |
39 | edf79e66 | Huacai Chen | uint8_t data; |
40 | edf79e66 | Huacai Chen | } SuperIOConfig; |
41 | edf79e66 | Huacai Chen | |
42 | edf79e66 | Huacai Chen | typedef struct VT82C686BState { |
43 | edf79e66 | Huacai Chen | PCIDevice dev; |
44 | edf79e66 | Huacai Chen | SuperIOConfig superio_conf; |
45 | edf79e66 | Huacai Chen | } VT82C686BState; |
46 | edf79e66 | Huacai Chen | |
47 | edf79e66 | Huacai Chen | static void superio_ioport_writeb(void *opaque, uint32_t addr, uint32_t data) |
48 | edf79e66 | Huacai Chen | { |
49 | edf79e66 | Huacai Chen | int can_write;
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50 | edf79e66 | Huacai Chen | SuperIOConfig *superio_conf = opaque; |
51 | edf79e66 | Huacai Chen | |
52 | edf79e66 | Huacai Chen | DPRINTF("superio_ioport_writeb address 0x%x val 0x%x \n", addr, data);
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53 | edf79e66 | Huacai Chen | if (addr == 0x3f0) { |
54 | edf79e66 | Huacai Chen | superio_conf->index = data & 0xff;
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55 | edf79e66 | Huacai Chen | } else {
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56 | edf79e66 | Huacai Chen | /* 0x3f1 */
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57 | edf79e66 | Huacai Chen | switch (superio_conf->index) {
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58 | edf79e66 | Huacai Chen | case 0x00 ... 0xdf: |
59 | edf79e66 | Huacai Chen | case 0xe4: |
60 | edf79e66 | Huacai Chen | case 0xe5: |
61 | edf79e66 | Huacai Chen | case 0xe9 ... 0xed: |
62 | edf79e66 | Huacai Chen | case 0xf3: |
63 | edf79e66 | Huacai Chen | case 0xf5: |
64 | edf79e66 | Huacai Chen | case 0xf7: |
65 | edf79e66 | Huacai Chen | case 0xf9 ... 0xfb: |
66 | edf79e66 | Huacai Chen | case 0xfd ... 0xff: |
67 | edf79e66 | Huacai Chen | can_write = 0;
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68 | edf79e66 | Huacai Chen | break;
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69 | edf79e66 | Huacai Chen | default:
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70 | edf79e66 | Huacai Chen | can_write = 1;
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71 | edf79e66 | Huacai Chen | |
72 | edf79e66 | Huacai Chen | if (can_write) {
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73 | edf79e66 | Huacai Chen | switch (superio_conf->index) {
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74 | edf79e66 | Huacai Chen | case 0xe7: |
75 | edf79e66 | Huacai Chen | if ((data & 0xff) != 0xfe) { |
76 | edf79e66 | Huacai Chen | DPRINTF("chage uart 1 base. unsupported yet \n");
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77 | edf79e66 | Huacai Chen | } |
78 | edf79e66 | Huacai Chen | break;
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79 | edf79e66 | Huacai Chen | case 0xe8: |
80 | edf79e66 | Huacai Chen | if ((data & 0xff) != 0xbe) { |
81 | edf79e66 | Huacai Chen | DPRINTF("chage uart 2 base. unsupported yet \n");
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82 | edf79e66 | Huacai Chen | } |
83 | edf79e66 | Huacai Chen | break;
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84 | edf79e66 | Huacai Chen | |
85 | edf79e66 | Huacai Chen | default:
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86 | edf79e66 | Huacai Chen | superio_conf->config[superio_conf->index] = data & 0xff;
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87 | edf79e66 | Huacai Chen | } |
88 | edf79e66 | Huacai Chen | } |
89 | edf79e66 | Huacai Chen | } |
90 | edf79e66 | Huacai Chen | superio_conf->config[superio_conf->index] = data & 0xff;
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91 | edf79e66 | Huacai Chen | } |
92 | edf79e66 | Huacai Chen | } |
93 | edf79e66 | Huacai Chen | |
94 | edf79e66 | Huacai Chen | static uint32_t superio_ioport_readb(void *opaque, uint32_t addr) |
95 | edf79e66 | Huacai Chen | { |
96 | edf79e66 | Huacai Chen | SuperIOConfig *superio_conf = opaque; |
97 | edf79e66 | Huacai Chen | |
98 | edf79e66 | Huacai Chen | DPRINTF("superio_ioport_readb address 0x%x \n", addr);
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99 | edf79e66 | Huacai Chen | return (superio_conf->config[superio_conf->index]);
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100 | edf79e66 | Huacai Chen | } |
101 | edf79e66 | Huacai Chen | |
102 | edf79e66 | Huacai Chen | static void vt82c686b_reset(void * opaque) |
103 | edf79e66 | Huacai Chen | { |
104 | edf79e66 | Huacai Chen | PCIDevice *d = opaque; |
105 | edf79e66 | Huacai Chen | uint8_t *pci_conf = d->config; |
106 | edf79e66 | Huacai Chen | VT82C686BState *vt82c = DO_UPCAST(VT82C686BState, dev, d); |
107 | edf79e66 | Huacai Chen | |
108 | edf79e66 | Huacai Chen | pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
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109 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | |
110 | edf79e66 | Huacai Chen | PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL); |
111 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); |
112 | edf79e66 | Huacai Chen | |
113 | edf79e66 | Huacai Chen | pci_conf[0x48] = 0x01; /* Miscellaneous Control 3 */ |
114 | edf79e66 | Huacai Chen | pci_conf[0x4a] = 0x04; /* IDE interrupt Routing */ |
115 | edf79e66 | Huacai Chen | pci_conf[0x4f] = 0x03; /* DMA/Master Mem Access Control 3 */ |
116 | edf79e66 | Huacai Chen | pci_conf[0x50] = 0x2d; /* PnP DMA Request Control */ |
117 | edf79e66 | Huacai Chen | pci_conf[0x59] = 0x04; |
118 | edf79e66 | Huacai Chen | pci_conf[0x5a] = 0x04; /* KBC/RTC Control*/ |
119 | edf79e66 | Huacai Chen | pci_conf[0x5f] = 0x04; |
120 | edf79e66 | Huacai Chen | pci_conf[0x77] = 0x10; /* GPIO Control 1/2/3/4 */ |
121 | edf79e66 | Huacai Chen | |
122 | edf79e66 | Huacai Chen | vt82c->superio_conf.config[0xe0] = 0x3c; |
123 | edf79e66 | Huacai Chen | vt82c->superio_conf.config[0xe2] = 0x03; |
124 | edf79e66 | Huacai Chen | vt82c->superio_conf.config[0xe3] = 0xfc; |
125 | edf79e66 | Huacai Chen | vt82c->superio_conf.config[0xe6] = 0xde; |
126 | edf79e66 | Huacai Chen | vt82c->superio_conf.config[0xe7] = 0xfe; |
127 | edf79e66 | Huacai Chen | vt82c->superio_conf.config[0xe8] = 0xbe; |
128 | edf79e66 | Huacai Chen | } |
129 | edf79e66 | Huacai Chen | |
130 | edf79e66 | Huacai Chen | /* write config pci function0 registers. PCI-ISA bridge */
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131 | edf79e66 | Huacai Chen | static void vt82c686b_write_config(PCIDevice * d, uint32_t address, |
132 | edf79e66 | Huacai Chen | uint32_t val, int len)
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133 | edf79e66 | Huacai Chen | { |
134 | edf79e66 | Huacai Chen | VT82C686BState *vt686 = DO_UPCAST(VT82C686BState, dev, d); |
135 | edf79e66 | Huacai Chen | |
136 | edf79e66 | Huacai Chen | DPRINTF("vt82c686b_write_config address 0x%x val 0x%x len 0x%x \n",
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137 | edf79e66 | Huacai Chen | address, val, len); |
138 | edf79e66 | Huacai Chen | |
139 | edf79e66 | Huacai Chen | pci_default_write_config(d, address, val, len); |
140 | edf79e66 | Huacai Chen | if (address == 0x85) { /* enable or disable super IO configure */ |
141 | edf79e66 | Huacai Chen | if (val & 0x2) { |
142 | edf79e66 | Huacai Chen | /* floppy also uses 0x3f0 and 0x3f1.
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143 | edf79e66 | Huacai Chen | * But we do not emulate flopy,so just set it here. */
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144 | edf79e66 | Huacai Chen | isa_unassign_ioport(0x3f0, 2); |
145 | edf79e66 | Huacai Chen | register_ioport_read(0x3f0, 2, 1, superio_ioport_readb, |
146 | edf79e66 | Huacai Chen | &vt686->superio_conf); |
147 | edf79e66 | Huacai Chen | register_ioport_write(0x3f0, 2, 1, superio_ioport_writeb, |
148 | edf79e66 | Huacai Chen | &vt686->superio_conf); |
149 | edf79e66 | Huacai Chen | } else {
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150 | edf79e66 | Huacai Chen | isa_unassign_ioport(0x3f0, 2); |
151 | edf79e66 | Huacai Chen | } |
152 | edf79e66 | Huacai Chen | } |
153 | edf79e66 | Huacai Chen | } |
154 | edf79e66 | Huacai Chen | |
155 | edf79e66 | Huacai Chen | #define ACPI_DBG_IO_ADDR 0xb044 |
156 | edf79e66 | Huacai Chen | |
157 | edf79e66 | Huacai Chen | typedef struct VT686PMState { |
158 | edf79e66 | Huacai Chen | PCIDevice dev; |
159 | 04dc308f | Isaku Yamahata | ACPIPM1EVT pm1a; |
160 | eaba51c5 | Isaku Yamahata | ACPIPM1CNT pm1_cnt; |
161 | edf79e66 | Huacai Chen | APMState apm; |
162 | a54d41a8 | Isaku Yamahata | ACPIPMTimer tmr; |
163 | edf79e66 | Huacai Chen | PMSMBus smb; |
164 | edf79e66 | Huacai Chen | uint32_t smb_io_base; |
165 | edf79e66 | Huacai Chen | } VT686PMState; |
166 | edf79e66 | Huacai Chen | |
167 | edf79e66 | Huacai Chen | typedef struct VT686AC97State { |
168 | edf79e66 | Huacai Chen | PCIDevice dev; |
169 | edf79e66 | Huacai Chen | } VT686AC97State; |
170 | edf79e66 | Huacai Chen | |
171 | edf79e66 | Huacai Chen | typedef struct VT686MC97State { |
172 | edf79e66 | Huacai Chen | PCIDevice dev; |
173 | edf79e66 | Huacai Chen | } VT686MC97State; |
174 | edf79e66 | Huacai Chen | |
175 | edf79e66 | Huacai Chen | static void pm_update_sci(VT686PMState *s) |
176 | edf79e66 | Huacai Chen | { |
177 | edf79e66 | Huacai Chen | int sci_level, pmsts;
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178 | edf79e66 | Huacai Chen | |
179 | 04dc308f | Isaku Yamahata | pmsts = acpi_pm1_evt_get_sts(&s->pm1a, s->tmr.overflow_time); |
180 | 04dc308f | Isaku Yamahata | sci_level = (((pmsts & s->pm1a.en) & |
181 | 04dc308f | Isaku Yamahata | (ACPI_BITMASK_RT_CLOCK_ENABLE | |
182 | 04dc308f | Isaku Yamahata | ACPI_BITMASK_POWER_BUTTON_ENABLE | |
183 | 04dc308f | Isaku Yamahata | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | |
184 | 04dc308f | Isaku Yamahata | ACPI_BITMASK_TIMER_ENABLE)) != 0);
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185 | edf79e66 | Huacai Chen | qemu_set_irq(s->dev.irq[0], sci_level);
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186 | edf79e66 | Huacai Chen | /* schedule a timer interruption if needed */
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187 | 04dc308f | Isaku Yamahata | acpi_pm_tmr_update(&s->tmr, (s->pm1a.en & ACPI_BITMASK_TIMER_ENABLE) && |
188 | a54d41a8 | Isaku Yamahata | !(pmsts & ACPI_BITMASK_TIMER_STATUS)); |
189 | edf79e66 | Huacai Chen | } |
190 | edf79e66 | Huacai Chen | |
191 | a54d41a8 | Isaku Yamahata | static void pm_tmr_timer(ACPIPMTimer *tmr) |
192 | edf79e66 | Huacai Chen | { |
193 | a54d41a8 | Isaku Yamahata | VT686PMState *s = container_of(tmr, VT686PMState, tmr); |
194 | edf79e66 | Huacai Chen | pm_update_sci(s); |
195 | edf79e66 | Huacai Chen | } |
196 | edf79e66 | Huacai Chen | |
197 | edf79e66 | Huacai Chen | static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) |
198 | edf79e66 | Huacai Chen | { |
199 | edf79e66 | Huacai Chen | VT686PMState *s = opaque; |
200 | edf79e66 | Huacai Chen | |
201 | edf79e66 | Huacai Chen | addr &= 0x0f;
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202 | edf79e66 | Huacai Chen | switch (addr) {
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203 | edf79e66 | Huacai Chen | case 0x00: |
204 | 04dc308f | Isaku Yamahata | acpi_pm1_evt_write_sts(&s->pm1a, &s->tmr, val); |
205 | 04dc308f | Isaku Yamahata | pm_update_sci(s); |
206 | edf79e66 | Huacai Chen | break;
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207 | edf79e66 | Huacai Chen | case 0x02: |
208 | 04dc308f | Isaku Yamahata | s->pm1a.en = val; |
209 | edf79e66 | Huacai Chen | pm_update_sci(s); |
210 | edf79e66 | Huacai Chen | break;
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211 | edf79e66 | Huacai Chen | case 0x04: |
212 | eaba51c5 | Isaku Yamahata | acpi_pm1_cnt_write(&s->pm1a, &s->pm1_cnt, val); |
213 | edf79e66 | Huacai Chen | break;
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214 | edf79e66 | Huacai Chen | default:
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215 | edf79e66 | Huacai Chen | break;
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216 | edf79e66 | Huacai Chen | } |
217 | edf79e66 | Huacai Chen | DPRINTF("PM writew port=0x%04x val=0x%02x\n", addr, val);
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218 | edf79e66 | Huacai Chen | } |
219 | edf79e66 | Huacai Chen | |
220 | edf79e66 | Huacai Chen | static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) |
221 | edf79e66 | Huacai Chen | { |
222 | edf79e66 | Huacai Chen | VT686PMState *s = opaque; |
223 | edf79e66 | Huacai Chen | uint32_t val; |
224 | edf79e66 | Huacai Chen | |
225 | edf79e66 | Huacai Chen | addr &= 0x0f;
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226 | edf79e66 | Huacai Chen | switch (addr) {
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227 | edf79e66 | Huacai Chen | case 0x00: |
228 | 04dc308f | Isaku Yamahata | val = acpi_pm1_evt_get_sts(&s->pm1a, s->tmr.overflow_time); |
229 | edf79e66 | Huacai Chen | break;
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230 | edf79e66 | Huacai Chen | case 0x02: |
231 | 04dc308f | Isaku Yamahata | val = s->pm1a.en; |
232 | edf79e66 | Huacai Chen | break;
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233 | edf79e66 | Huacai Chen | case 0x04: |
234 | eaba51c5 | Isaku Yamahata | val = s->pm1_cnt.cnt; |
235 | edf79e66 | Huacai Chen | break;
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236 | edf79e66 | Huacai Chen | default:
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237 | edf79e66 | Huacai Chen | val = 0;
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238 | edf79e66 | Huacai Chen | break;
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239 | edf79e66 | Huacai Chen | } |
240 | edf79e66 | Huacai Chen | DPRINTF("PM readw port=0x%04x val=0x%02x\n", addr, val);
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241 | edf79e66 | Huacai Chen | return val;
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242 | edf79e66 | Huacai Chen | } |
243 | edf79e66 | Huacai Chen | |
244 | edf79e66 | Huacai Chen | static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val) |
245 | edf79e66 | Huacai Chen | { |
246 | edf79e66 | Huacai Chen | addr &= 0x0f;
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247 | edf79e66 | Huacai Chen | DPRINTF("PM writel port=0x%04x val=0x%08x\n", addr, val);
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248 | edf79e66 | Huacai Chen | } |
249 | edf79e66 | Huacai Chen | |
250 | edf79e66 | Huacai Chen | static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) |
251 | edf79e66 | Huacai Chen | { |
252 | edf79e66 | Huacai Chen | VT686PMState *s = opaque; |
253 | edf79e66 | Huacai Chen | uint32_t val; |
254 | edf79e66 | Huacai Chen | |
255 | edf79e66 | Huacai Chen | addr &= 0x0f;
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256 | edf79e66 | Huacai Chen | switch (addr) {
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257 | edf79e66 | Huacai Chen | case 0x08: |
258 | a54d41a8 | Isaku Yamahata | val = acpi_pm_tmr_get(&s->tmr); |
259 | edf79e66 | Huacai Chen | break;
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260 | edf79e66 | Huacai Chen | default:
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261 | edf79e66 | Huacai Chen | val = 0;
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262 | edf79e66 | Huacai Chen | break;
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263 | edf79e66 | Huacai Chen | } |
264 | edf79e66 | Huacai Chen | DPRINTF("PM readl port=0x%04x val=0x%08x\n", addr, val);
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265 | edf79e66 | Huacai Chen | return val;
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266 | edf79e66 | Huacai Chen | } |
267 | edf79e66 | Huacai Chen | |
268 | edf79e66 | Huacai Chen | static void pm_io_space_update(VT686PMState *s) |
269 | edf79e66 | Huacai Chen | { |
270 | edf79e66 | Huacai Chen | uint32_t pm_io_base; |
271 | edf79e66 | Huacai Chen | |
272 | edf79e66 | Huacai Chen | if (s->dev.config[0x80] & 1) { |
273 | edf79e66 | Huacai Chen | pm_io_base = pci_get_long(s->dev.config + 0x40);
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274 | edf79e66 | Huacai Chen | pm_io_base &= 0xffc0;
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275 | edf79e66 | Huacai Chen | |
276 | edf79e66 | Huacai Chen | /* XXX: need to improve memory and ioport allocation */
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277 | edf79e66 | Huacai Chen | DPRINTF("PM: mapping to 0x%x\n", pm_io_base);
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278 | edf79e66 | Huacai Chen | register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s); |
279 | edf79e66 | Huacai Chen | register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s); |
280 | edf79e66 | Huacai Chen | register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s); |
281 | edf79e66 | Huacai Chen | register_ioport_read(pm_io_base, 64, 4, pm_ioport_readl, s); |
282 | edf79e66 | Huacai Chen | } |
283 | edf79e66 | Huacai Chen | } |
284 | edf79e66 | Huacai Chen | |
285 | edf79e66 | Huacai Chen | static void pm_write_config(PCIDevice *d, |
286 | edf79e66 | Huacai Chen | uint32_t address, uint32_t val, int len)
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287 | edf79e66 | Huacai Chen | { |
288 | edf79e66 | Huacai Chen | DPRINTF("pm_write_config address 0x%x val 0x%x len 0x%x \n",
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289 | edf79e66 | Huacai Chen | address, val, len); |
290 | edf79e66 | Huacai Chen | pci_default_write_config(d, address, val, len); |
291 | edf79e66 | Huacai Chen | } |
292 | edf79e66 | Huacai Chen | |
293 | edf79e66 | Huacai Chen | static int vmstate_acpi_post_load(void *opaque, int version_id) |
294 | edf79e66 | Huacai Chen | { |
295 | edf79e66 | Huacai Chen | VT686PMState *s = opaque; |
296 | edf79e66 | Huacai Chen | |
297 | edf79e66 | Huacai Chen | pm_io_space_update(s); |
298 | edf79e66 | Huacai Chen | return 0; |
299 | edf79e66 | Huacai Chen | } |
300 | edf79e66 | Huacai Chen | |
301 | edf79e66 | Huacai Chen | static const VMStateDescription vmstate_acpi = { |
302 | edf79e66 | Huacai Chen | .name = "vt82c686b_pm",
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303 | edf79e66 | Huacai Chen | .version_id = 1,
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304 | edf79e66 | Huacai Chen | .minimum_version_id = 1,
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305 | edf79e66 | Huacai Chen | .minimum_version_id_old = 1,
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306 | edf79e66 | Huacai Chen | .post_load = vmstate_acpi_post_load, |
307 | edf79e66 | Huacai Chen | .fields = (VMStateField []) { |
308 | edf79e66 | Huacai Chen | VMSTATE_PCI_DEVICE(dev, VT686PMState), |
309 | 04dc308f | Isaku Yamahata | VMSTATE_UINT16(pm1a.sts, VT686PMState), |
310 | 04dc308f | Isaku Yamahata | VMSTATE_UINT16(pm1a.en, VT686PMState), |
311 | eaba51c5 | Isaku Yamahata | VMSTATE_UINT16(pm1_cnt.cnt, VT686PMState), |
312 | edf79e66 | Huacai Chen | VMSTATE_STRUCT(apm, VT686PMState, 0, vmstate_apm, APMState),
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313 | a54d41a8 | Isaku Yamahata | VMSTATE_TIMER(tmr.timer, VT686PMState), |
314 | a54d41a8 | Isaku Yamahata | VMSTATE_INT64(tmr.overflow_time, VT686PMState), |
315 | edf79e66 | Huacai Chen | VMSTATE_END_OF_LIST() |
316 | edf79e66 | Huacai Chen | } |
317 | edf79e66 | Huacai Chen | }; |
318 | edf79e66 | Huacai Chen | |
319 | edf79e66 | Huacai Chen | /*
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320 | edf79e66 | Huacai Chen | * TODO: vt82c686b_ac97_init() and vt82c686b_mc97_init()
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321 | edf79e66 | Huacai Chen | * just register a PCI device now, functionalities will be implemented later.
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322 | edf79e66 | Huacai Chen | */
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323 | edf79e66 | Huacai Chen | |
324 | edf79e66 | Huacai Chen | static int vt82c686b_ac97_initfn(PCIDevice *dev) |
325 | edf79e66 | Huacai Chen | { |
326 | edf79e66 | Huacai Chen | VT686AC97State *s = DO_UPCAST(VT686AC97State, dev, dev); |
327 | edf79e66 | Huacai Chen | uint8_t *pci_conf = s->dev.config; |
328 | edf79e66 | Huacai Chen | |
329 | edf79e66 | Huacai Chen | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_VIA); |
330 | edf79e66 | Huacai Chen | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_AC97); |
331 | edf79e66 | Huacai Chen | pci_config_set_class(pci_conf, PCI_CLASS_MULTIMEDIA_AUDIO); |
332 | edf79e66 | Huacai Chen | pci_config_set_revision(pci_conf, 0x50);
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333 | edf79e66 | Huacai Chen | |
334 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_INVALIDATE | |
335 | edf79e66 | Huacai Chen | PCI_COMMAND_PARITY); |
336 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_CAP_LIST | |
337 | edf79e66 | Huacai Chen | PCI_STATUS_DEVSEL_MEDIUM); |
338 | edf79e66 | Huacai Chen | pci_set_long(pci_conf + PCI_INTERRUPT_PIN, 0x03);
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339 | edf79e66 | Huacai Chen | |
340 | edf79e66 | Huacai Chen | return 0; |
341 | edf79e66 | Huacai Chen | } |
342 | edf79e66 | Huacai Chen | |
343 | edf79e66 | Huacai Chen | void vt82c686b_ac97_init(PCIBus *bus, int devfn) |
344 | edf79e66 | Huacai Chen | { |
345 | edf79e66 | Huacai Chen | PCIDevice *dev; |
346 | edf79e66 | Huacai Chen | |
347 | edf79e66 | Huacai Chen | dev = pci_create(bus, devfn, "VT82C686B_AC97");
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348 | edf79e66 | Huacai Chen | qdev_init_nofail(&dev->qdev); |
349 | edf79e66 | Huacai Chen | } |
350 | edf79e66 | Huacai Chen | |
351 | edf79e66 | Huacai Chen | static PCIDeviceInfo via_ac97_info = {
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352 | edf79e66 | Huacai Chen | .qdev.name = "VT82C686B_AC97",
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353 | edf79e66 | Huacai Chen | .qdev.desc = "AC97",
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354 | edf79e66 | Huacai Chen | .qdev.size = sizeof(VT686AC97State),
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355 | edf79e66 | Huacai Chen | .init = vt82c686b_ac97_initfn, |
356 | edf79e66 | Huacai Chen | }; |
357 | edf79e66 | Huacai Chen | |
358 | edf79e66 | Huacai Chen | static void vt82c686b_ac97_register(void) |
359 | edf79e66 | Huacai Chen | { |
360 | edf79e66 | Huacai Chen | pci_qdev_register(&via_ac97_info); |
361 | edf79e66 | Huacai Chen | } |
362 | edf79e66 | Huacai Chen | |
363 | edf79e66 | Huacai Chen | device_init(vt82c686b_ac97_register); |
364 | edf79e66 | Huacai Chen | |
365 | edf79e66 | Huacai Chen | static int vt82c686b_mc97_initfn(PCIDevice *dev) |
366 | edf79e66 | Huacai Chen | { |
367 | edf79e66 | Huacai Chen | VT686MC97State *s = DO_UPCAST(VT686MC97State, dev, dev); |
368 | edf79e66 | Huacai Chen | uint8_t *pci_conf = s->dev.config; |
369 | edf79e66 | Huacai Chen | |
370 | edf79e66 | Huacai Chen | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_VIA); |
371 | edf79e66 | Huacai Chen | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_MC97); |
372 | edf79e66 | Huacai Chen | pci_config_set_class(pci_conf, PCI_CLASS_COMMUNICATION_OTHER); |
373 | edf79e66 | Huacai Chen | pci_config_set_revision(pci_conf, 0x30);
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374 | edf79e66 | Huacai Chen | |
375 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_INVALIDATE | |
376 | edf79e66 | Huacai Chen | PCI_COMMAND_VGA_PALETTE); |
377 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_DEVSEL_MEDIUM); |
378 | edf79e66 | Huacai Chen | pci_set_long(pci_conf + PCI_INTERRUPT_PIN, 0x03);
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379 | edf79e66 | Huacai Chen | |
380 | edf79e66 | Huacai Chen | return 0; |
381 | edf79e66 | Huacai Chen | } |
382 | edf79e66 | Huacai Chen | |
383 | edf79e66 | Huacai Chen | void vt82c686b_mc97_init(PCIBus *bus, int devfn) |
384 | edf79e66 | Huacai Chen | { |
385 | edf79e66 | Huacai Chen | PCIDevice *dev; |
386 | edf79e66 | Huacai Chen | |
387 | edf79e66 | Huacai Chen | dev = pci_create(bus, devfn, "VT82C686B_MC97");
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388 | edf79e66 | Huacai Chen | qdev_init_nofail(&dev->qdev); |
389 | edf79e66 | Huacai Chen | } |
390 | edf79e66 | Huacai Chen | |
391 | edf79e66 | Huacai Chen | static PCIDeviceInfo via_mc97_info = {
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392 | edf79e66 | Huacai Chen | .qdev.name = "VT82C686B_MC97",
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393 | edf79e66 | Huacai Chen | .qdev.desc = "MC97",
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394 | edf79e66 | Huacai Chen | .qdev.size = sizeof(VT686MC97State),
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395 | edf79e66 | Huacai Chen | .init = vt82c686b_mc97_initfn, |
396 | edf79e66 | Huacai Chen | }; |
397 | edf79e66 | Huacai Chen | |
398 | edf79e66 | Huacai Chen | static void vt82c686b_mc97_register(void) |
399 | edf79e66 | Huacai Chen | { |
400 | edf79e66 | Huacai Chen | pci_qdev_register(&via_mc97_info); |
401 | edf79e66 | Huacai Chen | } |
402 | edf79e66 | Huacai Chen | |
403 | edf79e66 | Huacai Chen | device_init(vt82c686b_mc97_register); |
404 | edf79e66 | Huacai Chen | |
405 | edf79e66 | Huacai Chen | /* vt82c686 pm init */
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406 | edf79e66 | Huacai Chen | static int vt82c686b_pm_initfn(PCIDevice *dev) |
407 | edf79e66 | Huacai Chen | { |
408 | edf79e66 | Huacai Chen | VT686PMState *s = DO_UPCAST(VT686PMState, dev, dev); |
409 | edf79e66 | Huacai Chen | uint8_t *pci_conf; |
410 | edf79e66 | Huacai Chen | |
411 | edf79e66 | Huacai Chen | pci_conf = s->dev.config; |
412 | edf79e66 | Huacai Chen | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_VIA); |
413 | edf79e66 | Huacai Chen | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ACPI); |
414 | edf79e66 | Huacai Chen | pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER); |
415 | edf79e66 | Huacai Chen | pci_config_set_revision(pci_conf, 0x40);
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416 | edf79e66 | Huacai Chen | |
417 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_COMMAND, 0);
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418 | edf79e66 | Huacai Chen | pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK | |
419 | edf79e66 | Huacai Chen | PCI_STATUS_DEVSEL_MEDIUM); |
420 | edf79e66 | Huacai Chen | |
421 | edf79e66 | Huacai Chen | /* 0x48-0x4B is Power Management I/O Base */
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422 | edf79e66 | Huacai Chen | pci_set_long(pci_conf + 0x48, 0x00000001); |
423 | edf79e66 | Huacai Chen | |
424 | edf79e66 | Huacai Chen | /* SMB ports:0xeee0~0xeeef */
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425 | edf79e66 | Huacai Chen | s->smb_io_base =((s->smb_io_base & 0xfff0) + 0x0); |
426 | edf79e66 | Huacai Chen | pci_conf[0x90] = s->smb_io_base | 1; |
427 | edf79e66 | Huacai Chen | pci_conf[0x91] = s->smb_io_base >> 8; |
428 | edf79e66 | Huacai Chen | pci_conf[0xd2] = 0x90; |
429 | edf79e66 | Huacai Chen | register_ioport_write(s->smb_io_base, 0xf, 1, smb_ioport_writeb, &s->smb); |
430 | edf79e66 | Huacai Chen | register_ioport_read(s->smb_io_base, 0xf, 1, smb_ioport_readb, &s->smb); |
431 | edf79e66 | Huacai Chen | |
432 | edf79e66 | Huacai Chen | apm_init(&s->apm, NULL, s);
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433 | edf79e66 | Huacai Chen | |
434 | a54d41a8 | Isaku Yamahata | acpi_pm_tmr_init(&s->tmr, pm_tmr_timer); |
435 | eaba51c5 | Isaku Yamahata | acpi_pm1_cnt_init(&s->pm1_cnt, NULL);
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436 | edf79e66 | Huacai Chen | |
437 | edf79e66 | Huacai Chen | pm_smbus_init(&s->dev.qdev, &s->smb); |
438 | edf79e66 | Huacai Chen | |
439 | edf79e66 | Huacai Chen | return 0; |
440 | edf79e66 | Huacai Chen | } |
441 | edf79e66 | Huacai Chen | |
442 | edf79e66 | Huacai Chen | i2c_bus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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443 | edf79e66 | Huacai Chen | qemu_irq sci_irq) |
444 | edf79e66 | Huacai Chen | { |
445 | edf79e66 | Huacai Chen | PCIDevice *dev; |
446 | edf79e66 | Huacai Chen | VT686PMState *s; |
447 | edf79e66 | Huacai Chen | |
448 | edf79e66 | Huacai Chen | dev = pci_create(bus, devfn, "VT82C686B_PM");
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449 | edf79e66 | Huacai Chen | qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);
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450 | edf79e66 | Huacai Chen | |
451 | edf79e66 | Huacai Chen | s = DO_UPCAST(VT686PMState, dev, dev); |
452 | edf79e66 | Huacai Chen | |
453 | edf79e66 | Huacai Chen | qdev_init_nofail(&dev->qdev); |
454 | edf79e66 | Huacai Chen | |
455 | edf79e66 | Huacai Chen | return s->smb.smbus;
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456 | edf79e66 | Huacai Chen | } |
457 | edf79e66 | Huacai Chen | |
458 | edf79e66 | Huacai Chen | static PCIDeviceInfo via_pm_info = {
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459 | edf79e66 | Huacai Chen | .qdev.name = "VT82C686B_PM",
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460 | edf79e66 | Huacai Chen | .qdev.desc = "PM",
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461 | edf79e66 | Huacai Chen | .qdev.size = sizeof(VT686PMState),
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462 | edf79e66 | Huacai Chen | .qdev.vmsd = &vmstate_acpi, |
463 | edf79e66 | Huacai Chen | .init = vt82c686b_pm_initfn, |
464 | edf79e66 | Huacai Chen | .config_write = pm_write_config, |
465 | edf79e66 | Huacai Chen | .qdev.props = (Property[]) { |
466 | edf79e66 | Huacai Chen | DEFINE_PROP_UINT32("smb_io_base", VT686PMState, smb_io_base, 0), |
467 | edf79e66 | Huacai Chen | DEFINE_PROP_END_OF_LIST(), |
468 | edf79e66 | Huacai Chen | } |
469 | edf79e66 | Huacai Chen | }; |
470 | edf79e66 | Huacai Chen | |
471 | edf79e66 | Huacai Chen | static void vt82c686b_pm_register(void) |
472 | edf79e66 | Huacai Chen | { |
473 | edf79e66 | Huacai Chen | pci_qdev_register(&via_pm_info); |
474 | edf79e66 | Huacai Chen | } |
475 | edf79e66 | Huacai Chen | |
476 | edf79e66 | Huacai Chen | device_init(vt82c686b_pm_register); |
477 | edf79e66 | Huacai Chen | |
478 | edf79e66 | Huacai Chen | static const VMStateDescription vmstate_via = { |
479 | edf79e66 | Huacai Chen | .name = "vt82c686b",
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480 | edf79e66 | Huacai Chen | .version_id = 1,
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481 | edf79e66 | Huacai Chen | .minimum_version_id = 1,
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482 | edf79e66 | Huacai Chen | .minimum_version_id_old = 1,
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483 | edf79e66 | Huacai Chen | .fields = (VMStateField []) { |
484 | edf79e66 | Huacai Chen | VMSTATE_PCI_DEVICE(dev, VT82C686BState), |
485 | edf79e66 | Huacai Chen | VMSTATE_END_OF_LIST() |
486 | edf79e66 | Huacai Chen | } |
487 | edf79e66 | Huacai Chen | }; |
488 | edf79e66 | Huacai Chen | |
489 | edf79e66 | Huacai Chen | /* init the PCI-to-ISA bridge */
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490 | edf79e66 | Huacai Chen | static int vt82c686b_initfn(PCIDevice *d) |
491 | edf79e66 | Huacai Chen | { |
492 | edf79e66 | Huacai Chen | uint8_t *pci_conf; |
493 | edf79e66 | Huacai Chen | uint8_t *wmask; |
494 | edf79e66 | Huacai Chen | int i;
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495 | edf79e66 | Huacai Chen | |
496 | edf79e66 | Huacai Chen | isa_bus_new(&d->qdev); |
497 | edf79e66 | Huacai Chen | |
498 | edf79e66 | Huacai Chen | pci_conf = d->config; |
499 | edf79e66 | Huacai Chen | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_VIA); |
500 | edf79e66 | Huacai Chen | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_VIA_ISA_BRIDGE); |
501 | edf79e66 | Huacai Chen | pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA); |
502 | edf79e66 | Huacai Chen | pci_config_set_prog_interface(pci_conf, 0x0);
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503 | edf79e66 | Huacai Chen | pci_config_set_revision(pci_conf,0x40); /* Revision 4.0 */ |
504 | edf79e66 | Huacai Chen | |
505 | edf79e66 | Huacai Chen | wmask = d->wmask; |
506 | edf79e66 | Huacai Chen | for (i = 0x00; i < 0xff; i++) { |
507 | edf79e66 | Huacai Chen | if (i<=0x03 || (i>=0x08 && i<=0x3f)) { |
508 | edf79e66 | Huacai Chen | wmask[i] = 0x00;
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509 | edf79e66 | Huacai Chen | } |
510 | edf79e66 | Huacai Chen | } |
511 | edf79e66 | Huacai Chen | |
512 | edf79e66 | Huacai Chen | qemu_register_reset(vt82c686b_reset, d); |
513 | edf79e66 | Huacai Chen | |
514 | edf79e66 | Huacai Chen | return 0; |
515 | edf79e66 | Huacai Chen | } |
516 | edf79e66 | Huacai Chen | |
517 | edf79e66 | Huacai Chen | int vt82c686b_init(PCIBus *bus, int devfn) |
518 | edf79e66 | Huacai Chen | { |
519 | edf79e66 | Huacai Chen | PCIDevice *d; |
520 | edf79e66 | Huacai Chen | |
521 | aa5fb7b3 | Isaku Yamahata | d = pci_create_simple_multifunction(bus, devfn, true, "VT82C686B"); |
522 | edf79e66 | Huacai Chen | |
523 | edf79e66 | Huacai Chen | return d->devfn;
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524 | edf79e66 | Huacai Chen | } |
525 | edf79e66 | Huacai Chen | |
526 | edf79e66 | Huacai Chen | static PCIDeviceInfo via_info = {
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527 | edf79e66 | Huacai Chen | .qdev.name = "VT82C686B",
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528 | edf79e66 | Huacai Chen | .qdev.desc = "ISA bridge",
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529 | edf79e66 | Huacai Chen | .qdev.size = sizeof(VT82C686BState),
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530 | edf79e66 | Huacai Chen | .qdev.vmsd = &vmstate_via, |
531 | edf79e66 | Huacai Chen | .qdev.no_user = 1,
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532 | edf79e66 | Huacai Chen | .init = vt82c686b_initfn, |
533 | edf79e66 | Huacai Chen | .config_write = vt82c686b_write_config, |
534 | edf79e66 | Huacai Chen | }; |
535 | edf79e66 | Huacai Chen | |
536 | edf79e66 | Huacai Chen | static void vt82c686b_register(void) |
537 | edf79e66 | Huacai Chen | { |
538 | edf79e66 | Huacai Chen | pci_qdev_register(&via_info); |
539 | edf79e66 | Huacai Chen | } |
540 | edf79e66 | Huacai Chen | device_init(vt82c686b_register); |