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1 | c3d2689d | balrog | /*
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2 | c3d2689d | balrog | * Texas Instruments OMAP processors.
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3 | c3d2689d | balrog | *
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4 | c3d2689d | balrog | * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
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5 | c3d2689d | balrog | *
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6 | c3d2689d | balrog | * This program is free software; you can redistribute it and/or
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7 | c3d2689d | balrog | * modify it under the terms of the GNU General Public License as
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8 | c3d2689d | balrog | * published by the Free Software Foundation; either version 2 of
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9 | c3d2689d | balrog | * the License, or (at your option) any later version.
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10 | c3d2689d | balrog | *
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11 | c3d2689d | balrog | * This program is distributed in the hope that it will be useful,
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12 | c3d2689d | balrog | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | c3d2689d | balrog | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | c3d2689d | balrog | * GNU General Public License for more details.
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15 | c3d2689d | balrog | *
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16 | c3d2689d | balrog | * You should have received a copy of the GNU General Public License
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17 | c3d2689d | balrog | * along with this program; if not, write to the Free Software
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18 | c3d2689d | balrog | * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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19 | c3d2689d | balrog | * MA 02111-1307 USA
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20 | c3d2689d | balrog | */
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21 | c3d2689d | balrog | #ifndef hw_omap_h
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22 | c3d2689d | balrog | # define hw_omap_h "omap.h" |
23 | c3d2689d | balrog | |
24 | c3d2689d | balrog | # define OMAP_EMIFS_BASE 0x00000000 |
25 | c3d2689d | balrog | # define OMAP_CS0_BASE 0x00000000 |
26 | c3d2689d | balrog | # define OMAP_CS1_BASE 0x04000000 |
27 | c3d2689d | balrog | # define OMAP_CS2_BASE 0x08000000 |
28 | c3d2689d | balrog | # define OMAP_CS3_BASE 0x0c000000 |
29 | c3d2689d | balrog | # define OMAP_EMIFF_BASE 0x10000000 |
30 | c3d2689d | balrog | # define OMAP_IMIF_BASE 0x20000000 |
31 | c3d2689d | balrog | # define OMAP_LOCALBUS_BASE 0x30000000 |
32 | c3d2689d | balrog | # define OMAP_MPUI_BASE 0xe1000000 |
33 | c3d2689d | balrog | |
34 | c3d2689d | balrog | # define OMAP730_SRAM_SIZE 0x00032000 |
35 | c3d2689d | balrog | # define OMAP15XX_SRAM_SIZE 0x00030000 |
36 | c3d2689d | balrog | # define OMAP16XX_SRAM_SIZE 0x00004000 |
37 | c3d2689d | balrog | # define OMAP1611_SRAM_SIZE 0x0003e800 |
38 | c3d2689d | balrog | # define OMAP_CS0_SIZE 0x04000000 |
39 | c3d2689d | balrog | # define OMAP_CS1_SIZE 0x04000000 |
40 | c3d2689d | balrog | # define OMAP_CS2_SIZE 0x04000000 |
41 | c3d2689d | balrog | # define OMAP_CS3_SIZE 0x04000000 |
42 | c3d2689d | balrog | |
43 | c3d2689d | balrog | /* omap1_clk.c */
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44 | c3d2689d | balrog | struct omap_mpu_state_s;
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45 | c3d2689d | balrog | typedef struct clk *omap_clk; |
46 | c3d2689d | balrog | omap_clk omap_findclk(struct omap_mpu_state_s *mpu, const char *name); |
47 | c3d2689d | balrog | void omap_clk_init(struct omap_mpu_state_s *mpu); |
48 | c3d2689d | balrog | void omap_clk_adduser(struct clk *clk, qemu_irq user); |
49 | c3d2689d | balrog | void omap_clk_get(omap_clk clk);
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50 | c3d2689d | balrog | void omap_clk_put(omap_clk clk);
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51 | c3d2689d | balrog | void omap_clk_onoff(omap_clk clk, int on); |
52 | c3d2689d | balrog | void omap_clk_canidle(omap_clk clk, int can); |
53 | c3d2689d | balrog | void omap_clk_setrate(omap_clk clk, int divide, int multiply); |
54 | c3d2689d | balrog | int64_t omap_clk_getrate(omap_clk clk); |
55 | c3d2689d | balrog | void omap_clk_reparent(omap_clk clk, omap_clk parent);
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56 | c3d2689d | balrog | |
57 | c3d2689d | balrog | /* omap.c */
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58 | c3d2689d | balrog | struct omap_intr_handler_s;
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59 | c3d2689d | balrog | struct omap_intr_handler_s *omap_inth_init(target_phys_addr_t base,
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60 | c3d2689d | balrog | unsigned long size, qemu_irq parent[2], omap_clk clk); |
61 | c3d2689d | balrog | |
62 | c3d2689d | balrog | /*
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63 | c3d2689d | balrog | * Common IRQ numbers for level 1 interrupt handler
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64 | c3d2689d | balrog | * See /usr/include/asm-arm/arch-omap/irqs.h in Linux.
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65 | c3d2689d | balrog | */
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66 | c3d2689d | balrog | # define OMAP_INT_CAMERA 1 |
67 | c3d2689d | balrog | # define OMAP_INT_FIQ 3 |
68 | c3d2689d | balrog | # define OMAP_INT_RTDX 6 |
69 | c3d2689d | balrog | # define OMAP_INT_DSP_MMU_ABORT 7 |
70 | c3d2689d | balrog | # define OMAP_INT_HOST 8 |
71 | c3d2689d | balrog | # define OMAP_INT_ABORT 9 |
72 | c3d2689d | balrog | # define OMAP_INT_BRIDGE_PRIV 13 |
73 | c3d2689d | balrog | # define OMAP_INT_GPIO_BANK1 14 |
74 | c3d2689d | balrog | # define OMAP_INT_UART3 15 |
75 | c3d2689d | balrog | # define OMAP_INT_TIMER3 16 |
76 | c3d2689d | balrog | # define OMAP_INT_DMA_CH0_6 19 |
77 | c3d2689d | balrog | # define OMAP_INT_DMA_CH1_7 20 |
78 | c3d2689d | balrog | # define OMAP_INT_DMA_CH2_8 21 |
79 | c3d2689d | balrog | # define OMAP_INT_DMA_CH3 22 |
80 | c3d2689d | balrog | # define OMAP_INT_DMA_CH4 23 |
81 | c3d2689d | balrog | # define OMAP_INT_DMA_CH5 24 |
82 | c3d2689d | balrog | # define OMAP_INT_DMA_LCD 25 |
83 | c3d2689d | balrog | # define OMAP_INT_TIMER1 26 |
84 | c3d2689d | balrog | # define OMAP_INT_WD_TIMER 27 |
85 | c3d2689d | balrog | # define OMAP_INT_BRIDGE_PUB 28 |
86 | c3d2689d | balrog | # define OMAP_INT_TIMER2 30 |
87 | c3d2689d | balrog | # define OMAP_INT_LCD_CTRL 31 |
88 | c3d2689d | balrog | |
89 | c3d2689d | balrog | /*
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90 | c3d2689d | balrog | * Common OMAP-15xx IRQ numbers for level 1 interrupt handler
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91 | c3d2689d | balrog | */
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92 | c3d2689d | balrog | # define OMAP_INT_15XX_IH2_IRQ 0 |
93 | c3d2689d | balrog | # define OMAP_INT_15XX_LB_MMU 17 |
94 | c3d2689d | balrog | # define OMAP_INT_15XX_LOCAL_BUS 29 |
95 | c3d2689d | balrog | |
96 | c3d2689d | balrog | /*
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97 | c3d2689d | balrog | * OMAP-1510 specific IRQ numbers for level 1 interrupt handler
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98 | c3d2689d | balrog | */
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99 | c3d2689d | balrog | # define OMAP_INT_1510_SPI_TX 4 |
100 | c3d2689d | balrog | # define OMAP_INT_1510_SPI_RX 5 |
101 | c3d2689d | balrog | # define OMAP_INT_1510_DSP_MAILBOX1 10 |
102 | c3d2689d | balrog | # define OMAP_INT_1510_DSP_MAILBOX2 11 |
103 | c3d2689d | balrog | |
104 | c3d2689d | balrog | /*
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105 | c3d2689d | balrog | * OMAP-310 specific IRQ numbers for level 1 interrupt handler
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106 | c3d2689d | balrog | */
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107 | c3d2689d | balrog | # define OMAP_INT_310_McBSP2_TX 4 |
108 | c3d2689d | balrog | # define OMAP_INT_310_McBSP2_RX 5 |
109 | c3d2689d | balrog | # define OMAP_INT_310_HSB_MAILBOX1 12 |
110 | c3d2689d | balrog | # define OMAP_INT_310_HSAB_MMU 18 |
111 | c3d2689d | balrog | |
112 | c3d2689d | balrog | /*
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113 | c3d2689d | balrog | * OMAP-1610 specific IRQ numbers for level 1 interrupt handler
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114 | c3d2689d | balrog | */
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115 | c3d2689d | balrog | # define OMAP_INT_1610_IH2_IRQ 0 |
116 | c3d2689d | balrog | # define OMAP_INT_1610_IH2_FIQ 2 |
117 | c3d2689d | balrog | # define OMAP_INT_1610_McBSP2_TX 4 |
118 | c3d2689d | balrog | # define OMAP_INT_1610_McBSP2_RX 5 |
119 | c3d2689d | balrog | # define OMAP_INT_1610_DSP_MAILBOX1 10 |
120 | c3d2689d | balrog | # define OMAP_INT_1610_DSP_MAILBOX2 11 |
121 | c3d2689d | balrog | # define OMAP_INT_1610_LCD_LINE 12 |
122 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER1 17 |
123 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER2 18 |
124 | c3d2689d | balrog | # define OMAP_INT_1610_SSR_FIFO_0 29 |
125 | c3d2689d | balrog | |
126 | c3d2689d | balrog | /*
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127 | c3d2689d | balrog | * OMAP-730 specific IRQ numbers for level 1 interrupt handler
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128 | c3d2689d | balrog | */
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129 | c3d2689d | balrog | # define OMAP_INT_730_IH2_FIQ 0 |
130 | c3d2689d | balrog | # define OMAP_INT_730_IH2_IRQ 1 |
131 | c3d2689d | balrog | # define OMAP_INT_730_USB_NON_ISO 2 |
132 | c3d2689d | balrog | # define OMAP_INT_730_USB_ISO 3 |
133 | c3d2689d | balrog | # define OMAP_INT_730_ICR 4 |
134 | c3d2689d | balrog | # define OMAP_INT_730_EAC 5 |
135 | c3d2689d | balrog | # define OMAP_INT_730_GPIO_BANK1 6 |
136 | c3d2689d | balrog | # define OMAP_INT_730_GPIO_BANK2 7 |
137 | c3d2689d | balrog | # define OMAP_INT_730_GPIO_BANK3 8 |
138 | c3d2689d | balrog | # define OMAP_INT_730_McBSP2TX 10 |
139 | c3d2689d | balrog | # define OMAP_INT_730_McBSP2RX 11 |
140 | c3d2689d | balrog | # define OMAP_INT_730_McBSP2RX_OVF 12 |
141 | c3d2689d | balrog | # define OMAP_INT_730_LCD_LINE 14 |
142 | c3d2689d | balrog | # define OMAP_INT_730_GSM_PROTECT 15 |
143 | c3d2689d | balrog | # define OMAP_INT_730_TIMER3 16 |
144 | c3d2689d | balrog | # define OMAP_INT_730_GPIO_BANK5 17 |
145 | c3d2689d | balrog | # define OMAP_INT_730_GPIO_BANK6 18 |
146 | c3d2689d | balrog | # define OMAP_INT_730_SPGIO_WR 29 |
147 | c3d2689d | balrog | |
148 | c3d2689d | balrog | /*
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149 | c3d2689d | balrog | * Common IRQ numbers for level 2 interrupt handler
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150 | c3d2689d | balrog | */
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151 | c3d2689d | balrog | # define OMAP_INT_KEYBOARD 1 |
152 | c3d2689d | balrog | # define OMAP_INT_uWireTX 2 |
153 | c3d2689d | balrog | # define OMAP_INT_uWireRX 3 |
154 | c3d2689d | balrog | # define OMAP_INT_I2C 4 |
155 | c3d2689d | balrog | # define OMAP_INT_MPUIO 5 |
156 | c3d2689d | balrog | # define OMAP_INT_USB_HHC_1 6 |
157 | c3d2689d | balrog | # define OMAP_INT_McBSP3TX 10 |
158 | c3d2689d | balrog | # define OMAP_INT_McBSP3RX 11 |
159 | c3d2689d | balrog | # define OMAP_INT_McBSP1TX 12 |
160 | c3d2689d | balrog | # define OMAP_INT_McBSP1RX 13 |
161 | c3d2689d | balrog | # define OMAP_INT_UART1 14 |
162 | c3d2689d | balrog | # define OMAP_INT_UART2 15 |
163 | c3d2689d | balrog | # define OMAP_INT_USB_W2FC 20 |
164 | c3d2689d | balrog | # define OMAP_INT_1WIRE 21 |
165 | c3d2689d | balrog | # define OMAP_INT_OS_TIMER 22 |
166 | b30bb3a2 | balrog | # define OMAP_INT_OQN 23 |
167 | c3d2689d | balrog | # define OMAP_INT_GAUGE_32K 24 |
168 | c3d2689d | balrog | # define OMAP_INT_RTC_TIMER 25 |
169 | c3d2689d | balrog | # define OMAP_INT_RTC_ALARM 26 |
170 | c3d2689d | balrog | # define OMAP_INT_DSP_MMU 28 |
171 | c3d2689d | balrog | |
172 | c3d2689d | balrog | /*
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173 | c3d2689d | balrog | * OMAP-1510 specific IRQ numbers for level 2 interrupt handler
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174 | c3d2689d | balrog | */
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175 | c3d2689d | balrog | # define OMAP_INT_1510_BT_MCSI1TX 16 |
176 | c3d2689d | balrog | # define OMAP_INT_1510_BT_MCSI1RX 17 |
177 | c3d2689d | balrog | # define OMAP_INT_1510_SoSSI_MATCH 19 |
178 | c3d2689d | balrog | # define OMAP_INT_1510_MEM_STICK 27 |
179 | c3d2689d | balrog | # define OMAP_INT_1510_COM_SPI_RO 31 |
180 | c3d2689d | balrog | |
181 | c3d2689d | balrog | /*
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182 | c3d2689d | balrog | * OMAP-310 specific IRQ numbers for level 2 interrupt handler
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183 | c3d2689d | balrog | */
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184 | c3d2689d | balrog | # define OMAP_INT_310_FAC 0 |
185 | c3d2689d | balrog | # define OMAP_INT_310_USB_HHC_2 7 |
186 | c3d2689d | balrog | # define OMAP_INT_310_MCSI1_FE 16 |
187 | c3d2689d | balrog | # define OMAP_INT_310_MCSI2_FE 17 |
188 | c3d2689d | balrog | # define OMAP_INT_310_USB_W2FC_ISO 29 |
189 | c3d2689d | balrog | # define OMAP_INT_310_USB_W2FC_NON_ISO 30 |
190 | c3d2689d | balrog | # define OMAP_INT_310_McBSP2RX_OF 31 |
191 | c3d2689d | balrog | |
192 | c3d2689d | balrog | /*
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193 | c3d2689d | balrog | * OMAP-1610 specific IRQ numbers for level 2 interrupt handler
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194 | c3d2689d | balrog | */
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195 | c3d2689d | balrog | # define OMAP_INT_1610_FAC 0 |
196 | c3d2689d | balrog | # define OMAP_INT_1610_USB_HHC_2 7 |
197 | c3d2689d | balrog | # define OMAP_INT_1610_USB_OTG 8 |
198 | c3d2689d | balrog | # define OMAP_INT_1610_SoSSI 9 |
199 | c3d2689d | balrog | # define OMAP_INT_1610_BT_MCSI1TX 16 |
200 | c3d2689d | balrog | # define OMAP_INT_1610_BT_MCSI1RX 17 |
201 | c3d2689d | balrog | # define OMAP_INT_1610_SoSSI_MATCH 19 |
202 | c3d2689d | balrog | # define OMAP_INT_1610_MEM_STICK 27 |
203 | c3d2689d | balrog | # define OMAP_INT_1610_McBSP2RX_OF 31 |
204 | c3d2689d | balrog | # define OMAP_INT_1610_STI 32 |
205 | c3d2689d | balrog | # define OMAP_INT_1610_STI_WAKEUP 33 |
206 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER3 34 |
207 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER4 35 |
208 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER5 36 |
209 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER6 37 |
210 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER7 38 |
211 | c3d2689d | balrog | # define OMAP_INT_1610_GPTIMER8 39 |
212 | c3d2689d | balrog | # define OMAP_INT_1610_GPIO_BANK2 40 |
213 | c3d2689d | balrog | # define OMAP_INT_1610_GPIO_BANK3 41 |
214 | c3d2689d | balrog | # define OMAP_INT_1610_MMC2 42 |
215 | c3d2689d | balrog | # define OMAP_INT_1610_CF 43 |
216 | c3d2689d | balrog | # define OMAP_INT_1610_WAKE_UP_REQ 46 |
217 | c3d2689d | balrog | # define OMAP_INT_1610_GPIO_BANK4 48 |
218 | c3d2689d | balrog | # define OMAP_INT_1610_SPI 49 |
219 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH6 53 |
220 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH7 54 |
221 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH8 55 |
222 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH9 56 |
223 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH10 57 |
224 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH11 58 |
225 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH12 59 |
226 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH13 60 |
227 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH14 61 |
228 | c3d2689d | balrog | # define OMAP_INT_1610_DMA_CH15 62 |
229 | c3d2689d | balrog | # define OMAP_INT_1610_NAND 63 |
230 | c3d2689d | balrog | |
231 | c3d2689d | balrog | /*
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232 | c3d2689d | balrog | * OMAP-730 specific IRQ numbers for level 2 interrupt handler
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233 | c3d2689d | balrog | */
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234 | c3d2689d | balrog | # define OMAP_INT_730_HW_ERRORS 0 |
235 | c3d2689d | balrog | # define OMAP_INT_730_NFIQ_PWR_FAIL 1 |
236 | c3d2689d | balrog | # define OMAP_INT_730_CFCD 2 |
237 | c3d2689d | balrog | # define OMAP_INT_730_CFIREQ 3 |
238 | c3d2689d | balrog | # define OMAP_INT_730_I2C 4 |
239 | c3d2689d | balrog | # define OMAP_INT_730_PCC 5 |
240 | c3d2689d | balrog | # define OMAP_INT_730_MPU_EXT_NIRQ 6 |
241 | c3d2689d | balrog | # define OMAP_INT_730_SPI_100K_1 7 |
242 | c3d2689d | balrog | # define OMAP_INT_730_SYREN_SPI 8 |
243 | c3d2689d | balrog | # define OMAP_INT_730_VLYNQ 9 |
244 | c3d2689d | balrog | # define OMAP_INT_730_GPIO_BANK4 10 |
245 | c3d2689d | balrog | # define OMAP_INT_730_McBSP1TX 11 |
246 | c3d2689d | balrog | # define OMAP_INT_730_McBSP1RX 12 |
247 | c3d2689d | balrog | # define OMAP_INT_730_McBSP1RX_OF 13 |
248 | c3d2689d | balrog | # define OMAP_INT_730_UART_MODEM_IRDA_2 14 |
249 | c3d2689d | balrog | # define OMAP_INT_730_UART_MODEM_1 15 |
250 | c3d2689d | balrog | # define OMAP_INT_730_MCSI 16 |
251 | c3d2689d | balrog | # define OMAP_INT_730_uWireTX 17 |
252 | c3d2689d | balrog | # define OMAP_INT_730_uWireRX 18 |
253 | c3d2689d | balrog | # define OMAP_INT_730_SMC_CD 19 |
254 | c3d2689d | balrog | # define OMAP_INT_730_SMC_IREQ 20 |
255 | c3d2689d | balrog | # define OMAP_INT_730_HDQ_1WIRE 21 |
256 | c3d2689d | balrog | # define OMAP_INT_730_TIMER32K 22 |
257 | c3d2689d | balrog | # define OMAP_INT_730_MMC_SDIO 23 |
258 | c3d2689d | balrog | # define OMAP_INT_730_UPLD 24 |
259 | c3d2689d | balrog | # define OMAP_INT_730_USB_HHC_1 27 |
260 | c3d2689d | balrog | # define OMAP_INT_730_USB_HHC_2 28 |
261 | c3d2689d | balrog | # define OMAP_INT_730_USB_GENI 29 |
262 | c3d2689d | balrog | # define OMAP_INT_730_USB_OTG 30 |
263 | c3d2689d | balrog | # define OMAP_INT_730_CAMERA_IF 31 |
264 | c3d2689d | balrog | # define OMAP_INT_730_RNG 32 |
265 | c3d2689d | balrog | # define OMAP_INT_730_DUAL_MODE_TIMER 33 |
266 | c3d2689d | balrog | # define OMAP_INT_730_DBB_RF_EN 34 |
267 | c3d2689d | balrog | # define OMAP_INT_730_MPUIO_KEYPAD 35 |
268 | c3d2689d | balrog | # define OMAP_INT_730_SHA1_MD5 36 |
269 | c3d2689d | balrog | # define OMAP_INT_730_SPI_100K_2 37 |
270 | c3d2689d | balrog | # define OMAP_INT_730_RNG_IDLE 38 |
271 | c3d2689d | balrog | # define OMAP_INT_730_MPUIO 39 |
272 | c3d2689d | balrog | # define OMAP_INT_730_LLPC_LCD_CTRL_OFF 40 |
273 | c3d2689d | balrog | # define OMAP_INT_730_LLPC_OE_FALLING 41 |
274 | c3d2689d | balrog | # define OMAP_INT_730_LLPC_OE_RISING 42 |
275 | c3d2689d | balrog | # define OMAP_INT_730_LLPC_VSYNC 43 |
276 | c3d2689d | balrog | # define OMAP_INT_730_WAKE_UP_REQ 46 |
277 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH6 53 |
278 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH7 54 |
279 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH8 55 |
280 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH9 56 |
281 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH10 57 |
282 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH11 58 |
283 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH12 59 |
284 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH13 60 |
285 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH14 61 |
286 | c3d2689d | balrog | # define OMAP_INT_730_DMA_CH15 62 |
287 | c3d2689d | balrog | # define OMAP_INT_730_NAND 63 |
288 | c3d2689d | balrog | |
289 | c3d2689d | balrog | /*
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290 | c3d2689d | balrog | * OMAP-24xx common IRQ numbers
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291 | c3d2689d | balrog | */
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292 | c3d2689d | balrog | # define OMAP_INT_24XX_SYS_NIRQ 7 |
293 | c3d2689d | balrog | # define OMAP_INT_24XX_SDMA_IRQ0 12 |
294 | c3d2689d | balrog | # define OMAP_INT_24XX_SDMA_IRQ1 13 |
295 | c3d2689d | balrog | # define OMAP_INT_24XX_SDMA_IRQ2 14 |
296 | c3d2689d | balrog | # define OMAP_INT_24XX_SDMA_IRQ3 15 |
297 | c3d2689d | balrog | # define OMAP_INT_24XX_CAM_IRQ 24 |
298 | c3d2689d | balrog | # define OMAP_INT_24XX_DSS_IRQ 25 |
299 | c3d2689d | balrog | # define OMAP_INT_24XX_MAIL_U0_MPU 26 |
300 | c3d2689d | balrog | # define OMAP_INT_24XX_DSP_UMA 27 |
301 | c3d2689d | balrog | # define OMAP_INT_24XX_DSP_MMU 28 |
302 | c3d2689d | balrog | # define OMAP_INT_24XX_GPIO_BANK1 29 |
303 | c3d2689d | balrog | # define OMAP_INT_24XX_GPIO_BANK2 30 |
304 | c3d2689d | balrog | # define OMAP_INT_24XX_GPIO_BANK3 31 |
305 | c3d2689d | balrog | # define OMAP_INT_24XX_GPIO_BANK4 32 |
306 | c3d2689d | balrog | # define OMAP_INT_24XX_GPIO_BANK5 33 |
307 | c3d2689d | balrog | # define OMAP_INT_24XX_MAIL_U3_MPU 34 |
308 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER1 37 |
309 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER2 38 |
310 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER3 39 |
311 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER4 40 |
312 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER5 41 |
313 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER6 42 |
314 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER7 43 |
315 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER8 44 |
316 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER9 45 |
317 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER10 46 |
318 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER11 47 |
319 | c3d2689d | balrog | # define OMAP_INT_24XX_GPTIMER12 48 |
320 | c3d2689d | balrog | # define OMAP_INT_24XX_MCBSP1_IRQ_TX 59 |
321 | c3d2689d | balrog | # define OMAP_INT_24XX_MCBSP1_IRQ_RX 60 |
322 | c3d2689d | balrog | # define OMAP_INT_24XX_MCBSP2_IRQ_TX 62 |
323 | c3d2689d | balrog | # define OMAP_INT_24XX_MCBSP2_IRQ_RX 63 |
324 | c3d2689d | balrog | # define OMAP_INT_24XX_UART1_IRQ 72 |
325 | c3d2689d | balrog | # define OMAP_INT_24XX_UART2_IRQ 73 |
326 | c3d2689d | balrog | # define OMAP_INT_24XX_UART3_IRQ 74 |
327 | c3d2689d | balrog | # define OMAP_INT_24XX_USB_IRQ_GEN 75 |
328 | c3d2689d | balrog | # define OMAP_INT_24XX_USB_IRQ_NISO 76 |
329 | c3d2689d | balrog | # define OMAP_INT_24XX_USB_IRQ_ISO 77 |
330 | c3d2689d | balrog | # define OMAP_INT_24XX_USB_IRQ_HGEN 78 |
331 | c3d2689d | balrog | # define OMAP_INT_24XX_USB_IRQ_HSOF 79 |
332 | c3d2689d | balrog | # define OMAP_INT_24XX_USB_IRQ_OTG 80 |
333 | c3d2689d | balrog | # define OMAP_INT_24XX_MMC_IRQ 83 |
334 | c3d2689d | balrog | # define OMAP_INT_243X_HS_USB_MC 92 |
335 | c3d2689d | balrog | # define OMAP_INT_243X_HS_USB_DMA 93 |
336 | c3d2689d | balrog | # define OMAP_INT_243X_CARKIT 94 |
337 | c3d2689d | balrog | |
338 | c3d2689d | balrog | struct omap_dma_s;
|
339 | c3d2689d | balrog | struct omap_dma_s *omap_dma_init(target_phys_addr_t base,
|
340 | c3d2689d | balrog | qemu_irq pic[], struct omap_mpu_state_s *mpu, omap_clk clk);
|
341 | c3d2689d | balrog | |
342 | c3d2689d | balrog | enum omap_dma_port {
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343 | c3d2689d | balrog | emiff = 0,
|
344 | c3d2689d | balrog | emifs, |
345 | c3d2689d | balrog | imif, |
346 | c3d2689d | balrog | tipb, |
347 | c3d2689d | balrog | local, |
348 | c3d2689d | balrog | tipb_mpui, |
349 | c3d2689d | balrog | omap_dma_port_last, |
350 | c3d2689d | balrog | }; |
351 | c3d2689d | balrog | |
352 | c3d2689d | balrog | struct omap_dma_lcd_channel_s {
|
353 | c3d2689d | balrog | enum omap_dma_port src;
|
354 | c3d2689d | balrog | target_phys_addr_t src_f1_top; |
355 | c3d2689d | balrog | target_phys_addr_t src_f1_bottom; |
356 | c3d2689d | balrog | target_phys_addr_t src_f2_top; |
357 | c3d2689d | balrog | target_phys_addr_t src_f2_bottom; |
358 | c3d2689d | balrog | /* Destination port is fixed. */
|
359 | c3d2689d | balrog | int interrupts;
|
360 | c3d2689d | balrog | int condition;
|
361 | c3d2689d | balrog | int dual;
|
362 | c3d2689d | balrog | |
363 | c3d2689d | balrog | int current_frame;
|
364 | c3d2689d | balrog | ram_addr_t phys_framebuffer[2];
|
365 | c3d2689d | balrog | qemu_irq irq; |
366 | c3d2689d | balrog | struct omap_mpu_state_s *mpu;
|
367 | c3d2689d | balrog | }; |
368 | c3d2689d | balrog | |
369 | c3d2689d | balrog | /*
|
370 | c3d2689d | balrog | * DMA request numbers for OMAP1
|
371 | c3d2689d | balrog | * See /usr/include/asm-arm/arch-omap/dma.h in Linux.
|
372 | c3d2689d | balrog | */
|
373 | c3d2689d | balrog | # define OMAP_DMA_NO_DEVICE 0 |
374 | c3d2689d | balrog | # define OMAP_DMA_MCSI1_TX 1 |
375 | c3d2689d | balrog | # define OMAP_DMA_MCSI1_RX 2 |
376 | c3d2689d | balrog | # define OMAP_DMA_I2C_RX 3 |
377 | c3d2689d | balrog | # define OMAP_DMA_I2C_TX 4 |
378 | c3d2689d | balrog | # define OMAP_DMA_EXT_NDMA_REQ0 5 |
379 | c3d2689d | balrog | # define OMAP_DMA_EXT_NDMA_REQ1 6 |
380 | c3d2689d | balrog | # define OMAP_DMA_UWIRE_TX 7 |
381 | c3d2689d | balrog | # define OMAP_DMA_MCBSP1_TX 8 |
382 | c3d2689d | balrog | # define OMAP_DMA_MCBSP1_RX 9 |
383 | c3d2689d | balrog | # define OMAP_DMA_MCBSP3_TX 10 |
384 | c3d2689d | balrog | # define OMAP_DMA_MCBSP3_RX 11 |
385 | c3d2689d | balrog | # define OMAP_DMA_UART1_TX 12 |
386 | c3d2689d | balrog | # define OMAP_DMA_UART1_RX 13 |
387 | c3d2689d | balrog | # define OMAP_DMA_UART2_TX 14 |
388 | c3d2689d | balrog | # define OMAP_DMA_UART2_RX 15 |
389 | c3d2689d | balrog | # define OMAP_DMA_MCBSP2_TX 16 |
390 | c3d2689d | balrog | # define OMAP_DMA_MCBSP2_RX 17 |
391 | c3d2689d | balrog | # define OMAP_DMA_UART3_TX 18 |
392 | c3d2689d | balrog | # define OMAP_DMA_UART3_RX 19 |
393 | c3d2689d | balrog | # define OMAP_DMA_CAMERA_IF_RX 20 |
394 | c3d2689d | balrog | # define OMAP_DMA_MMC_TX 21 |
395 | c3d2689d | balrog | # define OMAP_DMA_MMC_RX 22 |
396 | c3d2689d | balrog | # define OMAP_DMA_NAND 23 /* Not in OMAP310 */ |
397 | c3d2689d | balrog | # define OMAP_DMA_IRQ_LCD_LINE 24 /* Not in OMAP310 */ |
398 | c3d2689d | balrog | # define OMAP_DMA_MEMORY_STICK 25 /* Not in OMAP310 */ |
399 | c3d2689d | balrog | # define OMAP_DMA_USB_W2FC_RX0 26 |
400 | c3d2689d | balrog | # define OMAP_DMA_USB_W2FC_RX1 27 |
401 | c3d2689d | balrog | # define OMAP_DMA_USB_W2FC_RX2 28 |
402 | c3d2689d | balrog | # define OMAP_DMA_USB_W2FC_TX0 29 |
403 | c3d2689d | balrog | # define OMAP_DMA_USB_W2FC_TX1 30 |
404 | c3d2689d | balrog | # define OMAP_DMA_USB_W2FC_TX2 31 |
405 | c3d2689d | balrog | |
406 | c3d2689d | balrog | /* These are only for 1610 */
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407 | c3d2689d | balrog | # define OMAP_DMA_CRYPTO_DES_IN 32 |
408 | c3d2689d | balrog | # define OMAP_DMA_SPI_TX 33 |
409 | c3d2689d | balrog | # define OMAP_DMA_SPI_RX 34 |
410 | c3d2689d | balrog | # define OMAP_DMA_CRYPTO_HASH 35 |
411 | c3d2689d | balrog | # define OMAP_DMA_CCP_ATTN 36 |
412 | c3d2689d | balrog | # define OMAP_DMA_CCP_FIFO_NOT_EMPTY 37 |
413 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_0 38 |
414 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_0 39 |
415 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_1 40 |
416 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_1 41 |
417 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_2 42 |
418 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_2 43 |
419 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_3 44 |
420 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_3 45 |
421 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_4 46 |
422 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_4 47 |
423 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_5 48 |
424 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_5 49 |
425 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_6 50 |
426 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_6 51 |
427 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_TX_CHAN_7 52 |
428 | c3d2689d | balrog | # define OMAP_DMA_CMT_APE_RV_CHAN_7 53 |
429 | c3d2689d | balrog | # define OMAP_DMA_MMC2_TX 54 |
430 | c3d2689d | balrog | # define OMAP_DMA_MMC2_RX 55 |
431 | c3d2689d | balrog | # define OMAP_DMA_CRYPTO_DES_OUT 56 |
432 | c3d2689d | balrog | |
433 | c3d2689d | balrog | struct omap_mpu_timer_s;
|
434 | c3d2689d | balrog | struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base,
|
435 | c3d2689d | balrog | qemu_irq irq, omap_clk clk); |
436 | c3d2689d | balrog | |
437 | c3d2689d | balrog | struct omap_watchdog_timer_s;
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438 | c3d2689d | balrog | struct omap_watchdog_timer_s *omap_wd_timer_init(target_phys_addr_t base,
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439 | c3d2689d | balrog | qemu_irq irq, omap_clk clk); |
440 | c3d2689d | balrog | |
441 | c3d2689d | balrog | struct omap_32khz_timer_s;
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442 | c3d2689d | balrog | struct omap_32khz_timer_s *omap_os_timer_init(target_phys_addr_t base,
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443 | c3d2689d | balrog | qemu_irq irq, omap_clk clk); |
444 | c3d2689d | balrog | |
445 | c3d2689d | balrog | struct omap_tipb_bridge_s;
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446 | c3d2689d | balrog | struct omap_tipb_bridge_s *omap_tipb_bridge_init(target_phys_addr_t base,
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447 | c3d2689d | balrog | qemu_irq abort_irq, omap_clk clk); |
448 | c3d2689d | balrog | |
449 | c3d2689d | balrog | struct omap_uart_s;
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450 | c3d2689d | balrog | struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
|
451 | c3d2689d | balrog | qemu_irq irq, omap_clk clk, CharDriverState *chr); |
452 | c3d2689d | balrog | |
453 | c3d2689d | balrog | /* omap_lcdc.c */
|
454 | c3d2689d | balrog | struct omap_lcd_panel_s;
|
455 | c3d2689d | balrog | void omap_lcdc_reset(struct omap_lcd_panel_s *s); |
456 | c3d2689d | balrog | struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq,
|
457 | c3d2689d | balrog | struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
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458 | c3d2689d | balrog | ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk); |
459 | c3d2689d | balrog | |
460 | b30bb3a2 | balrog | /* omap_mmc.c */
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461 | b30bb3a2 | balrog | struct omap_mmc_s;
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462 | b30bb3a2 | balrog | struct omap_mmc_s *omap_mmc_init(target_phys_addr_t base,
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463 | b30bb3a2 | balrog | qemu_irq irq, qemu_irq dma[], omap_clk clk); |
464 | b30bb3a2 | balrog | void omap_mmc_reset(struct omap_mmc_s *s); |
465 | b30bb3a2 | balrog | |
466 | c3d2689d | balrog | # define cpu_is_omap310(cpu) (cpu->mpu_model == omap310)
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467 | c3d2689d | balrog | # define cpu_is_omap1510(cpu) (cpu->mpu_model == omap1510)
|
468 | c3d2689d | balrog | # define cpu_is_omap15xx(cpu) \
|
469 | c3d2689d | balrog | (cpu_is_omap310(cpu) || cpu_is_omap1510(cpu)) |
470 | c3d2689d | balrog | # define cpu_class_omap1(cpu) 1 |
471 | c3d2689d | balrog | |
472 | c3d2689d | balrog | struct omap_mpu_state_s {
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473 | c3d2689d | balrog | enum omap1_mpu_model {
|
474 | c3d2689d | balrog | omap310, |
475 | c3d2689d | balrog | omap1510, |
476 | c3d2689d | balrog | } mpu_model; |
477 | c3d2689d | balrog | |
478 | c3d2689d | balrog | CPUState *env; |
479 | c3d2689d | balrog | |
480 | c3d2689d | balrog | qemu_irq *irq[2];
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481 | c3d2689d | balrog | qemu_irq *drq; |
482 | c3d2689d | balrog | |
483 | c3d2689d | balrog | qemu_irq wakeup; |
484 | c3d2689d | balrog | |
485 | c3d2689d | balrog | struct omap_dma_port_if_s {
|
486 | 5fafdf24 | ths | uint32_t (*read[3])(struct omap_mpu_state_s *s, |
487 | c3d2689d | balrog | target_phys_addr_t offset); |
488 | c3d2689d | balrog | void (*write[3])(struct omap_mpu_state_s *s, |
489 | c3d2689d | balrog | target_phys_addr_t offset, uint32_t value); |
490 | c3d2689d | balrog | int (*addr_valid)(struct omap_mpu_state_s *s, |
491 | c3d2689d | balrog | target_phys_addr_t addr); |
492 | c3d2689d | balrog | } port[omap_dma_port_last]; |
493 | c3d2689d | balrog | |
494 | c3d2689d | balrog | unsigned long sdram_size; |
495 | c3d2689d | balrog | unsigned long sram_size; |
496 | c3d2689d | balrog | |
497 | c3d2689d | balrog | /* MPUI-TIPB peripherals */
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498 | c3d2689d | balrog | struct omap_uart_s *uart3;
|
499 | c3d2689d | balrog | |
500 | c3d2689d | balrog | /* MPU public TIPB peripherals */
|
501 | c3d2689d | balrog | struct omap_32khz_timer_s *os_timer;
|
502 | c3d2689d | balrog | |
503 | c3d2689d | balrog | struct omap_uart_s *uart1;
|
504 | c3d2689d | balrog | struct omap_uart_s *uart2;
|
505 | c3d2689d | balrog | |
506 | b30bb3a2 | balrog | struct omap_mmc_s *mmc;
|
507 | b30bb3a2 | balrog | |
508 | c3d2689d | balrog | /* MPU private TIPB peripherals */
|
509 | c3d2689d | balrog | struct omap_intr_handler_s *ih[2]; |
510 | c3d2689d | balrog | |
511 | c3d2689d | balrog | struct omap_dma_s *dma;
|
512 | c3d2689d | balrog | |
513 | c3d2689d | balrog | struct omap_mpu_timer_s *timer[3]; |
514 | c3d2689d | balrog | struct omap_watchdog_timer_s *wdt;
|
515 | c3d2689d | balrog | |
516 | c3d2689d | balrog | struct omap_lcd_panel_s *lcd;
|
517 | c3d2689d | balrog | |
518 | c3d2689d | balrog | target_phys_addr_t ulpd_pm_base; |
519 | c3d2689d | balrog | uint32_t ulpd_pm_regs[21];
|
520 | c3d2689d | balrog | int64_t ulpd_gauge_start; |
521 | c3d2689d | balrog | |
522 | c3d2689d | balrog | target_phys_addr_t pin_cfg_base; |
523 | c3d2689d | balrog | uint32_t func_mux_ctrl[14];
|
524 | c3d2689d | balrog | uint32_t comp_mode_ctrl[1];
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525 | c3d2689d | balrog | uint32_t pull_dwn_ctrl[4];
|
526 | c3d2689d | balrog | uint32_t gate_inh_ctrl[1];
|
527 | c3d2689d | balrog | uint32_t voltage_ctrl[1];
|
528 | c3d2689d | balrog | uint32_t test_dbg_ctrl[1];
|
529 | c3d2689d | balrog | uint32_t mod_conf_ctrl[1];
|
530 | c3d2689d | balrog | int compat1509;
|
531 | c3d2689d | balrog | |
532 | c3d2689d | balrog | uint32_t mpui_ctrl; |
533 | c3d2689d | balrog | target_phys_addr_t mpui_base; |
534 | c3d2689d | balrog | |
535 | c3d2689d | balrog | struct omap_tipb_bridge_s *private_tipb;
|
536 | c3d2689d | balrog | struct omap_tipb_bridge_s *public_tipb;
|
537 | c3d2689d | balrog | |
538 | c3d2689d | balrog | target_phys_addr_t tcmi_base; |
539 | c3d2689d | balrog | uint32_t tcmi_regs[17];
|
540 | c3d2689d | balrog | |
541 | c3d2689d | balrog | struct dpll_ctl_s {
|
542 | c3d2689d | balrog | target_phys_addr_t base; |
543 | c3d2689d | balrog | uint16_t mode; |
544 | c3d2689d | balrog | omap_clk dpll; |
545 | c3d2689d | balrog | } dpll[3];
|
546 | c3d2689d | balrog | |
547 | c3d2689d | balrog | omap_clk clks; |
548 | c3d2689d | balrog | struct {
|
549 | c3d2689d | balrog | target_phys_addr_t mpu_base; |
550 | c3d2689d | balrog | target_phys_addr_t dsp_base; |
551 | c3d2689d | balrog | |
552 | c3d2689d | balrog | int cold_start;
|
553 | c3d2689d | balrog | int clocking_scheme;
|
554 | c3d2689d | balrog | uint16_t arm_ckctl; |
555 | c3d2689d | balrog | uint16_t arm_idlect1; |
556 | c3d2689d | balrog | uint16_t arm_idlect2; |
557 | c3d2689d | balrog | uint16_t arm_ewupct; |
558 | c3d2689d | balrog | uint16_t arm_rstct1; |
559 | c3d2689d | balrog | uint16_t arm_rstct2; |
560 | c3d2689d | balrog | uint16_t arm_ckout1; |
561 | c3d2689d | balrog | int dpll1_mode;
|
562 | c3d2689d | balrog | uint16_t dsp_idlect1; |
563 | c3d2689d | balrog | uint16_t dsp_idlect2; |
564 | c3d2689d | balrog | uint16_t dsp_rstct2; |
565 | c3d2689d | balrog | } clkm; |
566 | c3d2689d | balrog | } *omap310_mpu_init(unsigned long sdram_size, |
567 | c3d2689d | balrog | DisplayState *ds, const char *core); |
568 | c3d2689d | balrog | |
569 | c3d2689d | balrog | # if TARGET_PHYS_ADDR_BITS == 32 |
570 | c3d2689d | balrog | # define OMAP_FMT_plx "%#08x" |
571 | c3d2689d | balrog | # elif TARGET_PHYS_ADDR_BITS == 64 |
572 | c3d2689d | balrog | # define OMAP_FMT_plx "%#08" PRIx64 |
573 | c3d2689d | balrog | # else
|
574 | c3d2689d | balrog | # error TARGET_PHYS_ADDR_BITS undefined
|
575 | c3d2689d | balrog | # endif
|
576 | c3d2689d | balrog | |
577 | b30bb3a2 | balrog | uint32_t omap_badwidth_read16(void *opaque, target_phys_addr_t addr);
|
578 | b30bb3a2 | balrog | void omap_badwidth_write16(void *opaque, target_phys_addr_t addr, |
579 | b30bb3a2 | balrog | uint32_t value); |
580 | b30bb3a2 | balrog | uint32_t omap_badwidth_read32(void *opaque, target_phys_addr_t addr);
|
581 | b30bb3a2 | balrog | void omap_badwidth_write32(void *opaque, target_phys_addr_t addr, |
582 | b30bb3a2 | balrog | uint32_t value); |
583 | b30bb3a2 | balrog | |
584 | c3d2689d | balrog | # define OMAP_BAD_REG(paddr) \
|
585 | c3d2689d | balrog | printf("%s: Bad register " OMAP_FMT_plx "\n", __FUNCTION__, paddr) |
586 | c3d2689d | balrog | # define OMAP_RO_REG(paddr) \
|
587 | c3d2689d | balrog | printf("%s: Read-only register " OMAP_FMT_plx "\n", \ |
588 | c3d2689d | balrog | __FUNCTION__, paddr) |
589 | c3d2689d | balrog | # define OMAP_16B_REG(paddr) \
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590 | c3d2689d | balrog | printf("%s: 16-bit register " OMAP_FMT_plx "\n", \ |
591 | c3d2689d | balrog | __FUNCTION__, paddr) |
592 | c3d2689d | balrog | # define OMAP_32B_REG(paddr) \
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593 | c3d2689d | balrog | printf("%s: 32-bit register " OMAP_FMT_plx "\n", \ |
594 | c3d2689d | balrog | __FUNCTION__, paddr) |
595 | c3d2689d | balrog | |
596 | c3d2689d | balrog | #endif /* hw_omap_h */ |