root / target-arm / nwfpe / fpa11.h @ 4118a970
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1 | 00406dff | bellard | /*
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2 | 00406dff | bellard | NetWinder Floating Point Emulator
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3 | 00406dff | bellard | (c) Rebel.com, 1998-1999
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4 | 3b46e624 | ths | |
5 | 00406dff | bellard | Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
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6 | 00406dff | bellard | |
7 | 00406dff | bellard | This program is free software; you can redistribute it and/or modify
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8 | 00406dff | bellard | it under the terms of the GNU General Public License as published by
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9 | 00406dff | bellard | the Free Software Foundation; either version 2 of the License, or
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10 | 00406dff | bellard | (at your option) any later version.
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11 | 00406dff | bellard | |
12 | 00406dff | bellard | This program is distributed in the hope that it will be useful,
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13 | 00406dff | bellard | but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 00406dff | bellard | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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15 | 00406dff | bellard | GNU General Public License for more details.
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16 | 00406dff | bellard | |
17 | 00406dff | bellard | You should have received a copy of the GNU General Public License
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18 | 00406dff | bellard | along with this program; if not, write to the Free Software
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19 | 00406dff | bellard | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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20 | 00406dff | bellard | */
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21 | 00406dff | bellard | |
22 | 00406dff | bellard | #ifndef __FPA11_H__
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23 | 00406dff | bellard | #define __FPA11_H__
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24 | 00406dff | bellard | |
25 | a8d3431a | bellard | #include <stdlib.h> |
26 | a8d3431a | bellard | #include <stdio.h> |
27 | a8d3431a | bellard | #include <errno.h> |
28 | a8d3431a | bellard | |
29 | 19b045de | pbrook | #include <cpu.h> |
30 | 19b045de | pbrook | |
31 | 00406dff | bellard | #define GET_FPA11() (qemufpa)
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32 | 00406dff | bellard | |
33 | 00406dff | bellard | /*
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34 | 00406dff | bellard | * The processes registers are always at the very top of the 8K
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35 | 00406dff | bellard | * stack+task struct. Use the same method as 'current' uses to
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36 | 00406dff | bellard | * reach them.
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37 | 00406dff | bellard | */
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38 | 19b045de | pbrook | extern CPUARMState *user_registers;
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39 | 00406dff | bellard | |
40 | 00406dff | bellard | #define GET_USERREG() (user_registers)
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41 | 00406dff | bellard | |
42 | 00406dff | bellard | /* Need task_struct */
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43 | 00406dff | bellard | //#include <linux/sched.h>
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44 | 00406dff | bellard | |
45 | 00406dff | bellard | /* includes */
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46 | 00406dff | bellard | #include "fpsr.h" /* FP control and status register definitions */ |
47 | 00406dff | bellard | #include "softfloat.h" |
48 | 00406dff | bellard | |
49 | 00406dff | bellard | #define typeNone 0x00 |
50 | 00406dff | bellard | #define typeSingle 0x01 |
51 | 00406dff | bellard | #define typeDouble 0x02 |
52 | 00406dff | bellard | #define typeExtended 0x03 |
53 | 00406dff | bellard | |
54 | 00406dff | bellard | /*
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55 | 00406dff | bellard | * This must be no more and no less than 12 bytes.
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56 | 00406dff | bellard | */
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57 | 00406dff | bellard | typedef union tagFPREG { |
58 | 00406dff | bellard | floatx80 fExtended; |
59 | 00406dff | bellard | float64 fDouble; |
60 | 00406dff | bellard | float32 fSingle; |
61 | 00406dff | bellard | } FPREG; |
62 | 00406dff | bellard | |
63 | 00406dff | bellard | /*
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64 | 00406dff | bellard | * FPA11 device model.
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65 | 00406dff | bellard | *
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66 | 00406dff | bellard | * This structure is exported to user space. Do not re-order.
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67 | 00406dff | bellard | * Only add new stuff to the end, and do not change the size of
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68 | 00406dff | bellard | * any element. Elements of this structure are used by user
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69 | 00406dff | bellard | * space, and must match struct user_fp in include/asm-arm/user.h.
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70 | 00406dff | bellard | * We include the byte offsets below for documentation purposes.
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71 | 00406dff | bellard | *
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72 | 00406dff | bellard | * The size of this structure and FPREG are checked by fpmodule.c
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73 | 00406dff | bellard | * on initialisation. If the rules have been broken, NWFPE will
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74 | 00406dff | bellard | * not initialise.
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75 | 00406dff | bellard | */
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76 | 00406dff | bellard | typedef struct tagFPA11 { |
77 | 00406dff | bellard | /* 0 */ FPREG fpreg[8]; /* 8 floating point registers */ |
78 | 00406dff | bellard | /* 96 */ FPSR fpsr; /* floating point status register */ |
79 | 00406dff | bellard | /* 100 */ FPCR fpcr; /* floating point control register */ |
80 | 00406dff | bellard | /* 104 */ unsigned char fType[8]; /* type of floating point value held in |
81 | 00406dff | bellard | floating point registers. One of none
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82 | 00406dff | bellard | single, double or extended. */
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83 | 00406dff | bellard | /* 112 */ int initflag; /* this is special. The kernel guarantees |
84 | 00406dff | bellard | to set it to 0 when a thread is launched,
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85 | 00406dff | bellard | so we can use it to detect whether this
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86 | 00406dff | bellard | instance of the emulator needs to be
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87 | 00406dff | bellard | initialised. */
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88 | 20495218 | bellard | float_status fp_status; /* QEMU float emulator status */
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89 | 00406dff | bellard | } FPA11; |
90 | 00406dff | bellard | |
91 | 00406dff | bellard | extern FPA11* qemufpa;
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92 | 00406dff | bellard | |
93 | 00406dff | bellard | extern void resetFPA11(void); |
94 | 00406dff | bellard | extern void SetRoundingMode(const unsigned int); |
95 | 00406dff | bellard | extern void SetRoundingPrecision(const unsigned int); |
96 | 00406dff | bellard | |
97 | 00406dff | bellard | static inline unsigned int readRegister(unsigned int reg) |
98 | 00406dff | bellard | { |
99 | 19b045de | pbrook | return (user_registers->regs[(reg)]);
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100 | 00406dff | bellard | } |
101 | 00406dff | bellard | |
102 | 00406dff | bellard | static inline void writeRegister(unsigned int x, unsigned int y) |
103 | 00406dff | bellard | { |
104 | 00406dff | bellard | #if 0
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105 | 00406dff | bellard | printf("writing %d to r%d\n",y,x);
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106 | 00406dff | bellard | #endif
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107 | 19b045de | pbrook | user_registers->regs[(x)]=(y); |
108 | 00406dff | bellard | } |
109 | 00406dff | bellard | |
110 | 00406dff | bellard | static inline void writeConditionCodes(unsigned int x) |
111 | 00406dff | bellard | { |
112 | 19b045de | pbrook | cpsr_write(user_registers,x,CPSR_NZCV); |
113 | 00406dff | bellard | } |
114 | 00406dff | bellard | |
115 | 00406dff | bellard | #define REG_PC 15 |
116 | 00406dff | bellard | |
117 | 19b045de | pbrook | unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs); |
118 | 00406dff | bellard | |
119 | a8d3431a | bellard | /* included only for get_user/put_user macros */
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120 | a8d3431a | bellard | #include "qemu.h" |
121 | a8d3431a | bellard | |
122 | 00406dff | bellard | #endif |