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1 | 6af0bf9c | bellard | /*
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2 | 6af0bf9c | bellard | * MIPS emulation memory micro-operations for qemu.
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3 | 5fafdf24 | ths | *
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4 | 6af0bf9c | bellard | * Copyright (c) 2004-2005 Jocelyn Mayer
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5 | 6af0bf9c | bellard | *
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6 | 6af0bf9c | bellard | * This library is free software; you can redistribute it and/or
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7 | 6af0bf9c | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 6af0bf9c | bellard | * License as published by the Free Software Foundation; either
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9 | 6af0bf9c | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 6af0bf9c | bellard | *
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11 | 6af0bf9c | bellard | * This library is distributed in the hope that it will be useful,
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12 | 6af0bf9c | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 6af0bf9c | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 6af0bf9c | bellard | * Lesser General Public License for more details.
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15 | 6af0bf9c | bellard | *
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16 | 6af0bf9c | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 6af0bf9c | bellard | * License along with this library; if not, write to the Free Software
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18 | 6af0bf9c | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 6af0bf9c | bellard | */
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20 | 6af0bf9c | bellard | |
21 | 6af0bf9c | bellard | /* Standard loads and stores */
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22 | 6af0bf9c | bellard | void glue(op_lb, MEMSUFFIX) (void) |
23 | 6af0bf9c | bellard | { |
24 | 6af0bf9c | bellard | T0 = glue(ldsb, MEMSUFFIX)(T0); |
25 | 6af0bf9c | bellard | RETURN(); |
26 | 6af0bf9c | bellard | } |
27 | 6af0bf9c | bellard | |
28 | 6af0bf9c | bellard | void glue(op_lbu, MEMSUFFIX) (void) |
29 | 6af0bf9c | bellard | { |
30 | 6af0bf9c | bellard | T0 = glue(ldub, MEMSUFFIX)(T0); |
31 | 6af0bf9c | bellard | RETURN(); |
32 | 6af0bf9c | bellard | } |
33 | 6af0bf9c | bellard | |
34 | 6af0bf9c | bellard | void glue(op_sb, MEMSUFFIX) (void) |
35 | 6af0bf9c | bellard | { |
36 | 6af0bf9c | bellard | glue(stb, MEMSUFFIX)(T0, T1); |
37 | 6af0bf9c | bellard | RETURN(); |
38 | 6af0bf9c | bellard | } |
39 | 6af0bf9c | bellard | |
40 | 6af0bf9c | bellard | void glue(op_lh, MEMSUFFIX) (void) |
41 | 6af0bf9c | bellard | { |
42 | 6af0bf9c | bellard | T0 = glue(ldsw, MEMSUFFIX)(T0); |
43 | 6af0bf9c | bellard | RETURN(); |
44 | 6af0bf9c | bellard | } |
45 | 6af0bf9c | bellard | |
46 | 6af0bf9c | bellard | void glue(op_lhu, MEMSUFFIX) (void) |
47 | 6af0bf9c | bellard | { |
48 | 6af0bf9c | bellard | T0 = glue(lduw, MEMSUFFIX)(T0); |
49 | 6af0bf9c | bellard | RETURN(); |
50 | 6af0bf9c | bellard | } |
51 | 6af0bf9c | bellard | |
52 | 6af0bf9c | bellard | void glue(op_sh, MEMSUFFIX) (void) |
53 | 6af0bf9c | bellard | { |
54 | 6af0bf9c | bellard | glue(stw, MEMSUFFIX)(T0, T1); |
55 | 6af0bf9c | bellard | RETURN(); |
56 | 6af0bf9c | bellard | } |
57 | 6af0bf9c | bellard | |
58 | 6af0bf9c | bellard | void glue(op_lw, MEMSUFFIX) (void) |
59 | 6af0bf9c | bellard | { |
60 | 6af0bf9c | bellard | T0 = glue(ldl, MEMSUFFIX)(T0); |
61 | 6af0bf9c | bellard | RETURN(); |
62 | 6af0bf9c | bellard | } |
63 | 6af0bf9c | bellard | |
64 | d796321b | bellard | void glue(op_lwu, MEMSUFFIX) (void) |
65 | d796321b | bellard | { |
66 | c811cf2c | ths | T0 = (uint32_t)glue(ldl, MEMSUFFIX)(T0); |
67 | d796321b | bellard | RETURN(); |
68 | d796321b | bellard | } |
69 | d796321b | bellard | |
70 | 6af0bf9c | bellard | void glue(op_sw, MEMSUFFIX) (void) |
71 | 6af0bf9c | bellard | { |
72 | 6af0bf9c | bellard | glue(stl, MEMSUFFIX)(T0, T1); |
73 | 6af0bf9c | bellard | RETURN(); |
74 | 6af0bf9c | bellard | } |
75 | 6af0bf9c | bellard | |
76 | 4ad40f36 | bellard | /* "half" load and stores. We must do the memory access inline,
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77 | 4ad40f36 | bellard | or fault handling won't work. */
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78 | c570fd16 | ths | /* XXX: This is broken, CP0_BADVADDR has the wrong (aligned) value. */
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79 | 6af0bf9c | bellard | void glue(op_lwl, MEMSUFFIX) (void) |
80 | 6af0bf9c | bellard | { |
81 | 4ad40f36 | bellard | uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3);
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82 | 4ad40f36 | bellard | CALL_FROM_TB1(glue(do_lwl, MEMSUFFIX), tmp); |
83 | 6af0bf9c | bellard | RETURN(); |
84 | 6af0bf9c | bellard | } |
85 | 6af0bf9c | bellard | |
86 | 6af0bf9c | bellard | void glue(op_lwr, MEMSUFFIX) (void) |
87 | 6af0bf9c | bellard | { |
88 | 4ad40f36 | bellard | uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3);
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89 | 4ad40f36 | bellard | CALL_FROM_TB1(glue(do_lwr, MEMSUFFIX), tmp); |
90 | 6af0bf9c | bellard | RETURN(); |
91 | 6af0bf9c | bellard | } |
92 | 6af0bf9c | bellard | |
93 | 6af0bf9c | bellard | void glue(op_swl, MEMSUFFIX) (void) |
94 | 6af0bf9c | bellard | { |
95 | 4ad40f36 | bellard | uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3);
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96 | 4ad40f36 | bellard | tmp = CALL_FROM_TB1(glue(do_swl, MEMSUFFIX), tmp); |
97 | 4ad40f36 | bellard | glue(stl, MEMSUFFIX)(T0 & ~3, tmp);
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98 | 6af0bf9c | bellard | RETURN(); |
99 | 6af0bf9c | bellard | } |
100 | 6af0bf9c | bellard | |
101 | 6af0bf9c | bellard | void glue(op_swr, MEMSUFFIX) (void) |
102 | 6af0bf9c | bellard | { |
103 | 4ad40f36 | bellard | uint32_t tmp = glue(ldl, MEMSUFFIX)(T0 & ~3);
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104 | 4ad40f36 | bellard | tmp = CALL_FROM_TB1(glue(do_swr, MEMSUFFIX), tmp); |
105 | 4ad40f36 | bellard | glue(stl, MEMSUFFIX)(T0 & ~3, tmp);
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106 | 6af0bf9c | bellard | RETURN(); |
107 | 6af0bf9c | bellard | } |
108 | 6af0bf9c | bellard | |
109 | 6af0bf9c | bellard | void glue(op_ll, MEMSUFFIX) (void) |
110 | 6af0bf9c | bellard | { |
111 | 6af0bf9c | bellard | T1 = T0; |
112 | 6af0bf9c | bellard | T0 = glue(ldl, MEMSUFFIX)(T0); |
113 | 6af0bf9c | bellard | env->CP0_LLAddr = T1; |
114 | 6af0bf9c | bellard | RETURN(); |
115 | 6af0bf9c | bellard | } |
116 | 6af0bf9c | bellard | |
117 | 6af0bf9c | bellard | void glue(op_sc, MEMSUFFIX) (void) |
118 | 6af0bf9c | bellard | { |
119 | 6af0bf9c | bellard | CALL_FROM_TB0(dump_sc); |
120 | 62c5609a | ths | if (T0 & 0x3) { |
121 | 62c5609a | ths | env->CP0_BadVAddr = T0; |
122 | 62c5609a | ths | CALL_FROM_TB1(do_raise_exception, EXCP_AdES); |
123 | 62c5609a | ths | } |
124 | 6af0bf9c | bellard | if (T0 == env->CP0_LLAddr) {
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125 | 6af0bf9c | bellard | glue(stl, MEMSUFFIX)(T0, T1); |
126 | 6af0bf9c | bellard | T0 = 1;
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127 | 6af0bf9c | bellard | } else {
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128 | 6af0bf9c | bellard | T0 = 0;
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129 | 6af0bf9c | bellard | } |
130 | 6af0bf9c | bellard | RETURN(); |
131 | 6af0bf9c | bellard | } |
132 | 6ea83fed | bellard | |
133 | 60aa19ab | ths | #ifdef TARGET_MIPS64
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134 | c570fd16 | ths | void glue(op_ld, MEMSUFFIX) (void) |
135 | c570fd16 | ths | { |
136 | c570fd16 | ths | T0 = glue(ldq, MEMSUFFIX)(T0); |
137 | c570fd16 | ths | RETURN(); |
138 | c570fd16 | ths | } |
139 | c570fd16 | ths | |
140 | c570fd16 | ths | void glue(op_sd, MEMSUFFIX) (void) |
141 | c570fd16 | ths | { |
142 | c570fd16 | ths | glue(stq, MEMSUFFIX)(T0, T1); |
143 | c570fd16 | ths | RETURN(); |
144 | c570fd16 | ths | } |
145 | c570fd16 | ths | |
146 | c570fd16 | ths | /* "half" load and stores. We must do the memory access inline,
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147 | c570fd16 | ths | or fault handling won't work. */
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148 | c570fd16 | ths | void glue(op_ldl, MEMSUFFIX) (void) |
149 | c570fd16 | ths | { |
150 | c570fd16 | ths | target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
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151 | c570fd16 | ths | CALL_FROM_TB1(glue(do_ldl, MEMSUFFIX), tmp); |
152 | c570fd16 | ths | RETURN(); |
153 | c570fd16 | ths | } |
154 | c570fd16 | ths | |
155 | c570fd16 | ths | void glue(op_ldr, MEMSUFFIX) (void) |
156 | c570fd16 | ths | { |
157 | c570fd16 | ths | target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
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158 | c570fd16 | ths | CALL_FROM_TB1(glue(do_ldr, MEMSUFFIX), tmp); |
159 | c570fd16 | ths | RETURN(); |
160 | c570fd16 | ths | } |
161 | c570fd16 | ths | |
162 | c570fd16 | ths | void glue(op_sdl, MEMSUFFIX) (void) |
163 | c570fd16 | ths | { |
164 | c570fd16 | ths | target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
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165 | c570fd16 | ths | tmp = CALL_FROM_TB1(glue(do_sdl, MEMSUFFIX), tmp); |
166 | c570fd16 | ths | glue(stq, MEMSUFFIX)(T0 & ~7, tmp);
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167 | c570fd16 | ths | RETURN(); |
168 | c570fd16 | ths | } |
169 | c570fd16 | ths | |
170 | c570fd16 | ths | void glue(op_sdr, MEMSUFFIX) (void) |
171 | c570fd16 | ths | { |
172 | c570fd16 | ths | target_long tmp = glue(ldq, MEMSUFFIX)(T0 & ~7);
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173 | c570fd16 | ths | tmp = CALL_FROM_TB1(glue(do_sdr, MEMSUFFIX), tmp); |
174 | c570fd16 | ths | glue(stq, MEMSUFFIX)(T0 & ~7, tmp);
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175 | c570fd16 | ths | RETURN(); |
176 | c570fd16 | ths | } |
177 | c570fd16 | ths | |
178 | c570fd16 | ths | void glue(op_lld, MEMSUFFIX) (void) |
179 | c570fd16 | ths | { |
180 | c570fd16 | ths | T1 = T0; |
181 | c570fd16 | ths | T0 = glue(ldq, MEMSUFFIX)(T0); |
182 | c570fd16 | ths | env->CP0_LLAddr = T1; |
183 | c570fd16 | ths | RETURN(); |
184 | c570fd16 | ths | } |
185 | c570fd16 | ths | |
186 | c570fd16 | ths | void glue(op_scd, MEMSUFFIX) (void) |
187 | c570fd16 | ths | { |
188 | c570fd16 | ths | CALL_FROM_TB0(dump_sc); |
189 | 62c5609a | ths | if (T0 & 0x7) { |
190 | 62c5609a | ths | env->CP0_BadVAddr = T0; |
191 | 62c5609a | ths | CALL_FROM_TB1(do_raise_exception, EXCP_AdES); |
192 | 62c5609a | ths | } |
193 | c570fd16 | ths | if (T0 == env->CP0_LLAddr) {
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194 | c570fd16 | ths | glue(stq, MEMSUFFIX)(T0, T1); |
195 | c570fd16 | ths | T0 = 1;
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196 | c570fd16 | ths | } else {
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197 | c570fd16 | ths | T0 = 0;
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198 | c570fd16 | ths | } |
199 | c570fd16 | ths | RETURN(); |
200 | c570fd16 | ths | } |
201 | 60aa19ab | ths | #endif /* TARGET_MIPS64 */ |
202 | c570fd16 | ths | |
203 | 6ea83fed | bellard | void glue(op_lwc1, MEMSUFFIX) (void) |
204 | 6ea83fed | bellard | { |
205 | 6ea83fed | bellard | WT0 = glue(ldl, MEMSUFFIX)(T0); |
206 | 6ea83fed | bellard | RETURN(); |
207 | 6ea83fed | bellard | } |
208 | 6ea83fed | bellard | void glue(op_swc1, MEMSUFFIX) (void) |
209 | 6ea83fed | bellard | { |
210 | 6ea83fed | bellard | glue(stl, MEMSUFFIX)(T0, WT0); |
211 | 6ea83fed | bellard | RETURN(); |
212 | 6ea83fed | bellard | } |
213 | 6ea83fed | bellard | void glue(op_ldc1, MEMSUFFIX) (void) |
214 | 6ea83fed | bellard | { |
215 | 6ea83fed | bellard | DT0 = glue(ldq, MEMSUFFIX)(T0); |
216 | 6ea83fed | bellard | RETURN(); |
217 | 6ea83fed | bellard | } |
218 | 6ea83fed | bellard | void glue(op_sdc1, MEMSUFFIX) (void) |
219 | 6ea83fed | bellard | { |
220 | 6ea83fed | bellard | glue(stq, MEMSUFFIX)(T0, DT0); |
221 | 6ea83fed | bellard | RETURN(); |
222 | 6ea83fed | bellard | } |
223 | 5a5012ec | ths | void glue(op_luxc1, MEMSUFFIX) (void) |
224 | 5a5012ec | ths | { |
225 | 93b12ccc | ths | DT0 = glue(ldq, MEMSUFFIX)(T0 & ~0x7);
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226 | 5a5012ec | ths | RETURN(); |
227 | 5a5012ec | ths | } |
228 | 5a5012ec | ths | void glue(op_suxc1, MEMSUFFIX) (void) |
229 | 5a5012ec | ths | { |
230 | 93b12ccc | ths | glue(stq, MEMSUFFIX)(T0 & ~0x7, DT0);
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231 | 5a5012ec | ths | RETURN(); |
232 | 5a5012ec | ths | } |