root / target-ppc / op_helper.c @ 4118a970
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/*
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* PowerPC emulation helpers for qemu.
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*
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* Copyright (c) 2003-2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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#include "op_helper.h" |
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#define MEMSUFFIX _raw
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#define MEMSUFFIX _kernel
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#include "op_helper.h" |
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#include "op_helper_mem.h" |
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#endif
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//#define DEBUG_OP
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//#define DEBUG_EXCEPTIONS
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//#define DEBUG_SOFTWARE_TLB
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//#define FLUSH_ALL_TLBS
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void do_raise_exception_err (uint32_t exception, int error_code) |
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{ |
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#if 0
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printf("Raise exception %3x code : %d\n", exception, error_code);
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#endif
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switch (exception) {
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case EXCP_PROGRAM:
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if (error_code == EXCP_FP && msr_fe0 == 0 && msr_fe1 == 0) |
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return;
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break;
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default:
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break;
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} |
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env->exception_index = exception; |
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env->error_code = error_code; |
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cpu_loop_exit(); |
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} |
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void do_raise_exception (uint32_t exception)
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{ |
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do_raise_exception_err(exception, 0);
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} |
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void cpu_dump_EA (target_ulong EA);
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void do_print_mem_EA (target_ulong EA)
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{ |
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cpu_dump_EA(EA); |
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} |
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/*****************************************************************************/
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/* Registers load and stores */
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void do_load_cr (void) |
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{ |
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T0 = (env->crf[0] << 28) | |
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(env->crf[1] << 24) | |
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(env->crf[2] << 20) | |
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(env->crf[3] << 16) | |
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(env->crf[4] << 12) | |
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(env->crf[5] << 8) | |
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(env->crf[6] << 4) | |
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(env->crf[7] << 0); |
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} |
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void do_store_cr (uint32_t mask)
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{ |
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int i, sh;
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for (i = 0, sh = 7; i < 8; i++, sh--) { |
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if (mask & (1 << sh)) |
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env->crf[i] = (T0 >> (sh * 4)) & 0xFUL; |
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} |
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} |
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void do_load_xer (void) |
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{ |
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T0 = (xer_so << XER_SO) | |
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(xer_ov << XER_OV) | |
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(xer_ca << XER_CA) | |
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(xer_bc << XER_BC) | |
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(xer_cmp << XER_CMP); |
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} |
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void do_store_xer (void) |
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{ |
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xer_so = (T0 >> XER_SO) & 0x01;
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xer_ov = (T0 >> XER_OV) & 0x01;
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xer_ca = (T0 >> XER_CA) & 0x01;
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xer_cmp = (T0 >> XER_CMP) & 0xFF;
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xer_bc = (T0 >> XER_BC) & 0x7F;
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} |
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void do_load_fpscr (void) |
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{ |
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/* The 32 MSB of the target fpr are undefined.
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* They'll be zero...
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*/
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union {
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float64 d; |
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i;
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#if defined(WORDS_BIGENDIAN)
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#define WORD0 0 |
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#define WORD1 1 |
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#else
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#define WORD0 1 |
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#define WORD1 0 |
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#endif
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u.s.u[WORD0] = 0;
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u.s.u[WORD1] = 0;
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for (i = 0; i < 8; i++) |
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u.s.u[WORD1] |= env->fpscr[i] << (4 * i);
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FT0 = u.d; |
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} |
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void do_store_fpscr (uint32_t mask)
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{ |
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/*
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* We use only the 32 LSB of the incoming fpr
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*/
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union {
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double d;
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struct {
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uint32_t u[2];
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} s; |
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} u; |
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int i, rnd_type;
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u.d = FT0; |
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if (mask & 0x80) |
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env->fpscr[0] = (env->fpscr[0] & 0x9) | ((u.s.u[WORD1] >> 28) & ~0x9); |
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for (i = 1; i < 7; i++) { |
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if (mask & (1 << (7 - i))) |
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env->fpscr[i] = (u.s.u[WORD1] >> (4 * (7 - i))) & 0xF; |
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} |
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/* TODO: update FEX & VX */
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/* Set rounding mode */
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switch (env->fpscr[0] & 0x3) { |
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case 0: |
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/* Best approximation (round to nearest) */
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rnd_type = float_round_nearest_even; |
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break;
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case 1: |
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/* Smaller magnitude (round toward zero) */
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rnd_type = float_round_to_zero; |
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break;
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case 2: |
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/* Round toward +infinite */
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rnd_type = float_round_up; |
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break;
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default:
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case 3: |
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/* Round toward -infinite */
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rnd_type = float_round_down; |
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break;
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} |
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set_float_rounding_mode(rnd_type, &env->fp_status); |
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} |
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target_ulong ppc_load_dump_spr (int sprn)
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Read SPR %d %03x => " ADDRX "\n", |
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sprn, sprn, env->spr[sprn]); |
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} |
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return env->spr[sprn];
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} |
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void ppc_store_dump_spr (int sprn, target_ulong val) |
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{ |
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if (loglevel != 0) { |
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fprintf(logfile, "Write SPR %d %03x => " ADDRX " <= " ADDRX "\n", |
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sprn, sprn, env->spr[sprn], val); |
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} |
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env->spr[sprn] = val; |
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} |
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/*****************************************************************************/
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/* Fixed point operations helpers */
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#if defined(TARGET_PPC64)
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static void add128 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) |
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{ |
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*plow += a; |
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/* carry test */
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if (*plow < a)
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(*phigh)++; |
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*phigh += b; |
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} |
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static void neg128 (uint64_t *plow, uint64_t *phigh) |
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{ |
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*plow = ~*plow; |
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*phigh = ~*phigh; |
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add128(plow, phigh, 1, 0); |
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} |
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static void mul64 (uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b) |
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{ |
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uint32_t a0, a1, b0, b1; |
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uint64_t v; |
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a0 = a; |
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a1 = a >> 32;
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b0 = b; |
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b1 = b >> 32;
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v = (uint64_t)a0 * (uint64_t)b0; |
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*plow = v; |
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*phigh = 0;
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v = (uint64_t)a0 * (uint64_t)b1; |
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add128(plow, phigh, v << 32, v >> 32); |
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v = (uint64_t)a1 * (uint64_t)b0; |
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add128(plow, phigh, v << 32, v >> 32); |
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v = (uint64_t)a1 * (uint64_t)b1; |
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*phigh += v; |
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#if defined(DEBUG_MULDIV)
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printf("mul: 0x%016llx * 0x%016llx = 0x%016llx%016llx\n",
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a, b, *phigh, *plow); |
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#endif
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} |
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void do_mul64 (uint64_t *plow, uint64_t *phigh)
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{ |
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mul64(plow, phigh, T0, T1); |
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} |
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static void imul64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b) |
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{ |
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int sa, sb;
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sa = (a < 0);
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if (sa)
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a = -a; |
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sb = (b < 0);
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if (sb)
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b = -b; |
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mul64(plow, phigh, a, b); |
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if (sa ^ sb) {
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neg128(plow, phigh); |
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} |
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} |
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void do_imul64 (uint64_t *plow, uint64_t *phigh)
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{ |
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imul64(plow, phigh, T0, T1); |
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} |
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#endif
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void do_adde (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint32_t)T0 < (uint32_t)T2 ||
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(xer_ca == 1 && (uint32_t)T0 == (uint32_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#if defined(TARGET_PPC64)
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void do_adde_64 (void) |
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{ |
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T2 = T0; |
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T0 += T1 + xer_ca; |
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if (likely(!((uint64_t)T0 < (uint64_t)T2 ||
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(xer_ca == 1 && (uint64_t)T0 == (uint64_t)T2)))) {
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xer_ca = 0;
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} else {
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xer_ca = 1;
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} |
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} |
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#endif
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void do_addmeo (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint32_t)T1 &
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((uint32_t)T1 ^ (uint32_t)T0) & (1UL << 31)))) { |
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xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
320 |
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#if defined(TARGET_PPC64)
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void do_addmeo_64 (void) |
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{ |
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T1 = T0; |
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T0 += xer_ca + (-1);
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if (likely(!((uint64_t)T1 &
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((uint64_t)T1 ^ (uint64_t)T0) & (1ULL << 63)))) { |
328 |
xer_ov = 0;
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} else {
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xer_ov = 1;
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xer_so = 1;
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} |
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if (likely(T1 != 0)) |
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xer_ca = 1;
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} |
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#endif
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void do_divwo (void) |
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{ |
340 |
if (likely(!(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
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(int32_t)T1 == 0))) {
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xer_ov = 0;
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T0 = (int32_t)T0 / (int32_t)T1; |
344 |
} else {
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xer_ov = 1;
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xer_so = 1;
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T0 = (-1) * ((uint32_t)T0 >> 31); |
348 |
} |
349 |
} |
350 |
|
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#if defined(TARGET_PPC64)
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void do_divdo (void) |
353 |
{ |
354 |
if (likely(!(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1ULL) || |
355 |
(int64_t)T1 == 0))) {
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356 |
xer_ov = 0;
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357 |
T0 = (int64_t)T0 / (int64_t)T1; |
358 |
} else {
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359 |
xer_ov = 1;
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360 |
xer_so = 1;
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361 |
T0 = (-1ULL) * ((uint64_t)T0 >> 63); |
362 |
} |
363 |
} |
364 |
#endif
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365 |
|
366 |
void do_divwuo (void) |
367 |
{ |
368 |
if (likely((uint32_t)T1 != 0)) { |
369 |
xer_ov = 0;
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370 |
T0 = (uint32_t)T0 / (uint32_t)T1; |
371 |
} else {
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372 |
xer_ov = 1;
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373 |
xer_so = 1;
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374 |
T0 = 0;
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375 |
} |
376 |
} |
377 |
|
378 |
#if defined(TARGET_PPC64)
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379 |
void do_divduo (void) |
380 |
{ |
381 |
if (likely((uint64_t)T1 != 0)) { |
382 |
xer_ov = 0;
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383 |
T0 = (uint64_t)T0 / (uint64_t)T1; |
384 |
} else {
|
385 |
xer_ov = 1;
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386 |
xer_so = 1;
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387 |
T0 = 0;
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388 |
} |
389 |
} |
390 |
#endif
|
391 |
|
392 |
void do_mullwo (void) |
393 |
{ |
394 |
int64_t res = (int64_t)T0 * (int64_t)T1; |
395 |
|
396 |
if (likely((int32_t)res == res)) {
|
397 |
xer_ov = 0;
|
398 |
} else {
|
399 |
xer_ov = 1;
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400 |
xer_so = 1;
|
401 |
} |
402 |
T0 = (int32_t)res; |
403 |
} |
404 |
|
405 |
#if defined(TARGET_PPC64)
|
406 |
void do_mulldo (void) |
407 |
{ |
408 |
int64_t th; |
409 |
uint64_t tl; |
410 |
|
411 |
do_imul64(&tl, &th); |
412 |
if (likely(th == 0)) { |
413 |
xer_ov = 0;
|
414 |
} else {
|
415 |
xer_ov = 1;
|
416 |
xer_so = 1;
|
417 |
} |
418 |
T0 = (int64_t)tl; |
419 |
} |
420 |
#endif
|
421 |
|
422 |
void do_nego (void) |
423 |
{ |
424 |
if (likely((int32_t)T0 != INT32_MIN)) {
|
425 |
xer_ov = 0;
|
426 |
T0 = -(int32_t)T0; |
427 |
} else {
|
428 |
xer_ov = 1;
|
429 |
xer_so = 1;
|
430 |
} |
431 |
} |
432 |
|
433 |
#if defined(TARGET_PPC64)
|
434 |
void do_nego_64 (void) |
435 |
{ |
436 |
if (likely((int64_t)T0 != INT64_MIN)) {
|
437 |
xer_ov = 0;
|
438 |
T0 = -(int64_t)T0; |
439 |
} else {
|
440 |
xer_ov = 1;
|
441 |
xer_so = 1;
|
442 |
} |
443 |
} |
444 |
#endif
|
445 |
|
446 |
void do_subfe (void) |
447 |
{ |
448 |
T0 = T1 + ~T0 + xer_ca; |
449 |
if (likely((uint32_t)T0 >= (uint32_t)T1 &&
|
450 |
(xer_ca == 0 || (uint32_t)T0 != (uint32_t)T1))) {
|
451 |
xer_ca = 0;
|
452 |
} else {
|
453 |
xer_ca = 1;
|
454 |
} |
455 |
} |
456 |
|
457 |
#if defined(TARGET_PPC64)
|
458 |
void do_subfe_64 (void) |
459 |
{ |
460 |
T0 = T1 + ~T0 + xer_ca; |
461 |
if (likely((uint64_t)T0 >= (uint64_t)T1 &&
|
462 |
(xer_ca == 0 || (uint64_t)T0 != (uint64_t)T1))) {
|
463 |
xer_ca = 0;
|
464 |
} else {
|
465 |
xer_ca = 1;
|
466 |
} |
467 |
} |
468 |
#endif
|
469 |
|
470 |
void do_subfmeo (void) |
471 |
{ |
472 |
T1 = T0; |
473 |
T0 = ~T0 + xer_ca - 1;
|
474 |
if (likely(!((uint32_t)~T1 & ((uint32_t)~T1 ^ (uint32_t)T0) &
|
475 |
(1UL << 31)))) { |
476 |
xer_ov = 0;
|
477 |
} else {
|
478 |
xer_ov = 1;
|
479 |
xer_so = 1;
|
480 |
} |
481 |
if (likely((uint32_t)T1 != UINT32_MAX))
|
482 |
xer_ca = 1;
|
483 |
} |
484 |
|
485 |
#if defined(TARGET_PPC64)
|
486 |
void do_subfmeo_64 (void) |
487 |
{ |
488 |
T1 = T0; |
489 |
T0 = ~T0 + xer_ca - 1;
|
490 |
if (likely(!((uint64_t)~T1 & ((uint64_t)~T1 ^ (uint64_t)T0) &
|
491 |
(1ULL << 63)))) { |
492 |
xer_ov = 0;
|
493 |
} else {
|
494 |
xer_ov = 1;
|
495 |
xer_so = 1;
|
496 |
} |
497 |
if (likely((uint64_t)T1 != UINT64_MAX))
|
498 |
xer_ca = 1;
|
499 |
} |
500 |
#endif
|
501 |
|
502 |
void do_subfzeo (void) |
503 |
{ |
504 |
T1 = T0; |
505 |
T0 = ~T0 + xer_ca; |
506 |
if (likely(!(((uint32_t)~T1 ^ UINT32_MAX) &
|
507 |
((uint32_t)(~T1) ^ (uint32_t)T0) & (1UL << 31)))) { |
508 |
xer_ov = 0;
|
509 |
} else {
|
510 |
xer_ov = 1;
|
511 |
xer_so = 1;
|
512 |
} |
513 |
if (likely((uint32_t)T0 >= (uint32_t)~T1)) {
|
514 |
xer_ca = 0;
|
515 |
} else {
|
516 |
xer_ca = 1;
|
517 |
} |
518 |
} |
519 |
|
520 |
#if defined(TARGET_PPC64)
|
521 |
void do_subfzeo_64 (void) |
522 |
{ |
523 |
T1 = T0; |
524 |
T0 = ~T0 + xer_ca; |
525 |
if (likely(!(((uint64_t)~T1 ^ UINT64_MAX) &
|
526 |
((uint64_t)(~T1) ^ (uint64_t)T0) & (1ULL << 63)))) { |
527 |
xer_ov = 0;
|
528 |
} else {
|
529 |
xer_ov = 1;
|
530 |
xer_so = 1;
|
531 |
} |
532 |
if (likely((uint64_t)T0 >= (uint64_t)~T1)) {
|
533 |
xer_ca = 0;
|
534 |
} else {
|
535 |
xer_ca = 1;
|
536 |
} |
537 |
} |
538 |
#endif
|
539 |
|
540 |
/* shift right arithmetic helper */
|
541 |
void do_sraw (void) |
542 |
{ |
543 |
int32_t ret; |
544 |
|
545 |
if (likely(!(T1 & 0x20UL))) { |
546 |
if (likely((uint32_t)T1 != 0)) { |
547 |
ret = (int32_t)T0 >> (T1 & 0x1fUL);
|
548 |
if (likely(ret >= 0 || ((int32_t)T0 & ((1 << T1) - 1)) == 0)) { |
549 |
xer_ca = 0;
|
550 |
} else {
|
551 |
xer_ca = 1;
|
552 |
} |
553 |
} else {
|
554 |
ret = T0; |
555 |
xer_ca = 0;
|
556 |
} |
557 |
} else {
|
558 |
ret = (-1) * ((uint32_t)T0 >> 31); |
559 |
if (likely(ret >= 0 || ((uint32_t)T0 & ~0x80000000UL) == 0)) { |
560 |
xer_ca = 0;
|
561 |
} else {
|
562 |
xer_ca = 1;
|
563 |
} |
564 |
} |
565 |
T0 = ret; |
566 |
} |
567 |
|
568 |
#if defined(TARGET_PPC64)
|
569 |
void do_srad (void) |
570 |
{ |
571 |
int64_t ret; |
572 |
|
573 |
if (likely(!(T1 & 0x40UL))) { |
574 |
if (likely((uint64_t)T1 != 0)) { |
575 |
ret = (int64_t)T0 >> (T1 & 0x3FUL);
|
576 |
if (likely(ret >= 0 || ((int64_t)T0 & ((1 << T1) - 1)) == 0)) { |
577 |
xer_ca = 0;
|
578 |
} else {
|
579 |
xer_ca = 1;
|
580 |
} |
581 |
} else {
|
582 |
ret = T0; |
583 |
xer_ca = 0;
|
584 |
} |
585 |
} else {
|
586 |
ret = (-1) * ((uint64_t)T0 >> 63); |
587 |
if (likely(ret >= 0 || ((uint64_t)T0 & ~0x8000000000000000ULL) == 0)) { |
588 |
xer_ca = 0;
|
589 |
} else {
|
590 |
xer_ca = 1;
|
591 |
} |
592 |
} |
593 |
T0 = ret; |
594 |
} |
595 |
#endif
|
596 |
|
597 |
static inline int popcnt (uint32_t val) |
598 |
{ |
599 |
int i;
|
600 |
|
601 |
for (i = 0; val != 0;) |
602 |
val = val ^ (val - 1);
|
603 |
|
604 |
return i;
|
605 |
} |
606 |
|
607 |
void do_popcntb (void) |
608 |
{ |
609 |
uint32_t ret; |
610 |
int i;
|
611 |
|
612 |
ret = 0;
|
613 |
for (i = 0; i < 32; i += 8) |
614 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
615 |
T0 = ret; |
616 |
} |
617 |
|
618 |
#if defined(TARGET_PPC64)
|
619 |
void do_popcntb_64 (void) |
620 |
{ |
621 |
uint64_t ret; |
622 |
int i;
|
623 |
|
624 |
ret = 0;
|
625 |
for (i = 0; i < 64; i += 8) |
626 |
ret |= popcnt((T0 >> i) & 0xFF) << i;
|
627 |
T0 = ret; |
628 |
} |
629 |
#endif
|
630 |
|
631 |
/*****************************************************************************/
|
632 |
/* Floating point operations helpers */
|
633 |
void do_fctiw (void) |
634 |
{ |
635 |
union {
|
636 |
double d;
|
637 |
uint64_t i; |
638 |
} p; |
639 |
|
640 |
p.i = float64_to_int32(FT0, &env->fp_status); |
641 |
#if USE_PRECISE_EMULATION
|
642 |
/* XXX: higher bits are not supposed to be significant.
|
643 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
644 |
*/
|
645 |
p.i |= 0xFFF80000ULL << 32; |
646 |
#endif
|
647 |
FT0 = p.d; |
648 |
} |
649 |
|
650 |
void do_fctiwz (void) |
651 |
{ |
652 |
union {
|
653 |
double d;
|
654 |
uint64_t i; |
655 |
} p; |
656 |
|
657 |
p.i = float64_to_int32_round_to_zero(FT0, &env->fp_status); |
658 |
#if USE_PRECISE_EMULATION
|
659 |
/* XXX: higher bits are not supposed to be significant.
|
660 |
* to make tests easier, return the same as a real PowerPC 750 (aka G3)
|
661 |
*/
|
662 |
p.i |= 0xFFF80000ULL << 32; |
663 |
#endif
|
664 |
FT0 = p.d; |
665 |
} |
666 |
|
667 |
#if defined(TARGET_PPC64)
|
668 |
void do_fcfid (void) |
669 |
{ |
670 |
union {
|
671 |
double d;
|
672 |
uint64_t i; |
673 |
} p; |
674 |
|
675 |
p.d = FT0; |
676 |
FT0 = int64_to_float64(p.i, &env->fp_status); |
677 |
} |
678 |
|
679 |
void do_fctid (void) |
680 |
{ |
681 |
union {
|
682 |
double d;
|
683 |
uint64_t i; |
684 |
} p; |
685 |
|
686 |
p.i = float64_to_int64(FT0, &env->fp_status); |
687 |
FT0 = p.d; |
688 |
} |
689 |
|
690 |
void do_fctidz (void) |
691 |
{ |
692 |
union {
|
693 |
double d;
|
694 |
uint64_t i; |
695 |
} p; |
696 |
|
697 |
p.i = float64_to_int64_round_to_zero(FT0, &env->fp_status); |
698 |
FT0 = p.d; |
699 |
} |
700 |
|
701 |
#endif
|
702 |
|
703 |
#if USE_PRECISE_EMULATION
|
704 |
void do_fmadd (void) |
705 |
{ |
706 |
#ifdef FLOAT128
|
707 |
float128 ft0_128, ft1_128; |
708 |
|
709 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
710 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
711 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
712 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
713 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
714 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
715 |
#else
|
716 |
/* This is OK on x86 hosts */
|
717 |
FT0 = (FT0 * FT1) + FT2; |
718 |
#endif
|
719 |
} |
720 |
|
721 |
void do_fmsub (void) |
722 |
{ |
723 |
#ifdef FLOAT128
|
724 |
float128 ft0_128, ft1_128; |
725 |
|
726 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
727 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
728 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
729 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
730 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
731 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
732 |
#else
|
733 |
/* This is OK on x86 hosts */
|
734 |
FT0 = (FT0 * FT1) - FT2; |
735 |
#endif
|
736 |
} |
737 |
#endif /* USE_PRECISE_EMULATION */ |
738 |
|
739 |
void do_fnmadd (void) |
740 |
{ |
741 |
#if USE_PRECISE_EMULATION
|
742 |
#ifdef FLOAT128
|
743 |
float128 ft0_128, ft1_128; |
744 |
|
745 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
746 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
747 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
748 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
749 |
ft0_128 = float128_add(ft0_128, ft1_128, &env->fp_status); |
750 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
751 |
#else
|
752 |
/* This is OK on x86 hosts */
|
753 |
FT0 = (FT0 * FT1) + FT2; |
754 |
#endif
|
755 |
#else
|
756 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
757 |
FT0 = float64_add(FT0, FT2, &env->fp_status); |
758 |
#endif
|
759 |
if (likely(!isnan(FT0)))
|
760 |
FT0 = float64_chs(FT0); |
761 |
} |
762 |
|
763 |
void do_fnmsub (void) |
764 |
{ |
765 |
#if USE_PRECISE_EMULATION
|
766 |
#ifdef FLOAT128
|
767 |
float128 ft0_128, ft1_128; |
768 |
|
769 |
ft0_128 = float64_to_float128(FT0, &env->fp_status); |
770 |
ft1_128 = float64_to_float128(FT1, &env->fp_status); |
771 |
ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); |
772 |
ft1_128 = float64_to_float128(FT2, &env->fp_status); |
773 |
ft0_128 = float128_sub(ft0_128, ft1_128, &env->fp_status); |
774 |
FT0 = float128_to_float64(ft0_128, &env->fp_status); |
775 |
#else
|
776 |
/* This is OK on x86 hosts */
|
777 |
FT0 = (FT0 * FT1) - FT2; |
778 |
#endif
|
779 |
#else
|
780 |
FT0 = float64_mul(FT0, FT1, &env->fp_status); |
781 |
FT0 = float64_sub(FT0, FT2, &env->fp_status); |
782 |
#endif
|
783 |
if (likely(!isnan(FT0)))
|
784 |
FT0 = float64_chs(FT0); |
785 |
} |
786 |
|
787 |
void do_fsqrt (void) |
788 |
{ |
789 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
790 |
} |
791 |
|
792 |
void do_fres (void) |
793 |
{ |
794 |
union {
|
795 |
double d;
|
796 |
uint64_t i; |
797 |
} p; |
798 |
|
799 |
if (likely(isnormal(FT0))) {
|
800 |
#if USE_PRECISE_EMULATION
|
801 |
FT0 = float64_div(1.0, FT0, &env->fp_status); |
802 |
FT0 = float64_to_float32(FT0, &env->fp_status); |
803 |
#else
|
804 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
805 |
#endif
|
806 |
} else {
|
807 |
p.d = FT0; |
808 |
if (p.i == 0x8000000000000000ULL) { |
809 |
p.i = 0xFFF0000000000000ULL;
|
810 |
} else if (p.i == 0x0000000000000000ULL) { |
811 |
p.i = 0x7FF0000000000000ULL;
|
812 |
} else if (isnan(FT0)) { |
813 |
p.i = 0x7FF8000000000000ULL;
|
814 |
} else if (FT0 < 0.0) { |
815 |
p.i = 0x8000000000000000ULL;
|
816 |
} else {
|
817 |
p.i = 0x0000000000000000ULL;
|
818 |
} |
819 |
FT0 = p.d; |
820 |
} |
821 |
} |
822 |
|
823 |
void do_frsqrte (void) |
824 |
{ |
825 |
union {
|
826 |
double d;
|
827 |
uint64_t i; |
828 |
} p; |
829 |
|
830 |
if (likely(isnormal(FT0) && FT0 > 0.0)) { |
831 |
FT0 = float64_sqrt(FT0, &env->fp_status); |
832 |
FT0 = float32_div(1.0, FT0, &env->fp_status); |
833 |
} else {
|
834 |
p.d = FT0; |
835 |
if (p.i == 0x8000000000000000ULL) { |
836 |
p.i = 0xFFF0000000000000ULL;
|
837 |
} else if (p.i == 0x0000000000000000ULL) { |
838 |
p.i = 0x7FF0000000000000ULL;
|
839 |
} else if (isnan(FT0)) { |
840 |
if (!(p.i & 0x0008000000000000ULL)) |
841 |
p.i |= 0x000FFFFFFFFFFFFFULL;
|
842 |
} else if (FT0 < 0) { |
843 |
p.i = 0x7FF8000000000000ULL;
|
844 |
} else {
|
845 |
p.i = 0x0000000000000000ULL;
|
846 |
} |
847 |
FT0 = p.d; |
848 |
} |
849 |
} |
850 |
|
851 |
void do_fsel (void) |
852 |
{ |
853 |
if (FT0 >= 0) |
854 |
FT0 = FT1; |
855 |
else
|
856 |
FT0 = FT2; |
857 |
} |
858 |
|
859 |
void do_fcmpu (void) |
860 |
{ |
861 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
862 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
863 |
T0 = 0x08UL;
|
864 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
865 |
T0 = 0x04UL;
|
866 |
} else {
|
867 |
T0 = 0x02UL;
|
868 |
} |
869 |
} else {
|
870 |
T0 = 0x01UL;
|
871 |
env->fpscr[4] |= 0x1; |
872 |
env->fpscr[6] |= 0x1; |
873 |
} |
874 |
env->fpscr[3] = T0;
|
875 |
} |
876 |
|
877 |
void do_fcmpo (void) |
878 |
{ |
879 |
env->fpscr[4] &= ~0x1; |
880 |
if (likely(!isnan(FT0) && !isnan(FT1))) {
|
881 |
if (float64_lt(FT0, FT1, &env->fp_status)) {
|
882 |
T0 = 0x08UL;
|
883 |
} else if (!float64_le(FT0, FT1, &env->fp_status)) { |
884 |
T0 = 0x04UL;
|
885 |
} else {
|
886 |
T0 = 0x02UL;
|
887 |
} |
888 |
} else {
|
889 |
T0 = 0x01UL;
|
890 |
env->fpscr[4] |= 0x1; |
891 |
if (!float64_is_signaling_nan(FT0) || !float64_is_signaling_nan(FT1)) {
|
892 |
/* Quiet NaN case */
|
893 |
env->fpscr[6] |= 0x1; |
894 |
if (!(env->fpscr[1] & 0x8)) |
895 |
env->fpscr[4] |= 0x8; |
896 |
} else {
|
897 |
env->fpscr[4] |= 0x8; |
898 |
} |
899 |
} |
900 |
env->fpscr[3] = T0;
|
901 |
} |
902 |
|
903 |
#if !defined (CONFIG_USER_ONLY)
|
904 |
void cpu_dump_rfi (target_ulong RA, target_ulong msr);
|
905 |
void do_rfi (void) |
906 |
{ |
907 |
#if defined(TARGET_PPC64)
|
908 |
if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
909 |
env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
910 |
do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
911 |
} else {
|
912 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
913 |
ppc_store_msr_32(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
914 |
} |
915 |
#else
|
916 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
917 |
do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
918 |
#endif
|
919 |
#if defined (DEBUG_OP)
|
920 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
921 |
#endif
|
922 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
923 |
} |
924 |
|
925 |
#if defined(TARGET_PPC64)
|
926 |
void do_rfid (void) |
927 |
{ |
928 |
if (env->spr[SPR_SRR1] & (1ULL << MSR_SF)) { |
929 |
env->nip = (uint64_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
930 |
do_store_msr(env, (uint64_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
931 |
} else {
|
932 |
env->nip = (uint32_t)(env->spr[SPR_SRR0] & ~0x00000003);
|
933 |
do_store_msr(env, (uint32_t)(env->spr[SPR_SRR1] & ~0xFFFF0000UL));
|
934 |
} |
935 |
#if defined (DEBUG_OP)
|
936 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
937 |
#endif
|
938 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
939 |
} |
940 |
#endif
|
941 |
#endif
|
942 |
|
943 |
void do_tw (int flags) |
944 |
{ |
945 |
if (!likely(!(((int32_t)T0 < (int32_t)T1 && (flags & 0x10)) || |
946 |
((int32_t)T0 > (int32_t)T1 && (flags & 0x08)) ||
|
947 |
((int32_t)T0 == (int32_t)T1 && (flags & 0x04)) ||
|
948 |
((uint32_t)T0 < (uint32_t)T1 && (flags & 0x02)) ||
|
949 |
((uint32_t)T0 > (uint32_t)T1 && (flags & 0x01))))) {
|
950 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); |
951 |
} |
952 |
} |
953 |
|
954 |
#if defined(TARGET_PPC64)
|
955 |
void do_td (int flags) |
956 |
{ |
957 |
if (!likely(!(((int64_t)T0 < (int64_t)T1 && (flags & 0x10)) || |
958 |
((int64_t)T0 > (int64_t)T1 && (flags & 0x08)) ||
|
959 |
((int64_t)T0 == (int64_t)T1 && (flags & 0x04)) ||
|
960 |
((uint64_t)T0 < (uint64_t)T1 && (flags & 0x02)) ||
|
961 |
((uint64_t)T0 > (uint64_t)T1 && (flags & 0x01)))))
|
962 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_TRAP); |
963 |
} |
964 |
#endif
|
965 |
|
966 |
/*****************************************************************************/
|
967 |
/* PowerPC 601 specific instructions (POWER bridge) */
|
968 |
void do_POWER_abso (void) |
969 |
{ |
970 |
if ((uint32_t)T0 == INT32_MIN) {
|
971 |
T0 = INT32_MAX; |
972 |
xer_ov = 1;
|
973 |
xer_so = 1;
|
974 |
} else {
|
975 |
T0 = -T0; |
976 |
xer_ov = 0;
|
977 |
} |
978 |
} |
979 |
|
980 |
void do_POWER_clcs (void) |
981 |
{ |
982 |
switch (T0) {
|
983 |
case 0x0CUL: |
984 |
/* Instruction cache line size */
|
985 |
T0 = ICACHE_LINE_SIZE; |
986 |
break;
|
987 |
case 0x0DUL: |
988 |
/* Data cache line size */
|
989 |
T0 = DCACHE_LINE_SIZE; |
990 |
break;
|
991 |
case 0x0EUL: |
992 |
/* Minimum cache line size */
|
993 |
T0 = ICACHE_LINE_SIZE < DCACHE_LINE_SIZE ? |
994 |
ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; |
995 |
break;
|
996 |
case 0x0FUL: |
997 |
/* Maximum cache line size */
|
998 |
T0 = ICACHE_LINE_SIZE > DCACHE_LINE_SIZE ? |
999 |
ICACHE_LINE_SIZE : DCACHE_LINE_SIZE; |
1000 |
break;
|
1001 |
default:
|
1002 |
/* Undefined */
|
1003 |
break;
|
1004 |
} |
1005 |
} |
1006 |
|
1007 |
void do_POWER_div (void) |
1008 |
{ |
1009 |
uint64_t tmp; |
1010 |
|
1011 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1012 |
T0 = (long)((-1) * (T0 >> 31)); |
1013 |
env->spr[SPR_MQ] = 0;
|
1014 |
} else {
|
1015 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1016 |
env->spr[SPR_MQ] = tmp % T1; |
1017 |
T0 = tmp / (int32_t)T1; |
1018 |
} |
1019 |
} |
1020 |
|
1021 |
void do_POWER_divo (void) |
1022 |
{ |
1023 |
int64_t tmp; |
1024 |
|
1025 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1026 |
T0 = (long)((-1) * (T0 >> 31)); |
1027 |
env->spr[SPR_MQ] = 0;
|
1028 |
xer_ov = 1;
|
1029 |
xer_so = 1;
|
1030 |
} else {
|
1031 |
tmp = ((uint64_t)T0 << 32) | env->spr[SPR_MQ];
|
1032 |
env->spr[SPR_MQ] = tmp % T1; |
1033 |
tmp /= (int32_t)T1; |
1034 |
if (tmp > (int64_t)INT32_MAX || tmp < (int64_t)INT32_MIN) {
|
1035 |
xer_ov = 1;
|
1036 |
xer_so = 1;
|
1037 |
} else {
|
1038 |
xer_ov = 0;
|
1039 |
} |
1040 |
T0 = tmp; |
1041 |
} |
1042 |
} |
1043 |
|
1044 |
void do_POWER_divs (void) |
1045 |
{ |
1046 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1047 |
T0 = (long)((-1) * (T0 >> 31)); |
1048 |
env->spr[SPR_MQ] = 0;
|
1049 |
} else {
|
1050 |
env->spr[SPR_MQ] = T0 % T1; |
1051 |
T0 = (int32_t)T0 / (int32_t)T1; |
1052 |
} |
1053 |
} |
1054 |
|
1055 |
void do_POWER_divso (void) |
1056 |
{ |
1057 |
if (((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || (int32_t)T1 == 0) { |
1058 |
T0 = (long)((-1) * (T0 >> 31)); |
1059 |
env->spr[SPR_MQ] = 0;
|
1060 |
xer_ov = 1;
|
1061 |
xer_so = 1;
|
1062 |
} else {
|
1063 |
T0 = (int32_t)T0 / (int32_t)T1; |
1064 |
env->spr[SPR_MQ] = (int32_t)T0 % (int32_t)T1; |
1065 |
xer_ov = 0;
|
1066 |
} |
1067 |
} |
1068 |
|
1069 |
void do_POWER_dozo (void) |
1070 |
{ |
1071 |
if ((int32_t)T1 > (int32_t)T0) {
|
1072 |
T2 = T0; |
1073 |
T0 = T1 - T0; |
1074 |
if (((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) &
|
1075 |
((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)) { |
1076 |
xer_ov = 1;
|
1077 |
xer_so = 1;
|
1078 |
} else {
|
1079 |
xer_ov = 0;
|
1080 |
} |
1081 |
} else {
|
1082 |
T0 = 0;
|
1083 |
xer_ov = 0;
|
1084 |
} |
1085 |
} |
1086 |
|
1087 |
void do_POWER_maskg (void) |
1088 |
{ |
1089 |
uint32_t ret; |
1090 |
|
1091 |
if ((uint32_t)T0 == (uint32_t)(T1 + 1)) { |
1092 |
ret = -1;
|
1093 |
} else {
|
1094 |
ret = (((uint32_t)(-1)) >> ((uint32_t)T0)) ^
|
1095 |
(((uint32_t)(-1) >> ((uint32_t)T1)) >> 1); |
1096 |
if ((uint32_t)T0 > (uint32_t)T1)
|
1097 |
ret = ~ret; |
1098 |
} |
1099 |
T0 = ret; |
1100 |
} |
1101 |
|
1102 |
void do_POWER_mulo (void) |
1103 |
{ |
1104 |
uint64_t tmp; |
1105 |
|
1106 |
tmp = (uint64_t)T0 * (uint64_t)T1; |
1107 |
env->spr[SPR_MQ] = tmp >> 32;
|
1108 |
T0 = tmp; |
1109 |
if (tmp >> 32 != ((uint64_t)T0 >> 16) * ((uint64_t)T1 >> 16)) { |
1110 |
xer_ov = 1;
|
1111 |
xer_so = 1;
|
1112 |
} else {
|
1113 |
xer_ov = 0;
|
1114 |
} |
1115 |
} |
1116 |
|
1117 |
#if !defined (CONFIG_USER_ONLY)
|
1118 |
void do_POWER_rac (void) |
1119 |
{ |
1120 |
#if 0
|
1121 |
mmu_ctx_t ctx;
|
1122 |
|
1123 |
/* We don't have to generate many instances of this instruction,
|
1124 |
* as rac is supervisor only.
|
1125 |
*/
|
1126 |
if (get_physical_address(env, &ctx, T0, 0, ACCESS_INT, 1) == 0)
|
1127 |
T0 = ctx.raddr;
|
1128 |
#endif
|
1129 |
} |
1130 |
|
1131 |
void do_POWER_rfsvc (void) |
1132 |
{ |
1133 |
env->nip = env->lr & ~0x00000003UL;
|
1134 |
T0 = env->ctr & 0x0000FFFFUL;
|
1135 |
do_store_msr(env, T0); |
1136 |
#if defined (DEBUG_OP)
|
1137 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1138 |
#endif
|
1139 |
env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
1140 |
} |
1141 |
|
1142 |
/* PowerPC 601 BAT management helper */
|
1143 |
void do_store_601_batu (int nr) |
1144 |
{ |
1145 |
do_store_ibatu(env, nr, (uint32_t)T0); |
1146 |
env->DBAT[0][nr] = env->IBAT[0][nr]; |
1147 |
env->DBAT[1][nr] = env->IBAT[1][nr]; |
1148 |
} |
1149 |
#endif
|
1150 |
|
1151 |
/*****************************************************************************/
|
1152 |
/* 602 specific instructions */
|
1153 |
/* mfrom is the most crazy instruction ever seen, imho ! */
|
1154 |
/* Real implementation uses a ROM table. Do the same */
|
1155 |
#define USE_MFROM_ROM_TABLE
|
1156 |
void do_op_602_mfrom (void) |
1157 |
{ |
1158 |
if (likely(T0 < 602)) { |
1159 |
#if defined(USE_MFROM_ROM_TABLE)
|
1160 |
#include "mfrom_table.c" |
1161 |
T0 = mfrom_ROM_table[T0]; |
1162 |
#else
|
1163 |
double d;
|
1164 |
/* Extremly decomposed:
|
1165 |
* -T0 / 256
|
1166 |
* T0 = 256 * log10(10 + 1.0) + 0.5
|
1167 |
*/
|
1168 |
d = T0; |
1169 |
d = float64_div(d, 256, &env->fp_status);
|
1170 |
d = float64_chs(d); |
1171 |
d = exp10(d); // XXX: use float emulation function
|
1172 |
d = float64_add(d, 1.0, &env->fp_status); |
1173 |
d = log10(d); // XXX: use float emulation function
|
1174 |
d = float64_mul(d, 256, &env->fp_status);
|
1175 |
d = float64_add(d, 0.5, &env->fp_status); |
1176 |
T0 = float64_round_to_int(d, &env->fp_status); |
1177 |
#endif
|
1178 |
} else {
|
1179 |
T0 = 0;
|
1180 |
} |
1181 |
} |
1182 |
|
1183 |
/*****************************************************************************/
|
1184 |
/* Embedded PowerPC specific helpers */
|
1185 |
void do_405_check_ov (void) |
1186 |
{ |
1187 |
if (likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1188 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1189 |
xer_ov = 0;
|
1190 |
} else {
|
1191 |
xer_ov = 1;
|
1192 |
xer_so = 1;
|
1193 |
} |
1194 |
} |
1195 |
|
1196 |
void do_405_check_sat (void) |
1197 |
{ |
1198 |
if (!likely((((uint32_t)T1 ^ (uint32_t)T2) >> 31) || |
1199 |
!(((uint32_t)T0 ^ (uint32_t)T2) >> 31))) {
|
1200 |
/* Saturate result */
|
1201 |
if (T2 >> 31) { |
1202 |
T0 = INT32_MIN; |
1203 |
} else {
|
1204 |
T0 = INT32_MAX; |
1205 |
} |
1206 |
} |
1207 |
} |
1208 |
|
1209 |
/* XXX: to be improved to check access rights when in user-mode */
|
1210 |
void do_load_dcr (void) |
1211 |
{ |
1212 |
target_ulong val; |
1213 |
|
1214 |
if (unlikely(env->dcr_env == NULL)) { |
1215 |
if (loglevel != 0) { |
1216 |
fprintf(logfile, "No DCR environment\n");
|
1217 |
} |
1218 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
1219 |
} else if (unlikely(ppc_dcr_read(env->dcr_env, T0, &val) != 0)) { |
1220 |
if (loglevel != 0) { |
1221 |
fprintf(logfile, "DCR read error %d %03x\n", (int)T0, (int)T0); |
1222 |
} |
1223 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
1224 |
} else {
|
1225 |
T0 = val; |
1226 |
} |
1227 |
} |
1228 |
|
1229 |
void do_store_dcr (void) |
1230 |
{ |
1231 |
if (unlikely(env->dcr_env == NULL)) { |
1232 |
if (loglevel != 0) { |
1233 |
fprintf(logfile, "No DCR environment\n");
|
1234 |
} |
1235 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_INVAL); |
1236 |
} else if (unlikely(ppc_dcr_write(env->dcr_env, T0, T1) != 0)) { |
1237 |
if (loglevel != 0) { |
1238 |
fprintf(logfile, "DCR write error %d %03x\n", (int)T0, (int)T0); |
1239 |
} |
1240 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_PRIV_REG); |
1241 |
} |
1242 |
} |
1243 |
|
1244 |
#if !defined(CONFIG_USER_ONLY)
|
1245 |
void do_40x_rfci (void) |
1246 |
{ |
1247 |
env->nip = env->spr[SPR_40x_SRR2]; |
1248 |
do_store_msr(env, env->spr[SPR_40x_SRR3] & ~0xFFFF0000);
|
1249 |
#if defined (DEBUG_OP)
|
1250 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1251 |
#endif
|
1252 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1253 |
} |
1254 |
|
1255 |
void do_rfci (void) |
1256 |
{ |
1257 |
#if defined(TARGET_PPC64)
|
1258 |
if (env->spr[SPR_BOOKE_CSRR1] & (1 << MSR_CM)) { |
1259 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_CSRR0]; |
1260 |
} else
|
1261 |
#endif
|
1262 |
{ |
1263 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_CSRR0]; |
1264 |
} |
1265 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_CSRR1] & ~0x3FFF0000);
|
1266 |
#if defined (DEBUG_OP)
|
1267 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1268 |
#endif
|
1269 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1270 |
} |
1271 |
|
1272 |
void do_rfdi (void) |
1273 |
{ |
1274 |
#if defined(TARGET_PPC64)
|
1275 |
if (env->spr[SPR_BOOKE_DSRR1] & (1 << MSR_CM)) { |
1276 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_DSRR0]; |
1277 |
} else
|
1278 |
#endif
|
1279 |
{ |
1280 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_DSRR0]; |
1281 |
} |
1282 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_DSRR1] & ~0x3FFF0000);
|
1283 |
#if defined (DEBUG_OP)
|
1284 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1285 |
#endif
|
1286 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1287 |
} |
1288 |
|
1289 |
void do_rfmci (void) |
1290 |
{ |
1291 |
#if defined(TARGET_PPC64)
|
1292 |
if (env->spr[SPR_BOOKE_MCSRR1] & (1 << MSR_CM)) { |
1293 |
env->nip = (uint64_t)env->spr[SPR_BOOKE_MCSRR0]; |
1294 |
} else
|
1295 |
#endif
|
1296 |
{ |
1297 |
env->nip = (uint32_t)env->spr[SPR_BOOKE_MCSRR0]; |
1298 |
} |
1299 |
do_store_msr(env, (uint32_t)env->spr[SPR_BOOKE_MCSRR1] & ~0x3FFF0000);
|
1300 |
#if defined (DEBUG_OP)
|
1301 |
cpu_dump_rfi(env->nip, do_load_msr(env)); |
1302 |
#endif
|
1303 |
env->interrupt_request = CPU_INTERRUPT_EXITTB; |
1304 |
} |
1305 |
|
1306 |
void do_load_403_pb (int num) |
1307 |
{ |
1308 |
T0 = env->pb[num]; |
1309 |
} |
1310 |
|
1311 |
void do_store_403_pb (int num) |
1312 |
{ |
1313 |
if (likely(env->pb[num] != T0)) {
|
1314 |
env->pb[num] = T0; |
1315 |
/* Should be optimized */
|
1316 |
tlb_flush(env, 1);
|
1317 |
} |
1318 |
} |
1319 |
#endif
|
1320 |
|
1321 |
/* 440 specific */
|
1322 |
void do_440_dlmzb (void) |
1323 |
{ |
1324 |
target_ulong mask; |
1325 |
int i;
|
1326 |
|
1327 |
i = 1;
|
1328 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1329 |
if ((T0 & mask) == 0) |
1330 |
goto done;
|
1331 |
i++; |
1332 |
} |
1333 |
for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { |
1334 |
if ((T1 & mask) == 0) |
1335 |
break;
|
1336 |
i++; |
1337 |
} |
1338 |
done:
|
1339 |
T0 = i; |
1340 |
} |
1341 |
|
1342 |
#if defined(TARGET_PPCEMB)
|
1343 |
/* SPE extension helpers */
|
1344 |
/* Use a table to make this quicker */
|
1345 |
static uint8_t hbrev[16] = { |
1346 |
0x0, 0x8, 0x4, 0xC, 0x2, 0xA, 0x6, 0xE, |
1347 |
0x1, 0x9, 0x5, 0xD, 0x3, 0xB, 0x7, 0xF, |
1348 |
}; |
1349 |
|
1350 |
static inline uint8_t byte_reverse (uint8_t val) |
1351 |
{ |
1352 |
return hbrev[val >> 4] | (hbrev[val & 0xF] << 4); |
1353 |
} |
1354 |
|
1355 |
static inline uint32_t word_reverse (uint32_t val) |
1356 |
{ |
1357 |
return byte_reverse(val >> 24) | (byte_reverse(val >> 16) << 8) | |
1358 |
(byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); |
1359 |
} |
1360 |
|
1361 |
#define MASKBITS 16 // Random value - to be fixed |
1362 |
void do_brinc (void) |
1363 |
{ |
1364 |
uint32_t a, b, d, mask; |
1365 |
|
1366 |
mask = (uint32_t)(-1UL) >> MASKBITS;
|
1367 |
b = T1_64 & mask; |
1368 |
a = T0_64 & mask; |
1369 |
d = word_reverse(1 + word_reverse(a | ~mask));
|
1370 |
T0_64 = (T0_64 & ~mask) | (d & mask); |
1371 |
} |
1372 |
|
1373 |
#define DO_SPE_OP2(name) \
|
1374 |
void do_ev##name (void) \ |
1375 |
{ \ |
1376 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32, T1_64 >> 32) << 32) | \ |
1377 |
(uint64_t)_do_e##name(T0_64, T1_64); \ |
1378 |
} |
1379 |
|
1380 |
#define DO_SPE_OP1(name) \
|
1381 |
void do_ev##name (void) \ |
1382 |
{ \ |
1383 |
T0_64 = ((uint64_t)_do_e##name(T0_64 >> 32) << 32) | \ |
1384 |
(uint64_t)_do_e##name(T0_64); \ |
1385 |
} |
1386 |
|
1387 |
/* Fixed-point vector arithmetic */
|
1388 |
static inline uint32_t _do_eabs (uint32_t val) |
1389 |
{ |
1390 |
if (val != 0x80000000) |
1391 |
val &= ~0x80000000;
|
1392 |
|
1393 |
return val;
|
1394 |
} |
1395 |
|
1396 |
static inline uint32_t _do_eaddw (uint32_t op1, uint32_t op2) |
1397 |
{ |
1398 |
return op1 + op2;
|
1399 |
} |
1400 |
|
1401 |
static inline int _do_ecntlsw (uint32_t val) |
1402 |
{ |
1403 |
if (val & 0x80000000) |
1404 |
return _do_cntlzw(~val);
|
1405 |
else
|
1406 |
return _do_cntlzw(val);
|
1407 |
} |
1408 |
|
1409 |
static inline int _do_ecntlzw (uint32_t val) |
1410 |
{ |
1411 |
return _do_cntlzw(val);
|
1412 |
} |
1413 |
|
1414 |
static inline uint32_t _do_eneg (uint32_t val) |
1415 |
{ |
1416 |
if (val != 0x80000000) |
1417 |
val ^= 0x80000000;
|
1418 |
|
1419 |
return val;
|
1420 |
} |
1421 |
|
1422 |
static inline uint32_t _do_erlw (uint32_t op1, uint32_t op2) |
1423 |
{ |
1424 |
return rotl32(op1, op2);
|
1425 |
} |
1426 |
|
1427 |
static inline uint32_t _do_erndw (uint32_t val) |
1428 |
{ |
1429 |
return (val + 0x000080000000) & 0xFFFF0000; |
1430 |
} |
1431 |
|
1432 |
static inline uint32_t _do_eslw (uint32_t op1, uint32_t op2) |
1433 |
{ |
1434 |
/* No error here: 6 bits are used */
|
1435 |
return op1 << (op2 & 0x3F); |
1436 |
} |
1437 |
|
1438 |
static inline int32_t _do_esrws (int32_t op1, uint32_t op2) |
1439 |
{ |
1440 |
/* No error here: 6 bits are used */
|
1441 |
return op1 >> (op2 & 0x3F); |
1442 |
} |
1443 |
|
1444 |
static inline uint32_t _do_esrwu (uint32_t op1, uint32_t op2) |
1445 |
{ |
1446 |
/* No error here: 6 bits are used */
|
1447 |
return op1 >> (op2 & 0x3F); |
1448 |
} |
1449 |
|
1450 |
static inline uint32_t _do_esubfw (uint32_t op1, uint32_t op2) |
1451 |
{ |
1452 |
return op2 - op1;
|
1453 |
} |
1454 |
|
1455 |
/* evabs */
|
1456 |
DO_SPE_OP1(abs); |
1457 |
/* evaddw */
|
1458 |
DO_SPE_OP2(addw); |
1459 |
/* evcntlsw */
|
1460 |
DO_SPE_OP1(cntlsw); |
1461 |
/* evcntlzw */
|
1462 |
DO_SPE_OP1(cntlzw); |
1463 |
/* evneg */
|
1464 |
DO_SPE_OP1(neg); |
1465 |
/* evrlw */
|
1466 |
DO_SPE_OP2(rlw); |
1467 |
/* evrnd */
|
1468 |
DO_SPE_OP1(rndw); |
1469 |
/* evslw */
|
1470 |
DO_SPE_OP2(slw); |
1471 |
/* evsrws */
|
1472 |
DO_SPE_OP2(srws); |
1473 |
/* evsrwu */
|
1474 |
DO_SPE_OP2(srwu); |
1475 |
/* evsubfw */
|
1476 |
DO_SPE_OP2(subfw); |
1477 |
|
1478 |
/* evsel is a little bit more complicated... */
|
1479 |
static inline uint32_t _do_esel (uint32_t op1, uint32_t op2, int n) |
1480 |
{ |
1481 |
if (n)
|
1482 |
return op1;
|
1483 |
else
|
1484 |
return op2;
|
1485 |
} |
1486 |
|
1487 |
void do_evsel (void) |
1488 |
{ |
1489 |
T0_64 = ((uint64_t)_do_esel(T0_64 >> 32, T1_64 >> 32, T0 >> 3) << 32) | |
1490 |
(uint64_t)_do_esel(T0_64, T1_64, (T0 >> 2) & 1); |
1491 |
} |
1492 |
|
1493 |
/* Fixed-point vector comparisons */
|
1494 |
#define DO_SPE_CMP(name) \
|
1495 |
void do_ev##name (void) \ |
1496 |
{ \ |
1497 |
T0 = _do_evcmp_merge((uint64_t)_do_e##name(T0_64 >> 32, \ |
1498 |
T1_64 >> 32) << 32, \ |
1499 |
_do_e##name(T0_64, T1_64)); \ |
1500 |
} |
1501 |
|
1502 |
static inline uint32_t _do_evcmp_merge (int t0, int t1) |
1503 |
{ |
1504 |
return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); |
1505 |
} |
1506 |
static inline int _do_ecmpeq (uint32_t op1, uint32_t op2) |
1507 |
{ |
1508 |
return op1 == op2 ? 1 : 0; |
1509 |
} |
1510 |
|
1511 |
static inline int _do_ecmpgts (int32_t op1, int32_t op2) |
1512 |
{ |
1513 |
return op1 > op2 ? 1 : 0; |
1514 |
} |
1515 |
|
1516 |
static inline int _do_ecmpgtu (uint32_t op1, uint32_t op2) |
1517 |
{ |
1518 |
return op1 > op2 ? 1 : 0; |
1519 |
} |
1520 |
|
1521 |
static inline int _do_ecmplts (int32_t op1, int32_t op2) |
1522 |
{ |
1523 |
return op1 < op2 ? 1 : 0; |
1524 |
} |
1525 |
|
1526 |
static inline int _do_ecmpltu (uint32_t op1, uint32_t op2) |
1527 |
{ |
1528 |
return op1 < op2 ? 1 : 0; |
1529 |
} |
1530 |
|
1531 |
/* evcmpeq */
|
1532 |
DO_SPE_CMP(cmpeq); |
1533 |
/* evcmpgts */
|
1534 |
DO_SPE_CMP(cmpgts); |
1535 |
/* evcmpgtu */
|
1536 |
DO_SPE_CMP(cmpgtu); |
1537 |
/* evcmplts */
|
1538 |
DO_SPE_CMP(cmplts); |
1539 |
/* evcmpltu */
|
1540 |
DO_SPE_CMP(cmpltu); |
1541 |
|
1542 |
/* Single precision floating-point conversions from/to integer */
|
1543 |
static inline uint32_t _do_efscfsi (int32_t val) |
1544 |
{ |
1545 |
union {
|
1546 |
uint32_t u; |
1547 |
float32 f; |
1548 |
} u; |
1549 |
|
1550 |
u.f = int32_to_float32(val, &env->spe_status); |
1551 |
|
1552 |
return u.u;
|
1553 |
} |
1554 |
|
1555 |
static inline uint32_t _do_efscfui (uint32_t val) |
1556 |
{ |
1557 |
union {
|
1558 |
uint32_t u; |
1559 |
float32 f; |
1560 |
} u; |
1561 |
|
1562 |
u.f = uint32_to_float32(val, &env->spe_status); |
1563 |
|
1564 |
return u.u;
|
1565 |
} |
1566 |
|
1567 |
static inline int32_t _do_efsctsi (uint32_t val) |
1568 |
{ |
1569 |
union {
|
1570 |
int32_t u; |
1571 |
float32 f; |
1572 |
} u; |
1573 |
|
1574 |
u.u = val; |
1575 |
/* NaN are not treated the same way IEEE 754 does */
|
1576 |
if (unlikely(isnan(u.f)))
|
1577 |
return 0; |
1578 |
|
1579 |
return float32_to_int32(u.f, &env->spe_status);
|
1580 |
} |
1581 |
|
1582 |
static inline uint32_t _do_efsctui (uint32_t val) |
1583 |
{ |
1584 |
union {
|
1585 |
int32_t u; |
1586 |
float32 f; |
1587 |
} u; |
1588 |
|
1589 |
u.u = val; |
1590 |
/* NaN are not treated the same way IEEE 754 does */
|
1591 |
if (unlikely(isnan(u.f)))
|
1592 |
return 0; |
1593 |
|
1594 |
return float32_to_uint32(u.f, &env->spe_status);
|
1595 |
} |
1596 |
|
1597 |
static inline int32_t _do_efsctsiz (uint32_t val) |
1598 |
{ |
1599 |
union {
|
1600 |
int32_t u; |
1601 |
float32 f; |
1602 |
} u; |
1603 |
|
1604 |
u.u = val; |
1605 |
/* NaN are not treated the same way IEEE 754 does */
|
1606 |
if (unlikely(isnan(u.f)))
|
1607 |
return 0; |
1608 |
|
1609 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1610 |
} |
1611 |
|
1612 |
static inline uint32_t _do_efsctuiz (uint32_t val) |
1613 |
{ |
1614 |
union {
|
1615 |
int32_t u; |
1616 |
float32 f; |
1617 |
} u; |
1618 |
|
1619 |
u.u = val; |
1620 |
/* NaN are not treated the same way IEEE 754 does */
|
1621 |
if (unlikely(isnan(u.f)))
|
1622 |
return 0; |
1623 |
|
1624 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1625 |
} |
1626 |
|
1627 |
void do_efscfsi (void) |
1628 |
{ |
1629 |
T0_64 = _do_efscfsi(T0_64); |
1630 |
} |
1631 |
|
1632 |
void do_efscfui (void) |
1633 |
{ |
1634 |
T0_64 = _do_efscfui(T0_64); |
1635 |
} |
1636 |
|
1637 |
void do_efsctsi (void) |
1638 |
{ |
1639 |
T0_64 = _do_efsctsi(T0_64); |
1640 |
} |
1641 |
|
1642 |
void do_efsctui (void) |
1643 |
{ |
1644 |
T0_64 = _do_efsctui(T0_64); |
1645 |
} |
1646 |
|
1647 |
void do_efsctsiz (void) |
1648 |
{ |
1649 |
T0_64 = _do_efsctsiz(T0_64); |
1650 |
} |
1651 |
|
1652 |
void do_efsctuiz (void) |
1653 |
{ |
1654 |
T0_64 = _do_efsctuiz(T0_64); |
1655 |
} |
1656 |
|
1657 |
/* Single precision floating-point conversion to/from fractional */
|
1658 |
static inline uint32_t _do_efscfsf (uint32_t val) |
1659 |
{ |
1660 |
union {
|
1661 |
uint32_t u; |
1662 |
float32 f; |
1663 |
} u; |
1664 |
float32 tmp; |
1665 |
|
1666 |
u.f = int32_to_float32(val, &env->spe_status); |
1667 |
tmp = int64_to_float32(1ULL << 32, &env->spe_status); |
1668 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1669 |
|
1670 |
return u.u;
|
1671 |
} |
1672 |
|
1673 |
static inline uint32_t _do_efscfuf (uint32_t val) |
1674 |
{ |
1675 |
union {
|
1676 |
uint32_t u; |
1677 |
float32 f; |
1678 |
} u; |
1679 |
float32 tmp; |
1680 |
|
1681 |
u.f = uint32_to_float32(val, &env->spe_status); |
1682 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1683 |
u.f = float32_div(u.f, tmp, &env->spe_status); |
1684 |
|
1685 |
return u.u;
|
1686 |
} |
1687 |
|
1688 |
static inline int32_t _do_efsctsf (uint32_t val) |
1689 |
{ |
1690 |
union {
|
1691 |
int32_t u; |
1692 |
float32 f; |
1693 |
} u; |
1694 |
float32 tmp; |
1695 |
|
1696 |
u.u = val; |
1697 |
/* NaN are not treated the same way IEEE 754 does */
|
1698 |
if (unlikely(isnan(u.f)))
|
1699 |
return 0; |
1700 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1701 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1702 |
|
1703 |
return float32_to_int32(u.f, &env->spe_status);
|
1704 |
} |
1705 |
|
1706 |
static inline uint32_t _do_efsctuf (uint32_t val) |
1707 |
{ |
1708 |
union {
|
1709 |
int32_t u; |
1710 |
float32 f; |
1711 |
} u; |
1712 |
float32 tmp; |
1713 |
|
1714 |
u.u = val; |
1715 |
/* NaN are not treated the same way IEEE 754 does */
|
1716 |
if (unlikely(isnan(u.f)))
|
1717 |
return 0; |
1718 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1719 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1720 |
|
1721 |
return float32_to_uint32(u.f, &env->spe_status);
|
1722 |
} |
1723 |
|
1724 |
static inline int32_t _do_efsctsfz (uint32_t val) |
1725 |
{ |
1726 |
union {
|
1727 |
int32_t u; |
1728 |
float32 f; |
1729 |
} u; |
1730 |
float32 tmp; |
1731 |
|
1732 |
u.u = val; |
1733 |
/* NaN are not treated the same way IEEE 754 does */
|
1734 |
if (unlikely(isnan(u.f)))
|
1735 |
return 0; |
1736 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1737 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1738 |
|
1739 |
return float32_to_int32_round_to_zero(u.f, &env->spe_status);
|
1740 |
} |
1741 |
|
1742 |
static inline uint32_t _do_efsctufz (uint32_t val) |
1743 |
{ |
1744 |
union {
|
1745 |
int32_t u; |
1746 |
float32 f; |
1747 |
} u; |
1748 |
float32 tmp; |
1749 |
|
1750 |
u.u = val; |
1751 |
/* NaN are not treated the same way IEEE 754 does */
|
1752 |
if (unlikely(isnan(u.f)))
|
1753 |
return 0; |
1754 |
tmp = uint64_to_float32(1ULL << 32, &env->spe_status); |
1755 |
u.f = float32_mul(u.f, tmp, &env->spe_status); |
1756 |
|
1757 |
return float32_to_uint32_round_to_zero(u.f, &env->spe_status);
|
1758 |
} |
1759 |
|
1760 |
void do_efscfsf (void) |
1761 |
{ |
1762 |
T0_64 = _do_efscfsf(T0_64); |
1763 |
} |
1764 |
|
1765 |
void do_efscfuf (void) |
1766 |
{ |
1767 |
T0_64 = _do_efscfuf(T0_64); |
1768 |
} |
1769 |
|
1770 |
void do_efsctsf (void) |
1771 |
{ |
1772 |
T0_64 = _do_efsctsf(T0_64); |
1773 |
} |
1774 |
|
1775 |
void do_efsctuf (void) |
1776 |
{ |
1777 |
T0_64 = _do_efsctuf(T0_64); |
1778 |
} |
1779 |
|
1780 |
void do_efsctsfz (void) |
1781 |
{ |
1782 |
T0_64 = _do_efsctsfz(T0_64); |
1783 |
} |
1784 |
|
1785 |
void do_efsctufz (void) |
1786 |
{ |
1787 |
T0_64 = _do_efsctufz(T0_64); |
1788 |
} |
1789 |
|
1790 |
/* Double precision floating point helpers */
|
1791 |
static inline int _do_efdcmplt (uint64_t op1, uint64_t op2) |
1792 |
{ |
1793 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1794 |
return _do_efdtstlt(op1, op2);
|
1795 |
} |
1796 |
|
1797 |
static inline int _do_efdcmpgt (uint64_t op1, uint64_t op2) |
1798 |
{ |
1799 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1800 |
return _do_efdtstgt(op1, op2);
|
1801 |
} |
1802 |
|
1803 |
static inline int _do_efdcmpeq (uint64_t op1, uint64_t op2) |
1804 |
{ |
1805 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
1806 |
return _do_efdtsteq(op1, op2);
|
1807 |
} |
1808 |
|
1809 |
void do_efdcmplt (void) |
1810 |
{ |
1811 |
T0 = _do_efdcmplt(T0_64, T1_64); |
1812 |
} |
1813 |
|
1814 |
void do_efdcmpgt (void) |
1815 |
{ |
1816 |
T0 = _do_efdcmpgt(T0_64, T1_64); |
1817 |
} |
1818 |
|
1819 |
void do_efdcmpeq (void) |
1820 |
{ |
1821 |
T0 = _do_efdcmpeq(T0_64, T1_64); |
1822 |
} |
1823 |
|
1824 |
/* Double precision floating-point conversion to/from integer */
|
1825 |
static inline uint64_t _do_efdcfsi (int64_t val) |
1826 |
{ |
1827 |
union {
|
1828 |
uint64_t u; |
1829 |
float64 f; |
1830 |
} u; |
1831 |
|
1832 |
u.f = int64_to_float64(val, &env->spe_status); |
1833 |
|
1834 |
return u.u;
|
1835 |
} |
1836 |
|
1837 |
static inline uint64_t _do_efdcfui (uint64_t val) |
1838 |
{ |
1839 |
union {
|
1840 |
uint64_t u; |
1841 |
float64 f; |
1842 |
} u; |
1843 |
|
1844 |
u.f = uint64_to_float64(val, &env->spe_status); |
1845 |
|
1846 |
return u.u;
|
1847 |
} |
1848 |
|
1849 |
static inline int64_t _do_efdctsi (uint64_t val) |
1850 |
{ |
1851 |
union {
|
1852 |
int64_t u; |
1853 |
float64 f; |
1854 |
} u; |
1855 |
|
1856 |
u.u = val; |
1857 |
/* NaN are not treated the same way IEEE 754 does */
|
1858 |
if (unlikely(isnan(u.f)))
|
1859 |
return 0; |
1860 |
|
1861 |
return float64_to_int64(u.f, &env->spe_status);
|
1862 |
} |
1863 |
|
1864 |
static inline uint64_t _do_efdctui (uint64_t val) |
1865 |
{ |
1866 |
union {
|
1867 |
int64_t u; |
1868 |
float64 f; |
1869 |
} u; |
1870 |
|
1871 |
u.u = val; |
1872 |
/* NaN are not treated the same way IEEE 754 does */
|
1873 |
if (unlikely(isnan(u.f)))
|
1874 |
return 0; |
1875 |
|
1876 |
return float64_to_uint64(u.f, &env->spe_status);
|
1877 |
} |
1878 |
|
1879 |
static inline int64_t _do_efdctsiz (uint64_t val) |
1880 |
{ |
1881 |
union {
|
1882 |
int64_t u; |
1883 |
float64 f; |
1884 |
} u; |
1885 |
|
1886 |
u.u = val; |
1887 |
/* NaN are not treated the same way IEEE 754 does */
|
1888 |
if (unlikely(isnan(u.f)))
|
1889 |
return 0; |
1890 |
|
1891 |
return float64_to_int64_round_to_zero(u.f, &env->spe_status);
|
1892 |
} |
1893 |
|
1894 |
static inline uint64_t _do_efdctuiz (uint64_t val) |
1895 |
{ |
1896 |
union {
|
1897 |
int64_t u; |
1898 |
float64 f; |
1899 |
} u; |
1900 |
|
1901 |
u.u = val; |
1902 |
/* NaN are not treated the same way IEEE 754 does */
|
1903 |
if (unlikely(isnan(u.f)))
|
1904 |
return 0; |
1905 |
|
1906 |
return float64_to_uint64_round_to_zero(u.f, &env->spe_status);
|
1907 |
} |
1908 |
|
1909 |
void do_efdcfsi (void) |
1910 |
{ |
1911 |
T0_64 = _do_efdcfsi(T0_64); |
1912 |
} |
1913 |
|
1914 |
void do_efdcfui (void) |
1915 |
{ |
1916 |
T0_64 = _do_efdcfui(T0_64); |
1917 |
} |
1918 |
|
1919 |
void do_efdctsi (void) |
1920 |
{ |
1921 |
T0_64 = _do_efdctsi(T0_64); |
1922 |
} |
1923 |
|
1924 |
void do_efdctui (void) |
1925 |
{ |
1926 |
T0_64 = _do_efdctui(T0_64); |
1927 |
} |
1928 |
|
1929 |
void do_efdctsiz (void) |
1930 |
{ |
1931 |
T0_64 = _do_efdctsiz(T0_64); |
1932 |
} |
1933 |
|
1934 |
void do_efdctuiz (void) |
1935 |
{ |
1936 |
T0_64 = _do_efdctuiz(T0_64); |
1937 |
} |
1938 |
|
1939 |
/* Double precision floating-point conversion to/from fractional */
|
1940 |
static inline uint64_t _do_efdcfsf (int64_t val) |
1941 |
{ |
1942 |
union {
|
1943 |
uint64_t u; |
1944 |
float64 f; |
1945 |
} u; |
1946 |
float64 tmp; |
1947 |
|
1948 |
u.f = int32_to_float64(val, &env->spe_status); |
1949 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
1950 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
1951 |
|
1952 |
return u.u;
|
1953 |
} |
1954 |
|
1955 |
static inline uint64_t _do_efdcfuf (uint64_t val) |
1956 |
{ |
1957 |
union {
|
1958 |
uint64_t u; |
1959 |
float64 f; |
1960 |
} u; |
1961 |
float64 tmp; |
1962 |
|
1963 |
u.f = uint32_to_float64(val, &env->spe_status); |
1964 |
tmp = int64_to_float64(1ULL << 32, &env->spe_status); |
1965 |
u.f = float64_div(u.f, tmp, &env->spe_status); |
1966 |
|
1967 |
return u.u;
|
1968 |
} |
1969 |
|
1970 |
static inline int64_t _do_efdctsf (uint64_t val) |
1971 |
{ |
1972 |
union {
|
1973 |
int64_t u; |
1974 |
float64 f; |
1975 |
} u; |
1976 |
float64 tmp; |
1977 |
|
1978 |
u.u = val; |
1979 |
/* NaN are not treated the same way IEEE 754 does */
|
1980 |
if (unlikely(isnan(u.f)))
|
1981 |
return 0; |
1982 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
1983 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
1984 |
|
1985 |
return float64_to_int32(u.f, &env->spe_status);
|
1986 |
} |
1987 |
|
1988 |
static inline uint64_t _do_efdctuf (uint64_t val) |
1989 |
{ |
1990 |
union {
|
1991 |
int64_t u; |
1992 |
float64 f; |
1993 |
} u; |
1994 |
float64 tmp; |
1995 |
|
1996 |
u.u = val; |
1997 |
/* NaN are not treated the same way IEEE 754 does */
|
1998 |
if (unlikely(isnan(u.f)))
|
1999 |
return 0; |
2000 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2001 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2002 |
|
2003 |
return float64_to_uint32(u.f, &env->spe_status);
|
2004 |
} |
2005 |
|
2006 |
static inline int64_t _do_efdctsfz (uint64_t val) |
2007 |
{ |
2008 |
union {
|
2009 |
int64_t u; |
2010 |
float64 f; |
2011 |
} u; |
2012 |
float64 tmp; |
2013 |
|
2014 |
u.u = val; |
2015 |
/* NaN are not treated the same way IEEE 754 does */
|
2016 |
if (unlikely(isnan(u.f)))
|
2017 |
return 0; |
2018 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2019 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2020 |
|
2021 |
return float64_to_int32_round_to_zero(u.f, &env->spe_status);
|
2022 |
} |
2023 |
|
2024 |
static inline uint64_t _do_efdctufz (uint64_t val) |
2025 |
{ |
2026 |
union {
|
2027 |
int64_t u; |
2028 |
float64 f; |
2029 |
} u; |
2030 |
float64 tmp; |
2031 |
|
2032 |
u.u = val; |
2033 |
/* NaN are not treated the same way IEEE 754 does */
|
2034 |
if (unlikely(isnan(u.f)))
|
2035 |
return 0; |
2036 |
tmp = uint64_to_float64(1ULL << 32, &env->spe_status); |
2037 |
u.f = float64_mul(u.f, tmp, &env->spe_status); |
2038 |
|
2039 |
return float64_to_uint32_round_to_zero(u.f, &env->spe_status);
|
2040 |
} |
2041 |
|
2042 |
void do_efdcfsf (void) |
2043 |
{ |
2044 |
T0_64 = _do_efdcfsf(T0_64); |
2045 |
} |
2046 |
|
2047 |
void do_efdcfuf (void) |
2048 |
{ |
2049 |
T0_64 = _do_efdcfuf(T0_64); |
2050 |
} |
2051 |
|
2052 |
void do_efdctsf (void) |
2053 |
{ |
2054 |
T0_64 = _do_efdctsf(T0_64); |
2055 |
} |
2056 |
|
2057 |
void do_efdctuf (void) |
2058 |
{ |
2059 |
T0_64 = _do_efdctuf(T0_64); |
2060 |
} |
2061 |
|
2062 |
void do_efdctsfz (void) |
2063 |
{ |
2064 |
T0_64 = _do_efdctsfz(T0_64); |
2065 |
} |
2066 |
|
2067 |
void do_efdctufz (void) |
2068 |
{ |
2069 |
T0_64 = _do_efdctufz(T0_64); |
2070 |
} |
2071 |
|
2072 |
/* Floating point conversion between single and double precision */
|
2073 |
static inline uint32_t _do_efscfd (uint64_t val) |
2074 |
{ |
2075 |
union {
|
2076 |
uint64_t u; |
2077 |
float64 f; |
2078 |
} u1; |
2079 |
union {
|
2080 |
uint32_t u; |
2081 |
float32 f; |
2082 |
} u2; |
2083 |
|
2084 |
u1.u = val; |
2085 |
u2.f = float64_to_float32(u1.f, &env->spe_status); |
2086 |
|
2087 |
return u2.u;
|
2088 |
} |
2089 |
|
2090 |
static inline uint64_t _do_efdcfs (uint32_t val) |
2091 |
{ |
2092 |
union {
|
2093 |
uint64_t u; |
2094 |
float64 f; |
2095 |
} u2; |
2096 |
union {
|
2097 |
uint32_t u; |
2098 |
float32 f; |
2099 |
} u1; |
2100 |
|
2101 |
u1.u = val; |
2102 |
u2.f = float32_to_float64(u1.f, &env->spe_status); |
2103 |
|
2104 |
return u2.u;
|
2105 |
} |
2106 |
|
2107 |
void do_efscfd (void) |
2108 |
{ |
2109 |
T0_64 = _do_efscfd(T0_64); |
2110 |
} |
2111 |
|
2112 |
void do_efdcfs (void) |
2113 |
{ |
2114 |
T0_64 = _do_efdcfs(T0_64); |
2115 |
} |
2116 |
|
2117 |
/* Single precision fixed-point vector arithmetic */
|
2118 |
/* evfsabs */
|
2119 |
DO_SPE_OP1(fsabs); |
2120 |
/* evfsnabs */
|
2121 |
DO_SPE_OP1(fsnabs); |
2122 |
/* evfsneg */
|
2123 |
DO_SPE_OP1(fsneg); |
2124 |
/* evfsadd */
|
2125 |
DO_SPE_OP2(fsadd); |
2126 |
/* evfssub */
|
2127 |
DO_SPE_OP2(fssub); |
2128 |
/* evfsmul */
|
2129 |
DO_SPE_OP2(fsmul); |
2130 |
/* evfsdiv */
|
2131 |
DO_SPE_OP2(fsdiv); |
2132 |
|
2133 |
/* Single-precision floating-point comparisons */
|
2134 |
static inline int _do_efscmplt (uint32_t op1, uint32_t op2) |
2135 |
{ |
2136 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2137 |
return _do_efststlt(op1, op2);
|
2138 |
} |
2139 |
|
2140 |
static inline int _do_efscmpgt (uint32_t op1, uint32_t op2) |
2141 |
{ |
2142 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2143 |
return _do_efststgt(op1, op2);
|
2144 |
} |
2145 |
|
2146 |
static inline int _do_efscmpeq (uint32_t op1, uint32_t op2) |
2147 |
{ |
2148 |
/* XXX: TODO: test special values (NaN, infinites, ...) */
|
2149 |
return _do_efststeq(op1, op2);
|
2150 |
} |
2151 |
|
2152 |
void do_efscmplt (void) |
2153 |
{ |
2154 |
T0 = _do_efscmplt(T0_64, T1_64); |
2155 |
} |
2156 |
|
2157 |
void do_efscmpgt (void) |
2158 |
{ |
2159 |
T0 = _do_efscmpgt(T0_64, T1_64); |
2160 |
} |
2161 |
|
2162 |
void do_efscmpeq (void) |
2163 |
{ |
2164 |
T0 = _do_efscmpeq(T0_64, T1_64); |
2165 |
} |
2166 |
|
2167 |
/* Single-precision floating-point vector comparisons */
|
2168 |
/* evfscmplt */
|
2169 |
DO_SPE_CMP(fscmplt); |
2170 |
/* evfscmpgt */
|
2171 |
DO_SPE_CMP(fscmpgt); |
2172 |
/* evfscmpeq */
|
2173 |
DO_SPE_CMP(fscmpeq); |
2174 |
/* evfststlt */
|
2175 |
DO_SPE_CMP(fststlt); |
2176 |
/* evfststgt */
|
2177 |
DO_SPE_CMP(fststgt); |
2178 |
/* evfststeq */
|
2179 |
DO_SPE_CMP(fststeq); |
2180 |
|
2181 |
/* Single-precision floating-point vector conversions */
|
2182 |
/* evfscfsi */
|
2183 |
DO_SPE_OP1(fscfsi); |
2184 |
/* evfscfui */
|
2185 |
DO_SPE_OP1(fscfui); |
2186 |
/* evfscfuf */
|
2187 |
DO_SPE_OP1(fscfuf); |
2188 |
/* evfscfsf */
|
2189 |
DO_SPE_OP1(fscfsf); |
2190 |
/* evfsctsi */
|
2191 |
DO_SPE_OP1(fsctsi); |
2192 |
/* evfsctui */
|
2193 |
DO_SPE_OP1(fsctui); |
2194 |
/* evfsctsiz */
|
2195 |
DO_SPE_OP1(fsctsiz); |
2196 |
/* evfsctuiz */
|
2197 |
DO_SPE_OP1(fsctuiz); |
2198 |
/* evfsctsf */
|
2199 |
DO_SPE_OP1(fsctsf); |
2200 |
/* evfsctuf */
|
2201 |
DO_SPE_OP1(fsctuf); |
2202 |
#endif /* defined(TARGET_PPCEMB) */ |
2203 |
|
2204 |
/*****************************************************************************/
|
2205 |
/* Softmmu support */
|
2206 |
#if !defined (CONFIG_USER_ONLY)
|
2207 |
|
2208 |
#define MMUSUFFIX _mmu
|
2209 |
#define GETPC() (__builtin_return_address(0)) |
2210 |
|
2211 |
#define SHIFT 0 |
2212 |
#include "softmmu_template.h" |
2213 |
|
2214 |
#define SHIFT 1 |
2215 |
#include "softmmu_template.h" |
2216 |
|
2217 |
#define SHIFT 2 |
2218 |
#include "softmmu_template.h" |
2219 |
|
2220 |
#define SHIFT 3 |
2221 |
#include "softmmu_template.h" |
2222 |
|
2223 |
/* try to fill the TLB and return an exception if error. If retaddr is
|
2224 |
NULL, it means that the function was called in C code (i.e. not
|
2225 |
from generated code or from helper.c) */
|
2226 |
/* XXX: fix it to restore all registers */
|
2227 |
void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr) |
2228 |
{ |
2229 |
TranslationBlock *tb; |
2230 |
CPUState *saved_env; |
2231 |
target_phys_addr_t pc; |
2232 |
int ret;
|
2233 |
|
2234 |
/* XXX: hack to restore env in all cases, even if not called from
|
2235 |
generated code */
|
2236 |
saved_env = env; |
2237 |
env = cpu_single_env; |
2238 |
ret = cpu_ppc_handle_mmu_fault(env, addr, is_write, is_user, 1);
|
2239 |
if (unlikely(ret != 0)) { |
2240 |
if (likely(retaddr)) {
|
2241 |
/* now we have a real cpu fault */
|
2242 |
pc = (target_phys_addr_t)(unsigned long)retaddr; |
2243 |
tb = tb_find_pc(pc); |
2244 |
if (likely(tb)) {
|
2245 |
/* the PC is inside the translated code. It means that we have
|
2246 |
a virtual CPU fault */
|
2247 |
cpu_restore_state(tb, env, pc, NULL);
|
2248 |
} |
2249 |
} |
2250 |
do_raise_exception_err(env->exception_index, env->error_code); |
2251 |
} |
2252 |
env = saved_env; |
2253 |
} |
2254 |
|
2255 |
/* TLB invalidation helpers */
|
2256 |
void do_tlbia (void) |
2257 |
{ |
2258 |
ppc_tlb_invalidate_all(env); |
2259 |
} |
2260 |
|
2261 |
void do_tlbie (void) |
2262 |
{ |
2263 |
T0 = (uint32_t)T0; |
2264 |
#if !defined(FLUSH_ALL_TLBS)
|
2265 |
/* XXX: Remove thoses tests */
|
2266 |
if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_6xx)) {
|
2267 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
|
2268 |
if (env->id_tlbs == 1) |
2269 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
|
2270 |
} else if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_4xx)) { |
2271 |
ppc4xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, |
2272 |
env->spr[SPR_40x_PID]); |
2273 |
} else {
|
2274 |
/* tlbie invalidate TLBs for all segments */
|
2275 |
T0 &= TARGET_PAGE_MASK; |
2276 |
T0 &= ~((target_ulong)-1 << 28); |
2277 |
/* XXX: this case should be optimized,
|
2278 |
* giving a mask to tlb_flush_page
|
2279 |
*/
|
2280 |
tlb_flush_page(env, T0 | (0x0 << 28)); |
2281 |
tlb_flush_page(env, T0 | (0x1 << 28)); |
2282 |
tlb_flush_page(env, T0 | (0x2 << 28)); |
2283 |
tlb_flush_page(env, T0 | (0x3 << 28)); |
2284 |
tlb_flush_page(env, T0 | (0x4 << 28)); |
2285 |
tlb_flush_page(env, T0 | (0x5 << 28)); |
2286 |
tlb_flush_page(env, T0 | (0x6 << 28)); |
2287 |
tlb_flush_page(env, T0 | (0x7 << 28)); |
2288 |
tlb_flush_page(env, T0 | (0x8 << 28)); |
2289 |
tlb_flush_page(env, T0 | (0x9 << 28)); |
2290 |
tlb_flush_page(env, T0 | (0xA << 28)); |
2291 |
tlb_flush_page(env, T0 | (0xB << 28)); |
2292 |
tlb_flush_page(env, T0 | (0xC << 28)); |
2293 |
tlb_flush_page(env, T0 | (0xD << 28)); |
2294 |
tlb_flush_page(env, T0 | (0xE << 28)); |
2295 |
tlb_flush_page(env, T0 | (0xF << 28)); |
2296 |
} |
2297 |
#else
|
2298 |
do_tlbia(); |
2299 |
#endif
|
2300 |
} |
2301 |
|
2302 |
#if defined(TARGET_PPC64)
|
2303 |
void do_tlbie_64 (void) |
2304 |
{ |
2305 |
T0 = (uint64_t)T0; |
2306 |
#if !defined(FLUSH_ALL_TLBS)
|
2307 |
if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_6xx)) {
|
2308 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 0);
|
2309 |
if (env->id_tlbs == 1) |
2310 |
ppc6xx_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK, 1);
|
2311 |
} else if (unlikely(env->mmu_model == POWERPC_MMU_SOFT_4xx)) { |
2312 |
/* XXX: TODO */
|
2313 |
#if 0
|
2314 |
ppcbooke_tlb_invalidate_virt(env, T0 & TARGET_PAGE_MASK,
|
2315 |
env->spr[SPR_BOOKE_PID]);
|
2316 |
#endif
|
2317 |
} else {
|
2318 |
/* tlbie invalidate TLBs for all segments
|
2319 |
* As we have 2^36 segments, invalidate all qemu TLBs
|
2320 |
*/
|
2321 |
#if 0
|
2322 |
T0 &= TARGET_PAGE_MASK;
|
2323 |
T0 &= ~((target_ulong)-1 << 28);
|
2324 |
/* XXX: this case should be optimized,
|
2325 |
* giving a mask to tlb_flush_page
|
2326 |
*/
|
2327 |
tlb_flush_page(env, T0 | (0x0 << 28));
|
2328 |
tlb_flush_page(env, T0 | (0x1 << 28));
|
2329 |
tlb_flush_page(env, T0 | (0x2 << 28));
|
2330 |
tlb_flush_page(env, T0 | (0x3 << 28));
|
2331 |
tlb_flush_page(env, T0 | (0x4 << 28));
|
2332 |
tlb_flush_page(env, T0 | (0x5 << 28));
|
2333 |
tlb_flush_page(env, T0 | (0x6 << 28));
|
2334 |
tlb_flush_page(env, T0 | (0x7 << 28));
|
2335 |
tlb_flush_page(env, T0 | (0x8 << 28));
|
2336 |
tlb_flush_page(env, T0 | (0x9 << 28));
|
2337 |
tlb_flush_page(env, T0 | (0xA << 28));
|
2338 |
tlb_flush_page(env, T0 | (0xB << 28));
|
2339 |
tlb_flush_page(env, T0 | (0xC << 28));
|
2340 |
tlb_flush_page(env, T0 | (0xD << 28));
|
2341 |
tlb_flush_page(env, T0 | (0xE << 28));
|
2342 |
tlb_flush_page(env, T0 | (0xF << 28));
|
2343 |
#else
|
2344 |
tlb_flush(env, 1);
|
2345 |
#endif
|
2346 |
} |
2347 |
#else
|
2348 |
do_tlbia(); |
2349 |
#endif
|
2350 |
} |
2351 |
#endif
|
2352 |
|
2353 |
#if defined(TARGET_PPC64)
|
2354 |
void do_slbia (void) |
2355 |
{ |
2356 |
/* XXX: TODO */
|
2357 |
tlb_flush(env, 1);
|
2358 |
} |
2359 |
|
2360 |
void do_slbie (void) |
2361 |
{ |
2362 |
/* XXX: TODO */
|
2363 |
tlb_flush(env, 1);
|
2364 |
} |
2365 |
#endif
|
2366 |
|
2367 |
/* Software driven TLBs management */
|
2368 |
/* PowerPC 602/603 software TLB load instructions helpers */
|
2369 |
void do_load_6xx_tlb (int is_code) |
2370 |
{ |
2371 |
target_ulong RPN, CMP, EPN; |
2372 |
int way;
|
2373 |
|
2374 |
RPN = env->spr[SPR_RPA]; |
2375 |
if (is_code) {
|
2376 |
CMP = env->spr[SPR_ICMP]; |
2377 |
EPN = env->spr[SPR_IMISS]; |
2378 |
} else {
|
2379 |
CMP = env->spr[SPR_DCMP]; |
2380 |
EPN = env->spr[SPR_DMISS]; |
2381 |
} |
2382 |
way = (env->spr[SPR_SRR1] >> 17) & 1; |
2383 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2384 |
if (loglevel != 0) { |
2385 |
fprintf(logfile, "%s: EPN %08lx %08lx PTE0 %08lx PTE1 %08lx way %d\n",
|
2386 |
__func__, (unsigned long)T0, (unsigned long)EPN, |
2387 |
(unsigned long)CMP, (unsigned long)RPN, way); |
2388 |
} |
2389 |
#endif
|
2390 |
/* Store this TLB */
|
2391 |
ppc6xx_tlb_store(env, (uint32_t)(T0 & TARGET_PAGE_MASK), |
2392 |
way, is_code, CMP, RPN); |
2393 |
} |
2394 |
|
2395 |
static target_ulong booke_tlb_to_page_size (int size) |
2396 |
{ |
2397 |
return 1024 << (2 * size); |
2398 |
} |
2399 |
|
2400 |
static int booke_page_size_to_tlb (target_ulong page_size) |
2401 |
{ |
2402 |
int size;
|
2403 |
|
2404 |
switch (page_size) {
|
2405 |
case 0x00000400UL: |
2406 |
size = 0x0;
|
2407 |
break;
|
2408 |
case 0x00001000UL: |
2409 |
size = 0x1;
|
2410 |
break;
|
2411 |
case 0x00004000UL: |
2412 |
size = 0x2;
|
2413 |
break;
|
2414 |
case 0x00010000UL: |
2415 |
size = 0x3;
|
2416 |
break;
|
2417 |
case 0x00040000UL: |
2418 |
size = 0x4;
|
2419 |
break;
|
2420 |
case 0x00100000UL: |
2421 |
size = 0x5;
|
2422 |
break;
|
2423 |
case 0x00400000UL: |
2424 |
size = 0x6;
|
2425 |
break;
|
2426 |
case 0x01000000UL: |
2427 |
size = 0x7;
|
2428 |
break;
|
2429 |
case 0x04000000UL: |
2430 |
size = 0x8;
|
2431 |
break;
|
2432 |
case 0x10000000UL: |
2433 |
size = 0x9;
|
2434 |
break;
|
2435 |
case 0x40000000UL: |
2436 |
size = 0xA;
|
2437 |
break;
|
2438 |
#if defined (TARGET_PPC64)
|
2439 |
case 0x000100000000ULL: |
2440 |
size = 0xB;
|
2441 |
break;
|
2442 |
case 0x000400000000ULL: |
2443 |
size = 0xC;
|
2444 |
break;
|
2445 |
case 0x001000000000ULL: |
2446 |
size = 0xD;
|
2447 |
break;
|
2448 |
case 0x004000000000ULL: |
2449 |
size = 0xE;
|
2450 |
break;
|
2451 |
case 0x010000000000ULL: |
2452 |
size = 0xF;
|
2453 |
break;
|
2454 |
#endif
|
2455 |
default:
|
2456 |
size = -1;
|
2457 |
break;
|
2458 |
} |
2459 |
|
2460 |
return size;
|
2461 |
} |
2462 |
|
2463 |
/* Helpers for 4xx TLB management */
|
2464 |
void do_4xx_tlbre_lo (void) |
2465 |
{ |
2466 |
ppcemb_tlb_t *tlb; |
2467 |
int size;
|
2468 |
|
2469 |
T0 &= 0x3F;
|
2470 |
tlb = &env->tlb[T0].tlbe; |
2471 |
T0 = tlb->EPN; |
2472 |
if (tlb->prot & PAGE_VALID)
|
2473 |
T0 |= 0x400;
|
2474 |
size = booke_page_size_to_tlb(tlb->size); |
2475 |
if (size < 0 || size > 0x7) |
2476 |
size = 1;
|
2477 |
T0 |= size << 7;
|
2478 |
env->spr[SPR_40x_PID] = tlb->PID; |
2479 |
} |
2480 |
|
2481 |
void do_4xx_tlbre_hi (void) |
2482 |
{ |
2483 |
ppcemb_tlb_t *tlb; |
2484 |
|
2485 |
T0 &= 0x3F;
|
2486 |
tlb = &env->tlb[T0].tlbe; |
2487 |
T0 = tlb->RPN; |
2488 |
if (tlb->prot & PAGE_EXEC)
|
2489 |
T0 |= 0x200;
|
2490 |
if (tlb->prot & PAGE_WRITE)
|
2491 |
T0 |= 0x100;
|
2492 |
} |
2493 |
|
2494 |
void do_4xx_tlbsx (void) |
2495 |
{ |
2496 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
2497 |
} |
2498 |
|
2499 |
void do_4xx_tlbsx_ (void) |
2500 |
{ |
2501 |
int tmp = xer_so;
|
2502 |
|
2503 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
2504 |
if (T0 != -1) |
2505 |
tmp |= 0x02;
|
2506 |
env->crf[0] = tmp;
|
2507 |
} |
2508 |
|
2509 |
void do_4xx_tlbwe_hi (void) |
2510 |
{ |
2511 |
ppcemb_tlb_t *tlb; |
2512 |
target_ulong page, end; |
2513 |
|
2514 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2515 |
if (loglevel != 0) { |
2516 |
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2517 |
} |
2518 |
#endif
|
2519 |
T0 &= 0x3F;
|
2520 |
tlb = &env->tlb[T0].tlbe; |
2521 |
/* Invalidate previous TLB (if it's valid) */
|
2522 |
if (tlb->prot & PAGE_VALID) {
|
2523 |
end = tlb->EPN + tlb->size; |
2524 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2525 |
if (loglevel != 0) { |
2526 |
fprintf(logfile, "%s: invalidate old TLB %d start " ADDRX
|
2527 |
" end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); |
2528 |
} |
2529 |
#endif
|
2530 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2531 |
tlb_flush_page(env, page); |
2532 |
} |
2533 |
tlb->size = booke_tlb_to_page_size((T1 >> 7) & 0x7); |
2534 |
/* We cannot handle TLB size < TARGET_PAGE_SIZE.
|
2535 |
* If this ever occurs, one should use the ppcemb target instead
|
2536 |
* of the ppc or ppc64 one
|
2537 |
*/
|
2538 |
if ((T1 & 0x40) && tlb->size < TARGET_PAGE_SIZE) { |
2539 |
cpu_abort(env, "TLB size " TARGET_FMT_lu " < %u " |
2540 |
"are not supported (%d)\n",
|
2541 |
tlb->size, TARGET_PAGE_SIZE, (int)((T1 >> 7) & 0x7)); |
2542 |
} |
2543 |
tlb->EPN = T1 & ~(tlb->size - 1);
|
2544 |
if (T1 & 0x40) |
2545 |
tlb->prot |= PAGE_VALID; |
2546 |
else
|
2547 |
tlb->prot &= ~PAGE_VALID; |
2548 |
if (T1 & 0x20) { |
2549 |
/* XXX: TO BE FIXED */
|
2550 |
cpu_abort(env, "Little-endian TLB entries are not supported by now\n");
|
2551 |
} |
2552 |
tlb->PID = env->spr[SPR_40x_PID]; /* PID */
|
2553 |
tlb->attr = T1 & 0xFF;
|
2554 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2555 |
if (loglevel != 0) { |
2556 |
fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
2557 |
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
2558 |
(int)T0, tlb->RPN, tlb->EPN, tlb->size,
|
2559 |
tlb->prot & PAGE_READ ? 'r' : '-', |
2560 |
tlb->prot & PAGE_WRITE ? 'w' : '-', |
2561 |
tlb->prot & PAGE_EXEC ? 'x' : '-', |
2562 |
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
2563 |
} |
2564 |
#endif
|
2565 |
/* Invalidate new TLB (if valid) */
|
2566 |
if (tlb->prot & PAGE_VALID) {
|
2567 |
end = tlb->EPN + tlb->size; |
2568 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2569 |
if (loglevel != 0) { |
2570 |
fprintf(logfile, "%s: invalidate TLB %d start " ADDRX
|
2571 |
" end " ADDRX "\n", __func__, (int)T0, tlb->EPN, end); |
2572 |
} |
2573 |
#endif
|
2574 |
for (page = tlb->EPN; page < end; page += TARGET_PAGE_SIZE)
|
2575 |
tlb_flush_page(env, page); |
2576 |
} |
2577 |
} |
2578 |
|
2579 |
void do_4xx_tlbwe_lo (void) |
2580 |
{ |
2581 |
ppcemb_tlb_t *tlb; |
2582 |
|
2583 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2584 |
if (loglevel != 0) { |
2585 |
fprintf(logfile, "%s T0 " REGX " T1 " REGX "\n", __func__, T0, T1); |
2586 |
} |
2587 |
#endif
|
2588 |
T0 &= 0x3F;
|
2589 |
tlb = &env->tlb[T0].tlbe; |
2590 |
tlb->RPN = T1 & 0xFFFFFC00;
|
2591 |
tlb->prot = PAGE_READ; |
2592 |
if (T1 & 0x200) |
2593 |
tlb->prot |= PAGE_EXEC; |
2594 |
if (T1 & 0x100) |
2595 |
tlb->prot |= PAGE_WRITE; |
2596 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2597 |
if (loglevel != 0) { |
2598 |
fprintf(logfile, "%s: set up TLB %d RPN " PADDRX " EPN " ADDRX |
2599 |
" size " ADDRX " prot %c%c%c%c PID %d\n", __func__, |
2600 |
(int)T0, tlb->RPN, tlb->EPN, tlb->size,
|
2601 |
tlb->prot & PAGE_READ ? 'r' : '-', |
2602 |
tlb->prot & PAGE_WRITE ? 'w' : '-', |
2603 |
tlb->prot & PAGE_EXEC ? 'x' : '-', |
2604 |
tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); |
2605 |
} |
2606 |
#endif
|
2607 |
} |
2608 |
|
2609 |
/* PowerPC 440 TLB management */
|
2610 |
void do_440_tlbwe (int word) |
2611 |
{ |
2612 |
ppcemb_tlb_t *tlb; |
2613 |
target_ulong EPN, RPN, size; |
2614 |
int do_flush_tlbs;
|
2615 |
|
2616 |
#if defined (DEBUG_SOFTWARE_TLB)
|
2617 |
if (loglevel != 0) { |
2618 |
fprintf(logfile, "%s word %d T0 " REGX " T1 " REGX "\n", |
2619 |
__func__, word, T0, T1); |
2620 |
} |
2621 |
#endif
|
2622 |
do_flush_tlbs = 0;
|
2623 |
T0 &= 0x3F;
|
2624 |
tlb = &env->tlb[T0].tlbe; |
2625 |
switch (word) {
|
2626 |
default:
|
2627 |
/* Just here to please gcc */
|
2628 |
case 0: |
2629 |
EPN = T1 & 0xFFFFFC00;
|
2630 |
if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN)
|
2631 |
do_flush_tlbs = 1;
|
2632 |
tlb->EPN = EPN; |
2633 |
size = booke_tlb_to_page_size((T1 >> 4) & 0xF); |
2634 |
if ((tlb->prot & PAGE_VALID) && tlb->size < size)
|
2635 |
do_flush_tlbs = 1;
|
2636 |
tlb->size = size; |
2637 |
tlb->attr &= ~0x1;
|
2638 |
tlb->attr |= (T1 >> 8) & 1; |
2639 |
if (T1 & 0x200) { |
2640 |
tlb->prot |= PAGE_VALID; |
2641 |
} else {
|
2642 |
if (tlb->prot & PAGE_VALID) {
|
2643 |
tlb->prot &= ~PAGE_VALID; |
2644 |
do_flush_tlbs = 1;
|
2645 |
} |
2646 |
} |
2647 |
tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF;
|
2648 |
if (do_flush_tlbs)
|
2649 |
tlb_flush(env, 1);
|
2650 |
break;
|
2651 |
case 1: |
2652 |
RPN = T1 & 0xFFFFFC0F;
|
2653 |
if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN)
|
2654 |
tlb_flush(env, 1);
|
2655 |
tlb->RPN = RPN; |
2656 |
break;
|
2657 |
case 2: |
2658 |
tlb->attr = (tlb->attr & 0x1) | (T1 & 0x0000FF00); |
2659 |
tlb->prot = tlb->prot & PAGE_VALID; |
2660 |
if (T1 & 0x1) |
2661 |
tlb->prot |= PAGE_READ << 4;
|
2662 |
if (T1 & 0x2) |
2663 |
tlb->prot |= PAGE_WRITE << 4;
|
2664 |
if (T1 & 0x4) |
2665 |
tlb->prot |= PAGE_EXEC << 4;
|
2666 |
if (T1 & 0x8) |
2667 |
tlb->prot |= PAGE_READ; |
2668 |
if (T1 & 0x10) |
2669 |
tlb->prot |= PAGE_WRITE; |
2670 |
if (T1 & 0x20) |
2671 |
tlb->prot |= PAGE_EXEC; |
2672 |
break;
|
2673 |
} |
2674 |
} |
2675 |
|
2676 |
void do_440_tlbsx (void) |
2677 |
{ |
2678 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
|
2679 |
} |
2680 |
|
2681 |
void do_440_tlbsx_ (void) |
2682 |
{ |
2683 |
int tmp = xer_so;
|
2684 |
|
2685 |
T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF);
|
2686 |
if (T0 != -1) |
2687 |
tmp |= 0x02;
|
2688 |
env->crf[0] = tmp;
|
2689 |
} |
2690 |
|
2691 |
void do_440_tlbre (int word) |
2692 |
{ |
2693 |
ppcemb_tlb_t *tlb; |
2694 |
int size;
|
2695 |
|
2696 |
T0 &= 0x3F;
|
2697 |
tlb = &env->tlb[T0].tlbe; |
2698 |
switch (word) {
|
2699 |
default:
|
2700 |
/* Just here to please gcc */
|
2701 |
case 0: |
2702 |
T0 = tlb->EPN; |
2703 |
size = booke_page_size_to_tlb(tlb->size); |
2704 |
if (size < 0 || size > 0xF) |
2705 |
size = 1;
|
2706 |
T0 |= size << 4;
|
2707 |
if (tlb->attr & 0x1) |
2708 |
T0 |= 0x100;
|
2709 |
if (tlb->prot & PAGE_VALID)
|
2710 |
T0 |= 0x200;
|
2711 |
env->spr[SPR_440_MMUCR] &= ~0x000000FF;
|
2712 |
env->spr[SPR_440_MMUCR] |= tlb->PID; |
2713 |
break;
|
2714 |
case 1: |
2715 |
T0 = tlb->RPN; |
2716 |
break;
|
2717 |
case 2: |
2718 |
T0 = tlb->attr & ~0x1;
|
2719 |
if (tlb->prot & (PAGE_READ << 4)) |
2720 |
T0 |= 0x1;
|
2721 |
if (tlb->prot & (PAGE_WRITE << 4)) |
2722 |
T0 |= 0x2;
|
2723 |
if (tlb->prot & (PAGE_EXEC << 4)) |
2724 |
T0 |= 0x4;
|
2725 |
if (tlb->prot & PAGE_READ)
|
2726 |
T0 |= 0x8;
|
2727 |
if (tlb->prot & PAGE_WRITE)
|
2728 |
T0 |= 0x10;
|
2729 |
if (tlb->prot & PAGE_EXEC)
|
2730 |
T0 |= 0x20;
|
2731 |
break;
|
2732 |
} |
2733 |
} |
2734 |
#endif /* !CONFIG_USER_ONLY */ |