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1 | fc01f7e7 | bellard | /*
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2 | fc01f7e7 | bellard | * QEMU System Emulator header
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3 | fc01f7e7 | bellard | *
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4 | fc01f7e7 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | fc01f7e7 | bellard | *
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6 | fc01f7e7 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | fc01f7e7 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | fc01f7e7 | bellard | * in the Software without restriction, including without limitation the rights
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9 | fc01f7e7 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | fc01f7e7 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | fc01f7e7 | bellard | * furnished to do so, subject to the following conditions:
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12 | fc01f7e7 | bellard | *
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13 | fc01f7e7 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | fc01f7e7 | bellard | * all copies or substantial portions of the Software.
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15 | fc01f7e7 | bellard | *
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16 | fc01f7e7 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | fc01f7e7 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | fc01f7e7 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | fc01f7e7 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | fc01f7e7 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | fc01f7e7 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | fc01f7e7 | bellard | * THE SOFTWARE.
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23 | fc01f7e7 | bellard | */
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24 | fc01f7e7 | bellard | #ifndef VL_H
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25 | fc01f7e7 | bellard | #define VL_H
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26 | fc01f7e7 | bellard | |
27 | 67b915a5 | bellard | /* we put basic includes here to avoid repeating them in device drivers */
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28 | 67b915a5 | bellard | #include <stdlib.h> |
29 | 67b915a5 | bellard | #include <stdio.h> |
30 | 67b915a5 | bellard | #include <stdarg.h> |
31 | 67b915a5 | bellard | #include <string.h> |
32 | 67b915a5 | bellard | #include <inttypes.h> |
33 | 85571bc7 | bellard | #include <limits.h> |
34 | 8a7ddc38 | bellard | #include <time.h> |
35 | 67b915a5 | bellard | #include <ctype.h> |
36 | 67b915a5 | bellard | #include <errno.h> |
37 | 67b915a5 | bellard | #include <unistd.h> |
38 | 67b915a5 | bellard | #include <fcntl.h> |
39 | 7d3505c5 | bellard | #include <sys/stat.h> |
40 | 67b915a5 | bellard | |
41 | 67b915a5 | bellard | #ifndef O_LARGEFILE
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42 | 67b915a5 | bellard | #define O_LARGEFILE 0 |
43 | 67b915a5 | bellard | #endif
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44 | 40c3bac3 | bellard | #ifndef O_BINARY
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45 | 40c3bac3 | bellard | #define O_BINARY 0 |
46 | 40c3bac3 | bellard | #endif
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47 | 67b915a5 | bellard | |
48 | 67b915a5 | bellard | #ifdef _WIN32
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49 | a18e524a | bellard | #include <windows.h> |
50 | ac62f715 | pbrook | #define fsync _commit
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51 | 57d1a2b6 | bellard | #define lseek _lseeki64
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52 | 57d1a2b6 | bellard | #define ENOTSUP 4096 |
53 | 19cb3738 | bellard | #define ENOMEDIUM 4097 |
54 | beac80cd | bellard | extern int qemu_ftruncate64(int, int64_t); |
55 | beac80cd | bellard | #define ftruncate qemu_ftruncate64
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56 | beac80cd | bellard | |
57 | 57d1a2b6 | bellard | |
58 | 57d1a2b6 | bellard | static inline char *realpath(const char *path, char *resolved_path) |
59 | 57d1a2b6 | bellard | { |
60 | 57d1a2b6 | bellard | _fullpath(resolved_path, path, _MAX_PATH); |
61 | 57d1a2b6 | bellard | return resolved_path;
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62 | 57d1a2b6 | bellard | } |
63 | ec3757de | bellard | |
64 | ec3757de | bellard | #define PRId64 "I64d" |
65 | 26a76461 | bellard | #define PRIx64 "I64x" |
66 | 26a76461 | bellard | #define PRIu64 "I64u" |
67 | 26a76461 | bellard | #define PRIo64 "I64o" |
68 | 67b915a5 | bellard | #endif
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69 | 8a7ddc38 | bellard | |
70 | ea2384d3 | bellard | #ifdef QEMU_TOOL
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71 | ea2384d3 | bellard | |
72 | ea2384d3 | bellard | /* we use QEMU_TOOL in the command line tools which do not depend on
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73 | ea2384d3 | bellard | the target CPU type */
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74 | ea2384d3 | bellard | #include "config-host.h" |
75 | ea2384d3 | bellard | #include <setjmp.h> |
76 | ea2384d3 | bellard | #include "osdep.h" |
77 | ea2384d3 | bellard | #include "bswap.h" |
78 | ea2384d3 | bellard | |
79 | ea2384d3 | bellard | #else
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80 | ea2384d3 | bellard | |
81 | 4f209290 | pbrook | #include "audio/audio.h" |
82 | 16f62432 | bellard | #include "cpu.h" |
83 | 1fddef4b | bellard | #include "gdbstub.h" |
84 | 16f62432 | bellard | |
85 | ea2384d3 | bellard | #endif /* !defined(QEMU_TOOL) */ |
86 | ea2384d3 | bellard | |
87 | 67b915a5 | bellard | #ifndef glue
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88 | 67b915a5 | bellard | #define xglue(x, y) x ## y |
89 | 67b915a5 | bellard | #define glue(x, y) xglue(x, y)
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90 | 67b915a5 | bellard | #define stringify(s) tostring(s)
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91 | 67b915a5 | bellard | #define tostring(s) #s |
92 | 67b915a5 | bellard | #endif
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93 | 67b915a5 | bellard | |
94 | 24236869 | bellard | #ifndef MIN
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95 | 24236869 | bellard | #define MIN(a, b) (((a) < (b)) ? (a) : (b))
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96 | 24236869 | bellard | #endif
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97 | 24236869 | bellard | #ifndef MAX
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98 | 24236869 | bellard | #define MAX(a, b) (((a) > (b)) ? (a) : (b))
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99 | 24236869 | bellard | #endif
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100 | 24236869 | bellard | |
101 | 33e3963e | bellard | /* vl.c */
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102 | 80cabfad | bellard | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
103 | 313aa567 | bellard | |
104 | 80cabfad | bellard | void hw_error(const char *fmt, ...); |
105 | 80cabfad | bellard | |
106 | 80cabfad | bellard | extern const char *bios_dir; |
107 | 80cabfad | bellard | |
108 | 80cabfad | bellard | void pstrcpy(char *buf, int buf_size, const char *str); |
109 | 80cabfad | bellard | char *pstrcat(char *buf, int buf_size, const char *s); |
110 | 82c643ff | bellard | int strstart(const char *str, const char *val, const char **ptr); |
111 | c4b1fcc0 | bellard | |
112 | 8a7ddc38 | bellard | extern int vm_running; |
113 | 8a7ddc38 | bellard | |
114 | 0bd48850 | bellard | typedef struct vm_change_state_entry VMChangeStateEntry; |
115 | 0bd48850 | bellard | typedef void VMChangeStateHandler(void *opaque, int running); |
116 | 8a7ddc38 | bellard | typedef void VMStopHandler(void *opaque, int reason); |
117 | 8a7ddc38 | bellard | |
118 | 0bd48850 | bellard | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
119 | 0bd48850 | bellard | void *opaque);
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120 | 0bd48850 | bellard | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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121 | 0bd48850 | bellard | |
122 | 8a7ddc38 | bellard | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
123 | 8a7ddc38 | bellard | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
124 | 8a7ddc38 | bellard | |
125 | 8a7ddc38 | bellard | void vm_start(void); |
126 | 8a7ddc38 | bellard | void vm_stop(int reason); |
127 | 8a7ddc38 | bellard | |
128 | bb0c6722 | bellard | typedef void QEMUResetHandler(void *opaque); |
129 | bb0c6722 | bellard | |
130 | bb0c6722 | bellard | void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
131 | bb0c6722 | bellard | void qemu_system_reset_request(void); |
132 | bb0c6722 | bellard | void qemu_system_shutdown_request(void); |
133 | 3475187d | bellard | void qemu_system_powerdown_request(void); |
134 | 3475187d | bellard | #if !defined(TARGET_SPARC)
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135 | 3475187d | bellard | // Please implement a power failure function to signal the OS
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136 | 3475187d | bellard | #define qemu_system_powerdown() do{}while(0) |
137 | 3475187d | bellard | #else
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138 | 3475187d | bellard | void qemu_system_powerdown(void); |
139 | 3475187d | bellard | #endif
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140 | bb0c6722 | bellard | |
141 | ea2384d3 | bellard | void main_loop_wait(int timeout); |
142 | ea2384d3 | bellard | |
143 | 0ced6589 | bellard | extern int ram_size; |
144 | 0ced6589 | bellard | extern int bios_size; |
145 | ee22c2f7 | bellard | extern int rtc_utc; |
146 | 1f04275e | bellard | extern int cirrus_vga_enabled; |
147 | 28b9b5af | bellard | extern int graphic_width; |
148 | 28b9b5af | bellard | extern int graphic_height; |
149 | 28b9b5af | bellard | extern int graphic_depth; |
150 | 3d11d0eb | bellard | extern const char *keyboard_layout; |
151 | d993e026 | bellard | extern int kqemu_allowed; |
152 | a09db21f | bellard | extern int win2k_install_hack; |
153 | bb36d470 | bellard | extern int usb_enabled; |
154 | 6a00d601 | bellard | extern int smp_cpus; |
155 | 667accab | ths | extern int no_quit; |
156 | 0ced6589 | bellard | |
157 | 0ced6589 | bellard | /* XXX: make it dynamic */
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158 | 75956cf0 | pbrook | #if defined (TARGET_PPC) || defined (TARGET_SPARC64)
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159 | d5295253 | bellard | #define BIOS_SIZE ((512 + 32) * 1024) |
160 | 6af0bf9c | bellard | #elif defined(TARGET_MIPS)
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161 | 6af0bf9c | bellard | #define BIOS_SIZE (128 * 1024) |
162 | 0ced6589 | bellard | #else
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163 | 7587cf44 | bellard | #define BIOS_SIZE ((256 + 64) * 1024) |
164 | 0ced6589 | bellard | #endif
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165 | aaaa7df6 | bellard | |
166 | 63066f4f | bellard | /* keyboard/mouse support */
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167 | 63066f4f | bellard | |
168 | 63066f4f | bellard | #define MOUSE_EVENT_LBUTTON 0x01 |
169 | 63066f4f | bellard | #define MOUSE_EVENT_RBUTTON 0x02 |
170 | 63066f4f | bellard | #define MOUSE_EVENT_MBUTTON 0x04 |
171 | 63066f4f | bellard | |
172 | 63066f4f | bellard | typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
173 | 63066f4f | bellard | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
174 | 63066f4f | bellard | |
175 | 63066f4f | bellard | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
176 | 09b26c5e | bellard | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute); |
177 | 63066f4f | bellard | |
178 | 63066f4f | bellard | void kbd_put_keycode(int keycode); |
179 | 63066f4f | bellard | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
180 | 09b26c5e | bellard | int kbd_mouse_is_absolute(void); |
181 | 63066f4f | bellard | |
182 | 82c643ff | bellard | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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183 | 82c643ff | bellard | constants) */
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184 | 82c643ff | bellard | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) |
185 | 82c643ff | bellard | #define QEMU_KEY_BACKSPACE 0x007f |
186 | 82c643ff | bellard | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') |
187 | 82c643ff | bellard | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') |
188 | 82c643ff | bellard | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') |
189 | 82c643ff | bellard | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') |
190 | 82c643ff | bellard | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) |
191 | 82c643ff | bellard | #define QEMU_KEY_END QEMU_KEY_ESC1(4) |
192 | 82c643ff | bellard | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) |
193 | 82c643ff | bellard | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) |
194 | 82c643ff | bellard | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) |
195 | 82c643ff | bellard | |
196 | 82c643ff | bellard | #define QEMU_KEY_CTRL_UP 0xe400 |
197 | 82c643ff | bellard | #define QEMU_KEY_CTRL_DOWN 0xe401 |
198 | 82c643ff | bellard | #define QEMU_KEY_CTRL_LEFT 0xe402 |
199 | 82c643ff | bellard | #define QEMU_KEY_CTRL_RIGHT 0xe403 |
200 | 82c643ff | bellard | #define QEMU_KEY_CTRL_HOME 0xe404 |
201 | 82c643ff | bellard | #define QEMU_KEY_CTRL_END 0xe405 |
202 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEUP 0xe406 |
203 | 82c643ff | bellard | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 |
204 | 82c643ff | bellard | |
205 | 82c643ff | bellard | void kbd_put_keysym(int keysym); |
206 | 82c643ff | bellard | |
207 | c20709aa | bellard | /* async I/O support */
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208 | c20709aa | bellard | |
209 | c20709aa | bellard | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
210 | c20709aa | bellard | typedef int IOCanRWHandler(void *opaque); |
211 | 7c9d8e07 | bellard | typedef void IOHandler(void *opaque); |
212 | c20709aa | bellard | |
213 | 7c9d8e07 | bellard | int qemu_set_fd_handler2(int fd, |
214 | 7c9d8e07 | bellard | IOCanRWHandler *fd_read_poll, |
215 | 7c9d8e07 | bellard | IOHandler *fd_read, |
216 | 7c9d8e07 | bellard | IOHandler *fd_write, |
217 | 7c9d8e07 | bellard | void *opaque);
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218 | 7c9d8e07 | bellard | int qemu_set_fd_handler(int fd, |
219 | 7c9d8e07 | bellard | IOHandler *fd_read, |
220 | 7c9d8e07 | bellard | IOHandler *fd_write, |
221 | 7c9d8e07 | bellard | void *opaque);
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222 | c20709aa | bellard | |
223 | f331110f | bellard | /* Polling handling */
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224 | f331110f | bellard | |
225 | f331110f | bellard | /* return TRUE if no sleep should be done afterwards */
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226 | f331110f | bellard | typedef int PollingFunc(void *opaque); |
227 | f331110f | bellard | |
228 | f331110f | bellard | int qemu_add_polling_cb(PollingFunc *func, void *opaque); |
229 | f331110f | bellard | void qemu_del_polling_cb(PollingFunc *func, void *opaque); |
230 | f331110f | bellard | |
231 | a18e524a | bellard | #ifdef _WIN32
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232 | a18e524a | bellard | /* Wait objects handling */
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233 | a18e524a | bellard | typedef void WaitObjectFunc(void *opaque); |
234 | a18e524a | bellard | |
235 | a18e524a | bellard | int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
236 | a18e524a | bellard | void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
237 | a18e524a | bellard | #endif
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238 | a18e524a | bellard | |
239 | 82c643ff | bellard | /* character device */
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240 | 82c643ff | bellard | |
241 | 82c643ff | bellard | #define CHR_EVENT_BREAK 0 /* serial break char */ |
242 | ea2384d3 | bellard | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
243 | 82c643ff | bellard | |
244 | 2122c51a | bellard | |
245 | 2122c51a | bellard | |
246 | 2122c51a | bellard | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 |
247 | 2122c51a | bellard | typedef struct { |
248 | 2122c51a | bellard | int speed;
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249 | 2122c51a | bellard | int parity;
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250 | 2122c51a | bellard | int data_bits;
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251 | 2122c51a | bellard | int stop_bits;
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252 | 2122c51a | bellard | } QEMUSerialSetParams; |
253 | 2122c51a | bellard | |
254 | 2122c51a | bellard | #define CHR_IOCTL_SERIAL_SET_BREAK 2 |
255 | 2122c51a | bellard | |
256 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_DATA 3 |
257 | 2122c51a | bellard | #define CHR_IOCTL_PP_WRITE_DATA 4 |
258 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_CONTROL 5 |
259 | 2122c51a | bellard | #define CHR_IOCTL_PP_WRITE_CONTROL 6 |
260 | 2122c51a | bellard | #define CHR_IOCTL_PP_READ_STATUS 7 |
261 | 2122c51a | bellard | |
262 | 82c643ff | bellard | typedef void IOEventHandler(void *opaque, int event); |
263 | 82c643ff | bellard | |
264 | 82c643ff | bellard | typedef struct CharDriverState { |
265 | 82c643ff | bellard | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
266 | 82c643ff | bellard | void (*chr_add_read_handler)(struct CharDriverState *s, |
267 | 82c643ff | bellard | IOCanRWHandler *fd_can_read, |
268 | 82c643ff | bellard | IOReadHandler *fd_read, void *opaque);
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269 | 2122c51a | bellard | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
270 | 82c643ff | bellard | IOEventHandler *chr_event; |
271 | eb45f5fe | bellard | void (*chr_send_event)(struct CharDriverState *chr, int event); |
272 | f331110f | bellard | void (*chr_close)(struct CharDriverState *chr); |
273 | 82c643ff | bellard | void *opaque;
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274 | 82c643ff | bellard | } CharDriverState; |
275 | 82c643ff | bellard | |
276 | 82c643ff | bellard | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
277 | 82c643ff | bellard | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
278 | ea2384d3 | bellard | void qemu_chr_send_event(CharDriverState *s, int event); |
279 | 82c643ff | bellard | void qemu_chr_add_read_handler(CharDriverState *s,
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280 | 82c643ff | bellard | IOCanRWHandler *fd_can_read, |
281 | 82c643ff | bellard | IOReadHandler *fd_read, void *opaque);
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282 | 82c643ff | bellard | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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283 | 2122c51a | bellard | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
284 | f8d179e3 | bellard | |
285 | 82c643ff | bellard | /* consoles */
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286 | 82c643ff | bellard | |
287 | 82c643ff | bellard | typedef struct DisplayState DisplayState; |
288 | 82c643ff | bellard | typedef struct TextConsole TextConsole; |
289 | 82c643ff | bellard | |
290 | 95219897 | pbrook | typedef void (*vga_hw_update_ptr)(void *); |
291 | 95219897 | pbrook | typedef void (*vga_hw_invalidate_ptr)(void *); |
292 | 95219897 | pbrook | typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); |
293 | 95219897 | pbrook | |
294 | 95219897 | pbrook | TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, |
295 | 95219897 | pbrook | vga_hw_invalidate_ptr invalidate, |
296 | 95219897 | pbrook | vga_hw_screen_dump_ptr screen_dump, |
297 | 95219897 | pbrook | void *opaque);
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298 | 95219897 | pbrook | void vga_hw_update(void); |
299 | 95219897 | pbrook | void vga_hw_invalidate(void); |
300 | 95219897 | pbrook | void vga_hw_screen_dump(const char *filename); |
301 | 95219897 | pbrook | |
302 | 95219897 | pbrook | int is_graphic_console(void); |
303 | 82c643ff | bellard | CharDriverState *text_console_init(DisplayState *ds); |
304 | 82c643ff | bellard | void console_select(unsigned int index); |
305 | 82c643ff | bellard | |
306 | 8d11df9e | bellard | /* serial ports */
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307 | 8d11df9e | bellard | |
308 | 8d11df9e | bellard | #define MAX_SERIAL_PORTS 4 |
309 | 8d11df9e | bellard | |
310 | 8d11df9e | bellard | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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311 | 8d11df9e | bellard | |
312 | 6508fe59 | bellard | /* parallel ports */
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313 | 6508fe59 | bellard | |
314 | 6508fe59 | bellard | #define MAX_PARALLEL_PORTS 3 |
315 | 6508fe59 | bellard | |
316 | 6508fe59 | bellard | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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317 | 6508fe59 | bellard | |
318 | 7c9d8e07 | bellard | /* VLANs support */
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319 | 7c9d8e07 | bellard | |
320 | 7c9d8e07 | bellard | typedef struct VLANClientState VLANClientState; |
321 | 7c9d8e07 | bellard | |
322 | 7c9d8e07 | bellard | struct VLANClientState {
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323 | 7c9d8e07 | bellard | IOReadHandler *fd_read; |
324 | d861b05e | pbrook | /* Packets may still be sent if this returns zero. It's used to
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325 | d861b05e | pbrook | rate-limit the slirp code. */
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326 | d861b05e | pbrook | IOCanRWHandler *fd_can_read; |
327 | 7c9d8e07 | bellard | void *opaque;
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328 | 7c9d8e07 | bellard | struct VLANClientState *next;
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329 | 7c9d8e07 | bellard | struct VLANState *vlan;
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330 | 7c9d8e07 | bellard | char info_str[256]; |
331 | 7c9d8e07 | bellard | }; |
332 | 7c9d8e07 | bellard | |
333 | 7c9d8e07 | bellard | typedef struct VLANState { |
334 | 7c9d8e07 | bellard | int id;
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335 | 7c9d8e07 | bellard | VLANClientState *first_client; |
336 | 7c9d8e07 | bellard | struct VLANState *next;
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337 | 7c9d8e07 | bellard | } VLANState; |
338 | 7c9d8e07 | bellard | |
339 | 7c9d8e07 | bellard | VLANState *qemu_find_vlan(int id);
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340 | 7c9d8e07 | bellard | VLANClientState *qemu_new_vlan_client(VLANState *vlan, |
341 | d861b05e | pbrook | IOReadHandler *fd_read, |
342 | d861b05e | pbrook | IOCanRWHandler *fd_can_read, |
343 | d861b05e | pbrook | void *opaque);
|
344 | d861b05e | pbrook | int qemu_can_send_packet(VLANClientState *vc);
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345 | 7c9d8e07 | bellard | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
346 | d861b05e | pbrook | void qemu_handler_true(void *opaque); |
347 | 7c9d8e07 | bellard | |
348 | 7c9d8e07 | bellard | void do_info_network(void); |
349 | 7c9d8e07 | bellard | |
350 | 7fb843f8 | bellard | /* TAP win32 */
|
351 | 7fb843f8 | bellard | int tap_win32_init(VLANState *vlan, const char *ifname); |
352 | 7fb843f8 | bellard | |
353 | 7c9d8e07 | bellard | /* NIC info */
|
354 | c4b1fcc0 | bellard | |
355 | c4b1fcc0 | bellard | #define MAX_NICS 8 |
356 | c4b1fcc0 | bellard | |
357 | 7c9d8e07 | bellard | typedef struct NICInfo { |
358 | c4b1fcc0 | bellard | uint8_t macaddr[6];
|
359 | a41b2ff2 | pbrook | const char *model; |
360 | 7c9d8e07 | bellard | VLANState *vlan; |
361 | 7c9d8e07 | bellard | } NICInfo; |
362 | c4b1fcc0 | bellard | |
363 | c4b1fcc0 | bellard | extern int nb_nics; |
364 | 7c9d8e07 | bellard | extern NICInfo nd_table[MAX_NICS];
|
365 | 8a7ddc38 | bellard | |
366 | 8a7ddc38 | bellard | /* timers */
|
367 | 8a7ddc38 | bellard | |
368 | 8a7ddc38 | bellard | typedef struct QEMUClock QEMUClock; |
369 | 8a7ddc38 | bellard | typedef struct QEMUTimer QEMUTimer; |
370 | 8a7ddc38 | bellard | typedef void QEMUTimerCB(void *opaque); |
371 | 8a7ddc38 | bellard | |
372 | 8a7ddc38 | bellard | /* The real time clock should be used only for stuff which does not
|
373 | 8a7ddc38 | bellard | change the virtual machine state, as it is run even if the virtual
|
374 | 69b91039 | bellard | machine is stopped. The real time clock has a frequency of 1000
|
375 | 8a7ddc38 | bellard | Hz. */
|
376 | 8a7ddc38 | bellard | extern QEMUClock *rt_clock;
|
377 | 8a7ddc38 | bellard | |
378 | e80cfcfc | bellard | /* The virtual clock is only run during the emulation. It is stopped
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379 | 8a7ddc38 | bellard | when the virtual machine is stopped. Virtual timers use a high
|
380 | 8a7ddc38 | bellard | precision clock, usually cpu cycles (use ticks_per_sec). */
|
381 | 8a7ddc38 | bellard | extern QEMUClock *vm_clock;
|
382 | 8a7ddc38 | bellard | |
383 | 8a7ddc38 | bellard | int64_t qemu_get_clock(QEMUClock *clock); |
384 | 8a7ddc38 | bellard | |
385 | 8a7ddc38 | bellard | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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386 | 8a7ddc38 | bellard | void qemu_free_timer(QEMUTimer *ts);
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387 | 8a7ddc38 | bellard | void qemu_del_timer(QEMUTimer *ts);
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388 | 8a7ddc38 | bellard | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
|
389 | 8a7ddc38 | bellard | int qemu_timer_pending(QEMUTimer *ts);
|
390 | 8a7ddc38 | bellard | |
391 | 8a7ddc38 | bellard | extern int64_t ticks_per_sec;
|
392 | 8a7ddc38 | bellard | extern int pit_min_timer_count; |
393 | 8a7ddc38 | bellard | |
394 | 1dce7c3c | bellard | int64_t cpu_get_ticks(void);
|
395 | 8a7ddc38 | bellard | void cpu_enable_ticks(void); |
396 | 8a7ddc38 | bellard | void cpu_disable_ticks(void); |
397 | 8a7ddc38 | bellard | |
398 | 8a7ddc38 | bellard | /* VM Load/Save */
|
399 | 8a7ddc38 | bellard | |
400 | faea38e7 | bellard | typedef struct QEMUFile QEMUFile; |
401 | 8a7ddc38 | bellard | |
402 | faea38e7 | bellard | QEMUFile *qemu_fopen(const char *filename, const char *mode); |
403 | faea38e7 | bellard | void qemu_fflush(QEMUFile *f);
|
404 | faea38e7 | bellard | void qemu_fclose(QEMUFile *f);
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405 | 8a7ddc38 | bellard | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
406 | 8a7ddc38 | bellard | void qemu_put_byte(QEMUFile *f, int v); |
407 | 8a7ddc38 | bellard | void qemu_put_be16(QEMUFile *f, unsigned int v); |
408 | 8a7ddc38 | bellard | void qemu_put_be32(QEMUFile *f, unsigned int v); |
409 | 8a7ddc38 | bellard | void qemu_put_be64(QEMUFile *f, uint64_t v);
|
410 | 8a7ddc38 | bellard | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
411 | 8a7ddc38 | bellard | int qemu_get_byte(QEMUFile *f);
|
412 | 8a7ddc38 | bellard | unsigned int qemu_get_be16(QEMUFile *f); |
413 | 8a7ddc38 | bellard | unsigned int qemu_get_be32(QEMUFile *f); |
414 | 8a7ddc38 | bellard | uint64_t qemu_get_be64(QEMUFile *f); |
415 | 8a7ddc38 | bellard | |
416 | 8a7ddc38 | bellard | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
417 | 8a7ddc38 | bellard | { |
418 | 8a7ddc38 | bellard | qemu_put_be64(f, *pv); |
419 | 8a7ddc38 | bellard | } |
420 | 8a7ddc38 | bellard | |
421 | 8a7ddc38 | bellard | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
422 | 8a7ddc38 | bellard | { |
423 | 8a7ddc38 | bellard | qemu_put_be32(f, *pv); |
424 | 8a7ddc38 | bellard | } |
425 | 8a7ddc38 | bellard | |
426 | 8a7ddc38 | bellard | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
427 | 8a7ddc38 | bellard | { |
428 | 8a7ddc38 | bellard | qemu_put_be16(f, *pv); |
429 | 8a7ddc38 | bellard | } |
430 | 8a7ddc38 | bellard | |
431 | 8a7ddc38 | bellard | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
432 | 8a7ddc38 | bellard | { |
433 | 8a7ddc38 | bellard | qemu_put_byte(f, *pv); |
434 | 8a7ddc38 | bellard | } |
435 | 8a7ddc38 | bellard | |
436 | 8a7ddc38 | bellard | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
437 | 8a7ddc38 | bellard | { |
438 | 8a7ddc38 | bellard | *pv = qemu_get_be64(f); |
439 | 8a7ddc38 | bellard | } |
440 | 8a7ddc38 | bellard | |
441 | 8a7ddc38 | bellard | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
442 | 8a7ddc38 | bellard | { |
443 | 8a7ddc38 | bellard | *pv = qemu_get_be32(f); |
444 | 8a7ddc38 | bellard | } |
445 | 8a7ddc38 | bellard | |
446 | 8a7ddc38 | bellard | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
447 | 8a7ddc38 | bellard | { |
448 | 8a7ddc38 | bellard | *pv = qemu_get_be16(f); |
449 | 8a7ddc38 | bellard | } |
450 | 8a7ddc38 | bellard | |
451 | 8a7ddc38 | bellard | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
452 | 8a7ddc38 | bellard | { |
453 | 8a7ddc38 | bellard | *pv = qemu_get_byte(f); |
454 | 8a7ddc38 | bellard | } |
455 | 8a7ddc38 | bellard | |
456 | c27004ec | bellard | #if TARGET_LONG_BITS == 64 |
457 | c27004ec | bellard | #define qemu_put_betl qemu_put_be64
|
458 | c27004ec | bellard | #define qemu_get_betl qemu_get_be64
|
459 | c27004ec | bellard | #define qemu_put_betls qemu_put_be64s
|
460 | c27004ec | bellard | #define qemu_get_betls qemu_get_be64s
|
461 | c27004ec | bellard | #else
|
462 | c27004ec | bellard | #define qemu_put_betl qemu_put_be32
|
463 | c27004ec | bellard | #define qemu_get_betl qemu_get_be32
|
464 | c27004ec | bellard | #define qemu_put_betls qemu_put_be32s
|
465 | c27004ec | bellard | #define qemu_get_betls qemu_get_be32s
|
466 | c27004ec | bellard | #endif
|
467 | c27004ec | bellard | |
468 | 8a7ddc38 | bellard | int64_t qemu_ftell(QEMUFile *f); |
469 | 8a7ddc38 | bellard | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
470 | 8a7ddc38 | bellard | |
471 | 8a7ddc38 | bellard | typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
472 | 8a7ddc38 | bellard | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
473 | 8a7ddc38 | bellard | |
474 | 8a7ddc38 | bellard | int register_savevm(const char *idstr, |
475 | 8a7ddc38 | bellard | int instance_id,
|
476 | 8a7ddc38 | bellard | int version_id,
|
477 | 8a7ddc38 | bellard | SaveStateHandler *save_state, |
478 | 8a7ddc38 | bellard | LoadStateHandler *load_state, |
479 | 8a7ddc38 | bellard | void *opaque);
|
480 | 8a7ddc38 | bellard | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
481 | 8a7ddc38 | bellard | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
482 | c4b1fcc0 | bellard | |
483 | 6a00d601 | bellard | void cpu_save(QEMUFile *f, void *opaque); |
484 | 6a00d601 | bellard | int cpu_load(QEMUFile *f, void *opaque, int version_id); |
485 | 6a00d601 | bellard | |
486 | faea38e7 | bellard | void do_savevm(const char *name); |
487 | faea38e7 | bellard | void do_loadvm(const char *name); |
488 | faea38e7 | bellard | void do_delvm(const char *name); |
489 | faea38e7 | bellard | void do_info_snapshots(void); |
490 | faea38e7 | bellard | |
491 | 83f64091 | bellard | /* bottom halves */
|
492 | 83f64091 | bellard | typedef struct QEMUBH QEMUBH; |
493 | 83f64091 | bellard | typedef void QEMUBHFunc(void *opaque); |
494 | 83f64091 | bellard | |
495 | 83f64091 | bellard | QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
|
496 | 83f64091 | bellard | void qemu_bh_schedule(QEMUBH *bh);
|
497 | 83f64091 | bellard | void qemu_bh_cancel(QEMUBH *bh);
|
498 | 83f64091 | bellard | void qemu_bh_delete(QEMUBH *bh);
|
499 | 6eb5733a | bellard | int qemu_bh_poll(void); |
500 | 83f64091 | bellard | |
501 | fc01f7e7 | bellard | /* block.c */
|
502 | fc01f7e7 | bellard | typedef struct BlockDriverState BlockDriverState; |
503 | ea2384d3 | bellard | typedef struct BlockDriver BlockDriver; |
504 | ea2384d3 | bellard | |
505 | ea2384d3 | bellard | extern BlockDriver bdrv_raw;
|
506 | 19cb3738 | bellard | extern BlockDriver bdrv_host_device;
|
507 | ea2384d3 | bellard | extern BlockDriver bdrv_cow;
|
508 | ea2384d3 | bellard | extern BlockDriver bdrv_qcow;
|
509 | ea2384d3 | bellard | extern BlockDriver bdrv_vmdk;
|
510 | 3c56521b | bellard | extern BlockDriver bdrv_cloop;
|
511 | 585d0ed9 | bellard | extern BlockDriver bdrv_dmg;
|
512 | a8753c34 | bellard | extern BlockDriver bdrv_bochs;
|
513 | 6a0f9e82 | bellard | extern BlockDriver bdrv_vpc;
|
514 | de167e41 | bellard | extern BlockDriver bdrv_vvfat;
|
515 | faea38e7 | bellard | extern BlockDriver bdrv_qcow2;
|
516 | faea38e7 | bellard | |
517 | faea38e7 | bellard | typedef struct BlockDriverInfo { |
518 | faea38e7 | bellard | /* in bytes, 0 if irrelevant */
|
519 | faea38e7 | bellard | int cluster_size;
|
520 | faea38e7 | bellard | /* offset at which the VM state can be saved (0 if not possible) */
|
521 | faea38e7 | bellard | int64_t vm_state_offset; |
522 | faea38e7 | bellard | } BlockDriverInfo; |
523 | faea38e7 | bellard | |
524 | faea38e7 | bellard | typedef struct QEMUSnapshotInfo { |
525 | faea38e7 | bellard | char id_str[128]; /* unique snapshot id */ |
526 | faea38e7 | bellard | /* the following fields are informative. They are not needed for
|
527 | faea38e7 | bellard | the consistency of the snapshot */
|
528 | faea38e7 | bellard | char name[256]; /* user choosen name */ |
529 | faea38e7 | bellard | uint32_t vm_state_size; /* VM state info size */
|
530 | faea38e7 | bellard | uint32_t date_sec; /* UTC date of the snapshot */
|
531 | faea38e7 | bellard | uint32_t date_nsec; |
532 | faea38e7 | bellard | uint64_t vm_clock_nsec; /* VM clock relative to boot */
|
533 | faea38e7 | bellard | } QEMUSnapshotInfo; |
534 | ea2384d3 | bellard | |
535 | 83f64091 | bellard | #define BDRV_O_RDONLY 0x0000 |
536 | 83f64091 | bellard | #define BDRV_O_RDWR 0x0002 |
537 | 83f64091 | bellard | #define BDRV_O_ACCESS 0x0003 |
538 | 83f64091 | bellard | #define BDRV_O_CREAT 0x0004 /* create an empty file */ |
539 | 83f64091 | bellard | #define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */ |
540 | 83f64091 | bellard | #define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to |
541 | 83f64091 | bellard | use a disk image format on top of
|
542 | 83f64091 | bellard | it (default for
|
543 | 83f64091 | bellard | bdrv_file_open()) */
|
544 | 83f64091 | bellard | |
545 | ea2384d3 | bellard | void bdrv_init(void); |
546 | ea2384d3 | bellard | BlockDriver *bdrv_find_format(const char *format_name); |
547 | ea2384d3 | bellard | int bdrv_create(BlockDriver *drv,
|
548 | ea2384d3 | bellard | const char *filename, int64_t size_in_sectors, |
549 | ea2384d3 | bellard | const char *backing_file, int flags); |
550 | c4b1fcc0 | bellard | BlockDriverState *bdrv_new(const char *device_name); |
551 | c4b1fcc0 | bellard | void bdrv_delete(BlockDriverState *bs);
|
552 | 83f64091 | bellard | int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags); |
553 | 83f64091 | bellard | int bdrv_open(BlockDriverState *bs, const char *filename, int flags); |
554 | 83f64091 | bellard | int bdrv_open2(BlockDriverState *bs, const char *filename, int flags, |
555 | ea2384d3 | bellard | BlockDriver *drv); |
556 | fc01f7e7 | bellard | void bdrv_close(BlockDriverState *bs);
|
557 | fc01f7e7 | bellard | int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
558 | fc01f7e7 | bellard | uint8_t *buf, int nb_sectors);
|
559 | fc01f7e7 | bellard | int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
560 | fc01f7e7 | bellard | const uint8_t *buf, int nb_sectors); |
561 | 83f64091 | bellard | int bdrv_pread(BlockDriverState *bs, int64_t offset,
|
562 | 83f64091 | bellard | void *buf, int count); |
563 | 83f64091 | bellard | int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
|
564 | 83f64091 | bellard | const void *buf, int count); |
565 | 83f64091 | bellard | int bdrv_truncate(BlockDriverState *bs, int64_t offset);
|
566 | 83f64091 | bellard | int64_t bdrv_getlength(BlockDriverState *bs); |
567 | fc01f7e7 | bellard | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
568 | 33e3963e | bellard | int bdrv_commit(BlockDriverState *bs);
|
569 | 77fef8c1 | bellard | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
570 | 83f64091 | bellard | /* async block I/O */
|
571 | 83f64091 | bellard | typedef struct BlockDriverAIOCB BlockDriverAIOCB; |
572 | 83f64091 | bellard | typedef void BlockDriverCompletionFunc(void *opaque, int ret); |
573 | 83f64091 | bellard | |
574 | ce1a14dc | pbrook | BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num, |
575 | ce1a14dc | pbrook | uint8_t *buf, int nb_sectors,
|
576 | ce1a14dc | pbrook | BlockDriverCompletionFunc *cb, void *opaque);
|
577 | ce1a14dc | pbrook | BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num, |
578 | ce1a14dc | pbrook | const uint8_t *buf, int nb_sectors, |
579 | ce1a14dc | pbrook | BlockDriverCompletionFunc *cb, void *opaque);
|
580 | 83f64091 | bellard | void bdrv_aio_cancel(BlockDriverAIOCB *acb);
|
581 | 83f64091 | bellard | |
582 | 83f64091 | bellard | void qemu_aio_init(void); |
583 | 83f64091 | bellard | void qemu_aio_poll(void); |
584 | 6192bc37 | pbrook | void qemu_aio_flush(void); |
585 | 83f64091 | bellard | void qemu_aio_wait_start(void); |
586 | 83f64091 | bellard | void qemu_aio_wait(void); |
587 | 83f64091 | bellard | void qemu_aio_wait_end(void); |
588 | 83f64091 | bellard | |
589 | 7a6cba61 | pbrook | /* Ensure contents are flushed to disk. */
|
590 | 7a6cba61 | pbrook | void bdrv_flush(BlockDriverState *bs);
|
591 | 33e3963e | bellard | |
592 | c4b1fcc0 | bellard | #define BDRV_TYPE_HD 0 |
593 | c4b1fcc0 | bellard | #define BDRV_TYPE_CDROM 1 |
594 | c4b1fcc0 | bellard | #define BDRV_TYPE_FLOPPY 2 |
595 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_AUTO 0 |
596 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_NONE 1 |
597 | 46d4767d | bellard | #define BIOS_ATA_TRANSLATION_LBA 2 |
598 | c4b1fcc0 | bellard | |
599 | c4b1fcc0 | bellard | void bdrv_set_geometry_hint(BlockDriverState *bs,
|
600 | c4b1fcc0 | bellard | int cyls, int heads, int secs); |
601 | c4b1fcc0 | bellard | void bdrv_set_type_hint(BlockDriverState *bs, int type); |
602 | 46d4767d | bellard | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
603 | c4b1fcc0 | bellard | void bdrv_get_geometry_hint(BlockDriverState *bs,
|
604 | c4b1fcc0 | bellard | int *pcyls, int *pheads, int *psecs); |
605 | c4b1fcc0 | bellard | int bdrv_get_type_hint(BlockDriverState *bs);
|
606 | 46d4767d | bellard | int bdrv_get_translation_hint(BlockDriverState *bs);
|
607 | c4b1fcc0 | bellard | int bdrv_is_removable(BlockDriverState *bs);
|
608 | c4b1fcc0 | bellard | int bdrv_is_read_only(BlockDriverState *bs);
|
609 | c4b1fcc0 | bellard | int bdrv_is_inserted(BlockDriverState *bs);
|
610 | 19cb3738 | bellard | int bdrv_media_changed(BlockDriverState *bs);
|
611 | c4b1fcc0 | bellard | int bdrv_is_locked(BlockDriverState *bs);
|
612 | c4b1fcc0 | bellard | void bdrv_set_locked(BlockDriverState *bs, int locked); |
613 | 19cb3738 | bellard | void bdrv_eject(BlockDriverState *bs, int eject_flag); |
614 | c4b1fcc0 | bellard | void bdrv_set_change_cb(BlockDriverState *bs,
|
615 | c4b1fcc0 | bellard | void (*change_cb)(void *opaque), void *opaque); |
616 | ea2384d3 | bellard | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
617 | c4b1fcc0 | bellard | void bdrv_info(void); |
618 | c4b1fcc0 | bellard | BlockDriverState *bdrv_find(const char *name); |
619 | 82c643ff | bellard | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
620 | ea2384d3 | bellard | int bdrv_is_encrypted(BlockDriverState *bs);
|
621 | ea2384d3 | bellard | int bdrv_set_key(BlockDriverState *bs, const char *key); |
622 | ea2384d3 | bellard | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), |
623 | ea2384d3 | bellard | void *opaque);
|
624 | ea2384d3 | bellard | const char *bdrv_get_device_name(BlockDriverState *bs); |
625 | faea38e7 | bellard | int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
|
626 | faea38e7 | bellard | const uint8_t *buf, int nb_sectors); |
627 | faea38e7 | bellard | int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
|
628 | c4b1fcc0 | bellard | |
629 | 83f64091 | bellard | void bdrv_get_backing_filename(BlockDriverState *bs,
|
630 | 83f64091 | bellard | char *filename, int filename_size); |
631 | faea38e7 | bellard | int bdrv_snapshot_create(BlockDriverState *bs,
|
632 | faea38e7 | bellard | QEMUSnapshotInfo *sn_info); |
633 | faea38e7 | bellard | int bdrv_snapshot_goto(BlockDriverState *bs,
|
634 | faea38e7 | bellard | const char *snapshot_id); |
635 | faea38e7 | bellard | int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id); |
636 | faea38e7 | bellard | int bdrv_snapshot_list(BlockDriverState *bs,
|
637 | faea38e7 | bellard | QEMUSnapshotInfo **psn_info); |
638 | faea38e7 | bellard | char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn); |
639 | faea38e7 | bellard | |
640 | faea38e7 | bellard | char *get_human_readable_size(char *buf, int buf_size, int64_t size); |
641 | 83f64091 | bellard | int path_is_absolute(const char *path); |
642 | 83f64091 | bellard | void path_combine(char *dest, int dest_size, |
643 | 83f64091 | bellard | const char *base_path, |
644 | 83f64091 | bellard | const char *filename); |
645 | ea2384d3 | bellard | |
646 | ea2384d3 | bellard | #ifndef QEMU_TOOL
|
647 | 54fa5af5 | bellard | |
648 | 54fa5af5 | bellard | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, |
649 | 54fa5af5 | bellard | int boot_device,
|
650 | 54fa5af5 | bellard | DisplayState *ds, const char **fd_filename, int snapshot, |
651 | 54fa5af5 | bellard | const char *kernel_filename, const char *kernel_cmdline, |
652 | 54fa5af5 | bellard | const char *initrd_filename); |
653 | 54fa5af5 | bellard | |
654 | 54fa5af5 | bellard | typedef struct QEMUMachine { |
655 | 54fa5af5 | bellard | const char *name; |
656 | 54fa5af5 | bellard | const char *desc; |
657 | 54fa5af5 | bellard | QEMUMachineInitFunc *init; |
658 | 54fa5af5 | bellard | struct QEMUMachine *next;
|
659 | 54fa5af5 | bellard | } QEMUMachine; |
660 | 54fa5af5 | bellard | |
661 | 54fa5af5 | bellard | int qemu_register_machine(QEMUMachine *m);
|
662 | 54fa5af5 | bellard | |
663 | 54fa5af5 | bellard | typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
664 | 3de388f6 | bellard | typedef void IRQRequestFunc(void *opaque, int level); |
665 | 54fa5af5 | bellard | |
666 | 26aa7d72 | bellard | /* ISA bus */
|
667 | 26aa7d72 | bellard | |
668 | 26aa7d72 | bellard | extern target_phys_addr_t isa_mem_base;
|
669 | 26aa7d72 | bellard | |
670 | 26aa7d72 | bellard | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
671 | 26aa7d72 | bellard | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
672 | 26aa7d72 | bellard | |
673 | 26aa7d72 | bellard | int register_ioport_read(int start, int length, int size, |
674 | 26aa7d72 | bellard | IOPortReadFunc *func, void *opaque);
|
675 | 26aa7d72 | bellard | int register_ioport_write(int start, int length, int size, |
676 | 26aa7d72 | bellard | IOPortWriteFunc *func, void *opaque);
|
677 | 69b91039 | bellard | void isa_unassign_ioport(int start, int length); |
678 | 69b91039 | bellard | |
679 | aef445bd | pbrook | void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
|
680 | aef445bd | pbrook | |
681 | 69b91039 | bellard | /* PCI bus */
|
682 | 69b91039 | bellard | |
683 | 69b91039 | bellard | extern target_phys_addr_t pci_mem_base;
|
684 | 69b91039 | bellard | |
685 | 46e50e9d | bellard | typedef struct PCIBus PCIBus; |
686 | 69b91039 | bellard | typedef struct PCIDevice PCIDevice; |
687 | 69b91039 | bellard | |
688 | 69b91039 | bellard | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
689 | 69b91039 | bellard | uint32_t address, uint32_t data, int len);
|
690 | 69b91039 | bellard | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
691 | 69b91039 | bellard | uint32_t address, int len);
|
692 | 69b91039 | bellard | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
693 | 69b91039 | bellard | uint32_t addr, uint32_t size, int type);
|
694 | 69b91039 | bellard | |
695 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM 0x00 |
696 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_IO 0x01 |
697 | 69b91039 | bellard | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
698 | 69b91039 | bellard | |
699 | 69b91039 | bellard | typedef struct PCIIORegion { |
700 | 5768f5ac | bellard | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
701 | 69b91039 | bellard | uint32_t size; |
702 | 69b91039 | bellard | uint8_t type; |
703 | 69b91039 | bellard | PCIMapIORegionFunc *map_func; |
704 | 69b91039 | bellard | } PCIIORegion; |
705 | 69b91039 | bellard | |
706 | 8a8696a3 | bellard | #define PCI_ROM_SLOT 6 |
707 | 8a8696a3 | bellard | #define PCI_NUM_REGIONS 7 |
708 | 502a5395 | pbrook | |
709 | 502a5395 | pbrook | #define PCI_DEVICES_MAX 64 |
710 | 502a5395 | pbrook | |
711 | 502a5395 | pbrook | #define PCI_VENDOR_ID 0x00 /* 16 bits */ |
712 | 502a5395 | pbrook | #define PCI_DEVICE_ID 0x02 /* 16 bits */ |
713 | 502a5395 | pbrook | #define PCI_COMMAND 0x04 /* 16 bits */ |
714 | 502a5395 | pbrook | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
715 | 502a5395 | pbrook | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
716 | 502a5395 | pbrook | #define PCI_CLASS_DEVICE 0x0a /* Device class */ |
717 | 502a5395 | pbrook | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
718 | 502a5395 | pbrook | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
719 | 502a5395 | pbrook | #define PCI_MIN_GNT 0x3e /* 8 bits */ |
720 | 502a5395 | pbrook | #define PCI_MAX_LAT 0x3f /* 8 bits */ |
721 | 502a5395 | pbrook | |
722 | 69b91039 | bellard | struct PCIDevice {
|
723 | 69b91039 | bellard | /* PCI config space */
|
724 | 69b91039 | bellard | uint8_t config[256];
|
725 | 69b91039 | bellard | |
726 | 69b91039 | bellard | /* the following fields are read only */
|
727 | 46e50e9d | bellard | PCIBus *bus; |
728 | 69b91039 | bellard | int devfn;
|
729 | 69b91039 | bellard | char name[64]; |
730 | 8a8696a3 | bellard | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
731 | 69b91039 | bellard | |
732 | 69b91039 | bellard | /* do not access the following fields */
|
733 | 69b91039 | bellard | PCIConfigReadFunc *config_read; |
734 | 69b91039 | bellard | PCIConfigWriteFunc *config_write; |
735 | 502a5395 | pbrook | /* ??? This is a PC-specific hack, and should be removed. */
|
736 | 5768f5ac | bellard | int irq_index;
|
737 | d2b59317 | pbrook | |
738 | d2b59317 | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
|
739 | d2b59317 | pbrook | int irq_state[4]; |
740 | 69b91039 | bellard | }; |
741 | 69b91039 | bellard | |
742 | 46e50e9d | bellard | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
743 | 46e50e9d | bellard | int instance_size, int devfn, |
744 | 69b91039 | bellard | PCIConfigReadFunc *config_read, |
745 | 69b91039 | bellard | PCIConfigWriteFunc *config_write); |
746 | 69b91039 | bellard | |
747 | 69b91039 | bellard | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
748 | 69b91039 | bellard | uint32_t size, int type,
|
749 | 69b91039 | bellard | PCIMapIORegionFunc *map_func); |
750 | 69b91039 | bellard | |
751 | 5768f5ac | bellard | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
752 | 5768f5ac | bellard | |
753 | 5768f5ac | bellard | uint32_t pci_default_read_config(PCIDevice *d, |
754 | 5768f5ac | bellard | uint32_t address, int len);
|
755 | 5768f5ac | bellard | void pci_default_write_config(PCIDevice *d,
|
756 | 5768f5ac | bellard | uint32_t address, uint32_t val, int len);
|
757 | 89b6b508 | bellard | void pci_device_save(PCIDevice *s, QEMUFile *f);
|
758 | 89b6b508 | bellard | int pci_device_load(PCIDevice *s, QEMUFile *f);
|
759 | 5768f5ac | bellard | |
760 | d2b59317 | pbrook | typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level); |
761 | d2b59317 | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
762 | d2b59317 | pbrook | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
763 | 80b3ada7 | pbrook | void *pic, int devfn_min, int nirq); |
764 | 502a5395 | pbrook | |
765 | 502a5395 | pbrook | void pci_nic_init(PCIBus *bus, NICInfo *nd);
|
766 | 502a5395 | pbrook | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
767 | 502a5395 | pbrook | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
768 | 502a5395 | pbrook | int pci_bus_num(PCIBus *s);
|
769 | 80b3ada7 | pbrook | void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); |
770 | 9995c51f | bellard | |
771 | 5768f5ac | bellard | void pci_info(void); |
772 | 80b3ada7 | pbrook | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
|
773 | 80b3ada7 | pbrook | pci_map_irq_fn map_irq, const char *name); |
774 | 26aa7d72 | bellard | |
775 | 502a5395 | pbrook | /* prep_pci.c */
|
776 | 46e50e9d | bellard | PCIBus *pci_prep_init(void);
|
777 | 77d4bc34 | bellard | |
778 | 502a5395 | pbrook | /* grackle_pci.c */
|
779 | 502a5395 | pbrook | PCIBus *pci_grackle_init(uint32_t base, void *pic);
|
780 | 502a5395 | pbrook | |
781 | 502a5395 | pbrook | /* unin_pci.c */
|
782 | 502a5395 | pbrook | PCIBus *pci_pmac_init(void *pic);
|
783 | 502a5395 | pbrook | |
784 | 502a5395 | pbrook | /* apb_pci.c */
|
785 | 502a5395 | pbrook | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, |
786 | 502a5395 | pbrook | void *pic);
|
787 | 502a5395 | pbrook | |
788 | e69954b9 | pbrook | PCIBus *pci_vpb_init(void *pic, int irq, int realview); |
789 | 502a5395 | pbrook | |
790 | 502a5395 | pbrook | /* piix_pci.c */
|
791 | f00fc47c | bellard | PCIBus *i440fx_init(PCIDevice **pi440fx_state); |
792 | f00fc47c | bellard | void i440fx_set_smm(PCIDevice *d, int val); |
793 | 502a5395 | pbrook | int piix3_init(PCIBus *bus);
|
794 | f00fc47c | bellard | void i440fx_init_memory_mappings(PCIDevice *d);
|
795 | a41b2ff2 | pbrook | |
796 | 28b9b5af | bellard | /* openpic.c */
|
797 | 28b9b5af | bellard | typedef struct openpic_t openpic_t; |
798 | 54fa5af5 | bellard | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
799 | 7668a27f | bellard | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
800 | 7668a27f | bellard | CPUState **envp); |
801 | 28b9b5af | bellard | |
802 | 54fa5af5 | bellard | /* heathrow_pic.c */
|
803 | 54fa5af5 | bellard | typedef struct HeathrowPICS HeathrowPICS; |
804 | 54fa5af5 | bellard | void heathrow_pic_set_irq(void *opaque, int num, int level); |
805 | 54fa5af5 | bellard | HeathrowPICS *heathrow_pic_init(int *pmem_index);
|
806 | 54fa5af5 | bellard | |
807 | 6a36d84e | bellard | #ifdef HAS_AUDIO
|
808 | 6a36d84e | bellard | struct soundhw {
|
809 | 6a36d84e | bellard | const char *name; |
810 | 6a36d84e | bellard | const char *descr; |
811 | 6a36d84e | bellard | int enabled;
|
812 | 6a36d84e | bellard | int isa;
|
813 | 6a36d84e | bellard | union {
|
814 | 6a36d84e | bellard | int (*init_isa) (AudioState *s);
|
815 | 6a36d84e | bellard | int (*init_pci) (PCIBus *bus, AudioState *s);
|
816 | 6a36d84e | bellard | } init; |
817 | 6a36d84e | bellard | }; |
818 | 6a36d84e | bellard | |
819 | 6a36d84e | bellard | extern struct soundhw soundhw[]; |
820 | 6a36d84e | bellard | #endif
|
821 | 6a36d84e | bellard | |
822 | 313aa567 | bellard | /* vga.c */
|
823 | 313aa567 | bellard | |
824 | 74a14f22 | bellard | #define VGA_RAM_SIZE (8192 * 1024) |
825 | 313aa567 | bellard | |
826 | 82c643ff | bellard | struct DisplayState {
|
827 | 313aa567 | bellard | uint8_t *data; |
828 | 313aa567 | bellard | int linesize;
|
829 | 313aa567 | bellard | int depth;
|
830 | d3079cd2 | bellard | int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
831 | 82c643ff | bellard | int width;
|
832 | 82c643ff | bellard | int height;
|
833 | 24236869 | bellard | void *opaque;
|
834 | 24236869 | bellard | |
835 | 313aa567 | bellard | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
836 | 313aa567 | bellard | void (*dpy_resize)(struct DisplayState *s, int w, int h); |
837 | 313aa567 | bellard | void (*dpy_refresh)(struct DisplayState *s); |
838 | 24236869 | bellard | void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h); |
839 | 82c643ff | bellard | }; |
840 | 313aa567 | bellard | |
841 | 313aa567 | bellard | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
842 | 313aa567 | bellard | { |
843 | 313aa567 | bellard | s->dpy_update(s, x, y, w, h); |
844 | 313aa567 | bellard | } |
845 | 313aa567 | bellard | |
846 | 313aa567 | bellard | static inline void dpy_resize(DisplayState *s, int w, int h) |
847 | 313aa567 | bellard | { |
848 | 313aa567 | bellard | s->dpy_resize(s, w, h); |
849 | 313aa567 | bellard | } |
850 | 313aa567 | bellard | |
851 | 89b6b508 | bellard | int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
852 | 89b6b508 | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
853 | 89b6b508 | bellard | int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
854 | 89b6b508 | bellard | unsigned long vga_ram_offset, int vga_ram_size, |
855 | 89b6b508 | bellard | unsigned long vga_bios_offset, int vga_bios_size); |
856 | 313aa567 | bellard | |
857 | d6bfa22f | bellard | /* cirrus_vga.c */
|
858 | 46e50e9d | bellard | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
859 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
860 | d6bfa22f | bellard | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
861 | d6bfa22f | bellard | unsigned long vga_ram_offset, int vga_ram_size); |
862 | d6bfa22f | bellard | |
863 | 313aa567 | bellard | /* sdl.c */
|
864 | d63d307f | bellard | void sdl_display_init(DisplayState *ds, int full_screen); |
865 | 313aa567 | bellard | |
866 | da4dbf74 | bellard | /* cocoa.m */
|
867 | da4dbf74 | bellard | void cocoa_display_init(DisplayState *ds, int full_screen); |
868 | da4dbf74 | bellard | |
869 | 24236869 | bellard | /* vnc.c */
|
870 | 73fc9742 | ths | void vnc_display_init(DisplayState *ds, const char *display); |
871 | 24236869 | bellard | |
872 | 5391d806 | bellard | /* ide.c */
|
873 | 5391d806 | bellard | #define MAX_DISKS 4 |
874 | 5391d806 | bellard | |
875 | faea38e7 | bellard | extern BlockDriverState *bs_table[MAX_DISKS + 1]; |
876 | 5391d806 | bellard | |
877 | 69b91039 | bellard | void isa_ide_init(int iobase, int iobase2, int irq, |
878 | 69b91039 | bellard | BlockDriverState *hd0, BlockDriverState *hd1); |
879 | 54fa5af5 | bellard | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
880 | 54fa5af5 | bellard | int secondary_ide_enabled);
|
881 | 502a5395 | pbrook | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); |
882 | 28b9b5af | bellard | int pmac_ide_init (BlockDriverState **hd_table,
|
883 | 54fa5af5 | bellard | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
884 | 5391d806 | bellard | |
885 | 2e5d83bb | pbrook | /* cdrom.c */
|
886 | 2e5d83bb | pbrook | int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); |
887 | 2e5d83bb | pbrook | int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); |
888 | 2e5d83bb | pbrook | |
889 | 1d14ffa9 | bellard | /* es1370.c */
|
890 | c0fe3827 | bellard | int es1370_init (PCIBus *bus, AudioState *s);
|
891 | 1d14ffa9 | bellard | |
892 | fb065187 | bellard | /* sb16.c */
|
893 | c0fe3827 | bellard | int SB16_init (AudioState *s);
|
894 | fb065187 | bellard | |
895 | fb065187 | bellard | /* adlib.c */
|
896 | c0fe3827 | bellard | int Adlib_init (AudioState *s);
|
897 | fb065187 | bellard | |
898 | fb065187 | bellard | /* gus.c */
|
899 | c0fe3827 | bellard | int GUS_init (AudioState *s);
|
900 | 27503323 | bellard | |
901 | 27503323 | bellard | /* dma.c */
|
902 | 85571bc7 | bellard | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
903 | 27503323 | bellard | int DMA_get_channel_mode (int nchan); |
904 | 85571bc7 | bellard | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
905 | 85571bc7 | bellard | int DMA_write_memory (int nchan, void *buf, int pos, int size); |
906 | 27503323 | bellard | void DMA_hold_DREQ (int nchan); |
907 | 27503323 | bellard | void DMA_release_DREQ (int nchan); |
908 | 16f62432 | bellard | void DMA_schedule(int nchan); |
909 | 27503323 | bellard | void DMA_run (void); |
910 | 28b9b5af | bellard | void DMA_init (int high_page_enable); |
911 | 27503323 | bellard | void DMA_register_channel (int nchan, |
912 | 85571bc7 | bellard | DMA_transfer_handler transfer_handler, |
913 | 85571bc7 | bellard | void *opaque);
|
914 | 7138fcfb | bellard | /* fdc.c */
|
915 | 7138fcfb | bellard | #define MAX_FD 2 |
916 | 7138fcfb | bellard | extern BlockDriverState *fd_table[MAX_FD];
|
917 | 7138fcfb | bellard | |
918 | baca51fa | bellard | typedef struct fdctrl_t fdctrl_t; |
919 | baca51fa | bellard | |
920 | baca51fa | bellard | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
921 | baca51fa | bellard | uint32_t io_base, |
922 | baca51fa | bellard | BlockDriverState **fds); |
923 | baca51fa | bellard | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
924 | 7138fcfb | bellard | |
925 | 80cabfad | bellard | /* ne2000.c */
|
926 | 80cabfad | bellard | |
927 | 7c9d8e07 | bellard | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
928 | 7c9d8e07 | bellard | void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
|
929 | 80cabfad | bellard | |
930 | a41b2ff2 | pbrook | /* rtl8139.c */
|
931 | a41b2ff2 | pbrook | |
932 | a41b2ff2 | pbrook | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
|
933 | a41b2ff2 | pbrook | |
934 | e3c2613f | bellard | /* pcnet.c */
|
935 | e3c2613f | bellard | |
936 | e3c2613f | bellard | void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
|
937 | 67e999be | bellard | void pcnet_h_reset(void *opaque); |
938 | 67e999be | bellard | void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque); |
939 | 67e999be | bellard | |
940 | e3c2613f | bellard | |
941 | 80cabfad | bellard | /* pckbd.c */
|
942 | 80cabfad | bellard | |
943 | 80cabfad | bellard | void kbd_init(void); |
944 | 80cabfad | bellard | |
945 | 80cabfad | bellard | /* mc146818rtc.c */
|
946 | 80cabfad | bellard | |
947 | 8a7ddc38 | bellard | typedef struct RTCState RTCState; |
948 | 80cabfad | bellard | |
949 | 8a7ddc38 | bellard | RTCState *rtc_init(int base, int irq); |
950 | 8a7ddc38 | bellard | void rtc_set_memory(RTCState *s, int addr, int val); |
951 | 8a7ddc38 | bellard | void rtc_set_date(RTCState *s, const struct tm *tm); |
952 | 80cabfad | bellard | |
953 | 80cabfad | bellard | /* serial.c */
|
954 | 80cabfad | bellard | |
955 | c4b1fcc0 | bellard | typedef struct SerialState SerialState; |
956 | e5d13e2f | bellard | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
|
957 | e5d13e2f | bellard | int base, int irq, CharDriverState *chr); |
958 | e5d13e2f | bellard | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
|
959 | e5d13e2f | bellard | target_ulong base, int it_shift,
|
960 | e5d13e2f | bellard | int irq, CharDriverState *chr);
|
961 | 80cabfad | bellard | |
962 | 6508fe59 | bellard | /* parallel.c */
|
963 | 6508fe59 | bellard | |
964 | 6508fe59 | bellard | typedef struct ParallelState ParallelState; |
965 | 6508fe59 | bellard | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); |
966 | 6508fe59 | bellard | |
967 | 80cabfad | bellard | /* i8259.c */
|
968 | 80cabfad | bellard | |
969 | 3de388f6 | bellard | typedef struct PicState2 PicState2; |
970 | 3de388f6 | bellard | extern PicState2 *isa_pic;
|
971 | 80cabfad | bellard | void pic_set_irq(int irq, int level); |
972 | 54fa5af5 | bellard | void pic_set_irq_new(void *opaque, int irq, int level); |
973 | 3de388f6 | bellard | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
|
974 | d592d303 | bellard | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
975 | d592d303 | bellard | void *alt_irq_opaque);
|
976 | 3de388f6 | bellard | int pic_read_irq(PicState2 *s);
|
977 | 3de388f6 | bellard | void pic_update_irq(PicState2 *s);
|
978 | 3de388f6 | bellard | uint32_t pic_intack_read(PicState2 *s); |
979 | c20709aa | bellard | void pic_info(void); |
980 | 4a0fb71e | bellard | void irq_info(void); |
981 | 80cabfad | bellard | |
982 | c27004ec | bellard | /* APIC */
|
983 | d592d303 | bellard | typedef struct IOAPICState IOAPICState; |
984 | d592d303 | bellard | |
985 | c27004ec | bellard | int apic_init(CPUState *env);
|
986 | c27004ec | bellard | int apic_get_interrupt(CPUState *env);
|
987 | d592d303 | bellard | IOAPICState *ioapic_init(void);
|
988 | d592d303 | bellard | void ioapic_set_irq(void *opaque, int vector, int level); |
989 | c27004ec | bellard | |
990 | 80cabfad | bellard | /* i8254.c */
|
991 | 80cabfad | bellard | |
992 | 80cabfad | bellard | #define PIT_FREQ 1193182 |
993 | 80cabfad | bellard | |
994 | ec844b96 | bellard | typedef struct PITState PITState; |
995 | ec844b96 | bellard | |
996 | ec844b96 | bellard | PITState *pit_init(int base, int irq); |
997 | ec844b96 | bellard | void pit_set_gate(PITState *pit, int channel, int val); |
998 | ec844b96 | bellard | int pit_get_gate(PITState *pit, int channel); |
999 | fd06c375 | bellard | int pit_get_initial_count(PITState *pit, int channel); |
1000 | fd06c375 | bellard | int pit_get_mode(PITState *pit, int channel); |
1001 | ec844b96 | bellard | int pit_get_out(PITState *pit, int channel, int64_t current_time); |
1002 | 80cabfad | bellard | |
1003 | fd06c375 | bellard | /* pcspk.c */
|
1004 | fd06c375 | bellard | void pcspk_init(PITState *);
|
1005 | fd06c375 | bellard | int pcspk_audio_init(AudioState *);
|
1006 | fd06c375 | bellard | |
1007 | 6515b203 | bellard | /* acpi.c */
|
1008 | 6515b203 | bellard | extern int acpi_enabled; |
1009 | 502a5395 | pbrook | void piix4_pm_init(PCIBus *bus, int devfn); |
1010 | 6515b203 | bellard | void acpi_bios_init(void); |
1011 | 6515b203 | bellard | |
1012 | 80cabfad | bellard | /* pc.c */
|
1013 | 54fa5af5 | bellard | extern QEMUMachine pc_machine;
|
1014 | 3dbbdc25 | bellard | extern QEMUMachine isapc_machine;
|
1015 | 52ca8d6a | bellard | extern int fd_bootchk; |
1016 | 80cabfad | bellard | |
1017 | 6a00d601 | bellard | void ioport_set_a20(int enable); |
1018 | 6a00d601 | bellard | int ioport_get_a20(void); |
1019 | 6a00d601 | bellard | |
1020 | 26aa7d72 | bellard | /* ppc.c */
|
1021 | 54fa5af5 | bellard | extern QEMUMachine prep_machine;
|
1022 | 54fa5af5 | bellard | extern QEMUMachine core99_machine;
|
1023 | 54fa5af5 | bellard | extern QEMUMachine heathrow_machine;
|
1024 | 54fa5af5 | bellard | |
1025 | 6af0bf9c | bellard | /* mips_r4k.c */
|
1026 | 6af0bf9c | bellard | extern QEMUMachine mips_machine;
|
1027 | 6af0bf9c | bellard | |
1028 | e16fe40c | ths | /* mips_timer.c */
|
1029 | e16fe40c | ths | extern void cpu_mips_clock_init(CPUState *); |
1030 | e16fe40c | ths | extern void cpu_mips_irqctrl_init (void); |
1031 | e16fe40c | ths | |
1032 | 27c7ca7e | bellard | /* shix.c */
|
1033 | 27c7ca7e | bellard | extern QEMUMachine shix_machine;
|
1034 | 27c7ca7e | bellard | |
1035 | 8cc43fef | bellard | #ifdef TARGET_PPC
|
1036 | 8cc43fef | bellard | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
1037 | 8cc43fef | bellard | #endif
|
1038 | 64201201 | bellard | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
1039 | 77d4bc34 | bellard | |
1040 | 77d4bc34 | bellard | extern CPUWriteMemoryFunc *PPC_io_write[];
|
1041 | 77d4bc34 | bellard | extern CPUReadMemoryFunc *PPC_io_read[];
|
1042 | 54fa5af5 | bellard | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
1043 | 26aa7d72 | bellard | |
1044 | e95c8d51 | bellard | /* sun4m.c */
|
1045 | 54fa5af5 | bellard | extern QEMUMachine sun4m_machine;
|
1046 | ba3c64fb | bellard | void pic_set_irq_cpu(int irq, int level, unsigned int cpu); |
1047 | e95c8d51 | bellard | |
1048 | e95c8d51 | bellard | /* iommu.c */
|
1049 | e80cfcfc | bellard | void *iommu_init(uint32_t addr);
|
1050 | 67e999be | bellard | void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, |
1051 | a917d384 | pbrook | uint8_t *buf, int len, int is_write); |
1052 | 67e999be | bellard | static inline void sparc_iommu_memory_read(void *opaque, |
1053 | 67e999be | bellard | target_phys_addr_t addr, |
1054 | 67e999be | bellard | uint8_t *buf, int len)
|
1055 | 67e999be | bellard | { |
1056 | 67e999be | bellard | sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
|
1057 | 67e999be | bellard | } |
1058 | e95c8d51 | bellard | |
1059 | 67e999be | bellard | static inline void sparc_iommu_memory_write(void *opaque, |
1060 | 67e999be | bellard | target_phys_addr_t addr, |
1061 | 67e999be | bellard | uint8_t *buf, int len)
|
1062 | 67e999be | bellard | { |
1063 | 67e999be | bellard | sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
|
1064 | 67e999be | bellard | } |
1065 | e95c8d51 | bellard | |
1066 | e95c8d51 | bellard | /* tcx.c */
|
1067 | 95219897 | pbrook | void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
1068 | 6f7e9aec | bellard | unsigned long vram_offset, int vram_size, int width, int height); |
1069 | e80cfcfc | bellard | |
1070 | e80cfcfc | bellard | /* slavio_intctl.c */
|
1071 | e80cfcfc | bellard | void *slavio_intctl_init();
|
1072 | ba3c64fb | bellard | void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
1073 | e80cfcfc | bellard | void slavio_pic_info(void *opaque); |
1074 | e80cfcfc | bellard | void slavio_irq_info(void *opaque); |
1075 | e80cfcfc | bellard | void slavio_pic_set_irq(void *opaque, int irq, int level); |
1076 | ba3c64fb | bellard | void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
1077 | e95c8d51 | bellard | |
1078 | 5fe141fd | bellard | /* loader.c */
|
1079 | 5fe141fd | bellard | int get_image_size(const char *filename); |
1080 | 5fe141fd | bellard | int load_image(const char *filename, uint8_t *addr); |
1081 | 9ee3c029 | bellard | int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry); |
1082 | e80cfcfc | bellard | int load_aout(const char *filename, uint8_t *addr); |
1083 | e80cfcfc | bellard | |
1084 | e80cfcfc | bellard | /* slavio_timer.c */
|
1085 | ba3c64fb | bellard | void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); |
1086 | 8d5f07fa | bellard | |
1087 | e80cfcfc | bellard | /* slavio_serial.c */
|
1088 | e80cfcfc | bellard | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); |
1089 | e80cfcfc | bellard | void slavio_serial_ms_kbd_init(int base, int irq); |
1090 | e95c8d51 | bellard | |
1091 | 3475187d | bellard | /* slavio_misc.c */
|
1092 | 3475187d | bellard | void *slavio_misc_init(uint32_t base, int irq); |
1093 | 3475187d | bellard | void slavio_set_power_fail(void *opaque, int power_failing); |
1094 | 3475187d | bellard | |
1095 | 6f7e9aec | bellard | /* esp.c */
|
1096 | 67e999be | bellard | void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque); |
1097 | 67e999be | bellard | void esp_reset(void *opaque); |
1098 | 67e999be | bellard | |
1099 | 67e999be | bellard | /* sparc32_dma.c */
|
1100 | 67e999be | bellard | void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu, |
1101 | 67e999be | bellard | void *intctl);
|
1102 | 67e999be | bellard | void ledma_set_irq(void *opaque, int isr); |
1103 | 9b94dc32 | bellard | void ledma_memory_read(void *opaque, target_phys_addr_t addr, |
1104 | 9b94dc32 | bellard | uint8_t *buf, int len, int do_bswap); |
1105 | 9b94dc32 | bellard | void ledma_memory_write(void *opaque, target_phys_addr_t addr, |
1106 | 9b94dc32 | bellard | uint8_t *buf, int len, int do_bswap); |
1107 | 67e999be | bellard | void espdma_raise_irq(void *opaque); |
1108 | 67e999be | bellard | void espdma_clear_irq(void *opaque); |
1109 | 67e999be | bellard | void espdma_memory_read(void *opaque, uint8_t *buf, int len); |
1110 | 67e999be | bellard | void espdma_memory_write(void *opaque, uint8_t *buf, int len); |
1111 | 67e999be | bellard | void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque, |
1112 | 67e999be | bellard | void *lance_opaque);
|
1113 | 6f7e9aec | bellard | |
1114 | b8174937 | bellard | /* cs4231.c */
|
1115 | b8174937 | bellard | void cs_init(target_phys_addr_t base, int irq, void *intctl); |
1116 | b8174937 | bellard | |
1117 | 3475187d | bellard | /* sun4u.c */
|
1118 | 3475187d | bellard | extern QEMUMachine sun4u_machine;
|
1119 | 3475187d | bellard | |
1120 | 64201201 | bellard | /* NVRAM helpers */
|
1121 | 64201201 | bellard | #include "hw/m48t59.h" |
1122 | 64201201 | bellard | |
1123 | 64201201 | bellard | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
1124 | 64201201 | bellard | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
1125 | 64201201 | bellard | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
1126 | 64201201 | bellard | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
1127 | 64201201 | bellard | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
1128 | 64201201 | bellard | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
1129 | 64201201 | bellard | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
1130 | 64201201 | bellard | const unsigned char *str, uint32_t max); |
1131 | 64201201 | bellard | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
1132 | 64201201 | bellard | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
1133 | 64201201 | bellard | uint32_t start, uint32_t count); |
1134 | 64201201 | bellard | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
1135 | 64201201 | bellard | const unsigned char *arch, |
1136 | 64201201 | bellard | uint32_t RAM_size, int boot_device,
|
1137 | 64201201 | bellard | uint32_t kernel_image, uint32_t kernel_size, |
1138 | 28b9b5af | bellard | const char *cmdline, |
1139 | 64201201 | bellard | uint32_t initrd_image, uint32_t initrd_size, |
1140 | 28b9b5af | bellard | uint32_t NVRAM_image, |
1141 | 28b9b5af | bellard | int width, int height, int depth); |
1142 | 64201201 | bellard | |
1143 | 63066f4f | bellard | /* adb.c */
|
1144 | 63066f4f | bellard | |
1145 | 63066f4f | bellard | #define MAX_ADB_DEVICES 16 |
1146 | 63066f4f | bellard | |
1147 | e2733d20 | bellard | #define ADB_MAX_OUT_LEN 16 |
1148 | 63066f4f | bellard | |
1149 | e2733d20 | bellard | typedef struct ADBDevice ADBDevice; |
1150 | 63066f4f | bellard | |
1151 | e2733d20 | bellard | /* buf = NULL means polling */
|
1152 | e2733d20 | bellard | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
1153 | e2733d20 | bellard | const uint8_t *buf, int len); |
1154 | 12c28fed | bellard | typedef int ADBDeviceReset(ADBDevice *d); |
1155 | 12c28fed | bellard | |
1156 | 63066f4f | bellard | struct ADBDevice {
|
1157 | 63066f4f | bellard | struct ADBBusState *bus;
|
1158 | 63066f4f | bellard | int devaddr;
|
1159 | 63066f4f | bellard | int handler;
|
1160 | e2733d20 | bellard | ADBDeviceRequest *devreq; |
1161 | 12c28fed | bellard | ADBDeviceReset *devreset; |
1162 | 63066f4f | bellard | void *opaque;
|
1163 | 63066f4f | bellard | }; |
1164 | 63066f4f | bellard | |
1165 | 63066f4f | bellard | typedef struct ADBBusState { |
1166 | 63066f4f | bellard | ADBDevice devices[MAX_ADB_DEVICES]; |
1167 | 63066f4f | bellard | int nb_devices;
|
1168 | e2733d20 | bellard | int poll_index;
|
1169 | 63066f4f | bellard | } ADBBusState; |
1170 | 63066f4f | bellard | |
1171 | e2733d20 | bellard | int adb_request(ADBBusState *s, uint8_t *buf_out,
|
1172 | e2733d20 | bellard | const uint8_t *buf, int len); |
1173 | e2733d20 | bellard | int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
1174 | 63066f4f | bellard | |
1175 | 63066f4f | bellard | ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
1176 | e2733d20 | bellard | ADBDeviceRequest *devreq, |
1177 | 12c28fed | bellard | ADBDeviceReset *devreset, |
1178 | 63066f4f | bellard | void *opaque);
|
1179 | 63066f4f | bellard | void adb_kbd_init(ADBBusState *bus);
|
1180 | 63066f4f | bellard | void adb_mouse_init(ADBBusState *bus);
|
1181 | 63066f4f | bellard | |
1182 | 63066f4f | bellard | /* cuda.c */
|
1183 | 63066f4f | bellard | |
1184 | 63066f4f | bellard | extern ADBBusState adb_bus;
|
1185 | 54fa5af5 | bellard | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
1186 | 63066f4f | bellard | |
1187 | bb36d470 | bellard | #include "hw/usb.h" |
1188 | bb36d470 | bellard | |
1189 | a594cfbf | bellard | /* usb ports of the VM */
|
1190 | a594cfbf | bellard | |
1191 | 0d92ed30 | pbrook | void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1192 | 0d92ed30 | pbrook | usb_attachfn attach); |
1193 | a594cfbf | bellard | |
1194 | 0d92ed30 | pbrook | #define VM_USB_HUB_SIZE 8 |
1195 | a594cfbf | bellard | |
1196 | a594cfbf | bellard | void do_usb_add(const char *devname); |
1197 | a594cfbf | bellard | void do_usb_del(const char *devname); |
1198 | a594cfbf | bellard | void usb_info(void); |
1199 | a594cfbf | bellard | |
1200 | 2e5d83bb | pbrook | /* scsi-disk.c */
|
1201 | 4d611c9a | pbrook | enum scsi_reason {
|
1202 | 4d611c9a | pbrook | SCSI_REASON_DONE, /* Command complete. */
|
1203 | 4d611c9a | pbrook | SCSI_REASON_DATA /* Transfer complete, more data required. */
|
1204 | 4d611c9a | pbrook | }; |
1205 | 4d611c9a | pbrook | |
1206 | 2e5d83bb | pbrook | typedef struct SCSIDevice SCSIDevice; |
1207 | a917d384 | pbrook | typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag, |
1208 | a917d384 | pbrook | uint32_t arg); |
1209 | 2e5d83bb | pbrook | |
1210 | 2e5d83bb | pbrook | SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, |
1211 | a917d384 | pbrook | int tcq,
|
1212 | 2e5d83bb | pbrook | scsi_completionfn completion, |
1213 | 2e5d83bb | pbrook | void *opaque);
|
1214 | 2e5d83bb | pbrook | void scsi_disk_destroy(SCSIDevice *s);
|
1215 | 2e5d83bb | pbrook | |
1216 | 0fc5c15a | pbrook | int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
|
1217 | 4d611c9a | pbrook | /* SCSI data transfers are asynchrnonous. However, unlike the block IO
|
1218 | 4d611c9a | pbrook | layer the completion routine may be called directly by
|
1219 | 4d611c9a | pbrook | scsi_{read,write}_data. */
|
1220 | a917d384 | pbrook | void scsi_read_data(SCSIDevice *s, uint32_t tag);
|
1221 | a917d384 | pbrook | int scsi_write_data(SCSIDevice *s, uint32_t tag);
|
1222 | a917d384 | pbrook | void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
|
1223 | a917d384 | pbrook | uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag); |
1224 | 2e5d83bb | pbrook | |
1225 | 42550fde | ths | enum scsi_host_adapters {
|
1226 | 42550fde | ths | SCSI_LSI_53C895A |
1227 | 42550fde | ths | }; |
1228 | 42550fde | ths | enum scsi_devices {
|
1229 | 42550fde | ths | SCSI_CDROM, |
1230 | 42550fde | ths | SCSI_DISK, |
1231 | 42550fde | ths | SCSI_NONE |
1232 | 42550fde | ths | }; |
1233 | 42550fde | ths | typedef enum scsi_host_adapters scsi_host_adapters; |
1234 | 42550fde | ths | typedef enum scsi_devices scsi_devices; |
1235 | 42550fde | ths | typedef struct SCSIDiskInfo { |
1236 | 42550fde | ths | scsi_host_adapters adapter; |
1237 | 42550fde | ths | int id;
|
1238 | 42550fde | ths | scsi_devices device_type; |
1239 | 42550fde | ths | } SCSIDiskInfo; |
1240 | 42550fde | ths | |
1241 | 42550fde | ths | #define MAX_SCSI_DISKS 7 |
1242 | 42550fde | ths | extern BlockDriverState *bs_scsi_table[MAX_SCSI_DISKS];
|
1243 | 42550fde | ths | extern SCSIDiskInfo scsi_disks_info[MAX_SCSI_DISKS];
|
1244 | 42550fde | ths | |
1245 | 7d8406be | pbrook | /* lsi53c895a.c */
|
1246 | 7d8406be | pbrook | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
1247 | 7d8406be | pbrook | void *lsi_scsi_init(PCIBus *bus, int devfn); |
1248 | 42550fde | ths | extern int scsi_hba_lsi; // Count of scsi disks/cdrom using this lsi adapter |
1249 | 7d8406be | pbrook | |
1250 | b5ff1b31 | bellard | /* integratorcp.c */
|
1251 | 40f137e1 | pbrook | extern QEMUMachine integratorcp926_machine;
|
1252 | 40f137e1 | pbrook | extern QEMUMachine integratorcp1026_machine;
|
1253 | b5ff1b31 | bellard | |
1254 | cdbdb648 | pbrook | /* versatilepb.c */
|
1255 | cdbdb648 | pbrook | extern QEMUMachine versatilepb_machine;
|
1256 | 16406950 | pbrook | extern QEMUMachine versatileab_machine;
|
1257 | cdbdb648 | pbrook | |
1258 | e69954b9 | pbrook | /* realview.c */
|
1259 | e69954b9 | pbrook | extern QEMUMachine realview_machine;
|
1260 | e69954b9 | pbrook | |
1261 | daa57963 | bellard | /* ps2.c */
|
1262 | daa57963 | bellard | void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); |
1263 | daa57963 | bellard | void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); |
1264 | daa57963 | bellard | void ps2_write_mouse(void *, int val); |
1265 | daa57963 | bellard | void ps2_write_keyboard(void *, int val); |
1266 | daa57963 | bellard | uint32_t ps2_read_data(void *);
|
1267 | daa57963 | bellard | void ps2_queue(void *, int b); |
1268 | f94f5d71 | pbrook | void ps2_keyboard_set_translation(void *opaque, int mode); |
1269 | daa57963 | bellard | |
1270 | 80337b66 | bellard | /* smc91c111.c */
|
1271 | 80337b66 | bellard | void smc91c111_init(NICInfo *, uint32_t, void *, int); |
1272 | 80337b66 | bellard | |
1273 | bdd5003a | pbrook | /* pl110.c */
|
1274 | 95219897 | pbrook | void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); |
1275 | bdd5003a | pbrook | |
1276 | cdbdb648 | pbrook | /* pl011.c */
|
1277 | cdbdb648 | pbrook | void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); |
1278 | cdbdb648 | pbrook | |
1279 | cdbdb648 | pbrook | /* pl050.c */
|
1280 | cdbdb648 | pbrook | void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); |
1281 | cdbdb648 | pbrook | |
1282 | cdbdb648 | pbrook | /* pl080.c */
|
1283 | e69954b9 | pbrook | void *pl080_init(uint32_t base, void *pic, int irq, int nchannels); |
1284 | cdbdb648 | pbrook | |
1285 | cdbdb648 | pbrook | /* pl190.c */
|
1286 | cdbdb648 | pbrook | void *pl190_init(uint32_t base, void *parent, int irq, int fiq); |
1287 | cdbdb648 | pbrook | |
1288 | cdbdb648 | pbrook | /* arm-timer.c */
|
1289 | cdbdb648 | pbrook | void sp804_init(uint32_t base, void *pic, int irq); |
1290 | cdbdb648 | pbrook | void icp_pit_init(uint32_t base, void *pic, int irq); |
1291 | cdbdb648 | pbrook | |
1292 | e69954b9 | pbrook | /* arm_sysctl.c */
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1293 | e69954b9 | pbrook | void arm_sysctl_init(uint32_t base, uint32_t sys_id);
|
1294 | e69954b9 | pbrook | |
1295 | e69954b9 | pbrook | /* arm_gic.c */
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1296 | e69954b9 | pbrook | void *arm_gic_init(uint32_t base, void *parent, int parent_irq); |
1297 | e69954b9 | pbrook | |
1298 | 16406950 | pbrook | /* arm_boot.c */
|
1299 | 16406950 | pbrook | |
1300 | 16406950 | pbrook | void arm_load_kernel(int ram_size, const char *kernel_filename, |
1301 | 16406950 | pbrook | const char *kernel_cmdline, const char *initrd_filename, |
1302 | 16406950 | pbrook | int board_id);
|
1303 | 16406950 | pbrook | |
1304 | 27c7ca7e | bellard | /* sh7750.c */
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1305 | 27c7ca7e | bellard | struct SH7750State;
|
1306 | 27c7ca7e | bellard | |
1307 | 008a8818 | pbrook | struct SH7750State *sh7750_init(CPUState * cpu);
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1308 | 27c7ca7e | bellard | |
1309 | 27c7ca7e | bellard | typedef struct { |
1310 | 27c7ca7e | bellard | /* The callback will be triggered if any of the designated lines change */
|
1311 | 27c7ca7e | bellard | uint16_t portamask_trigger; |
1312 | 27c7ca7e | bellard | uint16_t portbmask_trigger; |
1313 | 27c7ca7e | bellard | /* Return 0 if no action was taken */
|
1314 | 27c7ca7e | bellard | int (*port_change_cb) (uint16_t porta, uint16_t portb,
|
1315 | 27c7ca7e | bellard | uint16_t * periph_pdtra, |
1316 | 27c7ca7e | bellard | uint16_t * periph_portdira, |
1317 | 27c7ca7e | bellard | uint16_t * periph_pdtrb, |
1318 | 27c7ca7e | bellard | uint16_t * periph_portdirb); |
1319 | 27c7ca7e | bellard | } sh7750_io_device; |
1320 | 27c7ca7e | bellard | |
1321 | 27c7ca7e | bellard | int sh7750_register_io_device(struct SH7750State *s, |
1322 | 27c7ca7e | bellard | sh7750_io_device * device); |
1323 | 27c7ca7e | bellard | /* tc58128.c */
|
1324 | 27c7ca7e | bellard | int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); |
1325 | 27c7ca7e | bellard | |
1326 | 29133e9a | bellard | /* NOR flash devices */
|
1327 | 29133e9a | bellard | typedef struct pflash_t pflash_t; |
1328 | 29133e9a | bellard | |
1329 | 29133e9a | bellard | pflash_t *pflash_register (target_ulong base, ram_addr_t off, |
1330 | 29133e9a | bellard | BlockDriverState *bs, |
1331 | 29133e9a | bellard | target_ulong sector_len, int nb_blocs, int width, |
1332 | 29133e9a | bellard | uint16_t id0, uint16_t id1, |
1333 | 29133e9a | bellard | uint16_t id2, uint16_t id3); |
1334 | 29133e9a | bellard | |
1335 | ea2384d3 | bellard | #endif /* defined(QEMU_TOOL) */ |
1336 | ea2384d3 | bellard | |
1337 | c4b1fcc0 | bellard | /* monitor.c */
|
1338 | 82c643ff | bellard | void monitor_init(CharDriverState *hd, int show_banner); |
1339 | ea2384d3 | bellard | void term_puts(const char *str); |
1340 | ea2384d3 | bellard | void term_vprintf(const char *fmt, va_list ap); |
1341 | 40c3bac3 | bellard | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
1342 | fef30743 | ths | void term_print_filename(const char *filename); |
1343 | c4b1fcc0 | bellard | void term_flush(void); |
1344 | c4b1fcc0 | bellard | void term_print_help(void); |
1345 | ea2384d3 | bellard | void monitor_readline(const char *prompt, int is_password, |
1346 | ea2384d3 | bellard | char *buf, int buf_size); |
1347 | ea2384d3 | bellard | |
1348 | ea2384d3 | bellard | /* readline.c */
|
1349 | ea2384d3 | bellard | typedef void ReadLineFunc(void *opaque, const char *str); |
1350 | ea2384d3 | bellard | |
1351 | ea2384d3 | bellard | extern int completion_index; |
1352 | ea2384d3 | bellard | void add_completion(const char *str); |
1353 | ea2384d3 | bellard | void readline_handle_byte(int ch); |
1354 | ea2384d3 | bellard | void readline_find_completion(const char *cmdline); |
1355 | ea2384d3 | bellard | const char *readline_get_history(unsigned int index); |
1356 | ea2384d3 | bellard | void readline_start(const char *prompt, int is_password, |
1357 | ea2384d3 | bellard | ReadLineFunc *readline_func, void *opaque);
|
1358 | c4b1fcc0 | bellard | |
1359 | 5e6ad6f9 | bellard | void kqemu_record_dump(void); |
1360 | 5e6ad6f9 | bellard | |
1361 | fc01f7e7 | bellard | #endif /* VL_H */ |