root / target-ppc / translate_init.c @ 426613db
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1 | 3fc6c082 | bellard | /*
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2 | 3fc6c082 | bellard | * PowerPC CPU initialization for qemu.
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3 | 3fc6c082 | bellard | *
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4 | 76a66253 | j_mayer | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | 3fc6c082 | bellard | *
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6 | 3fc6c082 | bellard | * This library is free software; you can redistribute it and/or
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7 | 3fc6c082 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 3fc6c082 | bellard | * License as published by the Free Software Foundation; either
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9 | 3fc6c082 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 3fc6c082 | bellard | *
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11 | 3fc6c082 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 3fc6c082 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 3fc6c082 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 3fc6c082 | bellard | * Lesser General Public License for more details.
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15 | 3fc6c082 | bellard | *
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16 | 3fc6c082 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 3fc6c082 | bellard | * License along with this library; if not, write to the Free Software
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18 | 3fc6c082 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 3fc6c082 | bellard | */
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20 | 3fc6c082 | bellard | |
21 | 3fc6c082 | bellard | /* A lot of PowerPC definition have been included here.
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22 | 3fc6c082 | bellard | * Most of them are not usable for now but have been kept
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23 | 3fc6c082 | bellard | * inside "#if defined(TODO) ... #endif" statements to make tests easier.
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24 | 3fc6c082 | bellard | */
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25 | 3fc6c082 | bellard | |
26 | 3fc6c082 | bellard | //#define PPC_DUMP_CPU
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27 | 3fc6c082 | bellard | //#define PPC_DEBUG_SPR
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28 | 3fc6c082 | bellard | |
29 | 3fc6c082 | bellard | struct ppc_def_t {
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30 | 3fc6c082 | bellard | const unsigned char *name; |
31 | 3fc6c082 | bellard | uint32_t pvr; |
32 | 3fc6c082 | bellard | uint32_t pvr_mask; |
33 | 0487d6a8 | j_mayer | uint64_t insns_flags; |
34 | 3fc6c082 | bellard | uint32_t flags; |
35 | 3fc6c082 | bellard | uint64_t msr_mask; |
36 | 3fc6c082 | bellard | }; |
37 | 3fc6c082 | bellard | |
38 | 3fc6c082 | bellard | /* Generic callbacks:
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39 | 3fc6c082 | bellard | * do nothing but store/retrieve spr value
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40 | 3fc6c082 | bellard | */
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41 | 3fc6c082 | bellard | static void spr_read_generic (void *opaque, int sprn) |
42 | 3fc6c082 | bellard | { |
43 | 3fc6c082 | bellard | gen_op_load_spr(sprn); |
44 | 3fc6c082 | bellard | } |
45 | 3fc6c082 | bellard | |
46 | 3fc6c082 | bellard | static void spr_write_generic (void *opaque, int sprn) |
47 | 3fc6c082 | bellard | { |
48 | 3fc6c082 | bellard | gen_op_store_spr(sprn); |
49 | 3fc6c082 | bellard | } |
50 | 3fc6c082 | bellard | |
51 | 76a66253 | j_mayer | /* SPR common to all PowerPC */
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52 | 3fc6c082 | bellard | /* XER */
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53 | 3fc6c082 | bellard | static void spr_read_xer (void *opaque, int sprn) |
54 | 3fc6c082 | bellard | { |
55 | 3fc6c082 | bellard | gen_op_load_xer(); |
56 | 3fc6c082 | bellard | } |
57 | 3fc6c082 | bellard | |
58 | 3fc6c082 | bellard | static void spr_write_xer (void *opaque, int sprn) |
59 | 3fc6c082 | bellard | { |
60 | 3fc6c082 | bellard | gen_op_store_xer(); |
61 | 3fc6c082 | bellard | } |
62 | 3fc6c082 | bellard | |
63 | 3fc6c082 | bellard | /* LR */
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64 | 3fc6c082 | bellard | static void spr_read_lr (void *opaque, int sprn) |
65 | 3fc6c082 | bellard | { |
66 | 3fc6c082 | bellard | gen_op_load_lr(); |
67 | 3fc6c082 | bellard | } |
68 | 3fc6c082 | bellard | |
69 | 3fc6c082 | bellard | static void spr_write_lr (void *opaque, int sprn) |
70 | 3fc6c082 | bellard | { |
71 | 3fc6c082 | bellard | gen_op_store_lr(); |
72 | 3fc6c082 | bellard | } |
73 | 3fc6c082 | bellard | |
74 | 3fc6c082 | bellard | /* CTR */
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75 | 3fc6c082 | bellard | static void spr_read_ctr (void *opaque, int sprn) |
76 | 3fc6c082 | bellard | { |
77 | 3fc6c082 | bellard | gen_op_load_ctr(); |
78 | 3fc6c082 | bellard | } |
79 | 3fc6c082 | bellard | |
80 | 3fc6c082 | bellard | static void spr_write_ctr (void *opaque, int sprn) |
81 | 3fc6c082 | bellard | { |
82 | 3fc6c082 | bellard | gen_op_store_ctr(); |
83 | 3fc6c082 | bellard | } |
84 | 3fc6c082 | bellard | |
85 | 3fc6c082 | bellard | /* User read access to SPR */
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86 | 3fc6c082 | bellard | /* USPRx */
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87 | 3fc6c082 | bellard | /* UMMCRx */
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88 | 3fc6c082 | bellard | /* UPMCx */
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89 | 3fc6c082 | bellard | /* USIA */
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90 | 3fc6c082 | bellard | /* UDECR */
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91 | 3fc6c082 | bellard | static void spr_read_ureg (void *opaque, int sprn) |
92 | 3fc6c082 | bellard | { |
93 | 3fc6c082 | bellard | gen_op_load_spr(sprn + 0x10);
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94 | 3fc6c082 | bellard | } |
95 | 3fc6c082 | bellard | |
96 | 76a66253 | j_mayer | /* SPR common to all non-embedded PowerPC */
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97 | 3fc6c082 | bellard | /* DECR */
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98 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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99 | 3fc6c082 | bellard | static void spr_read_decr (void *opaque, int sprn) |
100 | 3fc6c082 | bellard | { |
101 | 3fc6c082 | bellard | gen_op_load_decr(); |
102 | 3fc6c082 | bellard | } |
103 | 3fc6c082 | bellard | |
104 | 3fc6c082 | bellard | static void spr_write_decr (void *opaque, int sprn) |
105 | 3fc6c082 | bellard | { |
106 | 3fc6c082 | bellard | gen_op_store_decr(); |
107 | 3fc6c082 | bellard | } |
108 | 76a66253 | j_mayer | #endif
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109 | 3fc6c082 | bellard | |
110 | 76a66253 | j_mayer | /* SPR common to all non-embedded PowerPC, except 601 */
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111 | 3fc6c082 | bellard | /* Time base */
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112 | 3fc6c082 | bellard | static void spr_read_tbl (void *opaque, int sprn) |
113 | 3fc6c082 | bellard | { |
114 | 3fc6c082 | bellard | gen_op_load_tbl(); |
115 | 3fc6c082 | bellard | } |
116 | 3fc6c082 | bellard | |
117 | 76a66253 | j_mayer | static void spr_read_tbu (void *opaque, int sprn) |
118 | 3fc6c082 | bellard | { |
119 | 76a66253 | j_mayer | gen_op_load_tbu(); |
120 | 3fc6c082 | bellard | } |
121 | 3fc6c082 | bellard | |
122 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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123 | 76a66253 | j_mayer | static void spr_write_tbl (void *opaque, int sprn) |
124 | 3fc6c082 | bellard | { |
125 | 76a66253 | j_mayer | gen_op_store_tbl(); |
126 | 3fc6c082 | bellard | } |
127 | 3fc6c082 | bellard | |
128 | 3fc6c082 | bellard | static void spr_write_tbu (void *opaque, int sprn) |
129 | 3fc6c082 | bellard | { |
130 | 3fc6c082 | bellard | gen_op_store_tbu(); |
131 | 3fc6c082 | bellard | } |
132 | 76a66253 | j_mayer | #endif
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133 | 3fc6c082 | bellard | |
134 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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135 | 3fc6c082 | bellard | /* IBAT0U...IBAT0U */
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136 | 3fc6c082 | bellard | /* IBAT0L...IBAT7L */
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137 | 3fc6c082 | bellard | static void spr_read_ibat (void *opaque, int sprn) |
138 | 3fc6c082 | bellard | { |
139 | 3fc6c082 | bellard | gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT0U) / 2); |
140 | 3fc6c082 | bellard | } |
141 | 3fc6c082 | bellard | |
142 | 3fc6c082 | bellard | static void spr_read_ibat_h (void *opaque, int sprn) |
143 | 3fc6c082 | bellard | { |
144 | 3fc6c082 | bellard | gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT4U) / 2); |
145 | 3fc6c082 | bellard | } |
146 | 3fc6c082 | bellard | |
147 | 3fc6c082 | bellard | static void spr_write_ibatu (void *opaque, int sprn) |
148 | 3fc6c082 | bellard | { |
149 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
150 | 3fc6c082 | bellard | |
151 | 3fc6c082 | bellard | gen_op_store_ibatu((sprn - SPR_IBAT0U) / 2);
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152 | 3fc6c082 | bellard | RET_STOP(ctx); |
153 | 3fc6c082 | bellard | } |
154 | 3fc6c082 | bellard | |
155 | 3fc6c082 | bellard | static void spr_write_ibatu_h (void *opaque, int sprn) |
156 | 3fc6c082 | bellard | { |
157 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
158 | 3fc6c082 | bellard | |
159 | 3fc6c082 | bellard | gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);
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160 | 3fc6c082 | bellard | RET_STOP(ctx); |
161 | 3fc6c082 | bellard | } |
162 | 3fc6c082 | bellard | |
163 | 3fc6c082 | bellard | static void spr_write_ibatl (void *opaque, int sprn) |
164 | 3fc6c082 | bellard | { |
165 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
166 | 3fc6c082 | bellard | |
167 | 3fc6c082 | bellard | gen_op_store_ibatl((sprn - SPR_IBAT0L) / 2);
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168 | 3fc6c082 | bellard | RET_STOP(ctx); |
169 | 3fc6c082 | bellard | } |
170 | 3fc6c082 | bellard | |
171 | 3fc6c082 | bellard | static void spr_write_ibatl_h (void *opaque, int sprn) |
172 | 3fc6c082 | bellard | { |
173 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
174 | 3fc6c082 | bellard | |
175 | 3fc6c082 | bellard | gen_op_store_ibatl((sprn - SPR_IBAT4L) / 2);
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176 | 3fc6c082 | bellard | RET_STOP(ctx); |
177 | 3fc6c082 | bellard | } |
178 | 3fc6c082 | bellard | |
179 | 3fc6c082 | bellard | /* DBAT0U...DBAT7U */
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180 | 3fc6c082 | bellard | /* DBAT0L...DBAT7L */
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181 | 3fc6c082 | bellard | static void spr_read_dbat (void *opaque, int sprn) |
182 | 3fc6c082 | bellard | { |
183 | 3fc6c082 | bellard | gen_op_load_dbat(sprn & 1, (sprn - SPR_DBAT0U) / 2); |
184 | 3fc6c082 | bellard | } |
185 | 3fc6c082 | bellard | |
186 | 3fc6c082 | bellard | static void spr_read_dbat_h (void *opaque, int sprn) |
187 | 3fc6c082 | bellard | { |
188 | 3fc6c082 | bellard | gen_op_load_dbat(sprn & 1, (sprn - SPR_DBAT4U) / 2); |
189 | 3fc6c082 | bellard | } |
190 | 3fc6c082 | bellard | |
191 | 3fc6c082 | bellard | static void spr_write_dbatu (void *opaque, int sprn) |
192 | 3fc6c082 | bellard | { |
193 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
194 | 3fc6c082 | bellard | |
195 | 3fc6c082 | bellard | gen_op_store_dbatu((sprn - SPR_DBAT0U) / 2);
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196 | 3fc6c082 | bellard | RET_STOP(ctx); |
197 | 3fc6c082 | bellard | } |
198 | 3fc6c082 | bellard | |
199 | 3fc6c082 | bellard | static void spr_write_dbatu_h (void *opaque, int sprn) |
200 | 3fc6c082 | bellard | { |
201 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
202 | 3fc6c082 | bellard | |
203 | 3fc6c082 | bellard | gen_op_store_dbatu((sprn - SPR_DBAT4U) / 2);
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204 | 3fc6c082 | bellard | RET_STOP(ctx); |
205 | 3fc6c082 | bellard | } |
206 | 3fc6c082 | bellard | |
207 | 3fc6c082 | bellard | static void spr_write_dbatl (void *opaque, int sprn) |
208 | 3fc6c082 | bellard | { |
209 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
210 | 3fc6c082 | bellard | |
211 | 3fc6c082 | bellard | gen_op_store_dbatl((sprn - SPR_DBAT0L) / 2);
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212 | 3fc6c082 | bellard | RET_STOP(ctx); |
213 | 3fc6c082 | bellard | } |
214 | 3fc6c082 | bellard | |
215 | 3fc6c082 | bellard | static void spr_write_dbatl_h (void *opaque, int sprn) |
216 | 3fc6c082 | bellard | { |
217 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
218 | 3fc6c082 | bellard | |
219 | 3fc6c082 | bellard | gen_op_store_dbatl((sprn - SPR_DBAT4L) / 2);
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220 | 3fc6c082 | bellard | RET_STOP(ctx); |
221 | 3fc6c082 | bellard | } |
222 | 3fc6c082 | bellard | |
223 | 3fc6c082 | bellard | /* SDR1 */
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224 | 3fc6c082 | bellard | static void spr_read_sdr1 (void *opaque, int sprn) |
225 | 3fc6c082 | bellard | { |
226 | 3fc6c082 | bellard | gen_op_load_sdr1(); |
227 | 3fc6c082 | bellard | } |
228 | 3fc6c082 | bellard | |
229 | 3fc6c082 | bellard | static void spr_write_sdr1 (void *opaque, int sprn) |
230 | 3fc6c082 | bellard | { |
231 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
232 | 3fc6c082 | bellard | |
233 | 3fc6c082 | bellard | gen_op_store_sdr1(); |
234 | 3fc6c082 | bellard | RET_STOP(ctx); |
235 | 3fc6c082 | bellard | } |
236 | 3fc6c082 | bellard | |
237 | 76a66253 | j_mayer | /* 64 bits PowerPC specific SPRs */
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238 | 76a66253 | j_mayer | /* ASR */
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239 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
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240 | 76a66253 | j_mayer | static void spr_read_asr (void *opaque, int sprn) |
241 | 76a66253 | j_mayer | { |
242 | 76a66253 | j_mayer | gen_op_load_asr(); |
243 | 76a66253 | j_mayer | } |
244 | 76a66253 | j_mayer | |
245 | 76a66253 | j_mayer | static void spr_write_asr (void *opaque, int sprn) |
246 | 76a66253 | j_mayer | { |
247 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
248 | 76a66253 | j_mayer | |
249 | 76a66253 | j_mayer | gen_op_store_asr(); |
250 | 76a66253 | j_mayer | RET_STOP(ctx); |
251 | 76a66253 | j_mayer | } |
252 | 76a66253 | j_mayer | #endif
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253 | 76a66253 | j_mayer | #endif /* !defined(CONFIG_USER_ONLY) */ |
254 | 76a66253 | j_mayer | |
255 | 76a66253 | j_mayer | /* PowerPC 601 specific registers */
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256 | 76a66253 | j_mayer | /* RTC */
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257 | 76a66253 | j_mayer | static void spr_read_601_rtcl (void *opaque, int sprn) |
258 | 76a66253 | j_mayer | { |
259 | 76a66253 | j_mayer | gen_op_load_601_rtcl(); |
260 | 76a66253 | j_mayer | } |
261 | 76a66253 | j_mayer | |
262 | 76a66253 | j_mayer | static void spr_read_601_rtcu (void *opaque, int sprn) |
263 | 76a66253 | j_mayer | { |
264 | 76a66253 | j_mayer | gen_op_load_601_rtcu(); |
265 | 76a66253 | j_mayer | } |
266 | 76a66253 | j_mayer | |
267 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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268 | 76a66253 | j_mayer | static void spr_write_601_rtcu (void *opaque, int sprn) |
269 | 76a66253 | j_mayer | { |
270 | 76a66253 | j_mayer | gen_op_store_601_rtcu(); |
271 | 76a66253 | j_mayer | } |
272 | 76a66253 | j_mayer | |
273 | 76a66253 | j_mayer | static void spr_write_601_rtcl (void *opaque, int sprn) |
274 | 76a66253 | j_mayer | { |
275 | 76a66253 | j_mayer | gen_op_store_601_rtcl(); |
276 | 76a66253 | j_mayer | } |
277 | 76a66253 | j_mayer | #endif
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278 | 76a66253 | j_mayer | |
279 | 76a66253 | j_mayer | /* Unified bats */
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280 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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281 | 76a66253 | j_mayer | static void spr_read_601_ubat (void *opaque, int sprn) |
282 | 76a66253 | j_mayer | { |
283 | 76a66253 | j_mayer | gen_op_load_601_bat(sprn & 1, (sprn - SPR_IBAT0U) / 2); |
284 | 76a66253 | j_mayer | } |
285 | 76a66253 | j_mayer | |
286 | 76a66253 | j_mayer | static void spr_write_601_ubatu (void *opaque, int sprn) |
287 | 76a66253 | j_mayer | { |
288 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
289 | 76a66253 | j_mayer | |
290 | 76a66253 | j_mayer | gen_op_store_601_batu((sprn - SPR_IBAT0U) / 2);
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291 | 76a66253 | j_mayer | RET_STOP(ctx); |
292 | 76a66253 | j_mayer | } |
293 | 76a66253 | j_mayer | |
294 | 76a66253 | j_mayer | static void spr_write_601_ubatl (void *opaque, int sprn) |
295 | 76a66253 | j_mayer | { |
296 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
297 | 76a66253 | j_mayer | |
298 | 76a66253 | j_mayer | gen_op_store_601_batl((sprn - SPR_IBAT0L) / 2);
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299 | 76a66253 | j_mayer | RET_STOP(ctx); |
300 | 76a66253 | j_mayer | } |
301 | 76a66253 | j_mayer | #endif
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302 | 76a66253 | j_mayer | |
303 | 76a66253 | j_mayer | /* PowerPC 40x specific registers */
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304 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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305 | 76a66253 | j_mayer | static void spr_read_40x_pit (void *opaque, int sprn) |
306 | 76a66253 | j_mayer | { |
307 | 76a66253 | j_mayer | gen_op_load_40x_pit(); |
308 | 76a66253 | j_mayer | } |
309 | 76a66253 | j_mayer | |
310 | 76a66253 | j_mayer | static void spr_write_40x_pit (void *opaque, int sprn) |
311 | 76a66253 | j_mayer | { |
312 | 76a66253 | j_mayer | gen_op_store_40x_pit(); |
313 | 76a66253 | j_mayer | } |
314 | 76a66253 | j_mayer | |
315 | 76a66253 | j_mayer | static void spr_write_booke_tcr (void *opaque, int sprn) |
316 | 76a66253 | j_mayer | { |
317 | 76a66253 | j_mayer | gen_op_store_booke_tcr(); |
318 | 76a66253 | j_mayer | } |
319 | 76a66253 | j_mayer | |
320 | 76a66253 | j_mayer | static void spr_write_booke_tsr (void *opaque, int sprn) |
321 | 76a66253 | j_mayer | { |
322 | 76a66253 | j_mayer | gen_op_store_booke_tsr(); |
323 | 76a66253 | j_mayer | } |
324 | 76a66253 | j_mayer | #endif
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325 | 76a66253 | j_mayer | |
326 | 76a66253 | j_mayer | /* PowerPC 403 specific registers */
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327 | 76a66253 | j_mayer | /* PBL1 / PBU1 / PBL2 / PBU2 */
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328 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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329 | 76a66253 | j_mayer | static void spr_read_403_pbr (void *opaque, int sprn) |
330 | 76a66253 | j_mayer | { |
331 | 76a66253 | j_mayer | gen_op_load_403_pb(sprn - SPR_403_PBL1); |
332 | 76a66253 | j_mayer | } |
333 | 76a66253 | j_mayer | |
334 | 76a66253 | j_mayer | static void spr_write_403_pbr (void *opaque, int sprn) |
335 | 76a66253 | j_mayer | { |
336 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
337 | 76a66253 | j_mayer | |
338 | 76a66253 | j_mayer | gen_op_store_403_pb(sprn - SPR_403_PBL1); |
339 | 76a66253 | j_mayer | RET_STOP(ctx); |
340 | 76a66253 | j_mayer | } |
341 | 76a66253 | j_mayer | |
342 | 3fc6c082 | bellard | static void spr_write_pir (void *opaque, int sprn) |
343 | 3fc6c082 | bellard | { |
344 | 3fc6c082 | bellard | gen_op_store_pir(); |
345 | 3fc6c082 | bellard | } |
346 | 76a66253 | j_mayer | #endif
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347 | 3fc6c082 | bellard | |
348 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
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349 | 76a66253 | j_mayer | #define spr_register(env, num, name, uea_read, uea_write, \
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350 | 76a66253 | j_mayer | oea_read, oea_write, initial_value) \ |
351 | 76a66253 | j_mayer | do { \
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352 | 76a66253 | j_mayer | _spr_register(env, num, name, uea_read, uea_write, initial_value); \ |
353 | 76a66253 | j_mayer | } while (0) |
354 | 76a66253 | j_mayer | static inline void _spr_register (CPUPPCState *env, int num, |
355 | 76a66253 | j_mayer | const unsigned char *name, |
356 | 76a66253 | j_mayer | void (*uea_read)(void *opaque, int sprn), |
357 | 76a66253 | j_mayer | void (*uea_write)(void *opaque, int sprn), |
358 | 76a66253 | j_mayer | target_ulong initial_value) |
359 | 76a66253 | j_mayer | #else
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360 | 3fc6c082 | bellard | static inline void spr_register (CPUPPCState *env, int num, |
361 | 3fc6c082 | bellard | const unsigned char *name, |
362 | 3fc6c082 | bellard | void (*uea_read)(void *opaque, int sprn), |
363 | 3fc6c082 | bellard | void (*uea_write)(void *opaque, int sprn), |
364 | 3fc6c082 | bellard | void (*oea_read)(void *opaque, int sprn), |
365 | 3fc6c082 | bellard | void (*oea_write)(void *opaque, int sprn), |
366 | 3fc6c082 | bellard | target_ulong initial_value) |
367 | 76a66253 | j_mayer | #endif
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368 | 3fc6c082 | bellard | { |
369 | 3fc6c082 | bellard | ppc_spr_t *spr; |
370 | 3fc6c082 | bellard | |
371 | 3fc6c082 | bellard | spr = &env->spr_cb[num]; |
372 | 3fc6c082 | bellard | if (spr->name != NULL ||env-> spr[num] != 0x00000000 || |
373 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
374 | 76a66253 | j_mayer | spr->oea_read != NULL || spr->oea_write != NULL || |
375 | 76a66253 | j_mayer | #endif
|
376 | 76a66253 | j_mayer | spr->uea_read != NULL || spr->uea_write != NULL) { |
377 | 3fc6c082 | bellard | printf("Error: Trying to register SPR %d (%03x) twice !\n", num, num);
|
378 | 3fc6c082 | bellard | exit(1);
|
379 | 3fc6c082 | bellard | } |
380 | 3fc6c082 | bellard | #if defined(PPC_DEBUG_SPR)
|
381 | 1b9eb036 | j_mayer | printf("*** register spr %d (%03x) %s val " ADDRX "\n", num, num, name, |
382 | 76a66253 | j_mayer | initial_value); |
383 | 3fc6c082 | bellard | #endif
|
384 | 3fc6c082 | bellard | spr->name = name; |
385 | 3fc6c082 | bellard | spr->uea_read = uea_read; |
386 | 3fc6c082 | bellard | spr->uea_write = uea_write; |
387 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
388 | 3fc6c082 | bellard | spr->oea_read = oea_read; |
389 | 3fc6c082 | bellard | spr->oea_write = oea_write; |
390 | 76a66253 | j_mayer | #endif
|
391 | 3fc6c082 | bellard | env->spr[num] = initial_value; |
392 | 3fc6c082 | bellard | } |
393 | 3fc6c082 | bellard | |
394 | 3fc6c082 | bellard | /* Generic PowerPC SPRs */
|
395 | 3fc6c082 | bellard | static void gen_spr_generic (CPUPPCState *env) |
396 | 3fc6c082 | bellard | { |
397 | 3fc6c082 | bellard | /* Integer processing */
|
398 | 3fc6c082 | bellard | spr_register(env, SPR_XER, "XER",
|
399 | 3fc6c082 | bellard | &spr_read_xer, &spr_write_xer, |
400 | 3fc6c082 | bellard | &spr_read_xer, &spr_write_xer, |
401 | 3fc6c082 | bellard | 0x00000000);
|
402 | 3fc6c082 | bellard | /* Branch contol */
|
403 | 3fc6c082 | bellard | spr_register(env, SPR_LR, "LR",
|
404 | 3fc6c082 | bellard | &spr_read_lr, &spr_write_lr, |
405 | 3fc6c082 | bellard | &spr_read_lr, &spr_write_lr, |
406 | 3fc6c082 | bellard | 0x00000000);
|
407 | 3fc6c082 | bellard | spr_register(env, SPR_CTR, "CTR",
|
408 | 3fc6c082 | bellard | &spr_read_ctr, &spr_write_ctr, |
409 | 3fc6c082 | bellard | &spr_read_ctr, &spr_write_ctr, |
410 | 3fc6c082 | bellard | 0x00000000);
|
411 | 3fc6c082 | bellard | /* Interrupt processing */
|
412 | 3fc6c082 | bellard | spr_register(env, SPR_SRR0, "SRR0",
|
413 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
414 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
415 | 3fc6c082 | bellard | 0x00000000);
|
416 | 3fc6c082 | bellard | spr_register(env, SPR_SRR1, "SRR1",
|
417 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
418 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
419 | 3fc6c082 | bellard | 0x00000000);
|
420 | 3fc6c082 | bellard | /* Processor control */
|
421 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG0, "SPRG0",
|
422 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
423 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
424 | 3fc6c082 | bellard | 0x00000000);
|
425 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG1, "SPRG1",
|
426 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
427 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
428 | 3fc6c082 | bellard | 0x00000000);
|
429 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG2, "SPRG2",
|
430 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
431 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
432 | 3fc6c082 | bellard | 0x00000000);
|
433 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG3, "SPRG3",
|
434 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
435 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
436 | 3fc6c082 | bellard | 0x00000000);
|
437 | 3fc6c082 | bellard | } |
438 | 3fc6c082 | bellard | |
439 | 3fc6c082 | bellard | /* SPR common to all non-embedded PowerPC, including 601 */
|
440 | 3fc6c082 | bellard | static void gen_spr_ne_601 (CPUPPCState *env) |
441 | 3fc6c082 | bellard | { |
442 | 3fc6c082 | bellard | /* Exception processing */
|
443 | 3fc6c082 | bellard | spr_register(env, SPR_DSISR, "DSISR",
|
444 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
445 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
446 | 3fc6c082 | bellard | 0x00000000);
|
447 | 3fc6c082 | bellard | spr_register(env, SPR_DAR, "DAR",
|
448 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
449 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
450 | 3fc6c082 | bellard | 0x00000000);
|
451 | 3fc6c082 | bellard | /* Timer */
|
452 | 3fc6c082 | bellard | spr_register(env, SPR_DECR, "DECR",
|
453 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
454 | 3fc6c082 | bellard | &spr_read_decr, &spr_write_decr, |
455 | 3fc6c082 | bellard | 0x00000000);
|
456 | 3fc6c082 | bellard | /* Memory management */
|
457 | 3fc6c082 | bellard | spr_register(env, SPR_SDR1, "SDR1",
|
458 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
459 | 3fc6c082 | bellard | &spr_read_sdr1, &spr_write_sdr1, |
460 | 3fc6c082 | bellard | 0x00000000);
|
461 | 3fc6c082 | bellard | } |
462 | 3fc6c082 | bellard | |
463 | 3fc6c082 | bellard | /* BATs 0-3 */
|
464 | 3fc6c082 | bellard | static void gen_low_BATs (CPUPPCState *env) |
465 | 3fc6c082 | bellard | { |
466 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT0U, "IBAT0U",
|
467 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
468 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
469 | 3fc6c082 | bellard | 0x00000000);
|
470 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT0L, "IBAT0L",
|
471 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
472 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
473 | 3fc6c082 | bellard | 0x00000000);
|
474 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT1U, "IBAT1U",
|
475 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
476 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
477 | 3fc6c082 | bellard | 0x00000000);
|
478 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT1L, "IBAT1L",
|
479 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
480 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
481 | 3fc6c082 | bellard | 0x00000000);
|
482 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT2U, "IBAT2U",
|
483 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
484 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
485 | 3fc6c082 | bellard | 0x00000000);
|
486 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT2L, "IBAT2L",
|
487 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
488 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
489 | 3fc6c082 | bellard | 0x00000000);
|
490 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT3U, "IBAT3U",
|
491 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
492 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
493 | 3fc6c082 | bellard | 0x00000000);
|
494 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT3L, "IBAT3L",
|
495 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
496 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
497 | 3fc6c082 | bellard | 0x00000000);
|
498 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT0U, "DBAT0U",
|
499 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
500 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
501 | 3fc6c082 | bellard | 0x00000000);
|
502 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT0L, "DBAT0L",
|
503 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
504 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
505 | 3fc6c082 | bellard | 0x00000000);
|
506 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT1U, "DBAT1U",
|
507 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
508 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
509 | 3fc6c082 | bellard | 0x00000000);
|
510 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT1L, "DBAT1L",
|
511 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
512 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
513 | 3fc6c082 | bellard | 0x00000000);
|
514 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT2U, "DBAT2U",
|
515 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
516 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
517 | 3fc6c082 | bellard | 0x00000000);
|
518 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT2L, "DBAT2L",
|
519 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
520 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
521 | 3fc6c082 | bellard | 0x00000000);
|
522 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT3U, "DBAT3U",
|
523 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
524 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
525 | 3fc6c082 | bellard | 0x00000000);
|
526 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT3L, "DBAT3L",
|
527 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
528 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
529 | 3fc6c082 | bellard | 0x00000000);
|
530 | 3fc6c082 | bellard | env->nb_BATs = 4;
|
531 | 3fc6c082 | bellard | } |
532 | 3fc6c082 | bellard | |
533 | 3fc6c082 | bellard | /* BATs 4-7 */
|
534 | 3fc6c082 | bellard | static void gen_high_BATs (CPUPPCState *env) |
535 | 3fc6c082 | bellard | { |
536 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT4U, "IBAT4U",
|
537 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
538 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
539 | 3fc6c082 | bellard | 0x00000000);
|
540 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT4L, "IBAT4L",
|
541 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
542 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
543 | 3fc6c082 | bellard | 0x00000000);
|
544 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT5U, "IBAT5U",
|
545 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
546 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
547 | 3fc6c082 | bellard | 0x00000000);
|
548 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT5L, "IBAT5L",
|
549 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
550 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
551 | 3fc6c082 | bellard | 0x00000000);
|
552 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT6U, "IBAT6U",
|
553 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
554 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
555 | 3fc6c082 | bellard | 0x00000000);
|
556 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT6L, "IBAT6L",
|
557 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
558 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
559 | 3fc6c082 | bellard | 0x00000000);
|
560 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT7U, "IBAT7U",
|
561 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
562 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
563 | 3fc6c082 | bellard | 0x00000000);
|
564 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT7L, "IBAT7L",
|
565 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
566 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
567 | 3fc6c082 | bellard | 0x00000000);
|
568 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT4U, "DBAT4U",
|
569 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
570 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
571 | 3fc6c082 | bellard | 0x00000000);
|
572 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT4L, "DBAT4L",
|
573 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
574 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
575 | 3fc6c082 | bellard | 0x00000000);
|
576 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT5U, "DBAT5U",
|
577 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
578 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
579 | 3fc6c082 | bellard | 0x00000000);
|
580 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT5L, "DBAT5L",
|
581 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
582 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
583 | 3fc6c082 | bellard | 0x00000000);
|
584 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT6U, "DBAT6U",
|
585 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
586 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
587 | 3fc6c082 | bellard | 0x00000000);
|
588 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT6L, "DBAT6L",
|
589 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
590 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
591 | 3fc6c082 | bellard | 0x00000000);
|
592 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT7U, "DBAT7U",
|
593 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
594 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
595 | 3fc6c082 | bellard | 0x00000000);
|
596 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT7L, "DBAT7L",
|
597 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
598 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
599 | 3fc6c082 | bellard | 0x00000000);
|
600 | 3fc6c082 | bellard | env->nb_BATs = 8;
|
601 | 3fc6c082 | bellard | } |
602 | 3fc6c082 | bellard | |
603 | 3fc6c082 | bellard | /* Generic PowerPC time base */
|
604 | 3fc6c082 | bellard | static void gen_tbl (CPUPPCState *env) |
605 | 3fc6c082 | bellard | { |
606 | 3fc6c082 | bellard | spr_register(env, SPR_VTBL, "TBL",
|
607 | 3fc6c082 | bellard | &spr_read_tbl, SPR_NOACCESS, |
608 | 3fc6c082 | bellard | &spr_read_tbl, SPR_NOACCESS, |
609 | 3fc6c082 | bellard | 0x00000000);
|
610 | 3fc6c082 | bellard | spr_register(env, SPR_TBL, "TBL",
|
611 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
612 | 3fc6c082 | bellard | SPR_NOACCESS, &spr_write_tbl, |
613 | 3fc6c082 | bellard | 0x00000000);
|
614 | 3fc6c082 | bellard | spr_register(env, SPR_VTBU, "TBU",
|
615 | 3fc6c082 | bellard | &spr_read_tbu, SPR_NOACCESS, |
616 | 3fc6c082 | bellard | &spr_read_tbu, SPR_NOACCESS, |
617 | 3fc6c082 | bellard | 0x00000000);
|
618 | 3fc6c082 | bellard | spr_register(env, SPR_TBU, "TBU",
|
619 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
620 | 3fc6c082 | bellard | SPR_NOACCESS, &spr_write_tbu, |
621 | 3fc6c082 | bellard | 0x00000000);
|
622 | 3fc6c082 | bellard | } |
623 | 3fc6c082 | bellard | |
624 | 76a66253 | j_mayer | /* Softare table search registers */
|
625 | 76a66253 | j_mayer | static void gen_6xx_7xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways) |
626 | 76a66253 | j_mayer | { |
627 | 76a66253 | j_mayer | env->nb_tlb = nb_tlbs; |
628 | 76a66253 | j_mayer | env->nb_ways = nb_ways; |
629 | 76a66253 | j_mayer | env->id_tlbs = 1;
|
630 | 76a66253 | j_mayer | spr_register(env, SPR_DMISS, "DMISS",
|
631 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
632 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
633 | 76a66253 | j_mayer | 0x00000000);
|
634 | 76a66253 | j_mayer | spr_register(env, SPR_DCMP, "DCMP",
|
635 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
636 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
637 | 76a66253 | j_mayer | 0x00000000);
|
638 | 76a66253 | j_mayer | spr_register(env, SPR_HASH1, "HASH1",
|
639 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
640 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
641 | 76a66253 | j_mayer | 0x00000000);
|
642 | 76a66253 | j_mayer | spr_register(env, SPR_HASH2, "HASH2",
|
643 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
644 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
645 | 76a66253 | j_mayer | 0x00000000);
|
646 | 76a66253 | j_mayer | spr_register(env, SPR_IMISS, "IMISS",
|
647 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
648 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
649 | 76a66253 | j_mayer | 0x00000000);
|
650 | 76a66253 | j_mayer | spr_register(env, SPR_ICMP, "ICMP",
|
651 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
652 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
653 | 76a66253 | j_mayer | 0x00000000);
|
654 | 76a66253 | j_mayer | spr_register(env, SPR_RPA, "RPA",
|
655 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
656 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
657 | 76a66253 | j_mayer | 0x00000000);
|
658 | 76a66253 | j_mayer | } |
659 | 76a66253 | j_mayer | |
660 | 76a66253 | j_mayer | /* SPR common to MPC755 and G2 */
|
661 | 76a66253 | j_mayer | static void gen_spr_G2_755 (CPUPPCState *env) |
662 | 76a66253 | j_mayer | { |
663 | 76a66253 | j_mayer | /* SGPRs */
|
664 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
665 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
666 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
667 | 76a66253 | j_mayer | 0x00000000);
|
668 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
669 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
670 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
671 | 76a66253 | j_mayer | 0x00000000);
|
672 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
673 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
674 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
675 | 76a66253 | j_mayer | 0x00000000);
|
676 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
677 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
678 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
679 | 76a66253 | j_mayer | 0x00000000);
|
680 | 76a66253 | j_mayer | /* External access control */
|
681 | 76a66253 | j_mayer | /* XXX : not implemented */
|
682 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
683 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
684 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
685 | 76a66253 | j_mayer | 0x00000000);
|
686 | 76a66253 | j_mayer | } |
687 | 76a66253 | j_mayer | |
688 | 3fc6c082 | bellard | /* SPR common to all 7xx PowerPC implementations */
|
689 | 3fc6c082 | bellard | static void gen_spr_7xx (CPUPPCState *env) |
690 | 3fc6c082 | bellard | { |
691 | 3fc6c082 | bellard | /* Breakpoints */
|
692 | 3fc6c082 | bellard | /* XXX : not implemented */
|
693 | 3fc6c082 | bellard | spr_register(env, SPR_DABR, "DABR",
|
694 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
695 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
696 | 3fc6c082 | bellard | 0x00000000);
|
697 | 3fc6c082 | bellard | /* XXX : not implemented */
|
698 | 3fc6c082 | bellard | spr_register(env, SPR_IABR, "IABR",
|
699 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
700 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
701 | 3fc6c082 | bellard | 0x00000000);
|
702 | 3fc6c082 | bellard | /* Cache management */
|
703 | 3fc6c082 | bellard | /* XXX : not implemented */
|
704 | 3fc6c082 | bellard | spr_register(env, SPR_ICTC, "ICTC",
|
705 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
706 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
707 | 3fc6c082 | bellard | 0x00000000);
|
708 | 76a66253 | j_mayer | /* XXX : not implemented */
|
709 | 76a66253 | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
710 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
711 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
712 | 76a66253 | j_mayer | 0x00000000);
|
713 | 3fc6c082 | bellard | /* Performance monitors */
|
714 | 3fc6c082 | bellard | /* XXX : not implemented */
|
715 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR0, "MMCR0",
|
716 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
717 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
718 | 3fc6c082 | bellard | 0x00000000);
|
719 | 3fc6c082 | bellard | /* XXX : not implemented */
|
720 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR1, "MMCR1",
|
721 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
722 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
723 | 3fc6c082 | bellard | 0x00000000);
|
724 | 3fc6c082 | bellard | /* XXX : not implemented */
|
725 | 3fc6c082 | bellard | spr_register(env, SPR_PMC1, "PMC1",
|
726 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
727 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
728 | 3fc6c082 | bellard | 0x00000000);
|
729 | 3fc6c082 | bellard | /* XXX : not implemented */
|
730 | 3fc6c082 | bellard | spr_register(env, SPR_PMC2, "PMC2",
|
731 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
732 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
733 | 3fc6c082 | bellard | 0x00000000);
|
734 | 3fc6c082 | bellard | /* XXX : not implemented */
|
735 | 3fc6c082 | bellard | spr_register(env, SPR_PMC3, "PMC3",
|
736 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
737 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
738 | 3fc6c082 | bellard | 0x00000000);
|
739 | 3fc6c082 | bellard | /* XXX : not implemented */
|
740 | 3fc6c082 | bellard | spr_register(env, SPR_PMC4, "PMC4",
|
741 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
742 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
743 | 3fc6c082 | bellard | 0x00000000);
|
744 | 3fc6c082 | bellard | /* XXX : not implemented */
|
745 | 3fc6c082 | bellard | spr_register(env, SPR_SIA, "SIA",
|
746 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
747 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
748 | 3fc6c082 | bellard | 0x00000000);
|
749 | 3fc6c082 | bellard | spr_register(env, SPR_UMMCR0, "UMMCR0",
|
750 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
751 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
752 | 3fc6c082 | bellard | 0x00000000);
|
753 | 3fc6c082 | bellard | spr_register(env, SPR_UMMCR1, "UMMCR1",
|
754 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
755 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
756 | 3fc6c082 | bellard | 0x00000000);
|
757 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC1, "UPMC1",
|
758 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
759 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
760 | 3fc6c082 | bellard | 0x00000000);
|
761 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC2, "UPMC2",
|
762 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
763 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
764 | 3fc6c082 | bellard | 0x00000000);
|
765 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC3, "UPMC3",
|
766 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
767 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
768 | 3fc6c082 | bellard | 0x00000000);
|
769 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC4, "UPMC4",
|
770 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
771 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
772 | 3fc6c082 | bellard | 0x00000000);
|
773 | 3fc6c082 | bellard | spr_register(env, SPR_USIA, "USIA",
|
774 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
775 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
776 | 3fc6c082 | bellard | 0x00000000);
|
777 | 3fc6c082 | bellard | /* Thermal management */
|
778 | 3fc6c082 | bellard | /* XXX : not implemented */
|
779 | 3fc6c082 | bellard | spr_register(env, SPR_THRM1, "THRM1",
|
780 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
781 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
782 | 3fc6c082 | bellard | 0x00000000);
|
783 | 3fc6c082 | bellard | /* XXX : not implemented */
|
784 | 3fc6c082 | bellard | spr_register(env, SPR_THRM2, "THRM2",
|
785 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
786 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
787 | 3fc6c082 | bellard | 0x00000000);
|
788 | 3fc6c082 | bellard | /* XXX : not implemented */
|
789 | 3fc6c082 | bellard | spr_register(env, SPR_THRM3, "THRM3",
|
790 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
791 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
792 | 3fc6c082 | bellard | 0x00000000);
|
793 | 3fc6c082 | bellard | /* External access control */
|
794 | 3fc6c082 | bellard | /* XXX : not implemented */
|
795 | 3fc6c082 | bellard | spr_register(env, SPR_EAR, "EAR",
|
796 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
797 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
798 | 3fc6c082 | bellard | 0x00000000);
|
799 | 3fc6c082 | bellard | } |
800 | 3fc6c082 | bellard | |
801 | 3fc6c082 | bellard | /* SPR specific to PowerPC 604 implementation */
|
802 | 3fc6c082 | bellard | static void gen_spr_604 (CPUPPCState *env) |
803 | 3fc6c082 | bellard | { |
804 | 3fc6c082 | bellard | /* Processor identification */
|
805 | 3fc6c082 | bellard | spr_register(env, SPR_PIR, "PIR",
|
806 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
807 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_pir, |
808 | 3fc6c082 | bellard | 0x00000000);
|
809 | 3fc6c082 | bellard | /* Breakpoints */
|
810 | 3fc6c082 | bellard | /* XXX : not implemented */
|
811 | 3fc6c082 | bellard | spr_register(env, SPR_IABR, "IABR",
|
812 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
813 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
814 | 3fc6c082 | bellard | 0x00000000);
|
815 | 3fc6c082 | bellard | /* XXX : not implemented */
|
816 | 3fc6c082 | bellard | spr_register(env, SPR_DABR, "DABR",
|
817 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
818 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
819 | 3fc6c082 | bellard | 0x00000000);
|
820 | 3fc6c082 | bellard | /* Performance counters */
|
821 | 3fc6c082 | bellard | /* XXX : not implemented */
|
822 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR0, "MMCR0",
|
823 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
824 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
825 | 3fc6c082 | bellard | 0x00000000);
|
826 | 3fc6c082 | bellard | /* XXX : not implemented */
|
827 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR1, "MMCR1",
|
828 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
829 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
830 | 3fc6c082 | bellard | 0x00000000);
|
831 | 3fc6c082 | bellard | /* XXX : not implemented */
|
832 | 3fc6c082 | bellard | spr_register(env, SPR_PMC1, "PMC1",
|
833 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
834 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
835 | 3fc6c082 | bellard | 0x00000000);
|
836 | 3fc6c082 | bellard | /* XXX : not implemented */
|
837 | 3fc6c082 | bellard | spr_register(env, SPR_PMC2, "PMC2",
|
838 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
839 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
840 | 3fc6c082 | bellard | 0x00000000);
|
841 | 3fc6c082 | bellard | /* XXX : not implemented */
|
842 | 3fc6c082 | bellard | spr_register(env, SPR_PMC3, "PMC3",
|
843 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
844 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
845 | 3fc6c082 | bellard | 0x00000000);
|
846 | 3fc6c082 | bellard | /* XXX : not implemented */
|
847 | 3fc6c082 | bellard | spr_register(env, SPR_PMC4, "PMC4",
|
848 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
849 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
850 | 3fc6c082 | bellard | 0x00000000);
|
851 | 3fc6c082 | bellard | /* XXX : not implemented */
|
852 | 3fc6c082 | bellard | spr_register(env, SPR_SIA, "SIA",
|
853 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
854 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
855 | 3fc6c082 | bellard | 0x00000000);
|
856 | 3fc6c082 | bellard | /* XXX : not implemented */
|
857 | 3fc6c082 | bellard | spr_register(env, SPR_SDA, "SDA",
|
858 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
859 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
860 | 3fc6c082 | bellard | 0x00000000);
|
861 | 3fc6c082 | bellard | /* External access control */
|
862 | 3fc6c082 | bellard | /* XXX : not implemented */
|
863 | 3fc6c082 | bellard | spr_register(env, SPR_EAR, "EAR",
|
864 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
865 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
866 | 3fc6c082 | bellard | 0x00000000);
|
867 | 3fc6c082 | bellard | } |
868 | 3fc6c082 | bellard | |
869 | 76a66253 | j_mayer | /* SPR specific to PowerPC 603 implementation */
|
870 | 76a66253 | j_mayer | static void gen_spr_603 (CPUPPCState *env) |
871 | 3fc6c082 | bellard | { |
872 | 76a66253 | j_mayer | /* External access control */
|
873 | 76a66253 | j_mayer | /* XXX : not implemented */
|
874 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
875 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
876 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
877 | 76a66253 | j_mayer | 0x00000000);
|
878 | 3fc6c082 | bellard | } |
879 | 3fc6c082 | bellard | |
880 | 76a66253 | j_mayer | /* SPR specific to PowerPC G2 implementation */
|
881 | 76a66253 | j_mayer | static void gen_spr_G2 (CPUPPCState *env) |
882 | 3fc6c082 | bellard | { |
883 | 76a66253 | j_mayer | /* Memory base address */
|
884 | 76a66253 | j_mayer | /* MBAR */
|
885 | 76a66253 | j_mayer | spr_register(env, SPR_MBAR, "MBAR",
|
886 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
887 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
888 | 76a66253 | j_mayer | 0x00000000);
|
889 | 76a66253 | j_mayer | /* System version register */
|
890 | 76a66253 | j_mayer | /* SVR */
|
891 | 76a66253 | j_mayer | spr_register(env, SPR_SVR, "SVR",
|
892 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
893 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
894 | 76a66253 | j_mayer | 0x00000000);
|
895 | 76a66253 | j_mayer | /* Exception processing */
|
896 | 76a66253 | j_mayer | spr_register(env, SPR_CSRR0, "CSRR0",
|
897 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
898 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
899 | 76a66253 | j_mayer | 0x00000000);
|
900 | 76a66253 | j_mayer | spr_register(env, SPR_CSRR1, "CSRR1",
|
901 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
902 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
903 | 76a66253 | j_mayer | 0x00000000);
|
904 | 76a66253 | j_mayer | /* Breakpoints */
|
905 | 76a66253 | j_mayer | /* XXX : not implemented */
|
906 | 76a66253 | j_mayer | spr_register(env, SPR_DABR, "DABR",
|
907 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
908 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
909 | 76a66253 | j_mayer | 0x00000000);
|
910 | 76a66253 | j_mayer | /* XXX : not implemented */
|
911 | 76a66253 | j_mayer | spr_register(env, SPR_DABR2, "DABR2",
|
912 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
913 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
914 | 76a66253 | j_mayer | 0x00000000);
|
915 | 76a66253 | j_mayer | /* XXX : not implemented */
|
916 | 76a66253 | j_mayer | spr_register(env, SPR_IABR, "IABR",
|
917 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
918 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
919 | 76a66253 | j_mayer | 0x00000000);
|
920 | 76a66253 | j_mayer | /* XXX : not implemented */
|
921 | 76a66253 | j_mayer | spr_register(env, SPR_IABR2, "IABR2",
|
922 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
923 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
924 | 76a66253 | j_mayer | 0x00000000);
|
925 | 76a66253 | j_mayer | /* XXX : not implemented */
|
926 | 76a66253 | j_mayer | spr_register(env, SPR_IBCR, "IBCR",
|
927 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
928 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
929 | 76a66253 | j_mayer | 0x00000000);
|
930 | 76a66253 | j_mayer | /* XXX : not implemented */
|
931 | 76a66253 | j_mayer | spr_register(env, SPR_DBCR, "DBCR",
|
932 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
933 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
934 | 76a66253 | j_mayer | 0x00000000);
|
935 | 76a66253 | j_mayer | } |
936 | 76a66253 | j_mayer | |
937 | 76a66253 | j_mayer | /* SPR specific to PowerPC 602 implementation */
|
938 | 76a66253 | j_mayer | static void gen_spr_602 (CPUPPCState *env) |
939 | 76a66253 | j_mayer | { |
940 | 76a66253 | j_mayer | /* ESA registers */
|
941 | 76a66253 | j_mayer | /* XXX : not implemented */
|
942 | 76a66253 | j_mayer | spr_register(env, SPR_SER, "SER",
|
943 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
944 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
945 | 76a66253 | j_mayer | 0x00000000);
|
946 | 76a66253 | j_mayer | /* XXX : not implemented */
|
947 | 76a66253 | j_mayer | spr_register(env, SPR_SEBR, "SEBR",
|
948 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
949 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
950 | 76a66253 | j_mayer | 0x00000000);
|
951 | 76a66253 | j_mayer | /* XXX : not implemented */
|
952 | 76a66253 | j_mayer | spr_register(env, SPR_ESASR, "ESASR",
|
953 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
954 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
955 | 76a66253 | j_mayer | 0x00000000);
|
956 | 76a66253 | j_mayer | /* Floating point status */
|
957 | 76a66253 | j_mayer | /* XXX : not implemented */
|
958 | 76a66253 | j_mayer | spr_register(env, SPR_SP, "SP",
|
959 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
960 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
961 | 76a66253 | j_mayer | 0x00000000);
|
962 | 76a66253 | j_mayer | /* XXX : not implemented */
|
963 | 76a66253 | j_mayer | spr_register(env, SPR_LT, "LT",
|
964 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
965 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
966 | 76a66253 | j_mayer | 0x00000000);
|
967 | 76a66253 | j_mayer | /* Watchdog timer */
|
968 | 76a66253 | j_mayer | /* XXX : not implemented */
|
969 | 76a66253 | j_mayer | spr_register(env, SPR_TCR, "TCR",
|
970 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
971 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
972 | 76a66253 | j_mayer | 0x00000000);
|
973 | 76a66253 | j_mayer | /* Interrupt base */
|
974 | 76a66253 | j_mayer | spr_register(env, SPR_IBR, "IBR",
|
975 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
976 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
977 | 76a66253 | j_mayer | 0x00000000);
|
978 | 76a66253 | j_mayer | } |
979 | 76a66253 | j_mayer | |
980 | 76a66253 | j_mayer | /* SPR specific to PowerPC 601 implementation */
|
981 | 76a66253 | j_mayer | static void gen_spr_601 (CPUPPCState *env) |
982 | 76a66253 | j_mayer | { |
983 | 76a66253 | j_mayer | /* Multiplication/division register */
|
984 | 76a66253 | j_mayer | /* MQ */
|
985 | 76a66253 | j_mayer | spr_register(env, SPR_MQ, "MQ",
|
986 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
987 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
988 | 76a66253 | j_mayer | 0x00000000);
|
989 | 76a66253 | j_mayer | /* RTC registers */
|
990 | 76a66253 | j_mayer | spr_register(env, SPR_601_RTCU, "RTCU",
|
991 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
992 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_601_rtcu, |
993 | 76a66253 | j_mayer | 0x00000000);
|
994 | 76a66253 | j_mayer | spr_register(env, SPR_601_VRTCU, "RTCU",
|
995 | 76a66253 | j_mayer | &spr_read_601_rtcu, SPR_NOACCESS, |
996 | 76a66253 | j_mayer | &spr_read_601_rtcu, SPR_NOACCESS, |
997 | 76a66253 | j_mayer | 0x00000000);
|
998 | 76a66253 | j_mayer | spr_register(env, SPR_601_RTCL, "RTCL",
|
999 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1000 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_601_rtcl, |
1001 | 76a66253 | j_mayer | 0x00000000);
|
1002 | 76a66253 | j_mayer | spr_register(env, SPR_601_VRTCL, "RTCL",
|
1003 | 76a66253 | j_mayer | &spr_read_601_rtcl, SPR_NOACCESS, |
1004 | 76a66253 | j_mayer | &spr_read_601_rtcl, SPR_NOACCESS, |
1005 | 76a66253 | j_mayer | 0x00000000);
|
1006 | 76a66253 | j_mayer | /* Timer */
|
1007 | 76a66253 | j_mayer | #if 0 /* ? */
|
1008 | 76a66253 | j_mayer | spr_register(env, SPR_601_UDECR, "UDECR",
|
1009 | 76a66253 | j_mayer | &spr_read_decr, SPR_NOACCESS,
|
1010 | 76a66253 | j_mayer | &spr_read_decr, SPR_NOACCESS,
|
1011 | 76a66253 | j_mayer | 0x00000000);
|
1012 | 76a66253 | j_mayer | #endif
|
1013 | 76a66253 | j_mayer | /* External access control */
|
1014 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1015 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
1016 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1017 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1018 | 76a66253 | j_mayer | 0x00000000);
|
1019 | 76a66253 | j_mayer | /* Memory management */
|
1020 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT0U, "IBAT0U",
|
1021 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1022 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1023 | 76a66253 | j_mayer | 0x00000000);
|
1024 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT0L, "IBAT0L",
|
1025 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1026 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1027 | 76a66253 | j_mayer | 0x00000000);
|
1028 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT1U, "IBAT1U",
|
1029 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1030 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1031 | 76a66253 | j_mayer | 0x00000000);
|
1032 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT1L, "IBAT1L",
|
1033 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1034 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1035 | 76a66253 | j_mayer | 0x00000000);
|
1036 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT2U, "IBAT2U",
|
1037 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1038 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1039 | 76a66253 | j_mayer | 0x00000000);
|
1040 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT2L, "IBAT2L",
|
1041 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1042 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1043 | 76a66253 | j_mayer | 0x00000000);
|
1044 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT3U, "IBAT3U",
|
1045 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1046 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1047 | 76a66253 | j_mayer | 0x00000000);
|
1048 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT3L, "IBAT3L",
|
1049 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1050 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1051 | 76a66253 | j_mayer | 0x00000000);
|
1052 | 76a66253 | j_mayer | } |
1053 | 76a66253 | j_mayer | |
1054 | 76a66253 | j_mayer | /* PowerPC BookE SPR */
|
1055 | 76a66253 | j_mayer | static void gen_spr_BookE (CPUPPCState *env) |
1056 | 76a66253 | j_mayer | { |
1057 | 76a66253 | j_mayer | /* Processor identification */
|
1058 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
1059 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1060 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_pir, |
1061 | 76a66253 | j_mayer | 0x00000000);
|
1062 | 76a66253 | j_mayer | /* Interrupt processing */
|
1063 | 76a66253 | j_mayer | spr_register(env, SPR_CSRR0, "CSRR0",
|
1064 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1065 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1066 | 76a66253 | j_mayer | 0x00000000);
|
1067 | 76a66253 | j_mayer | spr_register(env, SPR_CSRR1, "CSRR1",
|
1068 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1069 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1070 | 76a66253 | j_mayer | 0x00000000);
|
1071 | 76a66253 | j_mayer | /* Debug */
|
1072 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1073 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC1, "IAC1",
|
1074 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1075 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1076 | 76a66253 | j_mayer | 0x00000000);
|
1077 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1078 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC2, "IAC2",
|
1079 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1080 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1081 | 76a66253 | j_mayer | 0x00000000);
|
1082 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1083 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
1084 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1085 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1086 | 76a66253 | j_mayer | 0x00000000);
|
1087 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1088 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
1089 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1090 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1091 | 76a66253 | j_mayer | 0x00000000);
|
1092 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1093 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DAC1, "DAC1",
|
1094 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1095 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1096 | 76a66253 | j_mayer | 0x00000000);
|
1097 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1098 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DAC2, "DAC2",
|
1099 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1100 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1101 | 76a66253 | j_mayer | 0x00000000);
|
1102 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1103 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
1104 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1105 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1106 | 76a66253 | j_mayer | 0x00000000);
|
1107 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1108 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
1109 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1110 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1111 | 76a66253 | j_mayer | 0x00000000);
|
1112 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1113 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR0, "DBCR0",
|
1114 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1115 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1116 | 76a66253 | j_mayer | 0x00000000);
|
1117 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1118 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR1, "DBCR1",
|
1119 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1120 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1121 | 76a66253 | j_mayer | 0x00000000);
|
1122 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1123 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR2, "DBCR2",
|
1124 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1125 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1126 | 76a66253 | j_mayer | 0x00000000);
|
1127 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1128 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBSR, "DBSR",
|
1129 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1130 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1131 | 76a66253 | j_mayer | 0x00000000);
|
1132 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DEAR, "DEAR",
|
1133 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1134 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1135 | 76a66253 | j_mayer | 0x00000000);
|
1136 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_ESR, "ESR",
|
1137 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1138 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1139 | 76a66253 | j_mayer | 0x00000000);
|
1140 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_EVPR, "EVPR",
|
1141 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1142 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1143 | 76a66253 | j_mayer | 0x00000000);
|
1144 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR0, "IVOR0",
|
1145 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1146 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1147 | 76a66253 | j_mayer | 0x00000000);
|
1148 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR1, "IVOR1",
|
1149 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1150 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1151 | 76a66253 | j_mayer | 0x00000000);
|
1152 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR2, "IVOR2",
|
1153 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1154 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1155 | 76a66253 | j_mayer | 0x00000000);
|
1156 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR3, "IVOR3",
|
1157 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1158 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1159 | 76a66253 | j_mayer | 0x00000000);
|
1160 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR4, "IVOR4",
|
1161 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1162 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1163 | 76a66253 | j_mayer | 0x00000000);
|
1164 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR5, "IVOR5",
|
1165 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1166 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1167 | 76a66253 | j_mayer | 0x00000000);
|
1168 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR6, "IVOR6",
|
1169 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1170 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1171 | 76a66253 | j_mayer | 0x00000000);
|
1172 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR7, "IVOR7",
|
1173 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1174 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1175 | 76a66253 | j_mayer | 0x00000000);
|
1176 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR8, "IVOR8",
|
1177 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1178 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1179 | 76a66253 | j_mayer | 0x00000000);
|
1180 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR9, "IVOR9",
|
1181 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1182 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1183 | 76a66253 | j_mayer | 0x00000000);
|
1184 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR10, "IVOR10",
|
1185 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1186 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1187 | 76a66253 | j_mayer | 0x00000000);
|
1188 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR11, "IVOR11",
|
1189 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1190 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1191 | 76a66253 | j_mayer | 0x00000000);
|
1192 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR12, "IVOR12",
|
1193 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1194 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1195 | 76a66253 | j_mayer | 0x00000000);
|
1196 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR13, "IVOR13",
|
1197 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1198 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1199 | 76a66253 | j_mayer | 0x00000000);
|
1200 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR14, "IVOR14",
|
1201 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1202 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1203 | 76a66253 | j_mayer | 0x00000000);
|
1204 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR15, "IVOR15",
|
1205 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1206 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1207 | 76a66253 | j_mayer | 0x00000000);
|
1208 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_PID, "PID",
|
1209 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1210 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1211 | 76a66253 | j_mayer | 0x00000000);
|
1212 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_TCR, "TCR",
|
1213 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1214 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tcr, |
1215 | 76a66253 | j_mayer | 0x00000000);
|
1216 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_TSR, "TSR",
|
1217 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1218 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tsr, |
1219 | 76a66253 | j_mayer | 0x00000000);
|
1220 | 76a66253 | j_mayer | /* Timer */
|
1221 | 76a66253 | j_mayer | spr_register(env, SPR_DECR, "DECR",
|
1222 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1223 | 76a66253 | j_mayer | &spr_read_decr, &spr_write_decr, |
1224 | 76a66253 | j_mayer | 0x00000000);
|
1225 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DECAR, "DECAR",
|
1226 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1227 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1228 | 76a66253 | j_mayer | 0x00000000);
|
1229 | 76a66253 | j_mayer | /* SPRGs */
|
1230 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG0, "USPRG0",
|
1231 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1232 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1233 | 76a66253 | j_mayer | 0x00000000);
|
1234 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
1235 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1236 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1237 | 76a66253 | j_mayer | 0x00000000);
|
1238 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
1239 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1240 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1241 | 76a66253 | j_mayer | 0x00000000);
|
1242 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
1243 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1244 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1245 | 76a66253 | j_mayer | 0x00000000);
|
1246 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
1247 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1248 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1249 | 76a66253 | j_mayer | 0x00000000);
|
1250 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
1251 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1252 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1253 | 76a66253 | j_mayer | 0x00000000);
|
1254 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
1255 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1256 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1257 | 76a66253 | j_mayer | 0x00000000);
|
1258 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
1259 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1260 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1261 | 76a66253 | j_mayer | 0x00000000);
|
1262 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
1263 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1264 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1265 | 76a66253 | j_mayer | 0x00000000);
|
1266 | 76a66253 | j_mayer | } |
1267 | 76a66253 | j_mayer | |
1268 | 76a66253 | j_mayer | /* SPR specific to PowerPC 440 implementation */
|
1269 | 76a66253 | j_mayer | static void gen_spr_440 (CPUPPCState *env) |
1270 | 76a66253 | j_mayer | { |
1271 | 76a66253 | j_mayer | /* Cache control */
|
1272 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1273 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV0, "DNV0",
|
1274 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1275 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1276 | 76a66253 | j_mayer | 0x00000000);
|
1277 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1278 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV1, "DNV1",
|
1279 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1280 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1281 | 76a66253 | j_mayer | 0x00000000);
|
1282 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1283 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV2, "DNV2",
|
1284 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1285 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1286 | 76a66253 | j_mayer | 0x00000000);
|
1287 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1288 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV3, "DNV3",
|
1289 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1290 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1291 | 76a66253 | j_mayer | 0x00000000);
|
1292 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1293 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT0, "DVT0",
|
1294 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1295 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1296 | 76a66253 | j_mayer | 0x00000000);
|
1297 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1298 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT1, "DVT1",
|
1299 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1300 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1301 | 76a66253 | j_mayer | 0x00000000);
|
1302 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1303 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT2, "DVT2",
|
1304 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1305 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1306 | 76a66253 | j_mayer | 0x00000000);
|
1307 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1308 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT3, "DVT3",
|
1309 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1310 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1311 | 76a66253 | j_mayer | 0x00000000);
|
1312 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1313 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVLIM, "DVLIM",
|
1314 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1315 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1316 | 76a66253 | j_mayer | 0x00000000);
|
1317 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1318 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV0, "INV0",
|
1319 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1320 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1321 | 76a66253 | j_mayer | 0x00000000);
|
1322 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1323 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV1, "INV1",
|
1324 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1325 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1326 | 76a66253 | j_mayer | 0x00000000);
|
1327 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1328 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV2, "INV2",
|
1329 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1330 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1331 | 76a66253 | j_mayer | 0x00000000);
|
1332 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1333 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV3, "INV3",
|
1334 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1335 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1336 | 76a66253 | j_mayer | 0x00000000);
|
1337 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1338 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT0, "IVT0",
|
1339 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1340 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1341 | 76a66253 | j_mayer | 0x00000000);
|
1342 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1343 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT1, "IVT1",
|
1344 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1345 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1346 | 76a66253 | j_mayer | 0x00000000);
|
1347 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1348 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT2, "IVT2",
|
1349 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1350 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1351 | 76a66253 | j_mayer | 0x00000000);
|
1352 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1353 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT3, "IVT3",
|
1354 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1355 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1356 | 76a66253 | j_mayer | 0x00000000);
|
1357 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1358 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVLIM, "IVLIM",
|
1359 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1360 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1361 | 76a66253 | j_mayer | 0x00000000);
|
1362 | 76a66253 | j_mayer | /* Cache debug */
|
1363 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1364 | 76a66253 | j_mayer | spr_register(env, SPR_440_DCBTRH, "DCBTRH",
|
1365 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1366 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1367 | 76a66253 | j_mayer | 0x00000000);
|
1368 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1369 | 76a66253 | j_mayer | spr_register(env, SPR_440_DCBTRL, "DCBTRL",
|
1370 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1371 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1372 | 76a66253 | j_mayer | 0x00000000);
|
1373 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1374 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_ICDBDR, "ICDBDR",
|
1375 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1376 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1377 | 76a66253 | j_mayer | 0x00000000);
|
1378 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1379 | 76a66253 | j_mayer | spr_register(env, SPR_440_ICBTRH, "ICBTRH",
|
1380 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1381 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1382 | 76a66253 | j_mayer | 0x00000000);
|
1383 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1384 | 76a66253 | j_mayer | spr_register(env, SPR_440_ICBTRL, "ICBTRL",
|
1385 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1386 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1387 | 76a66253 | j_mayer | 0x00000000);
|
1388 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1389 | 76a66253 | j_mayer | spr_register(env, SPR_440_DBDR, "DBDR",
|
1390 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1391 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1392 | 76a66253 | j_mayer | 0x00000000);
|
1393 | 76a66253 | j_mayer | /* Processor control */
|
1394 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_CCR0, "CCR0",
|
1395 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1396 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1397 | 76a66253 | j_mayer | 0x00000000);
|
1398 | 76a66253 | j_mayer | spr_register(env, SPR_440_RSTCFG, "RSTCFG",
|
1399 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1400 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1401 | 76a66253 | j_mayer | 0x00000000);
|
1402 | 76a66253 | j_mayer | /* Storage control */
|
1403 | 76a66253 | j_mayer | spr_register(env, SPR_440_MMUCR, "MMUCR",
|
1404 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1405 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1406 | 76a66253 | j_mayer | 0x00000000);
|
1407 | 76a66253 | j_mayer | } |
1408 | 76a66253 | j_mayer | |
1409 | 76a66253 | j_mayer | /* SPR shared between PowerPC 40x implementations */
|
1410 | 76a66253 | j_mayer | static void gen_spr_40x (CPUPPCState *env) |
1411 | 76a66253 | j_mayer | { |
1412 | 76a66253 | j_mayer | /* Cache */
|
1413 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1414 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DCCR, "DCCR",
|
1415 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1416 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1417 | 76a66253 | j_mayer | 0x00000000);
|
1418 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1419 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DCWR, "DCWR",
|
1420 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1421 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1422 | 76a66253 | j_mayer | 0x00000000);
|
1423 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1424 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ICCR, "ICCR",
|
1425 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1426 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1427 | 76a66253 | j_mayer | 0x00000000);
|
1428 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1429 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_ICDBDR, "ICDBDR",
|
1430 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1431 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1432 | 76a66253 | j_mayer | 0x00000000);
|
1433 | 76a66253 | j_mayer | /* Bus access control */
|
1434 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SGR, "SGR",
|
1435 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1436 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1437 | 76a66253 | j_mayer | 0xFFFFFFFF);
|
1438 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ZPR, "ZPR",
|
1439 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1440 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1441 | 76a66253 | j_mayer | 0x00000000);
|
1442 | 76a66253 | j_mayer | /* MMU */
|
1443 | 76a66253 | j_mayer | spr_register(env, SPR_40x_PID, "PID",
|
1444 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1445 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1446 | 76a66253 | j_mayer | 0x00000000);
|
1447 | 76a66253 | j_mayer | /* Exception */
|
1448 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DEAR, "DEAR",
|
1449 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1450 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1451 | 76a66253 | j_mayer | 0x00000000);
|
1452 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ESR, "ESR",
|
1453 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1454 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1455 | 76a66253 | j_mayer | 0x00000000);
|
1456 | 76a66253 | j_mayer | spr_register(env, SPR_40x_EVPR, "EVPR",
|
1457 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1458 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1459 | 76a66253 | j_mayer | 0x00000000);
|
1460 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SRR2, "SRR2",
|
1461 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1462 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1463 | 76a66253 | j_mayer | 0x00000000);
|
1464 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SRR3, "SRR3",
|
1465 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1466 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1467 | 76a66253 | j_mayer | 0x00000000);
|
1468 | 76a66253 | j_mayer | /* Timers */
|
1469 | 76a66253 | j_mayer | spr_register(env, SPR_40x_PIT, "PIT",
|
1470 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1471 | 76a66253 | j_mayer | &spr_read_40x_pit, &spr_write_40x_pit, |
1472 | 76a66253 | j_mayer | 0x00000000);
|
1473 | 76a66253 | j_mayer | spr_register(env, SPR_40x_TCR, "TCR",
|
1474 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1475 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tcr, |
1476 | 76a66253 | j_mayer | 0x00000000);
|
1477 | 76a66253 | j_mayer | spr_register(env, SPR_40x_TSR, "TSR",
|
1478 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1479 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tsr, |
1480 | 76a66253 | j_mayer | 0x00000000);
|
1481 | 76a66253 | j_mayer | /* Debug interface */
|
1482 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1483 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC1, "DAC1",
|
1484 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1485 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1486 | 76a66253 | j_mayer | 0x00000000);
|
1487 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1488 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1489 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1490 | 76a66253 | j_mayer | 0x00000000);
|
1491 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1492 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DBCR0, "DBCR0",
|
1493 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1494 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1495 | 76a66253 | j_mayer | 0x00000000);
|
1496 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1497 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DBSR, "DBSR",
|
1498 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1499 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1500 | 76a66253 | j_mayer | /* Last reset was system reset (system boot */
|
1501 | 76a66253 | j_mayer | 0x00000300);
|
1502 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1503 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC1, "IAC1",
|
1504 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1505 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1506 | 76a66253 | j_mayer | 0x00000000);
|
1507 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1508 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1509 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1510 | 76a66253 | j_mayer | 0x00000000);
|
1511 | 76a66253 | j_mayer | } |
1512 | 76a66253 | j_mayer | |
1513 | 76a66253 | j_mayer | /* SPR specific to PowerPC 405 implementation */
|
1514 | 76a66253 | j_mayer | static void gen_spr_405 (CPUPPCState *env) |
1515 | 76a66253 | j_mayer | { |
1516 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_CCR0, "CCR0",
|
1517 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1518 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1519 | 76a66253 | j_mayer | 0x00700000);
|
1520 | 76a66253 | j_mayer | /* Debug */
|
1521 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1522 | 76a66253 | j_mayer | spr_register(env, SPR_405_DBCR1, "DBCR1",
|
1523 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1524 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1525 | 76a66253 | j_mayer | 0x00000000);
|
1526 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1527 | 76a66253 | j_mayer | spr_register(env, SPR_405_DVC1, "DVC1",
|
1528 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1529 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1530 | 76a66253 | j_mayer | 0x00000000);
|
1531 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1532 | 76a66253 | j_mayer | spr_register(env, SPR_405_DVC2, "DVC2",
|
1533 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1534 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1535 | 76a66253 | j_mayer | 0x00000000);
|
1536 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1537 | 76a66253 | j_mayer | spr_register(env, SPR_405_IAC3, "IAC3",
|
1538 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1539 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1540 | 76a66253 | j_mayer | 0x00000000);
|
1541 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1542 | 76a66253 | j_mayer | spr_register(env, SPR_405_IAC4, "IAC4",
|
1543 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1544 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1545 | 76a66253 | j_mayer | 0x00000000);
|
1546 | 76a66253 | j_mayer | /* Storage control */
|
1547 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1548 | 76a66253 | j_mayer | spr_register(env, SPR_405_SLER, "SLER",
|
1549 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1550 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1551 | 76a66253 | j_mayer | 0x00000000);
|
1552 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1553 | 76a66253 | j_mayer | spr_register(env, SPR_405_SU0R, "SU0R",
|
1554 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1555 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1556 | 76a66253 | j_mayer | 0x00000000);
|
1557 | 76a66253 | j_mayer | /* SPRG */
|
1558 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG0, "USPRG0",
|
1559 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1560 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1561 | 76a66253 | j_mayer | 0x00000000);
|
1562 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
1563 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1564 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1565 | 76a66253 | j_mayer | 0x00000000);
|
1566 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
1567 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1568 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1569 | 76a66253 | j_mayer | 0x00000000);
|
1570 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
1571 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1572 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1573 | 76a66253 | j_mayer | 0x00000000);
|
1574 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
1575 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1576 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1577 | 76a66253 | j_mayer | 0x00000000);
|
1578 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
1579 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1580 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1581 | 76a66253 | j_mayer | 0x00000000);
|
1582 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
1583 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1584 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1585 | 76a66253 | j_mayer | 0x00000000);
|
1586 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
1587 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1588 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1589 | 76a66253 | j_mayer | 0x00000000);
|
1590 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
1591 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1592 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1593 | 76a66253 | j_mayer | 0x00000000);
|
1594 | 76a66253 | j_mayer | /* Debug */
|
1595 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1596 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1597 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1598 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1599 | 76a66253 | j_mayer | 0x00000000);
|
1600 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1601 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1602 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1603 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1604 | 76a66253 | j_mayer | 0x00000000);
|
1605 | 76a66253 | j_mayer | } |
1606 | 76a66253 | j_mayer | |
1607 | 76a66253 | j_mayer | /* SPR shared between PowerPC 401 & 403 implementations */
|
1608 | 76a66253 | j_mayer | static void gen_spr_401_403 (CPUPPCState *env) |
1609 | 76a66253 | j_mayer | { |
1610 | 76a66253 | j_mayer | /* Time base */
|
1611 | 76a66253 | j_mayer | spr_register(env, SPR_403_VTBL, "TBL",
|
1612 | 76a66253 | j_mayer | &spr_read_tbl, SPR_NOACCESS, |
1613 | 76a66253 | j_mayer | &spr_read_tbl, SPR_NOACCESS, |
1614 | 76a66253 | j_mayer | 0x00000000);
|
1615 | 76a66253 | j_mayer | spr_register(env, SPR_403_TBL, "TBL",
|
1616 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1617 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_tbl, |
1618 | 76a66253 | j_mayer | 0x00000000);
|
1619 | 76a66253 | j_mayer | spr_register(env, SPR_403_VTBU, "TBU",
|
1620 | 76a66253 | j_mayer | &spr_read_tbu, SPR_NOACCESS, |
1621 | 76a66253 | j_mayer | &spr_read_tbu, SPR_NOACCESS, |
1622 | 76a66253 | j_mayer | 0x00000000);
|
1623 | 76a66253 | j_mayer | spr_register(env, SPR_403_TBU, "TBU",
|
1624 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1625 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_tbu, |
1626 | 76a66253 | j_mayer | 0x00000000);
|
1627 | 76a66253 | j_mayer | /* Debug */
|
1628 | 76a66253 | j_mayer | /* XXX: not implemented */
|
1629 | 76a66253 | j_mayer | spr_register(env, SPR_403_CDBCR, "CDBCR",
|
1630 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1631 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1632 | 76a66253 | j_mayer | 0x00000000);
|
1633 | 76a66253 | j_mayer | } |
1634 | 76a66253 | j_mayer | |
1635 | 76a66253 | j_mayer | /* SPR specific to PowerPC 403 implementation */
|
1636 | 76a66253 | j_mayer | static void gen_spr_403 (CPUPPCState *env) |
1637 | 76a66253 | j_mayer | { |
1638 | 76a66253 | j_mayer | /* MMU */
|
1639 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBL1, "PBL1",
|
1640 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1641 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1642 | 76a66253 | j_mayer | 0x00000000);
|
1643 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBU1, "PBU1",
|
1644 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1645 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1646 | 76a66253 | j_mayer | 0x00000000);
|
1647 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBL2, "PBL2",
|
1648 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1649 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1650 | 76a66253 | j_mayer | 0x00000000);
|
1651 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBU2, "PBU2",
|
1652 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1653 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1654 | 76a66253 | j_mayer | 0x00000000);
|
1655 | 76a66253 | j_mayer | /* Debug */
|
1656 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1657 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1658 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1659 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1660 | 76a66253 | j_mayer | 0x00000000);
|
1661 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1662 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1663 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1664 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1665 | 76a66253 | j_mayer | 0x00000000);
|
1666 | 76a66253 | j_mayer | } |
1667 | 76a66253 | j_mayer | |
1668 | 76a66253 | j_mayer | /* SPR specific to PowerPC compression coprocessor extension */
|
1669 | 76a66253 | j_mayer | #if defined (TODO)
|
1670 | 76a66253 | j_mayer | static void gen_spr_compress (CPUPPCState *env) |
1671 | 76a66253 | j_mayer | { |
1672 | 76a66253 | j_mayer | spr_register(env, SPR_401_SKR, "SKR",
|
1673 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1674 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1675 | 76a66253 | j_mayer | 0x00000000);
|
1676 | 76a66253 | j_mayer | } |
1677 | 76a66253 | j_mayer | #endif
|
1678 | 76a66253 | j_mayer | |
1679 | 76a66253 | j_mayer | // XXX: TODO (64 bits PowerPC SPRs)
|
1680 | 76a66253 | j_mayer | /*
|
1681 | 76a66253 | j_mayer | * ASR => SPR 280 (64 bits)
|
1682 | 76a66253 | j_mayer | * FPECR => SPR 1022 (?)
|
1683 | 76a66253 | j_mayer | * VRSAVE => SPR 256 (Altivec)
|
1684 | 76a66253 | j_mayer | * SCOMC => SPR 276 (64 bits ?)
|
1685 | 76a66253 | j_mayer | * SCOMD => SPR 277 (64 bits ?)
|
1686 | 76a66253 | j_mayer | * HSPRG0 => SPR 304 (hypervisor)
|
1687 | 76a66253 | j_mayer | * HSPRG1 => SPR 305 (hypervisor)
|
1688 | 76a66253 | j_mayer | * HDEC => SPR 310 (hypervisor)
|
1689 | 76a66253 | j_mayer | * HIOR => SPR 311 (hypervisor)
|
1690 | 76a66253 | j_mayer | * RMOR => SPR 312 (970)
|
1691 | 76a66253 | j_mayer | * HRMOR => SPR 313 (hypervisor)
|
1692 | 76a66253 | j_mayer | * HSRR0 => SPR 314 (hypervisor)
|
1693 | 76a66253 | j_mayer | * HSRR1 => SPR 315 (hypervisor)
|
1694 | 76a66253 | j_mayer | * LPCR => SPR 316 (970)
|
1695 | 76a66253 | j_mayer | * LPIDR => SPR 317 (970)
|
1696 | 76a66253 | j_mayer | * ... and more (thermal management, performance counters, ...)
|
1697 | 76a66253 | j_mayer | */
|
1698 | 76a66253 | j_mayer | |
1699 | 76a66253 | j_mayer | static void init_ppc_proc (CPUPPCState *env, ppc_def_t *def) |
1700 | 76a66253 | j_mayer | { |
1701 | 76a66253 | j_mayer | env->reserve = -1;
|
1702 | 76a66253 | j_mayer | /* Default MMU definitions */
|
1703 | 76a66253 | j_mayer | env->nb_BATs = -1;
|
1704 | 76a66253 | j_mayer | env->nb_tlb = 0;
|
1705 | 76a66253 | j_mayer | env->nb_ways = 0;
|
1706 | 76a66253 | j_mayer | /* XXX: missing:
|
1707 | 76a66253 | j_mayer | * 32 bits PowerPC:
|
1708 | 76a66253 | j_mayer | * - MPC5xx(x)
|
1709 | 76a66253 | j_mayer | * - MPC8xx(x)
|
1710 | 76a66253 | j_mayer | * - RCPU (same as MPC5xx ?)
|
1711 | 76a66253 | j_mayer | */
|
1712 | 76a66253 | j_mayer | spr_register(env, SPR_PVR, "PVR",
|
1713 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1714 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1715 | 76a66253 | j_mayer | def->pvr); |
1716 | 76a66253 | j_mayer | printf("%s: PVR %08x mask %08x => %08x\n", __func__,
|
1717 | 76a66253 | j_mayer | def->pvr, def->pvr_mask, def->pvr & def->pvr_mask); |
1718 | 76a66253 | j_mayer | switch (def->pvr & def->pvr_mask) {
|
1719 | 426613db | j_mayer | /* Embedded PowerPC from IBM */
|
1720 | 76a66253 | j_mayer | case CPU_PPC_401A1: /* 401 A1 family */ |
1721 | 76a66253 | j_mayer | case CPU_PPC_401B2: /* 401 B2 family */ |
1722 | 76a66253 | j_mayer | case CPU_PPC_401C2: /* 401 C2 family */ |
1723 | 76a66253 | j_mayer | case CPU_PPC_401D2: /* 401 D2 family */ |
1724 | 76a66253 | j_mayer | case CPU_PPC_401E2: /* 401 E2 family */ |
1725 | 76a66253 | j_mayer | case CPU_PPC_401F2: /* 401 F2 family */ |
1726 | 76a66253 | j_mayer | case CPU_PPC_401G2: /* 401 G2 family */ |
1727 | 76a66253 | j_mayer | case CPU_PPC_IOP480: /* IOP 480 family */ |
1728 | 76a66253 | j_mayer | case CPU_PPC_COBRA: /* IBM Processor for Network Resources */ |
1729 | 76a66253 | j_mayer | gen_spr_generic(env); |
1730 | 76a66253 | j_mayer | gen_spr_40x(env); |
1731 | 76a66253 | j_mayer | gen_spr_401_403(env); |
1732 | 76a66253 | j_mayer | #if defined (TODO)
|
1733 | 76a66253 | j_mayer | /* XXX: optional ? */
|
1734 | 76a66253 | j_mayer | gen_spr_compress(env); |
1735 | 76a66253 | j_mayer | #endif
|
1736 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1737 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1738 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1739 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1740 | 76a66253 | j_mayer | break;
|
1741 | 76a66253 | j_mayer | |
1742 | 76a66253 | j_mayer | case CPU_PPC_403GA: /* 403 GA family */ |
1743 | 76a66253 | j_mayer | case CPU_PPC_403GB: /* 403 GB family */ |
1744 | 76a66253 | j_mayer | case CPU_PPC_403GC: /* 403 GC family */ |
1745 | 76a66253 | j_mayer | case CPU_PPC_403GCX: /* 403 GCX family */ |
1746 | 76a66253 | j_mayer | gen_spr_generic(env); |
1747 | 76a66253 | j_mayer | gen_spr_40x(env); |
1748 | 76a66253 | j_mayer | gen_spr_401_403(env); |
1749 | 76a66253 | j_mayer | gen_spr_403(env); |
1750 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1751 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1752 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1753 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1754 | 76a66253 | j_mayer | break;
|
1755 | 76a66253 | j_mayer | |
1756 | 76a66253 | j_mayer | case CPU_PPC_405CR: /* 405 GP/CR family */ |
1757 | 76a66253 | j_mayer | case CPU_PPC_405EP: /* 405 EP family */ |
1758 | 76a66253 | j_mayer | case CPU_PPC_405GPR: /* 405 GPR family */ |
1759 | 76a66253 | j_mayer | case CPU_PPC_405D2: /* 405 D2 family */ |
1760 | 76a66253 | j_mayer | case CPU_PPC_405D4: /* 405 D4 family */ |
1761 | 76a66253 | j_mayer | gen_spr_generic(env); |
1762 | 76a66253 | j_mayer | /* Time base */
|
1763 | 76a66253 | j_mayer | gen_tbl(env); |
1764 | 76a66253 | j_mayer | gen_spr_40x(env); |
1765 | 76a66253 | j_mayer | gen_spr_405(env); |
1766 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1767 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1768 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1769 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1770 | 76a66253 | j_mayer | break;
|
1771 | 76a66253 | j_mayer | |
1772 | 76a66253 | j_mayer | case CPU_PPC_NPE405H: /* NPe405 H family */ |
1773 | 76a66253 | j_mayer | case CPU_PPC_NPE405H2:
|
1774 | 76a66253 | j_mayer | case CPU_PPC_NPE405L: /* Npe405 L family */ |
1775 | 76a66253 | j_mayer | gen_spr_generic(env); |
1776 | 76a66253 | j_mayer | /* Time base */
|
1777 | 76a66253 | j_mayer | gen_tbl(env); |
1778 | 76a66253 | j_mayer | gen_spr_40x(env); |
1779 | 76a66253 | j_mayer | gen_spr_405(env); |
1780 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1781 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1782 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1783 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1784 | 76a66253 | j_mayer | break;
|
1785 | 76a66253 | j_mayer | |
1786 | 76a66253 | j_mayer | #if defined (TODO)
|
1787 | 76a66253 | j_mayer | case CPU_PPC_STB01000:
|
1788 | 76a66253 | j_mayer | #endif
|
1789 | 76a66253 | j_mayer | #if defined (TODO)
|
1790 | 76a66253 | j_mayer | case CPU_PPC_STB01010:
|
1791 | 76a66253 | j_mayer | #endif
|
1792 | 76a66253 | j_mayer | #if defined (TODO)
|
1793 | 76a66253 | j_mayer | case CPU_PPC_STB0210:
|
1794 | 76a66253 | j_mayer | #endif
|
1795 | 76a66253 | j_mayer | case CPU_PPC_STB03: /* STB03 family */ |
1796 | 76a66253 | j_mayer | #if defined (TODO)
|
1797 | 76a66253 | j_mayer | case CPU_PPC_STB043: /* STB043 family */ |
1798 | 76a66253 | j_mayer | #endif
|
1799 | 76a66253 | j_mayer | #if defined (TODO)
|
1800 | 76a66253 | j_mayer | case CPU_PPC_STB045: /* STB045 family */ |
1801 | 76a66253 | j_mayer | #endif
|
1802 | 76a66253 | j_mayer | case CPU_PPC_STB25: /* STB25 family */ |
1803 | 76a66253 | j_mayer | #if defined (TODO)
|
1804 | 76a66253 | j_mayer | case CPU_PPC_STB130: /* STB130 family */ |
1805 | 76a66253 | j_mayer | #endif
|
1806 | 76a66253 | j_mayer | gen_spr_generic(env); |
1807 | 76a66253 | j_mayer | /* Time base */
|
1808 | 76a66253 | j_mayer | gen_tbl(env); |
1809 | 76a66253 | j_mayer | gen_spr_40x(env); |
1810 | 76a66253 | j_mayer | gen_spr_405(env); |
1811 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1812 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1813 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1814 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1815 | 76a66253 | j_mayer | break;
|
1816 | 76a66253 | j_mayer | |
1817 | 76a66253 | j_mayer | case CPU_PPC_440EP: /* 440 EP family */ |
1818 | 76a66253 | j_mayer | case CPU_PPC_440GP: /* 440 GP family */ |
1819 | 76a66253 | j_mayer | case CPU_PPC_440GX: /* 440 GX family */ |
1820 | 76a66253 | j_mayer | case CPU_PPC_440GXc: /* 440 GXc family */ |
1821 | 76a66253 | j_mayer | case CPU_PPC_440GXf: /* 440 GXf family */ |
1822 | 76a66253 | j_mayer | case CPU_PPC_440SP: /* 440 SP family */ |
1823 | 76a66253 | j_mayer | case CPU_PPC_440SP2:
|
1824 | 76a66253 | j_mayer | case CPU_PPC_440SPE: /* 440 SPE family */ |
1825 | 76a66253 | j_mayer | gen_spr_generic(env); |
1826 | 76a66253 | j_mayer | /* Time base */
|
1827 | 76a66253 | j_mayer | gen_tbl(env); |
1828 | 76a66253 | j_mayer | gen_spr_BookE(env); |
1829 | 76a66253 | j_mayer | gen_spr_440(env); |
1830 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1831 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1832 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1833 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1834 | 76a66253 | j_mayer | break;
|
1835 | 76a66253 | j_mayer | |
1836 | 426613db | j_mayer | /* Embedded PowerPC from Freescale */
|
1837 | 76a66253 | j_mayer | #if defined (TODO)
|
1838 | 76a66253 | j_mayer | case CPU_PPC_5xx:
|
1839 | 76a66253 | j_mayer | break;
|
1840 | 76a66253 | j_mayer | #endif
|
1841 | 76a66253 | j_mayer | #if defined (TODO)
|
1842 | 76a66253 | j_mayer | case CPU_PPC_8xx: /* MPC821 / 823 / 850 / 860 */ |
1843 | 76a66253 | j_mayer | break;
|
1844 | 76a66253 | j_mayer | #endif
|
1845 | 76a66253 | j_mayer | #if defined (TODO)
|
1846 | 76a66253 | j_mayer | case CPU_PPC_82xx_HIP3: /* MPC8240 / 8260 */ |
1847 | 76a66253 | j_mayer | case CPU_PPC_82xx_HIP4: /* MPC8240 / 8260 */ |
1848 | 76a66253 | j_mayer | break;
|
1849 | 76a66253 | j_mayer | #endif
|
1850 | 76a66253 | j_mayer | #if defined (TODO)
|
1851 | 76a66253 | j_mayer | case CPU_PPC_827x: /* MPC 827x / 828x */ |
1852 | 76a66253 | j_mayer | break;
|
1853 | 76a66253 | j_mayer | #endif
|
1854 | 76a66253 | j_mayer | |
1855 | 426613db | j_mayer | /* XXX: Use MPC8540 PVR to implement a test PowerPC BookE target */
|
1856 | 76a66253 | j_mayer | case CPU_PPC_e500v110:
|
1857 | 76a66253 | j_mayer | case CPU_PPC_e500v120:
|
1858 | 76a66253 | j_mayer | case CPU_PPC_e500v210:
|
1859 | 76a66253 | j_mayer | case CPU_PPC_e500v220:
|
1860 | 76a66253 | j_mayer | gen_spr_generic(env); |
1861 | 76a66253 | j_mayer | /* Time base */
|
1862 | 76a66253 | j_mayer | gen_tbl(env); |
1863 | 76a66253 | j_mayer | gen_spr_BookE(env); |
1864 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1865 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1866 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1867 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1868 | 76a66253 | j_mayer | break;
|
1869 | 76a66253 | j_mayer | |
1870 | 76a66253 | j_mayer | #if defined (TODO)
|
1871 | 76a66253 | j_mayer | case CPU_PPC_e600:
|
1872 | 76a66253 | j_mayer | break;
|
1873 | 76a66253 | j_mayer | #endif
|
1874 | 76a66253 | j_mayer | |
1875 | 426613db | j_mayer | /* 32 bits PowerPC */
|
1876 | 76a66253 | j_mayer | case CPU_PPC_601: /* PowerPC 601 */ |
1877 | 76a66253 | j_mayer | gen_spr_generic(env); |
1878 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
1879 | 76a66253 | j_mayer | gen_spr_601(env); |
1880 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
1881 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1882 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
1883 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1884 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1885 | 76a66253 | j_mayer | 0x00000000);
|
1886 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1887 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
1888 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1889 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1890 | 76a66253 | j_mayer | 0x00000000);
|
1891 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1892 | 76a66253 | j_mayer | spr_register(env, SPR_601_HID2, "HID2",
|
1893 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1894 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1895 | 76a66253 | j_mayer | 0x00000000);
|
1896 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1897 | 76a66253 | j_mayer | spr_register(env, SPR_601_HID5, "HID5",
|
1898 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1899 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1900 | 76a66253 | j_mayer | 0x00000000);
|
1901 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1902 | 76a66253 | j_mayer | #if 0 /* ? */
|
1903 | 76a66253 | j_mayer | spr_register(env, SPR_601_HID15, "HID15",
|
1904 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
1905 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic,
|
1906 | 76a66253 | j_mayer | 0x00000000);
|
1907 | 76a66253 | j_mayer | #endif
|
1908 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1909 | 76a66253 | j_mayer | env->nb_ways = 2;
|
1910 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1911 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1912 | 76a66253 | j_mayer | break;
|
1913 | 76a66253 | j_mayer | |
1914 | 76a66253 | j_mayer | case CPU_PPC_602: /* PowerPC 602 */ |
1915 | 76a66253 | j_mayer | gen_spr_generic(env); |
1916 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
1917 | 76a66253 | j_mayer | /* Memory management */
|
1918 | 76a66253 | j_mayer | gen_low_BATs(env); |
1919 | 76a66253 | j_mayer | /* Time base */
|
1920 | 76a66253 | j_mayer | gen_tbl(env); |
1921 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
1922 | 76a66253 | j_mayer | gen_spr_602(env); |
1923 | 76a66253 | j_mayer | /* hardware implementation registers */
|
1924 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1925 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
1926 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1927 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1928 | 76a66253 | j_mayer | 0x00000000);
|
1929 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1930 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
1931 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1932 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1933 | 76a66253 | j_mayer | 0x00000000);
|
1934 | 76a66253 | j_mayer | break;
|
1935 | 76a66253 | j_mayer | |
1936 | 76a66253 | j_mayer | case CPU_PPC_603: /* PowerPC 603 */ |
1937 | 76a66253 | j_mayer | case CPU_PPC_603E: /* PowerPC 603e */ |
1938 | 76a66253 | j_mayer | case CPU_PPC_603E7v:
|
1939 | 76a66253 | j_mayer | case CPU_PPC_603E7v2:
|
1940 | 76a66253 | j_mayer | case CPU_PPC_603P: /* PowerPC 603p */ |
1941 | 76a66253 | j_mayer | case CPU_PPC_603R: /* PowerPC 603r */ |
1942 | 76a66253 | j_mayer | gen_spr_generic(env); |
1943 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
1944 | 76a66253 | j_mayer | /* Memory management */
|
1945 | 76a66253 | j_mayer | gen_low_BATs(env); |
1946 | 76a66253 | j_mayer | /* Time base */
|
1947 | 76a66253 | j_mayer | gen_tbl(env); |
1948 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
1949 | 76a66253 | j_mayer | gen_spr_603(env); |
1950 | 76a66253 | j_mayer | /* hardware implementation registers */
|
1951 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1952 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
1953 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1954 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1955 | 76a66253 | j_mayer | 0x00000000);
|
1956 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1957 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
1958 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1959 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1960 | 76a66253 | j_mayer | 0x00000000);
|
1961 | 76a66253 | j_mayer | break;
|
1962 | 76a66253 | j_mayer | |
1963 | 76a66253 | j_mayer | case CPU_PPC_G2: /* PowerPC G2 family */ |
1964 | 76a66253 | j_mayer | case CPU_PPC_G2H4:
|
1965 | 76a66253 | j_mayer | case CPU_PPC_G2gp:
|
1966 | 76a66253 | j_mayer | case CPU_PPC_G2ls:
|
1967 | 76a66253 | j_mayer | case CPU_PPC_G2LE: /* PowerPC G2LE family */ |
1968 | 76a66253 | j_mayer | case CPU_PPC_G2LEgp:
|
1969 | 76a66253 | j_mayer | case CPU_PPC_G2LEls:
|
1970 | 76a66253 | j_mayer | gen_spr_generic(env); |
1971 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
1972 | 76a66253 | j_mayer | /* Memory management */
|
1973 | 76a66253 | j_mayer | gen_low_BATs(env); |
1974 | 76a66253 | j_mayer | /* Time base */
|
1975 | 76a66253 | j_mayer | gen_tbl(env); |
1976 | 76a66253 | j_mayer | /* Memory management */
|
1977 | 76a66253 | j_mayer | gen_high_BATs(env); |
1978 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
1979 | 76a66253 | j_mayer | gen_spr_G2_755(env); |
1980 | 76a66253 | j_mayer | gen_spr_G2(env); |
1981 | 76a66253 | j_mayer | /* Hardware implementation register */
|
1982 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1983 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
1984 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1985 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1986 | 76a66253 | j_mayer | 0x00000000);
|
1987 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1988 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
1989 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1990 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1991 | 76a66253 | j_mayer | 0x00000000);
|
1992 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1993 | 76a66253 | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
1994 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1995 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1996 | 76a66253 | j_mayer | 0x00000000);
|
1997 | 76a66253 | j_mayer | break;
|
1998 | 76a66253 | j_mayer | |
1999 | 76a66253 | j_mayer | case CPU_PPC_604: /* PowerPC 604 */ |
2000 | 76a66253 | j_mayer | case CPU_PPC_604E: /* PowerPC 604e */ |
2001 | 76a66253 | j_mayer | case CPU_PPC_604R: /* PowerPC 604r */ |
2002 | 76a66253 | j_mayer | gen_spr_generic(env); |
2003 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2004 | 76a66253 | j_mayer | /* Memory management */
|
2005 | 76a66253 | j_mayer | gen_low_BATs(env); |
2006 | 76a66253 | j_mayer | /* Time base */
|
2007 | 76a66253 | j_mayer | gen_tbl(env); |
2008 | 76a66253 | j_mayer | gen_spr_604(env); |
2009 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2010 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2011 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2012 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2013 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2014 | 76a66253 | j_mayer | 0x00000000);
|
2015 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2016 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2017 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2018 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2019 | 76a66253 | j_mayer | 0x00000000);
|
2020 | 76a66253 | j_mayer | break;
|
2021 | 76a66253 | j_mayer | |
2022 | 76a66253 | j_mayer | case CPU_PPC_74x: /* PowerPC 740 / 750 */ |
2023 | 76a66253 | j_mayer | case CPU_PPC_740E:
|
2024 | 76a66253 | j_mayer | case CPU_PPC_750E:
|
2025 | 76a66253 | j_mayer | case CPU_PPC_74xP: /* PowerPC 740P / 750P */ |
2026 | 76a66253 | j_mayer | case CPU_PPC_750CXE21: /* IBM PowerPC 750cxe */ |
2027 | 76a66253 | j_mayer | case CPU_PPC_750CXE22:
|
2028 | 76a66253 | j_mayer | case CPU_PPC_750CXE23:
|
2029 | 76a66253 | j_mayer | case CPU_PPC_750CXE24:
|
2030 | 76a66253 | j_mayer | case CPU_PPC_750CXE24b:
|
2031 | 76a66253 | j_mayer | case CPU_PPC_750CXE31:
|
2032 | 76a66253 | j_mayer | case CPU_PPC_750CXE31b:
|
2033 | 76a66253 | j_mayer | case CPU_PPC_750CXR:
|
2034 | 76a66253 | j_mayer | gen_spr_generic(env); |
2035 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2036 | 76a66253 | j_mayer | /* Memory management */
|
2037 | 76a66253 | j_mayer | gen_low_BATs(env); |
2038 | 76a66253 | j_mayer | /* Time base */
|
2039 | 76a66253 | j_mayer | gen_tbl(env); |
2040 | 76a66253 | j_mayer | gen_spr_7xx(env); |
2041 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2042 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2043 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2044 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2045 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2046 | 76a66253 | j_mayer | 0x00000000);
|
2047 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2048 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2049 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2050 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2051 | 76a66253 | j_mayer | 0x00000000);
|
2052 | 76a66253 | j_mayer | break;
|
2053 | 76a66253 | j_mayer | |
2054 | 76a66253 | j_mayer | case CPU_PPC_750FX10: /* IBM PowerPC 750 FX */ |
2055 | 76a66253 | j_mayer | case CPU_PPC_750FX20:
|
2056 | 76a66253 | j_mayer | case CPU_PPC_750FX21:
|
2057 | 76a66253 | j_mayer | case CPU_PPC_750FX22:
|
2058 | 76a66253 | j_mayer | case CPU_PPC_750FX23:
|
2059 | 76a66253 | j_mayer | case CPU_PPC_750GX10: /* IBM PowerPC 750 GX */ |
2060 | 76a66253 | j_mayer | case CPU_PPC_750GX11:
|
2061 | 76a66253 | j_mayer | case CPU_PPC_750GX12:
|
2062 | 76a66253 | j_mayer | gen_spr_generic(env); |
2063 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2064 | 76a66253 | j_mayer | /* Memory management */
|
2065 | 76a66253 | j_mayer | gen_low_BATs(env); |
2066 | 76a66253 | j_mayer | /* PowerPC 750fx & 750gx has 8 DBATs and 8 IBATs */
|
2067 | 76a66253 | j_mayer | gen_high_BATs(env); |
2068 | 76a66253 | j_mayer | /* Time base */
|
2069 | 76a66253 | j_mayer | gen_tbl(env); |
2070 | 76a66253 | j_mayer | gen_spr_7xx(env); |
2071 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2072 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2073 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2074 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2075 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2076 | 76a66253 | j_mayer | 0x00000000);
|
2077 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2078 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2079 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2080 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2081 | 76a66253 | j_mayer | 0x00000000);
|
2082 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2083 | 76a66253 | j_mayer | spr_register(env, SPR_750_HID2, "HID2",
|
2084 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2085 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2086 | 76a66253 | j_mayer | 0x00000000);
|
2087 | 76a66253 | j_mayer | break;
|
2088 | 76a66253 | j_mayer | |
2089 | 76a66253 | j_mayer | case CPU_PPC_755_10: /* PowerPC 755 */ |
2090 | 76a66253 | j_mayer | case CPU_PPC_755_11:
|
2091 | 76a66253 | j_mayer | case CPU_PPC_755_20:
|
2092 | 76a66253 | j_mayer | case CPU_PPC_755D:
|
2093 | 76a66253 | j_mayer | case CPU_PPC_755E:
|
2094 | 76a66253 | j_mayer | gen_spr_generic(env); |
2095 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2096 | 76a66253 | j_mayer | /* Memory management */
|
2097 | 76a66253 | j_mayer | gen_low_BATs(env); |
2098 | 76a66253 | j_mayer | /* Time base */
|
2099 | 76a66253 | j_mayer | gen_tbl(env); |
2100 | 76a66253 | j_mayer | /* Memory management */
|
2101 | 76a66253 | j_mayer | gen_high_BATs(env); |
2102 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
2103 | 76a66253 | j_mayer | gen_spr_G2_755(env); |
2104 | 76a66253 | j_mayer | /* L2 cache control */
|
2105 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2106 | 76a66253 | j_mayer | spr_register(env, SPR_ICTC, "ICTC",
|
2107 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2108 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2109 | 76a66253 | j_mayer | 0x00000000);
|
2110 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2111 | 76a66253 | j_mayer | spr_register(env, SPR_L2PM, "L2PM",
|
2112 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2113 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2114 | 76a66253 | j_mayer | 0x00000000);
|
2115 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2116 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2117 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2118 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2119 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2120 | 76a66253 | j_mayer | 0x00000000);
|
2121 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2122 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2123 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2124 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2125 | 76a66253 | j_mayer | 0x00000000);
|
2126 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2127 | 76a66253 | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
2128 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2129 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2130 | 76a66253 | j_mayer | 0x00000000);
|
2131 | 76a66253 | j_mayer | break;
|
2132 | 76a66253 | j_mayer | |
2133 | 76a66253 | j_mayer | #if defined (TODO)
|
2134 | 426613db | j_mayer | /* G4 family */
|
2135 | 76a66253 | j_mayer | case CPU_PPC_7400: /* PowerPC 7400 */ |
2136 | 76a66253 | j_mayer | case CPU_PPC_7410C: /* PowerPC 7410 */ |
2137 | 76a66253 | j_mayer | case CPU_PPC_7410D:
|
2138 | 76a66253 | j_mayer | case CPU_PPC_7410E:
|
2139 | 76a66253 | j_mayer | case CPU_PPC_7441: /* PowerPC 7441 */ |
2140 | 76a66253 | j_mayer | case CPU_PPC_7445: /* PowerPC 7445 */ |
2141 | 76a66253 | j_mayer | case CPU_PPC_7447: /* PowerPC 7447 */ |
2142 | 76a66253 | j_mayer | case CPU_PPC_7447A: /* PowerPC 7447A */ |
2143 | 76a66253 | j_mayer | case CPU_PPC_7448: /* PowerPC 7448 */ |
2144 | 76a66253 | j_mayer | case CPU_PPC_7450: /* PowerPC 7450 */ |
2145 | 76a66253 | j_mayer | case CPU_PPC_7450b:
|
2146 | 76a66253 | j_mayer | case CPU_PPC_7451: /* PowerPC 7451 */ |
2147 | 76a66253 | j_mayer | case CPU_PPC_7451G:
|
2148 | 76a66253 | j_mayer | case CPU_PPC_7455: /* PowerPC 7455 */ |
2149 | 76a66253 | j_mayer | case CPU_PPC_7455F:
|
2150 | 76a66253 | j_mayer | case CPU_PPC_7455G:
|
2151 | 76a66253 | j_mayer | case CPU_PPC_7457: /* PowerPC 7457 */ |
2152 | 76a66253 | j_mayer | case CPU_PPC_7457C:
|
2153 | 76a66253 | j_mayer | case CPU_PPC_7457A: /* PowerPC 7457A */ |
2154 | 76a66253 | j_mayer | break;
|
2155 | 76a66253 | j_mayer | #endif
|
2156 | 76a66253 | j_mayer | |
2157 | 426613db | j_mayer | /* 64 bits PowerPC */
|
2158 | 426613db | j_mayer | #if defined (TARGET_PPC64)
|
2159 | 76a66253 | j_mayer | #if defined (TODO)
|
2160 | 76a66253 | j_mayer | case CPU_PPC_620: /* PowerPC 620 */ |
2161 | 76a66253 | j_mayer | case CPU_PPC_630: /* PowerPC 630 (Power 3) */ |
2162 | 76a66253 | j_mayer | case CPU_PPC_631: /* PowerPC 631 (Power 3+) */ |
2163 | 76a66253 | j_mayer | case CPU_PPC_POWER4: /* Power 4 */ |
2164 | 76a66253 | j_mayer | case CPU_PPC_POWER4P: /* Power 4+ */ |
2165 | 76a66253 | j_mayer | case CPU_PPC_POWER5: /* Power 5 */ |
2166 | 76a66253 | j_mayer | case CPU_PPC_POWER5P: /* Power 5+ */ |
2167 | 426613db | j_mayer | #endif
|
2168 | 76a66253 | j_mayer | case CPU_PPC_970: /* PowerPC 970 */ |
2169 | 76a66253 | j_mayer | case CPU_PPC_970FX10: /* PowerPC 970 FX */ |
2170 | 76a66253 | j_mayer | case CPU_PPC_970FX20:
|
2171 | 76a66253 | j_mayer | case CPU_PPC_970FX21:
|
2172 | 76a66253 | j_mayer | case CPU_PPC_970FX30:
|
2173 | 76a66253 | j_mayer | case CPU_PPC_970FX31:
|
2174 | 76a66253 | j_mayer | case CPU_PPC_970MP10: /* PowerPC 970 MP */ |
2175 | 76a66253 | j_mayer | case CPU_PPC_970MP11:
|
2176 | 426613db | j_mayer | #if defined (TODO)
|
2177 | 76a66253 | j_mayer | case CPU_PPC_CELL10: /* Cell family */ |
2178 | 76a66253 | j_mayer | case CPU_PPC_CELL20:
|
2179 | 76a66253 | j_mayer | case CPU_PPC_CELL30:
|
2180 | 76a66253 | j_mayer | case CPU_PPC_CELL31:
|
2181 | 426613db | j_mayer | #endif
|
2182 | 426613db | j_mayer | #if defined (TODO)
|
2183 | 76a66253 | j_mayer | case CPU_PPC_RS64: /* Apache (RS64/A35) */ |
2184 | 76a66253 | j_mayer | case CPU_PPC_RS64II: /* NorthStar (RS64-II/A50) */ |
2185 | 76a66253 | j_mayer | case CPU_PPC_RS64III: /* Pulsar (RS64-III) */ |
2186 | 76a66253 | j_mayer | case CPU_PPC_RS64IV: /* IceStar/IStar/SStar (RS64-IV) */ |
2187 | 76a66253 | j_mayer | #endif
|
2188 | 426613db | j_mayer | break;
|
2189 | 426613db | j_mayer | #endif /* defined (TARGET_PPC64) */ |
2190 | 76a66253 | j_mayer | |
2191 | 76a66253 | j_mayer | #if defined (TODO)
|
2192 | 76a66253 | j_mayer | /* POWER */
|
2193 | 76a66253 | j_mayer | case CPU_POWER: /* POWER */ |
2194 | 76a66253 | j_mayer | case CPU_POWER2: /* POWER2 */ |
2195 | 76a66253 | j_mayer | break;
|
2196 | 76a66253 | j_mayer | #endif
|
2197 | 76a66253 | j_mayer | |
2198 | 76a66253 | j_mayer | default:
|
2199 | 76a66253 | j_mayer | gen_spr_generic(env); |
2200 | 76a66253 | j_mayer | break;
|
2201 | 76a66253 | j_mayer | } |
2202 | 76a66253 | j_mayer | if (env->nb_BATs == -1) |
2203 | 76a66253 | j_mayer | env->nb_BATs = 4;
|
2204 | 76a66253 | j_mayer | /* Allocate TLBs buffer when needed */
|
2205 | 76a66253 | j_mayer | if (env->nb_tlb != 0) { |
2206 | 76a66253 | j_mayer | int nb_tlb = env->nb_tlb;
|
2207 | 76a66253 | j_mayer | if (env->id_tlbs != 0) |
2208 | 76a66253 | j_mayer | nb_tlb *= 2;
|
2209 | 76a66253 | j_mayer | env->tlb = qemu_mallocz(nb_tlb * sizeof(ppc_tlb_t));
|
2210 | 76a66253 | j_mayer | /* Pre-compute some useful values */
|
2211 | 76a66253 | j_mayer | env->tlb_per_way = env->nb_tlb / env->nb_ways; |
2212 | 76a66253 | j_mayer | } |
2213 | 76a66253 | j_mayer | } |
2214 | 76a66253 | j_mayer | |
2215 | 76a66253 | j_mayer | #if defined(PPC_DUMP_CPU)
|
2216 | 76a66253 | j_mayer | static void dump_sprs (CPUPPCState *env) |
2217 | 76a66253 | j_mayer | { |
2218 | 76a66253 | j_mayer | ppc_spr_t *spr; |
2219 | 76a66253 | j_mayer | uint32_t pvr = env->spr[SPR_PVR]; |
2220 | 76a66253 | j_mayer | uint32_t sr, sw, ur, uw; |
2221 | 76a66253 | j_mayer | int i, j, n;
|
2222 | 76a66253 | j_mayer | |
2223 | 76a66253 | j_mayer | printf("* SPRs for PVR=%08x\n", pvr);
|
2224 | 76a66253 | j_mayer | for (i = 0; i < 32; i++) { |
2225 | 76a66253 | j_mayer | for (j = 0; j < 32; j++) { |
2226 | 76a66253 | j_mayer | n = (i << 5) | j;
|
2227 | 76a66253 | j_mayer | spr = &env->spr_cb[n]; |
2228 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2229 | 3fc6c082 | bellard | sw = spr->oea_write != NULL && spr->oea_write != SPR_NOACCESS;
|
2230 | 3fc6c082 | bellard | sr = spr->oea_read != NULL && spr->oea_read != SPR_NOACCESS;
|
2231 | 76a66253 | j_mayer | #else
|
2232 | 76a66253 | j_mayer | sw = 0;
|
2233 | 76a66253 | j_mayer | sr = 0;
|
2234 | 76a66253 | j_mayer | #endif
|
2235 | 3fc6c082 | bellard | uw = spr->uea_write != NULL && spr->uea_write != SPR_NOACCESS;
|
2236 | 3fc6c082 | bellard | ur = spr->uea_read != NULL && spr->uea_read != SPR_NOACCESS;
|
2237 | 3fc6c082 | bellard | if (sw || sr || uw || ur) {
|
2238 | 3fc6c082 | bellard | printf("%4d (%03x) %8s s%c%c u%c%c\n",
|
2239 | 3fc6c082 | bellard | (i << 5) | j, (i << 5) | j, spr->name, |
2240 | 3fc6c082 | bellard | sw ? 'w' : '-', sr ? 'r' : '-', |
2241 | 3fc6c082 | bellard | uw ? 'w' : '-', ur ? 'r' : '-'); |
2242 | 3fc6c082 | bellard | } |
2243 | 3fc6c082 | bellard | } |
2244 | 3fc6c082 | bellard | } |
2245 | 3fc6c082 | bellard | fflush(stdout); |
2246 | 3fc6c082 | bellard | fflush(stderr); |
2247 | 3fc6c082 | bellard | } |
2248 | 3fc6c082 | bellard | #endif
|
2249 | 3fc6c082 | bellard | |
2250 | 3fc6c082 | bellard | /*****************************************************************************/
|
2251 | 3fc6c082 | bellard | #include <stdlib.h> |
2252 | 3fc6c082 | bellard | #include <string.h> |
2253 | 3fc6c082 | bellard | |
2254 | 3fc6c082 | bellard | int fflush (FILE *stream);
|
2255 | 3fc6c082 | bellard | |
2256 | 3fc6c082 | bellard | /* Opcode types */
|
2257 | 3fc6c082 | bellard | enum {
|
2258 | 3fc6c082 | bellard | PPC_DIRECT = 0, /* Opcode routine */ |
2259 | 3fc6c082 | bellard | PPC_INDIRECT = 1, /* Indirect opcode table */ |
2260 | 3fc6c082 | bellard | }; |
2261 | 3fc6c082 | bellard | |
2262 | 3fc6c082 | bellard | static inline int is_indirect_opcode (void *handler) |
2263 | 3fc6c082 | bellard | { |
2264 | 3fc6c082 | bellard | return ((unsigned long)handler & 0x03) == PPC_INDIRECT; |
2265 | 3fc6c082 | bellard | } |
2266 | 3fc6c082 | bellard | |
2267 | 3fc6c082 | bellard | static inline opc_handler_t **ind_table(void *handler) |
2268 | 3fc6c082 | bellard | { |
2269 | 3fc6c082 | bellard | return (opc_handler_t **)((unsigned long)handler & ~3); |
2270 | 3fc6c082 | bellard | } |
2271 | 3fc6c082 | bellard | |
2272 | 3fc6c082 | bellard | /* Instruction table creation */
|
2273 | 3fc6c082 | bellard | /* Opcodes tables creation */
|
2274 | 3fc6c082 | bellard | static void fill_new_table (opc_handler_t **table, int len) |
2275 | 3fc6c082 | bellard | { |
2276 | 3fc6c082 | bellard | int i;
|
2277 | 3fc6c082 | bellard | |
2278 | 3fc6c082 | bellard | for (i = 0; i < len; i++) |
2279 | 3fc6c082 | bellard | table[i] = &invalid_handler; |
2280 | 3fc6c082 | bellard | } |
2281 | 3fc6c082 | bellard | |
2282 | 3fc6c082 | bellard | static int create_new_table (opc_handler_t **table, unsigned char idx) |
2283 | 3fc6c082 | bellard | { |
2284 | 3fc6c082 | bellard | opc_handler_t **tmp; |
2285 | 3fc6c082 | bellard | |
2286 | 3fc6c082 | bellard | tmp = malloc(0x20 * sizeof(opc_handler_t)); |
2287 | 3fc6c082 | bellard | if (tmp == NULL) |
2288 | 3fc6c082 | bellard | return -1; |
2289 | 3fc6c082 | bellard | fill_new_table(tmp, 0x20);
|
2290 | 3fc6c082 | bellard | table[idx] = (opc_handler_t *)((unsigned long)tmp | PPC_INDIRECT); |
2291 | 3fc6c082 | bellard | |
2292 | 3fc6c082 | bellard | return 0; |
2293 | 3fc6c082 | bellard | } |
2294 | 3fc6c082 | bellard | |
2295 | 3fc6c082 | bellard | static int insert_in_table (opc_handler_t **table, unsigned char idx, |
2296 | 3fc6c082 | bellard | opc_handler_t *handler) |
2297 | 3fc6c082 | bellard | { |
2298 | 3fc6c082 | bellard | if (table[idx] != &invalid_handler)
|
2299 | 3fc6c082 | bellard | return -1; |
2300 | 3fc6c082 | bellard | table[idx] = handler; |
2301 | 3fc6c082 | bellard | |
2302 | 3fc6c082 | bellard | return 0; |
2303 | 3fc6c082 | bellard | } |
2304 | 3fc6c082 | bellard | |
2305 | 3fc6c082 | bellard | static int register_direct_insn (opc_handler_t **ppc_opcodes, |
2306 | 3fc6c082 | bellard | unsigned char idx, opc_handler_t *handler) |
2307 | 3fc6c082 | bellard | { |
2308 | 3fc6c082 | bellard | if (insert_in_table(ppc_opcodes, idx, handler) < 0) { |
2309 | 3fc6c082 | bellard | printf("*** ERROR: opcode %02x already assigned in main "
|
2310 | 76a66253 | j_mayer | "opcode table\n", idx);
|
2311 | 3fc6c082 | bellard | return -1; |
2312 | 3fc6c082 | bellard | } |
2313 | 3fc6c082 | bellard | |
2314 | 3fc6c082 | bellard | return 0; |
2315 | 3fc6c082 | bellard | } |
2316 | 3fc6c082 | bellard | |
2317 | 3fc6c082 | bellard | static int register_ind_in_table (opc_handler_t **table, |
2318 | 3fc6c082 | bellard | unsigned char idx1, unsigned char idx2, |
2319 | 3fc6c082 | bellard | opc_handler_t *handler) |
2320 | 3fc6c082 | bellard | { |
2321 | 3fc6c082 | bellard | if (table[idx1] == &invalid_handler) {
|
2322 | 3fc6c082 | bellard | if (create_new_table(table, idx1) < 0) { |
2323 | 3fc6c082 | bellard | printf("*** ERROR: unable to create indirect table "
|
2324 | 76a66253 | j_mayer | "idx=%02x\n", idx1);
|
2325 | 3fc6c082 | bellard | return -1; |
2326 | 3fc6c082 | bellard | } |
2327 | 3fc6c082 | bellard | } else {
|
2328 | 3fc6c082 | bellard | if (!is_indirect_opcode(table[idx1])) {
|
2329 | 3fc6c082 | bellard | printf("*** ERROR: idx %02x already assigned to a direct "
|
2330 | 76a66253 | j_mayer | "opcode\n", idx1);
|
2331 | 3fc6c082 | bellard | return -1; |
2332 | 3fc6c082 | bellard | } |
2333 | 3fc6c082 | bellard | } |
2334 | 3fc6c082 | bellard | if (handler != NULL && |
2335 | 3fc6c082 | bellard | insert_in_table(ind_table(table[idx1]), idx2, handler) < 0) {
|
2336 | 3fc6c082 | bellard | printf("*** ERROR: opcode %02x already assigned in "
|
2337 | 76a66253 | j_mayer | "opcode table %02x\n", idx2, idx1);
|
2338 | 3fc6c082 | bellard | return -1; |
2339 | 3fc6c082 | bellard | } |
2340 | 3fc6c082 | bellard | |
2341 | 3fc6c082 | bellard | return 0; |
2342 | 3fc6c082 | bellard | } |
2343 | 3fc6c082 | bellard | |
2344 | 3fc6c082 | bellard | static int register_ind_insn (opc_handler_t **ppc_opcodes, |
2345 | 3fc6c082 | bellard | unsigned char idx1, unsigned char idx2, |
2346 | 76a66253 | j_mayer | opc_handler_t *handler) |
2347 | 3fc6c082 | bellard | { |
2348 | 3fc6c082 | bellard | int ret;
|
2349 | 3fc6c082 | bellard | |
2350 | 3fc6c082 | bellard | ret = register_ind_in_table(ppc_opcodes, idx1, idx2, handler); |
2351 | 3fc6c082 | bellard | |
2352 | 3fc6c082 | bellard | return ret;
|
2353 | 3fc6c082 | bellard | } |
2354 | 3fc6c082 | bellard | |
2355 | 3fc6c082 | bellard | static int register_dblind_insn (opc_handler_t **ppc_opcodes, |
2356 | 3fc6c082 | bellard | unsigned char idx1, unsigned char idx2, |
2357 | 76a66253 | j_mayer | unsigned char idx3, opc_handler_t *handler) |
2358 | 3fc6c082 | bellard | { |
2359 | 3fc6c082 | bellard | if (register_ind_in_table(ppc_opcodes, idx1, idx2, NULL) < 0) { |
2360 | 3fc6c082 | bellard | printf("*** ERROR: unable to join indirect table idx "
|
2361 | 76a66253 | j_mayer | "[%02x-%02x]\n", idx1, idx2);
|
2362 | 3fc6c082 | bellard | return -1; |
2363 | 3fc6c082 | bellard | } |
2364 | 3fc6c082 | bellard | if (register_ind_in_table(ind_table(ppc_opcodes[idx1]), idx2, idx3,
|
2365 | 3fc6c082 | bellard | handler) < 0) {
|
2366 | 3fc6c082 | bellard | printf("*** ERROR: unable to insert opcode "
|
2367 | 76a66253 | j_mayer | "[%02x-%02x-%02x]\n", idx1, idx2, idx3);
|
2368 | 3fc6c082 | bellard | return -1; |
2369 | 3fc6c082 | bellard | } |
2370 | 3fc6c082 | bellard | |
2371 | 3fc6c082 | bellard | return 0; |
2372 | 3fc6c082 | bellard | } |
2373 | 3fc6c082 | bellard | |
2374 | 3fc6c082 | bellard | static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn) |
2375 | 3fc6c082 | bellard | { |
2376 | 3fc6c082 | bellard | if (insn->opc2 != 0xFF) { |
2377 | 3fc6c082 | bellard | if (insn->opc3 != 0xFF) { |
2378 | 3fc6c082 | bellard | if (register_dblind_insn(ppc_opcodes, insn->opc1, insn->opc2,
|
2379 | 3fc6c082 | bellard | insn->opc3, &insn->handler) < 0)
|
2380 | 3fc6c082 | bellard | return -1; |
2381 | 3fc6c082 | bellard | } else {
|
2382 | 3fc6c082 | bellard | if (register_ind_insn(ppc_opcodes, insn->opc1,
|
2383 | 3fc6c082 | bellard | insn->opc2, &insn->handler) < 0)
|
2384 | 3fc6c082 | bellard | return -1; |
2385 | 3fc6c082 | bellard | } |
2386 | 3fc6c082 | bellard | } else {
|
2387 | 3fc6c082 | bellard | if (register_direct_insn(ppc_opcodes, insn->opc1, &insn->handler) < 0) |
2388 | 3fc6c082 | bellard | return -1; |
2389 | 3fc6c082 | bellard | } |
2390 | 3fc6c082 | bellard | |
2391 | 3fc6c082 | bellard | return 0; |
2392 | 3fc6c082 | bellard | } |
2393 | 3fc6c082 | bellard | |
2394 | 3fc6c082 | bellard | static int test_opcode_table (opc_handler_t **table, int len) |
2395 | 3fc6c082 | bellard | { |
2396 | 3fc6c082 | bellard | int i, count, tmp;
|
2397 | 3fc6c082 | bellard | |
2398 | 3fc6c082 | bellard | for (i = 0, count = 0; i < len; i++) { |
2399 | 3fc6c082 | bellard | /* Consistency fixup */
|
2400 | 3fc6c082 | bellard | if (table[i] == NULL) |
2401 | 3fc6c082 | bellard | table[i] = &invalid_handler; |
2402 | 3fc6c082 | bellard | if (table[i] != &invalid_handler) {
|
2403 | 3fc6c082 | bellard | if (is_indirect_opcode(table[i])) {
|
2404 | 3fc6c082 | bellard | tmp = test_opcode_table(ind_table(table[i]), 0x20);
|
2405 | 3fc6c082 | bellard | if (tmp == 0) { |
2406 | 3fc6c082 | bellard | free(table[i]); |
2407 | 3fc6c082 | bellard | table[i] = &invalid_handler; |
2408 | 3fc6c082 | bellard | } else {
|
2409 | 3fc6c082 | bellard | count++; |
2410 | 3fc6c082 | bellard | } |
2411 | 3fc6c082 | bellard | } else {
|
2412 | 3fc6c082 | bellard | count++; |
2413 | 3fc6c082 | bellard | } |
2414 | 3fc6c082 | bellard | } |
2415 | 3fc6c082 | bellard | } |
2416 | 3fc6c082 | bellard | |
2417 | 3fc6c082 | bellard | return count;
|
2418 | 3fc6c082 | bellard | } |
2419 | 3fc6c082 | bellard | |
2420 | 3fc6c082 | bellard | static void fix_opcode_tables (opc_handler_t **ppc_opcodes) |
2421 | 3fc6c082 | bellard | { |
2422 | 3fc6c082 | bellard | if (test_opcode_table(ppc_opcodes, 0x40) == 0) |
2423 | 3fc6c082 | bellard | printf("*** WARNING: no opcode defined !\n");
|
2424 | 3fc6c082 | bellard | } |
2425 | 3fc6c082 | bellard | |
2426 | 3fc6c082 | bellard | /*****************************************************************************/
|
2427 | 3fc6c082 | bellard | static int create_ppc_opcodes (CPUPPCState *env, ppc_def_t *def) |
2428 | 3fc6c082 | bellard | { |
2429 | 3fc6c082 | bellard | opcode_t *opc, *start, *end; |
2430 | 3fc6c082 | bellard | |
2431 | 3fc6c082 | bellard | fill_new_table(env->opcodes, 0x40);
|
2432 | 3fc6c082 | bellard | #if defined(PPC_DUMP_CPU)
|
2433 | 1b9eb036 | j_mayer | printf("* PowerPC instructions for PVR %08x: %s flags %016" PRIx64
|
2434 | 0487d6a8 | j_mayer | " %08x\n",
|
2435 | 76a66253 | j_mayer | def->pvr, def->name, def->insns_flags, def->flags); |
2436 | 3fc6c082 | bellard | #endif
|
2437 | 3fc6c082 | bellard | if (&opc_start < &opc_end) {
|
2438 | 76a66253 | j_mayer | start = &opc_start; |
2439 | 76a66253 | j_mayer | end = &opc_end; |
2440 | 3fc6c082 | bellard | } else {
|
2441 | 76a66253 | j_mayer | start = &opc_end; |
2442 | 76a66253 | j_mayer | end = &opc_start; |
2443 | 3fc6c082 | bellard | } |
2444 | 3fc6c082 | bellard | for (opc = start + 1; opc != end; opc++) { |
2445 | 3fc6c082 | bellard | if ((opc->handler.type & def->insns_flags) != 0) { |
2446 | 3fc6c082 | bellard | if (register_insn(env->opcodes, opc) < 0) { |
2447 | 76a66253 | j_mayer | printf("*** ERROR initializing PowerPC instruction "
|
2448 | 76a66253 | j_mayer | "0x%02x 0x%02x 0x%02x\n", opc->opc1, opc->opc2,
|
2449 | 76a66253 | j_mayer | opc->opc3); |
2450 | 3fc6c082 | bellard | return -1; |
2451 | 3fc6c082 | bellard | } |
2452 | 3fc6c082 | bellard | #if defined(PPC_DUMP_CPU)
|
2453 | 3fc6c082 | bellard | if (opc1 != 0x00) { |
2454 | 3fc6c082 | bellard | if (opc->opc3 == 0xFF) { |
2455 | 3fc6c082 | bellard | if (opc->opc2 == 0xFF) { |
2456 | 3fc6c082 | bellard | printf(" %02x -- -- (%2d ----) : %s\n",
|
2457 | 3fc6c082 | bellard | opc->opc1, opc->opc1, opc->oname); |
2458 | 3fc6c082 | bellard | } else {
|
2459 | 3fc6c082 | bellard | printf(" %02x %02x -- (%2d %4d) : %s\n",
|
2460 | 3fc6c082 | bellard | opc->opc1, opc->opc2, opc->opc1, opc->opc2, |
2461 | 76a66253 | j_mayer | opc->oname); |
2462 | 3fc6c082 | bellard | } |
2463 | 3fc6c082 | bellard | } else {
|
2464 | 3fc6c082 | bellard | printf(" %02x %02x %02x (%2d %4d) : %s\n",
|
2465 | 3fc6c082 | bellard | opc->opc1, opc->opc2, opc->opc3, |
2466 | 3fc6c082 | bellard | opc->opc1, (opc->opc3 << 5) | opc->opc2,
|
2467 | 3fc6c082 | bellard | opc->oname); |
2468 | 3fc6c082 | bellard | } |
2469 | 3fc6c082 | bellard | } |
2470 | 3fc6c082 | bellard | #endif
|
2471 | 3fc6c082 | bellard | } |
2472 | 3fc6c082 | bellard | } |
2473 | 3fc6c082 | bellard | fix_opcode_tables(env->opcodes); |
2474 | 3fc6c082 | bellard | fflush(stdout); |
2475 | 3fc6c082 | bellard | fflush(stderr); |
2476 | 3fc6c082 | bellard | |
2477 | 3fc6c082 | bellard | return 0; |
2478 | 3fc6c082 | bellard | } |
2479 | 3fc6c082 | bellard | |
2480 | 3fc6c082 | bellard | int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
|
2481 | 3fc6c082 | bellard | { |
2482 | 3fc6c082 | bellard | env->msr_mask = def->msr_mask; |
2483 | 3fc6c082 | bellard | env->flags = def->flags; |
2484 | 76a66253 | j_mayer | if (create_ppc_opcodes(env, def) < 0) |
2485 | 3fc6c082 | bellard | return -1; |
2486 | 3fc6c082 | bellard | init_ppc_proc(env, def); |
2487 | 3fc6c082 | bellard | #if defined(PPC_DUMP_CPU)
|
2488 | 3fc6c082 | bellard | dump_sprs(env); |
2489 | 76a66253 | j_mayer | if (env->tlb != NULL) { |
2490 | 76a66253 | j_mayer | printf("%d %s TLB in %d ways\n", env->nb_tlb,
|
2491 | 76a66253 | j_mayer | env->id_tlbs ? "splitted" : "merged", env->nb_ways); |
2492 | 76a66253 | j_mayer | } |
2493 | 3fc6c082 | bellard | #endif
|
2494 | 3fc6c082 | bellard | |
2495 | 3fc6c082 | bellard | return 0; |
2496 | 3fc6c082 | bellard | } |
2497 | 3fc6c082 | bellard | |
2498 | 76a66253 | j_mayer | void do_compute_hflags (CPUPPCState *env);
|
2499 | 76a66253 | j_mayer | CPUPPCState *cpu_ppc_init (void)
|
2500 | 3fc6c082 | bellard | { |
2501 | 3fc6c082 | bellard | CPUPPCState *env; |
2502 | 3fc6c082 | bellard | |
2503 | 3fc6c082 | bellard | env = qemu_mallocz(sizeof(CPUPPCState));
|
2504 | 3fc6c082 | bellard | if (!env)
|
2505 | 3fc6c082 | bellard | return NULL; |
2506 | 173d6cfe | bellard | cpu_exec_init(env); |
2507 | 3fc6c082 | bellard | tlb_flush(env, 1);
|
2508 | 3fc6c082 | bellard | #if defined (DO_SINGLE_STEP) && 0 |
2509 | 3fc6c082 | bellard | /* Single step trace mode */
|
2510 | 3fc6c082 | bellard | msr_se = 1;
|
2511 | 3fc6c082 | bellard | msr_be = 1;
|
2512 | 3fc6c082 | bellard | #endif
|
2513 | 3fc6c082 | bellard | msr_fp = 1; /* Allow floating point exceptions */ |
2514 | 3fc6c082 | bellard | msr_me = 1; /* Allow machine check exceptions */ |
2515 | 3fc6c082 | bellard | #if defined(CONFIG_USER_ONLY)
|
2516 | 3fc6c082 | bellard | msr_pr = 1;
|
2517 | 3fc6c082 | bellard | #else
|
2518 | 3fc6c082 | bellard | env->nip = 0xFFFFFFFC;
|
2519 | 3fc6c082 | bellard | #endif
|
2520 | 3fc6c082 | bellard | do_compute_hflags(env); |
2521 | 3fc6c082 | bellard | env->reserve = -1;
|
2522 | 3fc6c082 | bellard | return env;
|
2523 | 3fc6c082 | bellard | } |
2524 | 3fc6c082 | bellard | |
2525 | 3fc6c082 | bellard | void cpu_ppc_close(CPUPPCState *env)
|
2526 | 3fc6c082 | bellard | { |
2527 | 3fc6c082 | bellard | /* Should also remove all opcode tables... */
|
2528 | 3fc6c082 | bellard | free(env); |
2529 | 3fc6c082 | bellard | } |
2530 | 3fc6c082 | bellard | |
2531 | 3fc6c082 | bellard | /*****************************************************************************/
|
2532 | 3fc6c082 | bellard | /* PowerPC CPU definitions */
|
2533 | 3fc6c082 | bellard | static ppc_def_t ppc_defs[] =
|
2534 | 3fc6c082 | bellard | { |
2535 | 76a66253 | j_mayer | /* Embedded PowerPC */
|
2536 | 76a66253 | j_mayer | #if defined (TODO)
|
2537 | 76a66253 | j_mayer | /* PowerPC 401 */
|
2538 | 76a66253 | j_mayer | { |
2539 | 76a66253 | j_mayer | .name = "401",
|
2540 | 76a66253 | j_mayer | .pvr = CPU_PPC_401, |
2541 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2542 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_401, |
2543 | 76a66253 | j_mayer | .flags = PPC_FLAGS_401, |
2544 | 76a66253 | j_mayer | .msr_mask = xxx, |
2545 | 76a66253 | j_mayer | }, |
2546 | 3fc6c082 | bellard | #endif
|
2547 | 3fc6c082 | bellard | #if defined (TODO)
|
2548 | 76a66253 | j_mayer | /* IOP480 (401 microcontroler) */
|
2549 | 76a66253 | j_mayer | { |
2550 | 76a66253 | j_mayer | .name = "iop480",
|
2551 | 76a66253 | j_mayer | .pvr = CPU_PPC_IOP480, |
2552 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2553 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_401, |
2554 | 76a66253 | j_mayer | .flags = PPC_FLAGS_401, |
2555 | 76a66253 | j_mayer | .msr_mask = xxx, |
2556 | 76a66253 | j_mayer | }, |
2557 | 3fc6c082 | bellard | #endif
|
2558 | 3fc6c082 | bellard | #if defined (TODO)
|
2559 | 76a66253 | j_mayer | /* IBM Processor for Network Resources */
|
2560 | 76a66253 | j_mayer | { |
2561 | 76a66253 | j_mayer | .name = "Cobra",
|
2562 | 76a66253 | j_mayer | .pvr = CPU_PPC_COBRA, |
2563 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2564 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_401, |
2565 | 76a66253 | j_mayer | .flags = PPC_FLAGS_401, |
2566 | 76a66253 | j_mayer | .msr_mask = xxx, |
2567 | 76a66253 | j_mayer | }, |
2568 | 3fc6c082 | bellard | #endif
|
2569 | 3fc6c082 | bellard | #if defined (TODO)
|
2570 | 76a66253 | j_mayer | /* Generic PowerPC 403 */
|
2571 | 76a66253 | j_mayer | { |
2572 | 76a66253 | j_mayer | .name = "403",
|
2573 | 76a66253 | j_mayer | .pvr = CPU_PPC_403, |
2574 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2575 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_403, |
2576 | 76a66253 | j_mayer | .flags = PPC_FLAGS_403, |
2577 | 76a66253 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2578 | 76a66253 | j_mayer | }, |
2579 | 3fc6c082 | bellard | #endif
|
2580 | 3fc6c082 | bellard | #if defined (TODO)
|
2581 | 76a66253 | j_mayer | /* PowerPC 403 GA */
|
2582 | 76a66253 | j_mayer | { |
2583 | 76a66253 | j_mayer | .name = "403ga",
|
2584 | 76a66253 | j_mayer | .pvr = CPU_PPC_403GA, |
2585 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2586 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_403, |
2587 | 76a66253 | j_mayer | .flags = PPC_FLAGS_403, |
2588 | 76a66253 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2589 | 76a66253 | j_mayer | }, |
2590 | 3fc6c082 | bellard | #endif
|
2591 | 3fc6c082 | bellard | #if defined (TODO)
|
2592 | 76a66253 | j_mayer | /* PowerPC 403 GB */
|
2593 | 76a66253 | j_mayer | { |
2594 | 76a66253 | j_mayer | .name = "403gb",
|
2595 | 76a66253 | j_mayer | .pvr = CPU_PPC_403GB, |
2596 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2597 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_403, |
2598 | 76a66253 | j_mayer | .flags = PPC_FLAGS_403, |
2599 | 76a66253 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2600 | 76a66253 | j_mayer | }, |
2601 | 3fc6c082 | bellard | #endif
|
2602 | 3fc6c082 | bellard | #if defined (TODO)
|
2603 | 76a66253 | j_mayer | /* PowerPC 403 GC */
|
2604 | 76a66253 | j_mayer | { |
2605 | 76a66253 | j_mayer | .name = "403gc",
|
2606 | 76a66253 | j_mayer | .pvr = CPU_PPC_403GC, |
2607 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2608 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_403, |
2609 | 76a66253 | j_mayer | .flags = PPC_FLAGS_403, |
2610 | 76a66253 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2611 | 76a66253 | j_mayer | }, |
2612 | 3fc6c082 | bellard | #endif
|
2613 | 3fc6c082 | bellard | #if defined (TODO)
|
2614 | 76a66253 | j_mayer | /* PowerPC 403 GCX */
|
2615 | 76a66253 | j_mayer | { |
2616 | 76a66253 | j_mayer | .name = "403gcx",
|
2617 | 76a66253 | j_mayer | .pvr = CPU_PPC_403GCX, |
2618 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2619 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_403, |
2620 | 76a66253 | j_mayer | .flags = PPC_FLAGS_403, |
2621 | 76a66253 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2622 | 76a66253 | j_mayer | }, |
2623 | 3fc6c082 | bellard | #endif
|
2624 | 3fc6c082 | bellard | #if defined (TODO)
|
2625 | 76a66253 | j_mayer | /* Generic PowerPC 405 */
|
2626 | 76a66253 | j_mayer | { |
2627 | 76a66253 | j_mayer | .name = "405",
|
2628 | 76a66253 | j_mayer | .pvr = CPU_PPC_405, |
2629 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2630 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2631 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2632 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2633 | 76a66253 | j_mayer | }, |
2634 | 3fc6c082 | bellard | #endif
|
2635 | 3fc6c082 | bellard | #if defined (TODO)
|
2636 | 76a66253 | j_mayer | /* PowerPC 405 CR */
|
2637 | 76a66253 | j_mayer | { |
2638 | 76a66253 | j_mayer | .name = "405cr",
|
2639 | 76a66253 | j_mayer | .pvr = CPU_PPC_405, |
2640 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2641 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2642 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2643 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2644 | 76a66253 | j_mayer | }, |
2645 | 3fc6c082 | bellard | #endif
|
2646 | 3fc6c082 | bellard | #if defined (TODO)
|
2647 | 76a66253 | j_mayer | /* PowerPC 405 GP */
|
2648 | 76a66253 | j_mayer | { |
2649 | 76a66253 | j_mayer | .name = "405gp",
|
2650 | 76a66253 | j_mayer | .pvr = CPU_PPC_405, |
2651 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2652 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2653 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2654 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2655 | 76a66253 | j_mayer | }, |
2656 | 3fc6c082 | bellard | #endif
|
2657 | 3fc6c082 | bellard | #if defined (TODO)
|
2658 | 76a66253 | j_mayer | /* PowerPC 405 EP */
|
2659 | 76a66253 | j_mayer | { |
2660 | 76a66253 | j_mayer | .name = "405ep",
|
2661 | 76a66253 | j_mayer | .pvr = CPU_PPC_405EP, |
2662 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2663 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2664 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2665 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2666 | 76a66253 | j_mayer | }, |
2667 | 3fc6c082 | bellard | #endif
|
2668 | 3fc6c082 | bellard | #if defined (TODO)
|
2669 | 76a66253 | j_mayer | /* PowerPC 405 GPR */
|
2670 | 76a66253 | j_mayer | { |
2671 | 76a66253 | j_mayer | .name = "405gpr",
|
2672 | 76a66253 | j_mayer | .pvr = CPU_PPC_405GPR, |
2673 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2674 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2675 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2676 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2677 | 76a66253 | j_mayer | }, |
2678 | 3fc6c082 | bellard | #endif
|
2679 | 3fc6c082 | bellard | #if defined (TODO)
|
2680 | 76a66253 | j_mayer | /* PowerPC 405 D2 */
|
2681 | 76a66253 | j_mayer | { |
2682 | 76a66253 | j_mayer | .name = "405d2",
|
2683 | 76a66253 | j_mayer | .pvr = CPU_PPC_405D2, |
2684 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2685 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2686 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2687 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2688 | 76a66253 | j_mayer | }, |
2689 | 3fc6c082 | bellard | #endif
|
2690 | 3fc6c082 | bellard | #if defined (TODO)
|
2691 | 76a66253 | j_mayer | /* PowerPC 405 D4 */
|
2692 | 76a66253 | j_mayer | { |
2693 | 76a66253 | j_mayer | .name = "405d4",
|
2694 | 76a66253 | j_mayer | .pvr = CPU_PPC_405D4, |
2695 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2696 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2697 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2698 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2699 | 76a66253 | j_mayer | }, |
2700 | 3fc6c082 | bellard | #endif
|
2701 | 3fc6c082 | bellard | #if defined (TODO)
|
2702 | 76a66253 | j_mayer | /* Npe405 H */
|
2703 | 76a66253 | j_mayer | { |
2704 | 76a66253 | j_mayer | .name = "Npe405H",
|
2705 | 76a66253 | j_mayer | .pvr = CPU_PPC_NPE405H, |
2706 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2707 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2708 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2709 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2710 | 76a66253 | j_mayer | }, |
2711 | 3fc6c082 | bellard | #endif
|
2712 | 3fc6c082 | bellard | #if defined (TODO)
|
2713 | 76a66253 | j_mayer | /* Npe405 L */
|
2714 | 76a66253 | j_mayer | { |
2715 | 76a66253 | j_mayer | .name = "Npe405L",
|
2716 | 76a66253 | j_mayer | .pvr = CPU_PPC_NPE405L, |
2717 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2718 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2719 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2720 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2721 | 76a66253 | j_mayer | }, |
2722 | 3fc6c082 | bellard | #endif
|
2723 | 3fc6c082 | bellard | #if defined (TODO)
|
2724 | 76a66253 | j_mayer | /* STB010000 */
|
2725 | 76a66253 | j_mayer | { |
2726 | 76a66253 | j_mayer | .name = "STB01000",
|
2727 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB01000, |
2728 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2729 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2730 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2731 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2732 | 76a66253 | j_mayer | }, |
2733 | 3fc6c082 | bellard | #endif
|
2734 | 3fc6c082 | bellard | #if defined (TODO)
|
2735 | 76a66253 | j_mayer | /* STB01010 */
|
2736 | 76a66253 | j_mayer | { |
2737 | 76a66253 | j_mayer | .name = "STB01010",
|
2738 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB01010, |
2739 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2740 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2741 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2742 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2743 | 76a66253 | j_mayer | }, |
2744 | 3fc6c082 | bellard | #endif
|
2745 | 3fc6c082 | bellard | #if defined (TODO)
|
2746 | 76a66253 | j_mayer | /* STB0210 */
|
2747 | 76a66253 | j_mayer | { |
2748 | 76a66253 | j_mayer | .name = "STB0210",
|
2749 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB0210, |
2750 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2751 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2752 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2753 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2754 | 76a66253 | j_mayer | }, |
2755 | 3fc6c082 | bellard | #endif
|
2756 | 3fc6c082 | bellard | #if defined (TODO)
|
2757 | 76a66253 | j_mayer | /* STB03xx */
|
2758 | 76a66253 | j_mayer | { |
2759 | 76a66253 | j_mayer | .name = "STB03",
|
2760 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB03, |
2761 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2762 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2763 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2764 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2765 | 76a66253 | j_mayer | }, |
2766 | 3fc6c082 | bellard | #endif
|
2767 | 3fc6c082 | bellard | #if defined (TODO)
|
2768 | 76a66253 | j_mayer | /* STB043x */
|
2769 | 76a66253 | j_mayer | { |
2770 | 76a66253 | j_mayer | .name = "STB043",
|
2771 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB043, |
2772 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2773 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2774 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2775 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2776 | 76a66253 | j_mayer | }, |
2777 | 3fc6c082 | bellard | #endif
|
2778 | 3fc6c082 | bellard | #if defined (TODO)
|
2779 | 76a66253 | j_mayer | /* STB045x */
|
2780 | 76a66253 | j_mayer | { |
2781 | 76a66253 | j_mayer | .name = "STB045",
|
2782 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB045, |
2783 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2784 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2785 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2786 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2787 | 76a66253 | j_mayer | }, |
2788 | 3fc6c082 | bellard | #endif
|
2789 | 3fc6c082 | bellard | #if defined (TODO)
|
2790 | 76a66253 | j_mayer | /* STB25xx */
|
2791 | 76a66253 | j_mayer | { |
2792 | 76a66253 | j_mayer | .name = "STB25",
|
2793 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB25, |
2794 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2795 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2796 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2797 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2798 | 76a66253 | j_mayer | }, |
2799 | 3fc6c082 | bellard | #endif
|
2800 | 3fc6c082 | bellard | #if defined (TODO)
|
2801 | 76a66253 | j_mayer | /* STB130 */
|
2802 | 76a66253 | j_mayer | { |
2803 | 76a66253 | j_mayer | .name = "STB130",
|
2804 | 76a66253 | j_mayer | .pvr = CPU_PPC_STB130, |
2805 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2806 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2807 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2808 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2809 | 76a66253 | j_mayer | }, |
2810 | 3fc6c082 | bellard | #endif
|
2811 | 76a66253 | j_mayer | /* Xilinx PowerPC 405 cores */
|
2812 | 3fc6c082 | bellard | #if defined (TODO)
|
2813 | 76a66253 | j_mayer | { |
2814 | 76a66253 | j_mayer | .name = "x2vp4",
|
2815 | 76a66253 | j_mayer | .pvr = CPU_PPC_X2VP4, |
2816 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2817 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2818 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2819 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2820 | 76a66253 | j_mayer | }, |
2821 | 76a66253 | j_mayer | { |
2822 | 76a66253 | j_mayer | .name = "x2vp7",
|
2823 | 76a66253 | j_mayer | .pvr = CPU_PPC_X2VP7, |
2824 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2825 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2826 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2827 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2828 | 76a66253 | j_mayer | }, |
2829 | 76a66253 | j_mayer | { |
2830 | 76a66253 | j_mayer | .name = "x2vp20",
|
2831 | 76a66253 | j_mayer | .pvr = CPU_PPC_X2VP20, |
2832 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2833 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2834 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2835 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2836 | 76a66253 | j_mayer | }, |
2837 | 76a66253 | j_mayer | { |
2838 | 76a66253 | j_mayer | .name = "x2vp50",
|
2839 | 76a66253 | j_mayer | .pvr = CPU_PPC_X2VP50, |
2840 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2841 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2842 | 76a66253 | j_mayer | .flags = PPC_FLAGS_405, |
2843 | 76a66253 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2844 | 76a66253 | j_mayer | }, |
2845 | 3fc6c082 | bellard | #endif
|
2846 | 3fc6c082 | bellard | #if defined (TODO)
|
2847 | 76a66253 | j_mayer | /* PowerPC 440 EP */
|
2848 | 76a66253 | j_mayer | { |
2849 | 76a66253 | j_mayer | .name = "440ep",
|
2850 | 76a66253 | j_mayer | .pvr = CPU_PPC_440EP, |
2851 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2852 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_440, |
2853 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2854 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2855 | 76a66253 | j_mayer | }, |
2856 | 3fc6c082 | bellard | #endif
|
2857 | 3fc6c082 | bellard | #if defined (TODO)
|
2858 | 76a66253 | j_mayer | /* PowerPC 440 GR */
|
2859 | 76a66253 | j_mayer | { |
2860 | 76a66253 | j_mayer | .name = "440gr",
|
2861 | 76a66253 | j_mayer | .pvr = CPU_PPC_440GR, |
2862 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2863 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_440, |
2864 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2865 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2866 | 76a66253 | j_mayer | }, |
2867 | 3fc6c082 | bellard | #endif
|
2868 | 3fc6c082 | bellard | #if defined (TODO)
|
2869 | 76a66253 | j_mayer | /* PowerPC 440 GP */
|
2870 | 76a66253 | j_mayer | { |
2871 | 76a66253 | j_mayer | .name = "440gp",
|
2872 | 76a66253 | j_mayer | .pvr = CPU_PPC_440GP, |
2873 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2874 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_440, |
2875 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2876 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2877 | 76a66253 | j_mayer | }, |
2878 | 3fc6c082 | bellard | #endif
|
2879 | 3fc6c082 | bellard | #if defined (TODO)
|
2880 | 76a66253 | j_mayer | /* PowerPC 440 GX */
|
2881 | 76a66253 | j_mayer | { |
2882 | 76a66253 | j_mayer | .name = "440gx",
|
2883 | 76a66253 | j_mayer | .pvr = CPU_PPC_440GX, |
2884 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2885 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2886 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2887 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2888 | 76a66253 | j_mayer | }, |
2889 | 3fc6c082 | bellard | #endif
|
2890 | 3fc6c082 | bellard | #if defined (TODO)
|
2891 | 76a66253 | j_mayer | /* PowerPC 440 GXc */
|
2892 | 76a66253 | j_mayer | { |
2893 | 76a66253 | j_mayer | .name = "440gxc",
|
2894 | 76a66253 | j_mayer | .pvr = CPU_PPC_440GXC, |
2895 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2896 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2897 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2898 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2899 | 76a66253 | j_mayer | }, |
2900 | 3fc6c082 | bellard | #endif
|
2901 | 3fc6c082 | bellard | #if defined (TODO)
|
2902 | 76a66253 | j_mayer | /* PowerPC 440 GXf */
|
2903 | 76a66253 | j_mayer | { |
2904 | 76a66253 | j_mayer | .name = "440gxf",
|
2905 | 76a66253 | j_mayer | .pvr = CPU_PPC_440GXF, |
2906 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2907 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2908 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2909 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2910 | 76a66253 | j_mayer | }, |
2911 | 3fc6c082 | bellard | #endif
|
2912 | 3fc6c082 | bellard | #if defined (TODO)
|
2913 | 76a66253 | j_mayer | /* PowerPC 440 SP */
|
2914 | 76a66253 | j_mayer | { |
2915 | 76a66253 | j_mayer | .name = "440sp",
|
2916 | 76a66253 | j_mayer | .pvr = CPU_PPC_440SP, |
2917 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2918 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2919 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2920 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2921 | 76a66253 | j_mayer | }, |
2922 | 3fc6c082 | bellard | #endif
|
2923 | 3fc6c082 | bellard | #if defined (TODO)
|
2924 | 76a66253 | j_mayer | /* PowerPC 440 SP2 */
|
2925 | 76a66253 | j_mayer | { |
2926 | 76a66253 | j_mayer | .name = "440sp2",
|
2927 | 76a66253 | j_mayer | .pvr = CPU_PPC_440SP2, |
2928 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2929 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2930 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2931 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2932 | 76a66253 | j_mayer | }, |
2933 | 3fc6c082 | bellard | #endif
|
2934 | 3fc6c082 | bellard | #if defined (TODO)
|
2935 | 76a66253 | j_mayer | /* PowerPC 440 SPE */
|
2936 | 76a66253 | j_mayer | { |
2937 | 76a66253 | j_mayer | .name = "440spe",
|
2938 | 76a66253 | j_mayer | .pvr = CPU_PPC_440SPE, |
2939 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2940 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2941 | 76a66253 | j_mayer | .flags = PPC_FLAGS_440, |
2942 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2943 | 76a66253 | j_mayer | }, |
2944 | 3fc6c082 | bellard | #endif
|
2945 | 76a66253 | j_mayer | /* Fake generic BookE PowerPC */
|
2946 | 76a66253 | j_mayer | { |
2947 | 76a66253 | j_mayer | .name = "BookE",
|
2948 | 76a66253 | j_mayer | .pvr = CPU_PPC_e500, |
2949 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2950 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_BOOKE, |
2951 | 76a66253 | j_mayer | .flags = PPC_FLAGS_BOOKE, |
2952 | 76a66253 | j_mayer | .msr_mask = 0x000000000006D630,
|
2953 | 76a66253 | j_mayer | }, |
2954 | 76a66253 | j_mayer | /* PowerPC 460 cores - TODO */
|
2955 | 76a66253 | j_mayer | /* PowerPC MPC 5xx cores - TODO */
|
2956 | 76a66253 | j_mayer | /* PowerPC MPC 8xx cores - TODO */
|
2957 | 76a66253 | j_mayer | /* PowerPC MPC 8xxx cores - TODO */
|
2958 | 76a66253 | j_mayer | /* e200 cores - TODO */
|
2959 | 76a66253 | j_mayer | /* e500 cores - TODO */
|
2960 | 76a66253 | j_mayer | /* e600 cores - TODO */
|
2961 | 76a66253 | j_mayer | |
2962 | 76a66253 | j_mayer | /* 32 bits "classic" PowerPC */
|
2963 | 3fc6c082 | bellard | #if defined (TODO)
|
2964 | 76a66253 | j_mayer | /* PowerPC 601 */
|
2965 | 76a66253 | j_mayer | { |
2966 | 76a66253 | j_mayer | .name = "601",
|
2967 | 76a66253 | j_mayer | .pvr = CPU_PPC_601, |
2968 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2969 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_601, |
2970 | 76a66253 | j_mayer | .flags = PPC_FLAGS_601, |
2971 | 76a66253 | j_mayer | .msr_mask = 0x000000000000FD70,
|
2972 | 76a66253 | j_mayer | }, |
2973 | 3fc6c082 | bellard | #endif
|
2974 | 3fc6c082 | bellard | #if defined (TODO)
|
2975 | 76a66253 | j_mayer | /* PowerPC 602 */
|
2976 | 76a66253 | j_mayer | { |
2977 | 76a66253 | j_mayer | .name = "602",
|
2978 | 76a66253 | j_mayer | .pvr = CPU_PPC_602, |
2979 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2980 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_602, |
2981 | 76a66253 | j_mayer | .flags = PPC_FLAGS_602, |
2982 | 76a66253 | j_mayer | .msr_mask = 0x0000000000C7FF73,
|
2983 | 76a66253 | j_mayer | }, |
2984 | 3fc6c082 | bellard | #endif
|
2985 | 76a66253 | j_mayer | /* PowerPC 603 */
|
2986 | 76a66253 | j_mayer | { |
2987 | 76a66253 | j_mayer | .name = "603",
|
2988 | 76a66253 | j_mayer | .pvr = CPU_PPC_603, |
2989 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2990 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
2991 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
2992 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
2993 | 76a66253 | j_mayer | }, |
2994 | 76a66253 | j_mayer | /* PowerPC 603e */
|
2995 | 76a66253 | j_mayer | { |
2996 | 76a66253 | j_mayer | .name = "603e",
|
2997 | 76a66253 | j_mayer | .pvr = CPU_PPC_603E, |
2998 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2999 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3000 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3001 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3002 | 76a66253 | j_mayer | }, |
3003 | 76a66253 | j_mayer | { |
3004 | 76a66253 | j_mayer | .name = "Stretch",
|
3005 | 76a66253 | j_mayer | .pvr = CPU_PPC_603E, |
3006 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3007 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3008 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3009 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3010 | 76a66253 | j_mayer | }, |
3011 | 76a66253 | j_mayer | /* PowerPC 603p */
|
3012 | 76a66253 | j_mayer | { |
3013 | 76a66253 | j_mayer | .name = "603p",
|
3014 | 76a66253 | j_mayer | .pvr = CPU_PPC_603P, |
3015 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3016 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3017 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3018 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3019 | 76a66253 | j_mayer | }, |
3020 | 76a66253 | j_mayer | /* PowerPC 603e7 */
|
3021 | 76a66253 | j_mayer | { |
3022 | 76a66253 | j_mayer | .name = "603e7",
|
3023 | 76a66253 | j_mayer | .pvr = CPU_PPC_603E7, |
3024 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3025 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3026 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3027 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3028 | 76a66253 | j_mayer | }, |
3029 | 76a66253 | j_mayer | /* PowerPC 603e7v */
|
3030 | 76a66253 | j_mayer | { |
3031 | 76a66253 | j_mayer | .name = "603e7v",
|
3032 | 76a66253 | j_mayer | .pvr = CPU_PPC_603E7v, |
3033 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3034 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3035 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3036 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3037 | 76a66253 | j_mayer | }, |
3038 | 76a66253 | j_mayer | /* PowerPC 603e7v2 */
|
3039 | 76a66253 | j_mayer | { |
3040 | 76a66253 | j_mayer | .name = "603e7v2",
|
3041 | 76a66253 | j_mayer | .pvr = CPU_PPC_603E7v2, |
3042 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3043 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3044 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3045 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3046 | 76a66253 | j_mayer | }, |
3047 | 76a66253 | j_mayer | /* PowerPC 603r */
|
3048 | 76a66253 | j_mayer | { |
3049 | 76a66253 | j_mayer | .name = "603r",
|
3050 | 76a66253 | j_mayer | .pvr = CPU_PPC_603R, |
3051 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3052 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3053 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3054 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3055 | 76a66253 | j_mayer | }, |
3056 | 76a66253 | j_mayer | { |
3057 | 76a66253 | j_mayer | .name = "Goldeneye",
|
3058 | 76a66253 | j_mayer | .pvr = CPU_PPC_603R, |
3059 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3060 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_603, |
3061 | 76a66253 | j_mayer | .flags = PPC_FLAGS_603, |
3062 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3063 | 76a66253 | j_mayer | }, |
3064 | 3fc6c082 | bellard | #if defined (TODO)
|
3065 | 76a66253 | j_mayer | /* XXX: TODO: according to Motorola UM, this is a derivative to 603e */
|
3066 | 76a66253 | j_mayer | { |
3067 | 76a66253 | j_mayer | .name = "G2",
|
3068 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2, |
3069 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3070 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3071 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3072 | 76a66253 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3073 | 76a66253 | j_mayer | }, |
3074 | 76a66253 | j_mayer | { |
3075 | 76a66253 | j_mayer | .name = "G2h4",
|
3076 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2H4, |
3077 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3078 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3079 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3080 | 76a66253 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3081 | 76a66253 | j_mayer | }, |
3082 | 76a66253 | j_mayer | { |
3083 | 76a66253 | j_mayer | .name = "G2gp",
|
3084 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2gp, |
3085 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3086 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3087 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3088 | 76a66253 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3089 | 76a66253 | j_mayer | }, |
3090 | 76a66253 | j_mayer | { |
3091 | 76a66253 | j_mayer | .name = "G2ls",
|
3092 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2ls, |
3093 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3094 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3095 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3096 | 76a66253 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3097 | 76a66253 | j_mayer | }, |
3098 | 76a66253 | j_mayer | { /* Same as G2, with LE mode support */
|
3099 | 76a66253 | j_mayer | .name = "G2le",
|
3100 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2LE, |
3101 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3102 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3103 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3104 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FFF3,
|
3105 | 76a66253 | j_mayer | }, |
3106 | 76a66253 | j_mayer | { |
3107 | 76a66253 | j_mayer | .name = "G2legp",
|
3108 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2LEgp, |
3109 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3110 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3111 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3112 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FFF3,
|
3113 | 76a66253 | j_mayer | }, |
3114 | 76a66253 | j_mayer | { |
3115 | 76a66253 | j_mayer | .name = "G2lels",
|
3116 | 76a66253 | j_mayer | .pvr = CPU_PPC_G2LEls, |
3117 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3118 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3119 | 76a66253 | j_mayer | .flags = PPC_FLAGS_G2, |
3120 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FFF3,
|
3121 | 76a66253 | j_mayer | }, |
3122 | 3fc6c082 | bellard | #endif
|
3123 | 76a66253 | j_mayer | /* PowerPC 604 */
|
3124 | 76a66253 | j_mayer | { |
3125 | 76a66253 | j_mayer | .name = "604",
|
3126 | 76a66253 | j_mayer | .pvr = CPU_PPC_604, |
3127 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3128 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_604, |
3129 | 76a66253 | j_mayer | .flags = PPC_FLAGS_604, |
3130 | 76a66253 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3131 | 76a66253 | j_mayer | }, |
3132 | 76a66253 | j_mayer | /* PowerPC 604e */
|
3133 | 76a66253 | j_mayer | { |
3134 | 76a66253 | j_mayer | .name = "604e",
|
3135 | 76a66253 | j_mayer | .pvr = CPU_PPC_604E, |
3136 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3137 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_604, |
3138 | 76a66253 | j_mayer | .flags = PPC_FLAGS_604, |
3139 | 76a66253 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3140 | 76a66253 | j_mayer | }, |
3141 | 76a66253 | j_mayer | /* PowerPC 604r */
|
3142 | 76a66253 | j_mayer | { |
3143 | 76a66253 | j_mayer | .name = "604r",
|
3144 | 76a66253 | j_mayer | .pvr = CPU_PPC_604R, |
3145 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3146 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_604, |
3147 | 76a66253 | j_mayer | .flags = PPC_FLAGS_604, |
3148 | 76a66253 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3149 | 76a66253 | j_mayer | }, |
3150 | 76a66253 | j_mayer | /* generic G3 */
|
3151 | 76a66253 | j_mayer | { |
3152 | 76a66253 | j_mayer | .name = "G3",
|
3153 | 76a66253 | j_mayer | .pvr = CPU_PPC_74x, |
3154 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3155 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3156 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3157 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3158 | 76a66253 | j_mayer | }, |
3159 | 76a66253 | j_mayer | /* MPC740 (G3) */
|
3160 | 76a66253 | j_mayer | { |
3161 | 76a66253 | j_mayer | .name = "740",
|
3162 | 76a66253 | j_mayer | .pvr = CPU_PPC_74x, |
3163 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3164 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3165 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3166 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3167 | 76a66253 | j_mayer | }, |
3168 | 76a66253 | j_mayer | { |
3169 | 76a66253 | j_mayer | .name = "Arthur",
|
3170 | 76a66253 | j_mayer | .pvr = CPU_PPC_74x, |
3171 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3172 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3173 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3174 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3175 | 76a66253 | j_mayer | }, |
3176 | 3fc6c082 | bellard | #if defined (TODO)
|
3177 | 76a66253 | j_mayer | /* MPC745 (G3) */
|
3178 | 76a66253 | j_mayer | { |
3179 | 76a66253 | j_mayer | .name = "745",
|
3180 | 76a66253 | j_mayer | .pvr = CPU_PPC_74x, |
3181 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3182 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3183 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x5, |
3184 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3185 | 76a66253 | j_mayer | }, |
3186 | 76a66253 | j_mayer | { |
3187 | 76a66253 | j_mayer | .name = "Goldfinger",
|
3188 | 76a66253 | j_mayer | .pvr = CPU_PPC_74x, |
3189 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3190 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3191 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x5, |
3192 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3193 | 76a66253 | j_mayer | }, |
3194 | 3fc6c082 | bellard | #endif
|
3195 | 76a66253 | j_mayer | /* MPC750 (G3) */
|
3196 | 76a66253 | j_mayer | { |
3197 | 76a66253 | j_mayer | .name = "750",
|
3198 | 76a66253 | j_mayer | .pvr = CPU_PPC_74x, |
3199 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3200 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3201 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3202 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3203 | 76a66253 | j_mayer | }, |
3204 | 3fc6c082 | bellard | #if defined (TODO)
|
3205 | 76a66253 | j_mayer | /* MPC755 (G3) */
|
3206 | 76a66253 | j_mayer | { |
3207 | 76a66253 | j_mayer | .name = "755",
|
3208 | 76a66253 | j_mayer | .pvr = CPU_PPC_755, |
3209 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3210 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3211 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x5, |
3212 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3213 | 76a66253 | j_mayer | }, |
3214 | 3fc6c082 | bellard | #endif
|
3215 | 76a66253 | j_mayer | /* MPC740P (G3) */
|
3216 | 76a66253 | j_mayer | { |
3217 | 76a66253 | j_mayer | .name = "740p",
|
3218 | 76a66253 | j_mayer | .pvr = CPU_PPC_74xP, |
3219 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3220 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3221 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3222 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3223 | 76a66253 | j_mayer | }, |
3224 | 76a66253 | j_mayer | { |
3225 | 76a66253 | j_mayer | .name = "Conan/Doyle",
|
3226 | 76a66253 | j_mayer | .pvr = CPU_PPC_74xP, |
3227 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3228 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3229 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3230 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3231 | 76a66253 | j_mayer | }, |
3232 | 3fc6c082 | bellard | #if defined (TODO)
|
3233 | 76a66253 | j_mayer | /* MPC745P (G3) */
|
3234 | 76a66253 | j_mayer | { |
3235 | 76a66253 | j_mayer | .name = "745p",
|
3236 | 76a66253 | j_mayer | .pvr = CPU_PPC_74xP, |
3237 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3238 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3239 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x5, |
3240 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3241 | 76a66253 | j_mayer | }, |
3242 | 3fc6c082 | bellard | #endif
|
3243 | 76a66253 | j_mayer | /* MPC750P (G3) */
|
3244 | 76a66253 | j_mayer | { |
3245 | 76a66253 | j_mayer | .name = "750p",
|
3246 | 76a66253 | j_mayer | .pvr = CPU_PPC_74xP, |
3247 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3248 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3249 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3250 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3251 | 76a66253 | j_mayer | }, |
3252 | 3fc6c082 | bellard | #if defined (TODO)
|
3253 | 76a66253 | j_mayer | /* MPC755P (G3) */
|
3254 | 76a66253 | j_mayer | { |
3255 | 76a66253 | j_mayer | .name = "755p",
|
3256 | 76a66253 | j_mayer | .pvr = CPU_PPC_74xP, |
3257 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3258 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3259 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x5, |
3260 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3261 | 76a66253 | j_mayer | }, |
3262 | 3fc6c082 | bellard | #endif
|
3263 | 76a66253 | j_mayer | /* IBM 750CXe (G3 embedded) */
|
3264 | 76a66253 | j_mayer | { |
3265 | 76a66253 | j_mayer | .name = "750cxe",
|
3266 | 76a66253 | j_mayer | .pvr = CPU_PPC_750CXE, |
3267 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3268 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3269 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3270 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3271 | 76a66253 | j_mayer | }, |
3272 | 76a66253 | j_mayer | /* IBM 750FX (G3 embedded) */
|
3273 | 76a66253 | j_mayer | { |
3274 | 76a66253 | j_mayer | .name = "750fx",
|
3275 | 76a66253 | j_mayer | .pvr = CPU_PPC_750FX, |
3276 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3277 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3278 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3279 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3280 | 76a66253 | j_mayer | }, |
3281 | 76a66253 | j_mayer | /* IBM 750GX (G3 embedded) */
|
3282 | 76a66253 | j_mayer | { |
3283 | 76a66253 | j_mayer | .name = "750gx",
|
3284 | 76a66253 | j_mayer | .pvr = CPU_PPC_750GX, |
3285 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3286 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3287 | 76a66253 | j_mayer | .flags = PPC_FLAGS_7x0, |
3288 | 76a66253 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3289 | 76a66253 | j_mayer | }, |
3290 | 3fc6c082 | bellard | #if defined (TODO)
|
3291 | 76a66253 | j_mayer | /* generic G4 */
|
3292 | 76a66253 | j_mayer | { |
3293 | 76a66253 | j_mayer | .name = "G4",
|
3294 | 76a66253 | j_mayer | .pvr = CPU_PPC_7400, |
3295 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3296 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3297 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3298 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3299 | 76a66253 | j_mayer | }, |
3300 | 3fc6c082 | bellard | #endif
|
3301 | 3fc6c082 | bellard | #if defined (TODO)
|
3302 | 76a66253 | j_mayer | /* PowerPC 7400 (G4) */
|
3303 | 76a66253 | j_mayer | { |
3304 | 76a66253 | j_mayer | .name = "7400",
|
3305 | 76a66253 | j_mayer | .pvr = CPU_PPC_7400, |
3306 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3307 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3308 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3309 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3310 | 76a66253 | j_mayer | }, |
3311 | 76a66253 | j_mayer | { |
3312 | 76a66253 | j_mayer | .name = "Max",
|
3313 | 76a66253 | j_mayer | .pvr = CPU_PPC_7400, |
3314 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3315 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3316 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3317 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3318 | 76a66253 | j_mayer | }, |
3319 | 3fc6c082 | bellard | #endif
|
3320 | 3fc6c082 | bellard | #if defined (TODO)
|
3321 | 76a66253 | j_mayer | /* PowerPC 7410 (G4) */
|
3322 | 76a66253 | j_mayer | { |
3323 | 76a66253 | j_mayer | .name = "7410",
|
3324 | 76a66253 | j_mayer | .pvr = CPU_PPC_7410, |
3325 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3326 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3327 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3328 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3329 | 76a66253 | j_mayer | }, |
3330 | 76a66253 | j_mayer | { |
3331 | 76a66253 | j_mayer | .name = "Nitro",
|
3332 | 76a66253 | j_mayer | .pvr = CPU_PPC_7410, |
3333 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3334 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3335 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3336 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3337 | 76a66253 | j_mayer | }, |
3338 | 3fc6c082 | bellard | #endif
|
3339 | 76a66253 | j_mayer | /* XXX: 7441 */
|
3340 | 76a66253 | j_mayer | /* XXX: 7445 */
|
3341 | 76a66253 | j_mayer | /* XXX: 7447 */
|
3342 | 76a66253 | j_mayer | /* XXX: 7447A */
|
3343 | 3fc6c082 | bellard | #if defined (TODO)
|
3344 | 76a66253 | j_mayer | /* PowerPC 7450 (G4) */
|
3345 | 76a66253 | j_mayer | { |
3346 | 76a66253 | j_mayer | .name = "7450",
|
3347 | 76a66253 | j_mayer | .pvr = CPU_PPC_7450, |
3348 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3349 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3350 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3351 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3352 | 76a66253 | j_mayer | }, |
3353 | 76a66253 | j_mayer | { |
3354 | 76a66253 | j_mayer | .name = "Vger",
|
3355 | 76a66253 | j_mayer | .pvr = CPU_PPC_7450, |
3356 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3357 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3358 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3359 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3360 | 76a66253 | j_mayer | }, |
3361 | 3fc6c082 | bellard | #endif
|
3362 | 76a66253 | j_mayer | /* XXX: 7451 */
|
3363 | 3fc6c082 | bellard | #if defined (TODO)
|
3364 | 76a66253 | j_mayer | /* PowerPC 7455 (G4) */
|
3365 | 76a66253 | j_mayer | { |
3366 | 76a66253 | j_mayer | .name = "7455",
|
3367 | 76a66253 | j_mayer | .pvr = CPU_PPC_7455, |
3368 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3369 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3370 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3371 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3372 | 76a66253 | j_mayer | }, |
3373 | 76a66253 | j_mayer | { |
3374 | 76a66253 | j_mayer | .name = "Apollo 6",
|
3375 | 76a66253 | j_mayer | .pvr = CPU_PPC_7455, |
3376 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3377 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3378 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3379 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3380 | 76a66253 | j_mayer | }, |
3381 | 3fc6c082 | bellard | #endif
|
3382 | 3fc6c082 | bellard | #if defined (TODO)
|
3383 | 76a66253 | j_mayer | /* PowerPC 7457 (G4) */
|
3384 | 76a66253 | j_mayer | { |
3385 | 76a66253 | j_mayer | .name = "7457",
|
3386 | 76a66253 | j_mayer | .pvr = CPU_PPC_7457, |
3387 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3388 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3389 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3390 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3391 | 76a66253 | j_mayer | }, |
3392 | 76a66253 | j_mayer | { |
3393 | 76a66253 | j_mayer | .name = "Apollo 7",
|
3394 | 76a66253 | j_mayer | .pvr = CPU_PPC_7457, |
3395 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3396 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3397 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3398 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3399 | 76a66253 | j_mayer | }, |
3400 | 3fc6c082 | bellard | #endif
|
3401 | 3fc6c082 | bellard | #if defined (TODO)
|
3402 | 76a66253 | j_mayer | /* PowerPC 7457A (G4) */
|
3403 | 76a66253 | j_mayer | { |
3404 | 76a66253 | j_mayer | .name = "7457A",
|
3405 | 76a66253 | j_mayer | .pvr = CPU_PPC_7457A, |
3406 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3407 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3408 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3409 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3410 | 76a66253 | j_mayer | }, |
3411 | 76a66253 | j_mayer | { |
3412 | 76a66253 | j_mayer | .name = "Apollo 7 PM",
|
3413 | 76a66253 | j_mayer | .pvr = CPU_PPC_7457A, |
3414 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3415 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3416 | 76a66253 | j_mayer | .flags = PPC_FLAGS_74xx, |
3417 | 76a66253 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3418 | 76a66253 | j_mayer | }, |
3419 | 3fc6c082 | bellard | #endif
|
3420 | 76a66253 | j_mayer | /* 64 bits PowerPC */
|
3421 | 426613db | j_mayer | #if defined (TARGET_PPC64)
|
3422 | 3fc6c082 | bellard | #if defined (TODO)
|
3423 | 76a66253 | j_mayer | /* PowerPC 620 */
|
3424 | 76a66253 | j_mayer | { |
3425 | 76a66253 | j_mayer | .name = "620",
|
3426 | 76a66253 | j_mayer | .pvr = CPU_PPC_620, |
3427 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3428 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_620, |
3429 | 76a66253 | j_mayer | .flags = PPC_FLAGS_620, |
3430 | 76a66253 | j_mayer | .msr_mask = 0x800000000005FF73,
|
3431 | 76a66253 | j_mayer | }, |
3432 | 3fc6c082 | bellard | #endif
|
3433 | 76a66253 | j_mayer | #if defined (TODO)
|
3434 | 76a66253 | j_mayer | /* PowerPC 630 (POWER3) */
|
3435 | 76a66253 | j_mayer | { |
3436 | 76a66253 | j_mayer | .name = "630",
|
3437 | 76a66253 | j_mayer | .pvr = CPU_PPC_630, |
3438 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3439 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_630, |
3440 | 76a66253 | j_mayer | .flags = PPC_FLAGS_630, |
3441 | 76a66253 | j_mayer | .msr_mask = xxx, |
3442 | 76a66253 | j_mayer | } |
3443 | 76a66253 | j_mayer | { |
3444 | 76a66253 | j_mayer | .name = "POWER3",
|
3445 | 76a66253 | j_mayer | .pvr = CPU_PPC_630, |
3446 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3447 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_630, |
3448 | 76a66253 | j_mayer | .flags = PPC_FLAGS_630, |
3449 | 76a66253 | j_mayer | .msr_mask = xxx, |
3450 | 76a66253 | j_mayer | } |
3451 | 76a66253 | j_mayer | #endif
|
3452 | 76a66253 | j_mayer | #if defined (TODO)
|
3453 | 76a66253 | j_mayer | /* PowerPC 631 (Power 3+)*/
|
3454 | 76a66253 | j_mayer | { |
3455 | 76a66253 | j_mayer | .name = "631",
|
3456 | 76a66253 | j_mayer | .pvr = CPU_PPC_631, |
3457 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3458 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_631, |
3459 | 76a66253 | j_mayer | .flags = PPC_FLAGS_631, |
3460 | 76a66253 | j_mayer | .msr_mask = xxx, |
3461 | 76a66253 | j_mayer | }, |
3462 | 76a66253 | j_mayer | { |
3463 | 76a66253 | j_mayer | .name = "POWER3+",
|
3464 | 76a66253 | j_mayer | .pvr = CPU_PPC_631, |
3465 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3466 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_631, |
3467 | 76a66253 | j_mayer | .flags = PPC_FLAGS_631, |
3468 | 76a66253 | j_mayer | .msr_mask = xxx, |
3469 | 76a66253 | j_mayer | }, |
3470 | 76a66253 | j_mayer | #endif
|
3471 | 76a66253 | j_mayer | #if defined (TODO)
|
3472 | 76a66253 | j_mayer | /* POWER4 */
|
3473 | 76a66253 | j_mayer | { |
3474 | 76a66253 | j_mayer | .name = "POWER4",
|
3475 | 76a66253 | j_mayer | .pvr = CPU_PPC_POWER4, |
3476 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3477 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_POWER4, |
3478 | 76a66253 | j_mayer | .flags = PPC_FLAGS_POWER4, |
3479 | 76a66253 | j_mayer | .msr_mask = xxx, |
3480 | 76a66253 | j_mayer | }, |
3481 | 76a66253 | j_mayer | #endif
|
3482 | 76a66253 | j_mayer | #if defined (TODO)
|
3483 | 76a66253 | j_mayer | /* POWER4p */
|
3484 | 76a66253 | j_mayer | { |
3485 | 76a66253 | j_mayer | .name = "POWER4+",
|
3486 | 76a66253 | j_mayer | .pvr = CPU_PPC_POWER4P, |
3487 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3488 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_POWER4, |
3489 | 76a66253 | j_mayer | .flags = PPC_FLAGS_POWER4, |
3490 | 76a66253 | j_mayer | .msr_mask = xxx, |
3491 | 76a66253 | j_mayer | }, |
3492 | 76a66253 | j_mayer | #endif
|
3493 | 76a66253 | j_mayer | #if defined (TODO)
|
3494 | 76a66253 | j_mayer | /* POWER5 */
|
3495 | 76a66253 | j_mayer | { |
3496 | 76a66253 | j_mayer | .name = "POWER5",
|
3497 | 76a66253 | j_mayer | .pvr = CPU_PPC_POWER5, |
3498 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3499 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_POWER5, |
3500 | 76a66253 | j_mayer | .flags = PPC_FLAGS_POWER5, |
3501 | 76a66253 | j_mayer | .msr_mask = xxx, |
3502 | 76a66253 | j_mayer | }, |
3503 | 76a66253 | j_mayer | #endif
|
3504 | 76a66253 | j_mayer | #if defined (TODO)
|
3505 | 76a66253 | j_mayer | /* POWER5+ */
|
3506 | 76a66253 | j_mayer | { |
3507 | 76a66253 | j_mayer | .name = "POWER5+",
|
3508 | 76a66253 | j_mayer | .pvr = CPU_PPC_POWER5P, |
3509 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3510 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_POWER5, |
3511 | 76a66253 | j_mayer | .flags = PPC_FLAGS_POWER5, |
3512 | 76a66253 | j_mayer | .msr_mask = xxx, |
3513 | 76a66253 | j_mayer | }, |
3514 | 76a66253 | j_mayer | #endif
|
3515 | 76a66253 | j_mayer | #if defined (TODO)
|
3516 | 76a66253 | j_mayer | /* PowerPC 970 */
|
3517 | 76a66253 | j_mayer | { |
3518 | 76a66253 | j_mayer | .name = "970",
|
3519 | 76a66253 | j_mayer | .pvr = CPU_PPC_970, |
3520 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3521 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_970, |
3522 | 76a66253 | j_mayer | .flags = PPC_FLAGS_970, |
3523 | 76a66253 | j_mayer | .msr_mask = 0x900000000204FF36,
|
3524 | 76a66253 | j_mayer | }, |
3525 | 76a66253 | j_mayer | #endif
|
3526 | 76a66253 | j_mayer | #if defined (TODO)
|
3527 | 76a66253 | j_mayer | /* PowerPC 970FX (G5) */
|
3528 | 76a66253 | j_mayer | { |
3529 | 76a66253 | j_mayer | .name = "970fx",
|
3530 | 76a66253 | j_mayer | .pvr = CPU_PPC_970FX, |
3531 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3532 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_970FX, |
3533 | 76a66253 | j_mayer | .flags = PPC_FLAGS_970FX, |
3534 | 76a66253 | j_mayer | .msr_mask = 0x800000000204FF36,
|
3535 | 76a66253 | j_mayer | }, |
3536 | 76a66253 | j_mayer | #endif
|
3537 | 76a66253 | j_mayer | #if defined (TODO)
|
3538 | 76a66253 | j_mayer | /* RS64 (Apache/A35) */
|
3539 | 76a66253 | j_mayer | /* This one seems to support the whole POWER2 instruction set
|
3540 | 76a66253 | j_mayer | * and the PowerPC 64 one.
|
3541 | 76a66253 | j_mayer | */
|
3542 | 76a66253 | j_mayer | { |
3543 | 76a66253 | j_mayer | .name = "RS64",
|
3544 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64, |
3545 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3546 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3547 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3548 | 76a66253 | j_mayer | .msr_mask = xxx, |
3549 | 76a66253 | j_mayer | }, |
3550 | 76a66253 | j_mayer | { |
3551 | 76a66253 | j_mayer | .name = "Apache",
|
3552 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64, |
3553 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3554 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3555 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3556 | 76a66253 | j_mayer | .msr_mask = xxx, |
3557 | 76a66253 | j_mayer | }, |
3558 | 76a66253 | j_mayer | { |
3559 | 76a66253 | j_mayer | .name = "A35",
|
3560 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64, |
3561 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3562 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3563 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3564 | 76a66253 | j_mayer | .msr_mask = xxx, |
3565 | 76a66253 | j_mayer | }, |
3566 | 76a66253 | j_mayer | #endif
|
3567 | 76a66253 | j_mayer | #if defined (TODO)
|
3568 | 76a66253 | j_mayer | /* RS64-II (NorthStar/A50) */
|
3569 | 76a66253 | j_mayer | { |
3570 | 76a66253 | j_mayer | .name = "RS64-II",
|
3571 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64II, |
3572 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3573 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3574 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3575 | 76a66253 | j_mayer | .msr_mask = xxx, |
3576 | 76a66253 | j_mayer | }, |
3577 | 76a66253 | j_mayer | { |
3578 | 76a66253 | j_mayer | .name = "NortStar",
|
3579 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64II, |
3580 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3581 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3582 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3583 | 76a66253 | j_mayer | .msr_mask = xxx, |
3584 | 76a66253 | j_mayer | }, |
3585 | 76a66253 | j_mayer | { |
3586 | 76a66253 | j_mayer | .name = "A50",
|
3587 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64II, |
3588 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3589 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3590 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3591 | 76a66253 | j_mayer | .msr_mask = xxx, |
3592 | 76a66253 | j_mayer | }, |
3593 | 76a66253 | j_mayer | #endif
|
3594 | 76a66253 | j_mayer | #if defined (TODO)
|
3595 | 76a66253 | j_mayer | /* RS64-III (Pulsar) */
|
3596 | 76a66253 | j_mayer | { |
3597 | 76a66253 | j_mayer | .name = "RS64-III",
|
3598 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64III, |
3599 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3600 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3601 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3602 | 76a66253 | j_mayer | .msr_mask = xxx, |
3603 | 76a66253 | j_mayer | }, |
3604 | 76a66253 | j_mayer | { |
3605 | 76a66253 | j_mayer | .name = "Pulsar",
|
3606 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64III, |
3607 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3608 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3609 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3610 | 76a66253 | j_mayer | .msr_mask = xxx, |
3611 | 76a66253 | j_mayer | }, |
3612 | 76a66253 | j_mayer | #endif
|
3613 | 76a66253 | j_mayer | #if defined (TODO)
|
3614 | 76a66253 | j_mayer | /* RS64-IV (IceStar/IStar/SStar) */
|
3615 | 76a66253 | j_mayer | { |
3616 | 76a66253 | j_mayer | .name = "RS64-IV",
|
3617 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3618 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3619 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3620 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3621 | 76a66253 | j_mayer | .msr_mask = xxx, |
3622 | 76a66253 | j_mayer | }, |
3623 | 76a66253 | j_mayer | { |
3624 | 76a66253 | j_mayer | .name = "IceStar",
|
3625 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3626 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3627 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3628 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3629 | 76a66253 | j_mayer | .msr_mask = xxx, |
3630 | 76a66253 | j_mayer | }, |
3631 | 76a66253 | j_mayer | { |
3632 | 76a66253 | j_mayer | .name = "IStar",
|
3633 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3634 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3635 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3636 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3637 | 76a66253 | j_mayer | .msr_mask = xxx, |
3638 | 76a66253 | j_mayer | }, |
3639 | 76a66253 | j_mayer | { |
3640 | 76a66253 | j_mayer | .name = "SStar",
|
3641 | 76a66253 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3642 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3643 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3644 | 76a66253 | j_mayer | .flags = PPC_FLAGS_RS64, |
3645 | 76a66253 | j_mayer | .msr_mask = xxx, |
3646 | 76a66253 | j_mayer | }, |
3647 | 76a66253 | j_mayer | #endif
|
3648 | 76a66253 | j_mayer | /* POWER */
|
3649 | 76a66253 | j_mayer | #if defined (TODO)
|
3650 | 76a66253 | j_mayer | /* Original POWER */
|
3651 | 76a66253 | j_mayer | { |
3652 | 76a66253 | j_mayer | .name = "POWER",
|
3653 | 76a66253 | j_mayer | .pvr = CPU_POWER, |
3654 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3655 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_POWER, |
3656 | 76a66253 | j_mayer | .flags = PPC_FLAGS_POWER, |
3657 | 76a66253 | j_mayer | .msr_mask = xxx, |
3658 | 76a66253 | j_mayer | }, |
3659 | 76a66253 | j_mayer | #endif
|
3660 | 426613db | j_mayer | #endif /* defined (TARGET_PPC64) */ |
3661 | 76a66253 | j_mayer | #if defined (TODO)
|
3662 | 76a66253 | j_mayer | /* POWER2 */
|
3663 | 76a66253 | j_mayer | { |
3664 | 76a66253 | j_mayer | .name = "POWER2",
|
3665 | 76a66253 | j_mayer | .pvr = CPU_POWER2, |
3666 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3667 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_POWER, |
3668 | 76a66253 | j_mayer | .flags = PPC_FLAGS_POWER, |
3669 | 76a66253 | j_mayer | .msr_mask = xxx, |
3670 | 76a66253 | j_mayer | }, |
3671 | 76a66253 | j_mayer | #endif
|
3672 | 76a66253 | j_mayer | /* Generic PowerPCs */
|
3673 | 76a66253 | j_mayer | #if defined (TODO)
|
3674 | 76a66253 | j_mayer | { |
3675 | 76a66253 | j_mayer | .name = "ppc64",
|
3676 | 76a66253 | j_mayer | .pvr = CPU_PPC_970, |
3677 | 76a66253 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3678 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_PPC64, |
3679 | 76a66253 | j_mayer | .flags = PPC_FLAGS_PPC64, |
3680 | 76a66253 | j_mayer | .msr_mask = 0xA00000000204FF36,
|
3681 | 76a66253 | j_mayer | }, |
3682 | 76a66253 | j_mayer | #endif
|
3683 | 76a66253 | j_mayer | { |
3684 | 76a66253 | j_mayer | .name = "ppc32",
|
3685 | 76a66253 | j_mayer | .pvr = CPU_PPC_604, |
3686 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3687 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_PPC32, |
3688 | 76a66253 | j_mayer | .flags = PPC_FLAGS_PPC32, |
3689 | 76a66253 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3690 | 76a66253 | j_mayer | }, |
3691 | 76a66253 | j_mayer | /* Fallback */
|
3692 | 76a66253 | j_mayer | { |
3693 | 76a66253 | j_mayer | .name = "ppc",
|
3694 | 76a66253 | j_mayer | .pvr = CPU_PPC_604, |
3695 | 76a66253 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3696 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_PPC32, |
3697 | 76a66253 | j_mayer | .flags = PPC_FLAGS_PPC32, |
3698 | 76a66253 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3699 | 76a66253 | j_mayer | }, |
3700 | 76a66253 | j_mayer | }; |
3701 | 3fc6c082 | bellard | |
3702 | 3fc6c082 | bellard | int ppc_find_by_name (const unsigned char *name, ppc_def_t **def) |
3703 | 3fc6c082 | bellard | { |
3704 | 3fc6c082 | bellard | int i, ret;
|
3705 | 3fc6c082 | bellard | |
3706 | 3fc6c082 | bellard | ret = -1;
|
3707 | 3fc6c082 | bellard | *def = NULL;
|
3708 | 3fc6c082 | bellard | for (i = 0; strcmp(ppc_defs[i].name, "ppc") != 0; i++) { |
3709 | 3fc6c082 | bellard | if (strcasecmp(name, ppc_defs[i].name) == 0) { |
3710 | 3fc6c082 | bellard | *def = &ppc_defs[i]; |
3711 | 3fc6c082 | bellard | ret = 0;
|
3712 | 3fc6c082 | bellard | break;
|
3713 | 3fc6c082 | bellard | } |
3714 | 3fc6c082 | bellard | } |
3715 | 3fc6c082 | bellard | |
3716 | 3fc6c082 | bellard | return ret;
|
3717 | 3fc6c082 | bellard | } |
3718 | 3fc6c082 | bellard | |
3719 | 3fc6c082 | bellard | int ppc_find_by_pvr (uint32_t pvr, ppc_def_t **def)
|
3720 | 3fc6c082 | bellard | { |
3721 | 3fc6c082 | bellard | int i, ret;
|
3722 | 3fc6c082 | bellard | |
3723 | 3fc6c082 | bellard | ret = -1;
|
3724 | 3fc6c082 | bellard | *def = NULL;
|
3725 | 3fc6c082 | bellard | for (i = 0; ppc_defs[i].name != NULL; i++) { |
3726 | 3fc6c082 | bellard | if ((pvr & ppc_defs[i].pvr_mask) ==
|
3727 | 3fc6c082 | bellard | (ppc_defs[i].pvr & ppc_defs[i].pvr_mask)) { |
3728 | 3fc6c082 | bellard | *def = &ppc_defs[i]; |
3729 | 3fc6c082 | bellard | ret = 0;
|
3730 | 3fc6c082 | bellard | break;
|
3731 | 3fc6c082 | bellard | } |
3732 | 3fc6c082 | bellard | } |
3733 | 3fc6c082 | bellard | |
3734 | 3fc6c082 | bellard | return ret;
|
3735 | 3fc6c082 | bellard | } |
3736 | 3fc6c082 | bellard | |
3737 | 3fc6c082 | bellard | void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)) |
3738 | 3fc6c082 | bellard | { |
3739 | 3fc6c082 | bellard | int i;
|
3740 | 3fc6c082 | bellard | |
3741 | 3fc6c082 | bellard | for (i = 0; ; i++) { |
3742 | 76a66253 | j_mayer | (*cpu_fprintf)(f, "PowerPC %16s PVR %08x mask %08x\n",
|
3743 | 3fc6c082 | bellard | ppc_defs[i].name, |
3744 | 3fc6c082 | bellard | ppc_defs[i].pvr, ppc_defs[i].pvr_mask); |
3745 | 3fc6c082 | bellard | if (strcmp(ppc_defs[i].name, "ppc") == 0) |
3746 | 3fc6c082 | bellard | break;
|
3747 | 3fc6c082 | bellard | } |
3748 | 3fc6c082 | bellard | } |