Revision 426613db target-ppc/cpu.h
b/target-ppc/cpu.h | ||
---|---|---|
384 | 384 |
PPC_SPE = 0x0000000100000000ULL, |
385 | 385 |
/* PowerPC 2.03 SPE floating-point extension */ |
386 | 386 |
PPC_SPEFPU = 0x0000000200000000ULL, |
387 |
/* SLB management */ |
|
388 |
PPC_SLBI = 0x0000000400000000ULL, |
|
387 | 389 |
}; |
388 | 390 |
|
389 | 391 |
/* CPU run-time flags (MMU and exception model) */ |
... | ... | |
503 | 505 |
#define PPC_INSNS_74xx (PPC_INSNS_COMMON | PPC_FLOAT_EXT | PPC_ALTIVEC | \ |
504 | 506 |
PPC_MEM_TLBSYNC | PPC_TB) |
505 | 507 |
#define PPC_FLAGS_74xx (PPC_FLAGS_MMU_32B | PPC_FLAGS_EXCP_74xx) |
508 |
/* PowerPC 970 (aka G5) */ |
|
509 |
#define PPC_INSNS_970 (PPC_INSNS_COMMON | PPC_FLOAT_EXT | PPC_FLOAT_OPT | \ |
|
510 |
PPC_ALTIVEC | PPC_MEM_TLBSYNC | PPC_TB | \ |
|
511 |
PPC_64B | PPC_64_BRIDGE | PPC_SLBI) |
|
512 |
#define PPC_FLAGS_970 (PPC_FLAGS_MMU_64B | PPC_FLAGS_EXCP_970) |
|
506 | 513 |
|
507 | 514 |
/* Default PowerPC will be 604/970 */ |
508 | 515 |
#define PPC_INSNS_PPC32 PPC_INSNS_604 |
509 | 516 |
#define PPC_FLAGS_PPC32 PPC_FLAGS_604 |
510 |
#if 0
|
|
517 |
#if 1
|
|
511 | 518 |
#define PPC_INSNS_PPC64 PPC_INSNS_970 |
512 | 519 |
#define PPC_FLAGS_PPC64 PPC_FLAGS_970 |
513 | 520 |
#endif |
... | ... | |
801 | 808 |
void ppc_store_xer (CPUPPCState *env, uint32_t value); |
802 | 809 |
target_ulong do_load_msr (CPUPPCState *env); |
803 | 810 |
void do_store_msr (CPUPPCState *env, target_ulong value); |
804 |
void ppc_store_msr32 (CPUPPCState *env, uint32_t value); |
|
811 |
void ppc_store_msr_32 (CPUPPCState *env, uint32_t value);
|
|
805 | 812 |
|
806 | 813 |
void do_compute_hflags (CPUPPCState *env); |
807 | 814 |
|
Also available in: Unified diff