Revision 426613db target-ppc/translate_init.c
b/target-ppc/translate_init.c | ||
---|---|---|
1716 | 1716 |
printf("%s: PVR %08x mask %08x => %08x\n", __func__, |
1717 | 1717 |
def->pvr, def->pvr_mask, def->pvr & def->pvr_mask); |
1718 | 1718 |
switch (def->pvr & def->pvr_mask) { |
1719 |
/* Embedded PowerPC from IBM */
|
|
1719 |
/* Embedded PowerPC from IBM */ |
|
1720 | 1720 |
case CPU_PPC_401A1: /* 401 A1 family */ |
1721 | 1721 |
case CPU_PPC_401B2: /* 401 B2 family */ |
1722 | 1722 |
case CPU_PPC_401C2: /* 401 C2 family */ |
... | ... | |
1833 | 1833 |
env->id_tlbs = 0; |
1834 | 1834 |
break; |
1835 | 1835 |
|
1836 |
/* Embedded PowerPC from Freescale */
|
|
1836 |
/* Embedded PowerPC from Freescale */ |
|
1837 | 1837 |
#if defined (TODO) |
1838 | 1838 |
case CPU_PPC_5xx: |
1839 | 1839 |
break; |
... | ... | |
1852 | 1852 |
break; |
1853 | 1853 |
#endif |
1854 | 1854 |
|
1855 |
/* XXX: Use MPC8540 PVR to implement a test PowerPC BookE target */
|
|
1855 |
/* XXX: Use MPC8540 PVR to implement a test PowerPC BookE target */ |
|
1856 | 1856 |
case CPU_PPC_e500v110: |
1857 | 1857 |
case CPU_PPC_e500v120: |
1858 | 1858 |
case CPU_PPC_e500v210: |
... | ... | |
1872 | 1872 |
break; |
1873 | 1873 |
#endif |
1874 | 1874 |
|
1875 |
/* 32 bits PowerPC */
|
|
1875 |
/* 32 bits PowerPC */ |
|
1876 | 1876 |
case CPU_PPC_601: /* PowerPC 601 */ |
1877 | 1877 |
gen_spr_generic(env); |
1878 | 1878 |
gen_spr_ne_601(env); |
... | ... | |
2131 | 2131 |
break; |
2132 | 2132 |
|
2133 | 2133 |
#if defined (TODO) |
2134 |
/* G4 family */
|
|
2134 |
/* G4 family */ |
|
2135 | 2135 |
case CPU_PPC_7400: /* PowerPC 7400 */ |
2136 | 2136 |
case CPU_PPC_7410C: /* PowerPC 7410 */ |
2137 | 2137 |
case CPU_PPC_7410D: |
... | ... | |
2154 | 2154 |
break; |
2155 | 2155 |
#endif |
2156 | 2156 |
|
2157 |
/* 64 bits PowerPC */ |
|
2158 |
#if defined (TARGET_PPC64) |
|
2157 | 2159 |
#if defined (TODO) |
2158 |
/* 64 bits PowerPC */ |
|
2159 | 2160 |
case CPU_PPC_620: /* PowerPC 620 */ |
2160 | 2161 |
case CPU_PPC_630: /* PowerPC 630 (Power 3) */ |
2161 | 2162 |
case CPU_PPC_631: /* PowerPC 631 (Power 3+) */ |
... | ... | |
2163 | 2164 |
case CPU_PPC_POWER4P: /* Power 4+ */ |
2164 | 2165 |
case CPU_PPC_POWER5: /* Power 5 */ |
2165 | 2166 |
case CPU_PPC_POWER5P: /* Power 5+ */ |
2167 |
#endif |
|
2166 | 2168 |
case CPU_PPC_970: /* PowerPC 970 */ |
2167 | 2169 |
case CPU_PPC_970FX10: /* PowerPC 970 FX */ |
2168 | 2170 |
case CPU_PPC_970FX20: |
... | ... | |
2171 | 2173 |
case CPU_PPC_970FX31: |
2172 | 2174 |
case CPU_PPC_970MP10: /* PowerPC 970 MP */ |
2173 | 2175 |
case CPU_PPC_970MP11: |
2176 |
#if defined (TODO) |
|
2174 | 2177 |
case CPU_PPC_CELL10: /* Cell family */ |
2175 | 2178 |
case CPU_PPC_CELL20: |
2176 | 2179 |
case CPU_PPC_CELL30: |
2177 | 2180 |
case CPU_PPC_CELL31: |
2181 |
#endif |
|
2182 |
#if defined (TODO) |
|
2178 | 2183 |
case CPU_PPC_RS64: /* Apache (RS64/A35) */ |
2179 | 2184 |
case CPU_PPC_RS64II: /* NorthStar (RS64-II/A50) */ |
2180 | 2185 |
case CPU_PPC_RS64III: /* Pulsar (RS64-III) */ |
2181 | 2186 |
case CPU_PPC_RS64IV: /* IceStar/IStar/SStar (RS64-IV) */ |
2182 |
break; |
|
2183 | 2187 |
#endif |
2188 |
break; |
|
2189 |
#endif /* defined (TARGET_PPC64) */ |
|
2184 | 2190 |
|
2185 | 2191 |
#if defined (TODO) |
2186 | 2192 |
/* POWER */ |
... | ... | |
3412 | 3418 |
}, |
3413 | 3419 |
#endif |
3414 | 3420 |
/* 64 bits PowerPC */ |
3421 |
#if defined (TARGET_PPC64) |
|
3415 | 3422 |
#if defined (TODO) |
3416 | 3423 |
/* PowerPC 620 */ |
3417 | 3424 |
{ |
... | ... | |
3650 | 3657 |
.msr_mask = xxx, |
3651 | 3658 |
}, |
3652 | 3659 |
#endif |
3660 |
#endif /* defined (TARGET_PPC64) */ |
|
3653 | 3661 |
#if defined (TODO) |
3654 | 3662 |
/* POWER2 */ |
3655 | 3663 |
{ |
Also available in: Unified diff