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1 80cabfad bellard
/*
2 80cabfad bellard
 * QEMU PC System Emulator
3 5fafdf24 ths
 *
4 80cabfad bellard
 * Copyright (c) 2003-2004 Fabrice Bellard
5 5fafdf24 ths
 *
6 80cabfad bellard
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 80cabfad bellard
 * of this software and associated documentation files (the "Software"), to deal
8 80cabfad bellard
 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
11 80cabfad bellard
 * furnished to do so, subject to the following conditions:
12 80cabfad bellard
 *
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 * The above copyright notice and this permission notice shall be included in
14 80cabfad bellard
 * all copies or substantial portions of the Software.
15 80cabfad bellard
 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 80cabfad bellard
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 80cabfad bellard
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 80cabfad bellard
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 80cabfad bellard
 * THE SOFTWARE.
23 80cabfad bellard
 */
24 87ecb68b pbrook
#include "hw.h"
25 87ecb68b pbrook
#include "pc.h"
26 87ecb68b pbrook
#include "fdc.h"
27 87ecb68b pbrook
#include "pci.h"
28 18e08a55 Michael S. Tsirkin
#include "vmware_vga.h"
29 18e08a55 Michael S. Tsirkin
#include "usb-uhci.h"
30 18e08a55 Michael S. Tsirkin
#include "usb-ohci.h"
31 18e08a55 Michael S. Tsirkin
#include "prep_pci.h"
32 18e08a55 Michael S. Tsirkin
#include "apb_pci.h"
33 87ecb68b pbrook
#include "block.h"
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#include "sysemu.h"
35 87ecb68b pbrook
#include "audio/audio.h"
36 87ecb68b pbrook
#include "net.h"
37 87ecb68b pbrook
#include "smbus.h"
38 87ecb68b pbrook
#include "boards.h"
39 376253ec aliguori
#include "monitor.h"
40 3cce6243 blueswir1
#include "fw_cfg.h"
41 16b29ae1 aliguori
#include "hpet_emul.h"
42 9dd986cc Richard W.M. Jones
#include "watchdog.h"
43 b6f6e3d3 aliguori
#include "smbios.h"
44 ec82026c Gerd Hoffmann
#include "ide.h"
45 ca20cf32 Blue Swirl
#include "loader.h"
46 ca20cf32 Blue Swirl
#include "elf.h"
47 80cabfad bellard
48 b41a2cd1 bellard
/* output Bochs bios info messages */
49 b41a2cd1 bellard
//#define DEBUG_BIOS
50 b41a2cd1 bellard
51 f16408df Alexander Graf
/* Show multiboot debug output */
52 f16408df Alexander Graf
//#define DEBUG_MULTIBOOT
53 f16408df Alexander Graf
54 80cabfad bellard
#define BIOS_FILENAME "bios.bin"
55 80cabfad bellard
56 7fb4fdcf balrog
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
57 7fb4fdcf balrog
58 a80274c3 pbrook
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
59 a80274c3 pbrook
#define ACPI_DATA_SIZE       0x10000
60 3cce6243 blueswir1
#define BIOS_CFG_IOPORT 0x510
61 8a92ea2f aliguori
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
62 b6f6e3d3 aliguori
#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
63 6b35e7bf Jes Sorensen
#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
64 80cabfad bellard
65 e4bcb14c ths
#define MAX_IDE_BUS 2
66 e4bcb14c ths
67 c227f099 Anthony Liguori
static fdctrl_t *floppy_controller;
68 b0a21b53 bellard
static RTCState *rtc_state;
69 ec844b96 bellard
static PITState *pit;
70 0a3bacf3 Juan Quintela
static PCII440FXState *i440fx_state;
71 80cabfad bellard
72 1452411b Avi Kivity
typedef struct isa_irq_state {
73 1452411b Avi Kivity
    qemu_irq *i8259;
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    qemu_irq *ioapic;
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} IsaIrqState;
76 1452411b Avi Kivity
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static void isa_irq_handler(void *opaque, int n, int level)
78 1452411b Avi Kivity
{
79 1452411b Avi Kivity
    IsaIrqState *isa = (IsaIrqState *)opaque;
80 1452411b Avi Kivity
81 1632dc6a Avi Kivity
    if (n < 16) {
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        qemu_set_irq(isa->i8259[n], level);
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    }
84 2c8d9340 Gerd Hoffmann
    if (isa->ioapic)
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        qemu_set_irq(isa->ioapic[n], level);
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};
87 1452411b Avi Kivity
88 b41a2cd1 bellard
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
89 80cabfad bellard
{
90 80cabfad bellard
}
91 80cabfad bellard
92 f929aad6 bellard
/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq;
94 f929aad6 bellard
/* XXX: add IGNNE support */
95 f929aad6 bellard
void cpu_set_ferr(CPUX86State *s)
96 f929aad6 bellard
{
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    qemu_irq_raise(ferr_irq);
98 f929aad6 bellard
}
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
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{
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    qemu_irq_lower(ferr_irq);
103 f929aad6 bellard
}
104 f929aad6 bellard
105 28ab0e2e bellard
/* TSC handling */
106 28ab0e2e bellard
uint64_t cpu_get_tsc(CPUX86State *env)
107 28ab0e2e bellard
{
108 4a1418e0 Anthony Liguori
    return cpu_get_ticks();
109 28ab0e2e bellard
}
110 28ab0e2e bellard
111 a5954d5c bellard
/* SMM support */
112 a5954d5c bellard
void cpu_smm_update(CPUState *env)
113 a5954d5c bellard
{
114 a5954d5c bellard
    if (i440fx_state && env == first_cpu)
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        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
116 a5954d5c bellard
}
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{
122 3de388f6 bellard
    int intno;
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    intno = apic_get_interrupt(env);
125 3de388f6 bellard
    if (intno >= 0) {
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        /* set irq request if a PIC irq is still pending */
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        /* XXX: improve that */
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        pic_update_irq(isa_pic);
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        return intno;
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    }
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    /* read the irq from the PIC */
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    if (!apic_accept_pic_intr(env))
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        return -1;
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    intno = pic_read_irq(isa_pic);
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    return intno;
137 3de388f6 bellard
}
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static void pic_irq_request(void *opaque, int irq, int level)
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{
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    CPUState *env = first_cpu;
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    if (env->apic_state) {
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        while (env) {
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            if (apic_accept_pic_intr(env))
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                apic_deliver_pic_intr(env, level);
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            env = env->next_cpu;
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        }
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    } else {
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        if (level)
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            cpu_interrupt(env, CPU_INTERRUPT_HARD);
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        else
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            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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    }
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}
156 3de388f6 bellard
157 b0a21b53 bellard
/* PC cmos mappings */
158 b0a21b53 bellard
159 80cabfad bellard
#define REG_EQUIPMENT_BYTE          0x14
160 80cabfad bellard
161 777428f2 bellard
static int cmos_get_fd_drive_type(int fd0)
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{
163 777428f2 bellard
    int val;
164 777428f2 bellard
165 777428f2 bellard
    switch (fd0) {
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    case 0:
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        /* 1.44 Mb 3"5 drive */
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        val = 4;
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        break;
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    case 1:
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        /* 2.88 Mb 3"5 drive */
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        val = 5;
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        break;
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    case 2:
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        /* 1.2 Mb 5"5 drive */
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        val = 2;
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        break;
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    default:
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        val = 0;
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        break;
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    }
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    return val;
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}
184 777428f2 bellard
185 5fafdf24 ths
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
187 ba6c2377 bellard
    RTCState *s = rtc_state;
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    int cylinders, heads, sectors;
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    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
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    rtc_set_memory(s, type_ofs, 47);
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    rtc_set_memory(s, info_ofs, cylinders);
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    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 2, heads);
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    rtc_set_memory(s, info_ofs + 3, 0xff);
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    rtc_set_memory(s, info_ofs + 4, 0xff);
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    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
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    rtc_set_memory(s, info_ofs + 6, cylinders);
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    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 8, sectors);
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}
201 ba6c2377 bellard
202 6ac0e82d balrog
/* convert boot_device letter to something recognizable by the bios */
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static int boot_device2nibble(char boot_device)
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{
205 6ac0e82d balrog
    switch(boot_device) {
206 6ac0e82d balrog
    case 'a':
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    case 'b':
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        return 0x01; /* floppy boot */
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    case 'c':
210 6ac0e82d balrog
        return 0x02; /* hard drive boot */
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    case 'd':
212 6ac0e82d balrog
        return 0x03; /* CD-ROM boot */
213 6ac0e82d balrog
    case 'n':
214 6ac0e82d balrog
        return 0x04; /* Network boot */
215 6ac0e82d balrog
    }
216 6ac0e82d balrog
    return 0;
217 6ac0e82d balrog
}
218 6ac0e82d balrog
219 0ecdffbb aurel32
/* copy/pasted from cmos_init, should be made a general function
220 0ecdffbb aurel32
 and used there as well */
221 3b4366de blueswir1
static int pc_boot_set(void *opaque, const char *boot_device)
222 0ecdffbb aurel32
{
223 376253ec aliguori
    Monitor *mon = cur_mon;
224 0ecdffbb aurel32
#define PC_MAX_BOOT_DEVICES 3
225 3b4366de blueswir1
    RTCState *s = (RTCState *)opaque;
226 0ecdffbb aurel32
    int nbds, bds[3] = { 0, };
227 0ecdffbb aurel32
    int i;
228 0ecdffbb aurel32
229 0ecdffbb aurel32
    nbds = strlen(boot_device);
230 0ecdffbb aurel32
    if (nbds > PC_MAX_BOOT_DEVICES) {
231 376253ec aliguori
        monitor_printf(mon, "Too many boot devices for PC\n");
232 0ecdffbb aurel32
        return(1);
233 0ecdffbb aurel32
    }
234 0ecdffbb aurel32
    for (i = 0; i < nbds; i++) {
235 0ecdffbb aurel32
        bds[i] = boot_device2nibble(boot_device[i]);
236 0ecdffbb aurel32
        if (bds[i] == 0) {
237 376253ec aliguori
            monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
238 376253ec aliguori
                           boot_device[i]);
239 0ecdffbb aurel32
            return(1);
240 0ecdffbb aurel32
        }
241 0ecdffbb aurel32
    }
242 0ecdffbb aurel32
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
243 0ecdffbb aurel32
    rtc_set_memory(s, 0x38, (bds[2] << 4));
244 0ecdffbb aurel32
    return(0);
245 0ecdffbb aurel32
}
246 0ecdffbb aurel32
247 ba6c2377 bellard
/* hd_table must contain 4 block drivers */
248 c227f099 Anthony Liguori
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
249 f455e98c Gerd Hoffmann
                      const char *boot_device, DriveInfo **hd_table)
250 80cabfad bellard
{
251 b0a21b53 bellard
    RTCState *s = rtc_state;
252 28c5af54 j_mayer
    int nbds, bds[3] = { 0, };
253 80cabfad bellard
    int val;
254 b41a2cd1 bellard
    int fd0, fd1, nb;
255 ba6c2377 bellard
    int i;
256 b0a21b53 bellard
257 b0a21b53 bellard
    /* various important CMOS locations needed by PC/Bochs bios */
258 80cabfad bellard
259 80cabfad bellard
    /* memory size */
260 333190eb bellard
    val = 640; /* base memory in K */
261 333190eb bellard
    rtc_set_memory(s, 0x15, val);
262 333190eb bellard
    rtc_set_memory(s, 0x16, val >> 8);
263 333190eb bellard
264 80cabfad bellard
    val = (ram_size / 1024) - 1024;
265 80cabfad bellard
    if (val > 65535)
266 80cabfad bellard
        val = 65535;
267 b0a21b53 bellard
    rtc_set_memory(s, 0x17, val);
268 b0a21b53 bellard
    rtc_set_memory(s, 0x18, val >> 8);
269 b0a21b53 bellard
    rtc_set_memory(s, 0x30, val);
270 b0a21b53 bellard
    rtc_set_memory(s, 0x31, val >> 8);
271 80cabfad bellard
272 00f82b8a aurel32
    if (above_4g_mem_size) {
273 00f82b8a aurel32
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
274 00f82b8a aurel32
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
275 00f82b8a aurel32
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
276 00f82b8a aurel32
    }
277 00f82b8a aurel32
278 9da98861 bellard
    if (ram_size > (16 * 1024 * 1024))
279 9da98861 bellard
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
280 9da98861 bellard
    else
281 9da98861 bellard
        val = 0;
282 80cabfad bellard
    if (val > 65535)
283 80cabfad bellard
        val = 65535;
284 b0a21b53 bellard
    rtc_set_memory(s, 0x34, val);
285 b0a21b53 bellard
    rtc_set_memory(s, 0x35, val >> 8);
286 3b46e624 ths
287 298e01b6 aurel32
    /* set the number of CPU */
288 298e01b6 aurel32
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
289 298e01b6 aurel32
290 6ac0e82d balrog
    /* set boot devices, and disable floppy signature check if requested */
291 28c5af54 j_mayer
#define PC_MAX_BOOT_DEVICES 3
292 28c5af54 j_mayer
    nbds = strlen(boot_device);
293 28c5af54 j_mayer
    if (nbds > PC_MAX_BOOT_DEVICES) {
294 28c5af54 j_mayer
        fprintf(stderr, "Too many boot devices for PC\n");
295 28c5af54 j_mayer
        exit(1);
296 28c5af54 j_mayer
    }
297 28c5af54 j_mayer
    for (i = 0; i < nbds; i++) {
298 28c5af54 j_mayer
        bds[i] = boot_device2nibble(boot_device[i]);
299 28c5af54 j_mayer
        if (bds[i] == 0) {
300 28c5af54 j_mayer
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
301 28c5af54 j_mayer
                    boot_device[i]);
302 28c5af54 j_mayer
            exit(1);
303 28c5af54 j_mayer
        }
304 28c5af54 j_mayer
    }
305 28c5af54 j_mayer
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
306 28c5af54 j_mayer
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
307 80cabfad bellard
308 b41a2cd1 bellard
    /* floppy type */
309 b41a2cd1 bellard
310 baca51fa bellard
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
311 baca51fa bellard
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
312 80cabfad bellard
313 777428f2 bellard
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
314 b0a21b53 bellard
    rtc_set_memory(s, 0x10, val);
315 3b46e624 ths
316 b0a21b53 bellard
    val = 0;
317 b41a2cd1 bellard
    nb = 0;
318 80cabfad bellard
    if (fd0 < 3)
319 80cabfad bellard
        nb++;
320 80cabfad bellard
    if (fd1 < 3)
321 80cabfad bellard
        nb++;
322 80cabfad bellard
    switch (nb) {
323 80cabfad bellard
    case 0:
324 80cabfad bellard
        break;
325 80cabfad bellard
    case 1:
326 b0a21b53 bellard
        val |= 0x01; /* 1 drive, ready for boot */
327 80cabfad bellard
        break;
328 80cabfad bellard
    case 2:
329 b0a21b53 bellard
        val |= 0x41; /* 2 drives, ready for boot */
330 80cabfad bellard
        break;
331 80cabfad bellard
    }
332 b0a21b53 bellard
    val |= 0x02; /* FPU is there */
333 b0a21b53 bellard
    val |= 0x04; /* PS/2 mouse installed */
334 b0a21b53 bellard
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
335 b0a21b53 bellard
336 ba6c2377 bellard
    /* hard drives */
337 ba6c2377 bellard
338 ba6c2377 bellard
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
339 ba6c2377 bellard
    if (hd_table[0])
340 f455e98c Gerd Hoffmann
        cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
341 5fafdf24 ths
    if (hd_table[1])
342 f455e98c Gerd Hoffmann
        cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
343 ba6c2377 bellard
344 ba6c2377 bellard
    val = 0;
345 40b6ecc6 bellard
    for (i = 0; i < 4; i++) {
346 ba6c2377 bellard
        if (hd_table[i]) {
347 46d4767d bellard
            int cylinders, heads, sectors, translation;
348 46d4767d bellard
            /* NOTE: bdrv_get_geometry_hint() returns the physical
349 46d4767d bellard
                geometry.  It is always such that: 1 <= sects <= 63, 1
350 46d4767d bellard
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
351 46d4767d bellard
                geometry can be different if a translation is done. */
352 f455e98c Gerd Hoffmann
            translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
353 46d4767d bellard
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
354 f455e98c Gerd Hoffmann
                bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
355 46d4767d bellard
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
356 46d4767d bellard
                    /* No translation. */
357 46d4767d bellard
                    translation = 0;
358 46d4767d bellard
                } else {
359 46d4767d bellard
                    /* LBA translation. */
360 46d4767d bellard
                    translation = 1;
361 46d4767d bellard
                }
362 40b6ecc6 bellard
            } else {
363 46d4767d bellard
                translation--;
364 ba6c2377 bellard
            }
365 ba6c2377 bellard
            val |= translation << (i * 2);
366 ba6c2377 bellard
        }
367 40b6ecc6 bellard
    }
368 ba6c2377 bellard
    rtc_set_memory(s, 0x39, val);
369 80cabfad bellard
}
370 80cabfad bellard
371 59b8ad81 bellard
void ioport_set_a20(int enable)
372 59b8ad81 bellard
{
373 59b8ad81 bellard
    /* XXX: send to all CPUs ? */
374 59b8ad81 bellard
    cpu_x86_set_a20(first_cpu, enable);
375 59b8ad81 bellard
}
376 59b8ad81 bellard
377 59b8ad81 bellard
int ioport_get_a20(void)
378 59b8ad81 bellard
{
379 59b8ad81 bellard
    return ((first_cpu->a20_mask >> 20) & 1);
380 59b8ad81 bellard
}
381 59b8ad81 bellard
382 e1a23744 bellard
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
383 e1a23744 bellard
{
384 59b8ad81 bellard
    ioport_set_a20((val >> 1) & 1);
385 e1a23744 bellard
    /* XXX: bit 0 is fast reset */
386 e1a23744 bellard
}
387 e1a23744 bellard
388 e1a23744 bellard
static uint32_t ioport92_read(void *opaque, uint32_t addr)
389 e1a23744 bellard
{
390 59b8ad81 bellard
    return ioport_get_a20() << 1;
391 e1a23744 bellard
}
392 e1a23744 bellard
393 80cabfad bellard
/***********************************************************/
394 80cabfad bellard
/* Bochs BIOS debug ports */
395 80cabfad bellard
396 9596ebb7 pbrook
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
397 80cabfad bellard
{
398 a2f659ee bellard
    static const char shutdown_str[8] = "Shutdown";
399 a2f659ee bellard
    static int shutdown_index = 0;
400 3b46e624 ths
401 80cabfad bellard
    switch(addr) {
402 80cabfad bellard
        /* Bochs BIOS messages */
403 80cabfad bellard
    case 0x400:
404 80cabfad bellard
    case 0x401:
405 80cabfad bellard
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
406 80cabfad bellard
        exit(1);
407 80cabfad bellard
    case 0x402:
408 80cabfad bellard
    case 0x403:
409 80cabfad bellard
#ifdef DEBUG_BIOS
410 80cabfad bellard
        fprintf(stderr, "%c", val);
411 80cabfad bellard
#endif
412 80cabfad bellard
        break;
413 a2f659ee bellard
    case 0x8900:
414 a2f659ee bellard
        /* same as Bochs power off */
415 a2f659ee bellard
        if (val == shutdown_str[shutdown_index]) {
416 a2f659ee bellard
            shutdown_index++;
417 a2f659ee bellard
            if (shutdown_index == 8) {
418 a2f659ee bellard
                shutdown_index = 0;
419 a2f659ee bellard
                qemu_system_shutdown_request();
420 a2f659ee bellard
            }
421 a2f659ee bellard
        } else {
422 a2f659ee bellard
            shutdown_index = 0;
423 a2f659ee bellard
        }
424 a2f659ee bellard
        break;
425 80cabfad bellard
426 80cabfad bellard
        /* LGPL'ed VGA BIOS messages */
427 80cabfad bellard
    case 0x501:
428 80cabfad bellard
    case 0x502:
429 80cabfad bellard
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
430 80cabfad bellard
        exit(1);
431 80cabfad bellard
    case 0x500:
432 80cabfad bellard
    case 0x503:
433 80cabfad bellard
#ifdef DEBUG_BIOS
434 80cabfad bellard
        fprintf(stderr, "%c", val);
435 80cabfad bellard
#endif
436 80cabfad bellard
        break;
437 80cabfad bellard
    }
438 80cabfad bellard
}
439 80cabfad bellard
440 bf483392 Alexander Graf
static void *bochs_bios_init(void)
441 80cabfad bellard
{
442 3cce6243 blueswir1
    void *fw_cfg;
443 b6f6e3d3 aliguori
    uint8_t *smbios_table;
444 b6f6e3d3 aliguori
    size_t smbios_len;
445 11c2fd3e aliguori
    uint64_t *numa_fw_cfg;
446 11c2fd3e aliguori
    int i, j;
447 3cce6243 blueswir1
448 b41a2cd1 bellard
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
449 b41a2cd1 bellard
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
450 b41a2cd1 bellard
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
451 b41a2cd1 bellard
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
452 a2f659ee bellard
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
453 b41a2cd1 bellard
454 b41a2cd1 bellard
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
455 b41a2cd1 bellard
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
456 b41a2cd1 bellard
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
457 b41a2cd1 bellard
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
458 3cce6243 blueswir1
459 3cce6243 blueswir1
    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
460 bf483392 Alexander Graf
461 3cce6243 blueswir1
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
462 905fdcb5 blueswir1
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
463 80deece2 blueswir1
    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
464 80deece2 blueswir1
                     acpi_tables_len);
465 6b35e7bf Jes Sorensen
    fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
466 b6f6e3d3 aliguori
467 b6f6e3d3 aliguori
    smbios_table = smbios_get_table(&smbios_len);
468 b6f6e3d3 aliguori
    if (smbios_table)
469 b6f6e3d3 aliguori
        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
470 b6f6e3d3 aliguori
                         smbios_table, smbios_len);
471 11c2fd3e aliguori
472 11c2fd3e aliguori
    /* allocate memory for the NUMA channel: one (64bit) word for the number
473 11c2fd3e aliguori
     * of nodes, one word for each VCPU->node and one word for each node to
474 11c2fd3e aliguori
     * hold the amount of memory.
475 11c2fd3e aliguori
     */
476 11c2fd3e aliguori
    numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
477 11c2fd3e aliguori
    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
478 11c2fd3e aliguori
    for (i = 0; i < smp_cpus; i++) {
479 11c2fd3e aliguori
        for (j = 0; j < nb_numa_nodes; j++) {
480 11c2fd3e aliguori
            if (node_cpumask[j] & (1 << i)) {
481 11c2fd3e aliguori
                numa_fw_cfg[i + 1] = cpu_to_le64(j);
482 11c2fd3e aliguori
                break;
483 11c2fd3e aliguori
            }
484 11c2fd3e aliguori
        }
485 11c2fd3e aliguori
    }
486 11c2fd3e aliguori
    for (i = 0; i < nb_numa_nodes; i++) {
487 11c2fd3e aliguori
        numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
488 11c2fd3e aliguori
    }
489 11c2fd3e aliguori
    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
490 11c2fd3e aliguori
                     (1 + smp_cpus + nb_numa_nodes) * 8);
491 bf483392 Alexander Graf
492 bf483392 Alexander Graf
    return fw_cfg;
493 80cabfad bellard
}
494 80cabfad bellard
495 642a4f96 ths
static long get_file_size(FILE *f)
496 642a4f96 ths
{
497 642a4f96 ths
    long where, size;
498 642a4f96 ths
499 642a4f96 ths
    /* XXX: on Unix systems, using fstat() probably makes more sense */
500 642a4f96 ths
501 642a4f96 ths
    where = ftell(f);
502 642a4f96 ths
    fseek(f, 0, SEEK_END);
503 642a4f96 ths
    size = ftell(f);
504 642a4f96 ths
    fseek(f, where, SEEK_SET);
505 642a4f96 ths
506 642a4f96 ths
    return size;
507 642a4f96 ths
}
508 642a4f96 ths
509 f16408df Alexander Graf
#define MULTIBOOT_STRUCT_ADDR 0x9000
510 f16408df Alexander Graf
511 f16408df Alexander Graf
#if MULTIBOOT_STRUCT_ADDR > 0xf0000
512 f16408df Alexander Graf
#error multiboot struct needs to fit in 16 bit real mode
513 f16408df Alexander Graf
#endif
514 f16408df Alexander Graf
515 f16408df Alexander Graf
static int load_multiboot(void *fw_cfg,
516 f16408df Alexander Graf
                          FILE *f,
517 f16408df Alexander Graf
                          const char *kernel_filename,
518 f16408df Alexander Graf
                          const char *initrd_filename,
519 f16408df Alexander Graf
                          const char *kernel_cmdline,
520 f16408df Alexander Graf
                          uint8_t *header)
521 f16408df Alexander Graf
{
522 45a50b16 Gerd Hoffmann
    int i, is_multiboot = 0;
523 f16408df Alexander Graf
    uint32_t flags = 0;
524 f16408df Alexander Graf
    uint32_t mh_entry_addr;
525 f16408df Alexander Graf
    uint32_t mh_load_addr;
526 f16408df Alexander Graf
    uint32_t mb_kernel_size;
527 f16408df Alexander Graf
    uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
528 f16408df Alexander Graf
    uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
529 f16408df Alexander Graf
    uint32_t mb_mod_end;
530 45a50b16 Gerd Hoffmann
    uint8_t bootinfo[0x500];
531 45a50b16 Gerd Hoffmann
    uint32_t cmdline = 0x200;
532 77873196 Alexander Graf
    uint8_t *mb_kernel_data;
533 77873196 Alexander Graf
    uint8_t *mb_bootinfo_data;
534 f16408df Alexander Graf
535 f16408df Alexander Graf
    /* Ok, let's see if it is a multiboot image.
536 f16408df Alexander Graf
       The header is 12x32bit long, so the latest entry may be 8192 - 48. */
537 f16408df Alexander Graf
    for (i = 0; i < (8192 - 48); i += 4) {
538 f16408df Alexander Graf
        if (ldl_p(header+i) == 0x1BADB002) {
539 f16408df Alexander Graf
            uint32_t checksum = ldl_p(header+i+8);
540 f16408df Alexander Graf
            flags = ldl_p(header+i+4);
541 f16408df Alexander Graf
            checksum += flags;
542 f16408df Alexander Graf
            checksum += (uint32_t)0x1BADB002;
543 f16408df Alexander Graf
            if (!checksum) {
544 f16408df Alexander Graf
                is_multiboot = 1;
545 f16408df Alexander Graf
                break;
546 f16408df Alexander Graf
            }
547 f16408df Alexander Graf
        }
548 f16408df Alexander Graf
    }
549 f16408df Alexander Graf
550 f16408df Alexander Graf
    if (!is_multiboot)
551 f16408df Alexander Graf
        return 0; /* no multiboot */
552 f16408df Alexander Graf
553 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
554 f16408df Alexander Graf
    fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
555 f16408df Alexander Graf
#endif
556 45a50b16 Gerd Hoffmann
    memset(bootinfo, 0, sizeof(bootinfo));
557 f16408df Alexander Graf
558 f16408df Alexander Graf
    if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
559 f16408df Alexander Graf
        fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
560 f16408df Alexander Graf
    }
561 f16408df Alexander Graf
    if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
562 f16408df Alexander Graf
        uint64_t elf_entry;
563 f16408df Alexander Graf
        int kernel_size;
564 f16408df Alexander Graf
        fclose(f);
565 ca20cf32 Blue Swirl
        kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL,
566 ca20cf32 Blue Swirl
                               0, ELF_MACHINE, 0);
567 f16408df Alexander Graf
        if (kernel_size < 0) {
568 f16408df Alexander Graf
            fprintf(stderr, "Error while loading elf kernel\n");
569 f16408df Alexander Graf
            exit(1);
570 f16408df Alexander Graf
        }
571 f16408df Alexander Graf
        mh_load_addr = mh_entry_addr = elf_entry;
572 f16408df Alexander Graf
        mb_kernel_size = kernel_size;
573 f16408df Alexander Graf
574 77873196 Alexander Graf
        mb_kernel_data = qemu_malloc(mb_kernel_size);
575 77873196 Alexander Graf
        if (rom_copy(mb_kernel_data, elf_entry, kernel_size) != kernel_size) {
576 77873196 Alexander Graf
            fprintf(stderr, "Error while fetching elf kernel from rom\n");
577 77873196 Alexander Graf
            exit(1);
578 77873196 Alexander Graf
        }
579 77873196 Alexander Graf
580 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
581 f16408df Alexander Graf
        fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
582 f16408df Alexander Graf
                mb_kernel_size, (size_t)mh_entry_addr);
583 f16408df Alexander Graf
#endif
584 f16408df Alexander Graf
    } else {
585 f16408df Alexander Graf
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
586 f16408df Alexander Graf
        uint32_t mh_header_addr = ldl_p(header+i+12);
587 f16408df Alexander Graf
        mh_load_addr = ldl_p(header+i+16);
588 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
589 f16408df Alexander Graf
        uint32_t mh_load_end_addr = ldl_p(header+i+20);
590 f16408df Alexander Graf
        uint32_t mh_bss_end_addr = ldl_p(header+i+24);
591 f16408df Alexander Graf
#endif
592 f16408df Alexander Graf
        uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
593 f16408df Alexander Graf
594 f16408df Alexander Graf
        mh_entry_addr = ldl_p(header+i+28);
595 f16408df Alexander Graf
        mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
596 f16408df Alexander Graf
597 f16408df Alexander Graf
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
598 f16408df Alexander Graf
        uint32_t mh_mode_type = ldl_p(header+i+32);
599 f16408df Alexander Graf
        uint32_t mh_width = ldl_p(header+i+36);
600 f16408df Alexander Graf
        uint32_t mh_height = ldl_p(header+i+40);
601 f16408df Alexander Graf
        uint32_t mh_depth = ldl_p(header+i+44); */
602 f16408df Alexander Graf
603 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
604 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
605 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
606 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
607 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
608 f16408df Alexander Graf
        fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
609 f16408df Alexander Graf
                mb_kernel_size, mh_load_addr);
610 f16408df Alexander Graf
#endif
611 f16408df Alexander Graf
612 77873196 Alexander Graf
        mb_kernel_data = qemu_malloc(mb_kernel_size);
613 45a50b16 Gerd Hoffmann
        fseek(f, mb_kernel_text_offset, SEEK_SET);
614 77873196 Alexander Graf
        fread(mb_kernel_data, 1, mb_kernel_size, f);
615 f16408df Alexander Graf
        fclose(f);
616 f16408df Alexander Graf
    }
617 f16408df Alexander Graf
618 f16408df Alexander Graf
    /* blob size is only the kernel for now */
619 f16408df Alexander Graf
    mb_mod_end = mh_load_addr + mb_kernel_size;
620 f16408df Alexander Graf
621 f16408df Alexander Graf
    /* load modules */
622 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 20, 0x0); /* mods_count */
623 f16408df Alexander Graf
    if (initrd_filename) {
624 45a50b16 Gerd Hoffmann
        uint32_t mb_mod_info = 0x100;
625 45a50b16 Gerd Hoffmann
        uint32_t mb_mod_cmdline = 0x300;
626 f16408df Alexander Graf
        uint32_t mb_mod_start = mh_load_addr;
627 f16408df Alexander Graf
        uint32_t mb_mod_length = mb_kernel_size;
628 f16408df Alexander Graf
        char *next_initrd;
629 f16408df Alexander Graf
        char *next_space;
630 f16408df Alexander Graf
        int mb_mod_count = 0;
631 f16408df Alexander Graf
632 f16408df Alexander Graf
        do {
633 bf854d65 Adam Lackorzynski
            if (mb_mod_info + 16 > mb_mod_cmdline) {
634 bf854d65 Adam Lackorzynski
                printf("WARNING: Too many modules loaded, aborting.\n");
635 bf854d65 Adam Lackorzynski
                break;
636 bf854d65 Adam Lackorzynski
            }
637 f16408df Alexander Graf
            next_initrd = strchr(initrd_filename, ',');
638 f16408df Alexander Graf
            if (next_initrd)
639 f16408df Alexander Graf
                *next_initrd = '\0';
640 f16408df Alexander Graf
            /* if a space comes after the module filename, treat everything
641 f16408df Alexander Graf
               after that as parameters */
642 45a50b16 Gerd Hoffmann
            pstrcpy((char*)bootinfo + mb_mod_cmdline,
643 45a50b16 Gerd Hoffmann
                    sizeof(bootinfo) - mb_mod_cmdline,
644 45a50b16 Gerd Hoffmann
                    initrd_filename);
645 3f3d583e Adam Lackorzynski
            stl_p(bootinfo + mb_mod_info + 8, mb_bootinfo + mb_mod_cmdline); /* string */
646 f16408df Alexander Graf
            mb_mod_cmdline += strlen(initrd_filename) + 1;
647 bf854d65 Adam Lackorzynski
            if (mb_mod_cmdline > sizeof(bootinfo)) {
648 45a50b16 Gerd Hoffmann
                mb_mod_cmdline = sizeof(bootinfo);
649 bf854d65 Adam Lackorzynski
                printf("WARNING: Too many module cmdlines loaded, aborting.\n");
650 bf854d65 Adam Lackorzynski
                break;
651 bf854d65 Adam Lackorzynski
            }
652 f16408df Alexander Graf
            if ((next_space = strchr(initrd_filename, ' ')))
653 f16408df Alexander Graf
                *next_space = '\0';
654 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
655 82663ee2 Blue Swirl
            printf("multiboot loading module: %s\n", initrd_filename);
656 f16408df Alexander Graf
#endif
657 45a50b16 Gerd Hoffmann
            mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
658 45a50b16 Gerd Hoffmann
                         & (TARGET_PAGE_MASK);
659 45a50b16 Gerd Hoffmann
            mb_mod_length = get_image_size(initrd_filename);
660 45a50b16 Gerd Hoffmann
            if (mb_mod_length < 0) {
661 45a50b16 Gerd Hoffmann
                fprintf(stderr, "failed to get %s image size\n", initrd_filename);
662 45a50b16 Gerd Hoffmann
                exit(1);
663 45a50b16 Gerd Hoffmann
            }
664 45a50b16 Gerd Hoffmann
            mb_mod_end = mb_mod_start + mb_mod_length;
665 45a50b16 Gerd Hoffmann
            mb_mod_count++;
666 77873196 Alexander Graf
667 77873196 Alexander Graf
            /* append module data at the end of last module */
668 77873196 Alexander Graf
            mb_kernel_data = qemu_realloc(mb_kernel_data,
669 77873196 Alexander Graf
                                          mh_load_addr - mb_mod_end);
670 77873196 Alexander Graf
            load_image(initrd_filename,
671 77873196 Alexander Graf
                       mb_kernel_data + mb_mod_start - mh_load_addr);
672 77873196 Alexander Graf
673 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 0, mb_mod_start);
674 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 4, mb_mod_start + mb_mod_length);
675 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 12, 0x0); /* reserved */
676 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
677 45a50b16 Gerd Hoffmann
            printf("mod_start: %#x\nmod_end:   %#x\n", mb_mod_start,
678 45a50b16 Gerd Hoffmann
                   mb_mod_start + mb_mod_length);
679 f16408df Alexander Graf
#endif
680 f16408df Alexander Graf
            initrd_filename = next_initrd+1;
681 f16408df Alexander Graf
            mb_mod_info += 16;
682 f16408df Alexander Graf
        } while (next_initrd);
683 45a50b16 Gerd Hoffmann
        stl_p(bootinfo + 20, mb_mod_count); /* mods_count */
684 45a50b16 Gerd Hoffmann
        stl_p(bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
685 f16408df Alexander Graf
    }
686 f16408df Alexander Graf
687 f16408df Alexander Graf
    /* Commandline support */
688 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 16, mb_bootinfo + cmdline);
689 45a50b16 Gerd Hoffmann
    snprintf((char*)bootinfo + cmdline, 0x100, "%s %s",
690 45a50b16 Gerd Hoffmann
             kernel_filename, kernel_cmdline);
691 f16408df Alexander Graf
692 f16408df Alexander Graf
    /* the kernel is where we want it to be now */
693 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MEMORY (1 << 0)
694 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
695 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
696 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MODULES (1 << 3)
697 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MMAP (1 << 6)
698 45a50b16 Gerd Hoffmann
    stl_p(bootinfo, MULTIBOOT_FLAGS_MEMORY
699 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_BOOT_DEVICE
700 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_CMDLINE
701 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_MODULES
702 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_MMAP);
703 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 4, 640); /* mem_lower */
704 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 8, ram_size / 1024); /* mem_upper */
705 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
706 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 48, mmap_addr); /* mmap_addr */
707 f16408df Alexander Graf
708 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
709 f16408df Alexander Graf
    fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
710 f16408df Alexander Graf
#endif
711 f16408df Alexander Graf
712 77873196 Alexander Graf
    /* save bootinfo off the stack */
713 77873196 Alexander Graf
    mb_bootinfo_data = qemu_malloc(sizeof(bootinfo));
714 77873196 Alexander Graf
    memcpy(mb_bootinfo_data, bootinfo, sizeof(bootinfo));
715 77873196 Alexander Graf
716 f16408df Alexander Graf
    /* Pass variables to option rom */
717 77873196 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, mh_entry_addr);
718 77873196 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr);
719 77873196 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, mb_mod_end - mh_load_addr);
720 77873196 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, mb_kernel_data,
721 77873196 Alexander Graf
                     mb_mod_end - mh_load_addr);
722 f16408df Alexander Graf
723 77873196 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
724 77873196 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, sizeof(bootinfo));
725 77873196 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, mb_bootinfo_data,
726 77873196 Alexander Graf
                     sizeof(bootinfo));
727 f16408df Alexander Graf
728 f16408df Alexander Graf
    option_rom[nb_option_roms] = "multiboot.bin";
729 f16408df Alexander Graf
    nb_option_roms++;
730 f16408df Alexander Graf
731 f16408df Alexander Graf
    return 1; /* yes, we are multiboot */
732 f16408df Alexander Graf
}
733 f16408df Alexander Graf
734 f16408df Alexander Graf
static void load_linux(void *fw_cfg,
735 4fc9af53 aliguori
                       const char *kernel_filename,
736 642a4f96 ths
                       const char *initrd_filename,
737 e6ade764 Glauber Costa
                       const char *kernel_cmdline,
738 45a50b16 Gerd Hoffmann
                       target_phys_addr_t max_ram_size)
739 642a4f96 ths
{
740 642a4f96 ths
    uint16_t protocol;
741 5cea8590 Paul Brook
    int setup_size, kernel_size, initrd_size = 0, cmdline_size;
742 642a4f96 ths
    uint32_t initrd_max;
743 57a46d05 Alexander Graf
    uint8_t header[8192], *setup, *kernel, *initrd_data;
744 c227f099 Anthony Liguori
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
745 45a50b16 Gerd Hoffmann
    FILE *f;
746 bf4e5d92 Pascal Terjan
    char *vmode;
747 642a4f96 ths
748 642a4f96 ths
    /* Align to 16 bytes as a paranoia measure */
749 642a4f96 ths
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
750 642a4f96 ths
751 642a4f96 ths
    /* load the kernel header */
752 642a4f96 ths
    f = fopen(kernel_filename, "rb");
753 642a4f96 ths
    if (!f || !(kernel_size = get_file_size(f)) ||
754 f16408df Alexander Graf
        fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
755 f16408df Alexander Graf
        MIN(ARRAY_SIZE(header), kernel_size)) {
756 850810d0 Justin M. Forbes
        fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
757 850810d0 Justin M. Forbes
                kernel_filename, strerror(errno));
758 642a4f96 ths
        exit(1);
759 642a4f96 ths
    }
760 642a4f96 ths
761 642a4f96 ths
    /* kernel protocol version */
762 bc4edd79 bellard
#if 0
763 642a4f96 ths
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
764 bc4edd79 bellard
#endif
765 642a4f96 ths
    if (ldl_p(header+0x202) == 0x53726448)
766 642a4f96 ths
        protocol = lduw_p(header+0x206);
767 f16408df Alexander Graf
    else {
768 f16408df Alexander Graf
        /* This looks like a multiboot kernel. If it is, let's stop
769 f16408df Alexander Graf
           treating it like a Linux kernel. */
770 f16408df Alexander Graf
        if (load_multiboot(fw_cfg, f, kernel_filename,
771 f16408df Alexander Graf
                           initrd_filename, kernel_cmdline, header))
772 82663ee2 Blue Swirl
            return;
773 642a4f96 ths
        protocol = 0;
774 f16408df Alexander Graf
    }
775 642a4f96 ths
776 642a4f96 ths
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
777 642a4f96 ths
        /* Low kernel */
778 a37af289 blueswir1
        real_addr    = 0x90000;
779 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
780 a37af289 blueswir1
        prot_addr    = 0x10000;
781 642a4f96 ths
    } else if (protocol < 0x202) {
782 642a4f96 ths
        /* High but ancient kernel */
783 a37af289 blueswir1
        real_addr    = 0x90000;
784 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
785 a37af289 blueswir1
        prot_addr    = 0x100000;
786 642a4f96 ths
    } else {
787 642a4f96 ths
        /* High and recent kernel */
788 a37af289 blueswir1
        real_addr    = 0x10000;
789 a37af289 blueswir1
        cmdline_addr = 0x20000;
790 a37af289 blueswir1
        prot_addr    = 0x100000;
791 642a4f96 ths
    }
792 642a4f96 ths
793 bc4edd79 bellard
#if 0
794 642a4f96 ths
    fprintf(stderr,
795 526ccb7a balrog
            "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
796 526ccb7a balrog
            "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
797 526ccb7a balrog
            "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
798 a37af289 blueswir1
            real_addr,
799 a37af289 blueswir1
            cmdline_addr,
800 a37af289 blueswir1
            prot_addr);
801 bc4edd79 bellard
#endif
802 642a4f96 ths
803 642a4f96 ths
    /* highest address for loading the initrd */
804 642a4f96 ths
    if (protocol >= 0x203)
805 642a4f96 ths
        initrd_max = ldl_p(header+0x22c);
806 642a4f96 ths
    else
807 642a4f96 ths
        initrd_max = 0x37ffffff;
808 642a4f96 ths
809 e6ade764 Glauber Costa
    if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
810 e6ade764 Glauber Costa
            initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
811 642a4f96 ths
812 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
813 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
814 57a46d05 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
815 57a46d05 Alexander Graf
                     (uint8_t*)strdup(kernel_cmdline),
816 57a46d05 Alexander Graf
                     strlen(kernel_cmdline)+1);
817 642a4f96 ths
818 642a4f96 ths
    if (protocol >= 0x202) {
819 a37af289 blueswir1
        stl_p(header+0x228, cmdline_addr);
820 642a4f96 ths
    } else {
821 642a4f96 ths
        stw_p(header+0x20, 0xA33F);
822 642a4f96 ths
        stw_p(header+0x22, cmdline_addr-real_addr);
823 642a4f96 ths
    }
824 642a4f96 ths
825 bf4e5d92 Pascal Terjan
    /* handle vga= parameter */
826 bf4e5d92 Pascal Terjan
    vmode = strstr(kernel_cmdline, "vga=");
827 bf4e5d92 Pascal Terjan
    if (vmode) {
828 bf4e5d92 Pascal Terjan
        unsigned int video_mode;
829 bf4e5d92 Pascal Terjan
        /* skip "vga=" */
830 bf4e5d92 Pascal Terjan
        vmode += 4;
831 bf4e5d92 Pascal Terjan
        if (!strncmp(vmode, "normal", 6)) {
832 bf4e5d92 Pascal Terjan
            video_mode = 0xffff;
833 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ext", 3)) {
834 bf4e5d92 Pascal Terjan
            video_mode = 0xfffe;
835 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ask", 3)) {
836 bf4e5d92 Pascal Terjan
            video_mode = 0xfffd;
837 bf4e5d92 Pascal Terjan
        } else {
838 bf4e5d92 Pascal Terjan
            video_mode = strtol(vmode, NULL, 0);
839 bf4e5d92 Pascal Terjan
        }
840 bf4e5d92 Pascal Terjan
        stw_p(header+0x1fa, video_mode);
841 bf4e5d92 Pascal Terjan
    }
842 bf4e5d92 Pascal Terjan
843 642a4f96 ths
    /* loader type */
844 642a4f96 ths
    /* High nybble = B reserved for Qemu; low nybble is revision number.
845 642a4f96 ths
       If this code is substantially changed, you may want to consider
846 642a4f96 ths
       incrementing the revision. */
847 642a4f96 ths
    if (protocol >= 0x200)
848 642a4f96 ths
        header[0x210] = 0xB0;
849 642a4f96 ths
850 642a4f96 ths
    /* heap */
851 642a4f96 ths
    if (protocol >= 0x201) {
852 642a4f96 ths
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
853 642a4f96 ths
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
854 642a4f96 ths
    }
855 642a4f96 ths
856 642a4f96 ths
    /* load initrd */
857 642a4f96 ths
    if (initrd_filename) {
858 642a4f96 ths
        if (protocol < 0x200) {
859 642a4f96 ths
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
860 642a4f96 ths
            exit(1);
861 642a4f96 ths
        }
862 642a4f96 ths
863 45a50b16 Gerd Hoffmann
        initrd_size = get_image_size(initrd_filename);
864 45a50b16 Gerd Hoffmann
        initrd_addr = (initrd_max-initrd_size) & ~4095;
865 57a46d05 Alexander Graf
866 57a46d05 Alexander Graf
        initrd_data = qemu_malloc(initrd_size);
867 57a46d05 Alexander Graf
        load_image(initrd_filename, initrd_data);
868 57a46d05 Alexander Graf
869 57a46d05 Alexander Graf
        fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
870 57a46d05 Alexander Graf
        fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
871 57a46d05 Alexander Graf
        fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
872 642a4f96 ths
873 a37af289 blueswir1
        stl_p(header+0x218, initrd_addr);
874 642a4f96 ths
        stl_p(header+0x21c, initrd_size);
875 642a4f96 ths
    }
876 642a4f96 ths
877 45a50b16 Gerd Hoffmann
    /* load kernel and setup */
878 642a4f96 ths
    setup_size = header[0x1f1];
879 642a4f96 ths
    if (setup_size == 0)
880 642a4f96 ths
        setup_size = 4;
881 642a4f96 ths
    setup_size = (setup_size+1)*512;
882 45a50b16 Gerd Hoffmann
    kernel_size -= setup_size;
883 642a4f96 ths
884 45a50b16 Gerd Hoffmann
    setup  = qemu_malloc(setup_size);
885 45a50b16 Gerd Hoffmann
    kernel = qemu_malloc(kernel_size);
886 45a50b16 Gerd Hoffmann
    fseek(f, 0, SEEK_SET);
887 45a50b16 Gerd Hoffmann
    fread(setup, 1, setup_size, f);
888 45a50b16 Gerd Hoffmann
    fread(kernel, 1, kernel_size, f);
889 642a4f96 ths
    fclose(f);
890 45a50b16 Gerd Hoffmann
    memcpy(setup, header, MIN(sizeof(header), setup_size));
891 57a46d05 Alexander Graf
892 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
893 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
894 57a46d05 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
895 57a46d05 Alexander Graf
896 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
897 57a46d05 Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
898 57a46d05 Alexander Graf
    fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
899 57a46d05 Alexander Graf
900 57a46d05 Alexander Graf
    option_rom[nb_option_roms] = "linuxboot.bin";
901 57a46d05 Alexander Graf
    nb_option_roms++;
902 642a4f96 ths
}
903 642a4f96 ths
904 b41a2cd1 bellard
static const int ide_iobase[2] = { 0x1f0, 0x170 };
905 b41a2cd1 bellard
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
906 b41a2cd1 bellard
static const int ide_irq[2] = { 14, 15 };
907 b41a2cd1 bellard
908 b41a2cd1 bellard
#define NE2000_NB_MAX 6
909 b41a2cd1 bellard
910 675d6f82 Blue Swirl
static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
911 675d6f82 Blue Swirl
                                              0x280, 0x380 };
912 675d6f82 Blue Swirl
static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
913 b41a2cd1 bellard
914 675d6f82 Blue Swirl
static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
915 675d6f82 Blue Swirl
static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
916 6508fe59 bellard
917 6a36d84e bellard
#ifdef HAS_AUDIO
918 d537cf6c pbrook
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
919 6a36d84e bellard
{
920 6a36d84e bellard
    struct soundhw *c;
921 6a36d84e bellard
922 3a8bae3e malc
    for (c = soundhw; c->name; ++c) {
923 3a8bae3e malc
        if (c->enabled) {
924 3a8bae3e malc
            if (c->isa) {
925 3a8bae3e malc
                c->init.init_isa(pic);
926 3a8bae3e malc
            } else {
927 3a8bae3e malc
                if (pci_bus) {
928 3a8bae3e malc
                    c->init.init_pci(pci_bus);
929 6a36d84e bellard
                }
930 6a36d84e bellard
            }
931 6a36d84e bellard
        }
932 6a36d84e bellard
    }
933 6a36d84e bellard
}
934 6a36d84e bellard
#endif
935 6a36d84e bellard
936 3a38d437 Jes Sorensen
static void pc_init_ne2k_isa(NICInfo *nd)
937 a41b2ff2 pbrook
{
938 a41b2ff2 pbrook
    static int nb_ne2k = 0;
939 a41b2ff2 pbrook
940 a41b2ff2 pbrook
    if (nb_ne2k == NE2000_NB_MAX)
941 a41b2ff2 pbrook
        return;
942 3a38d437 Jes Sorensen
    isa_ne2000_init(ne2000_io[nb_ne2k],
943 9453c5bc Gerd Hoffmann
                    ne2000_irq[nb_ne2k], nd);
944 a41b2ff2 pbrook
    nb_ne2k++;
945 a41b2ff2 pbrook
}
946 a41b2ff2 pbrook
947 678e12cc Gleb Natapov
int cpu_is_bsp(CPUState *env)
948 678e12cc Gleb Natapov
{
949 82663ee2 Blue Swirl
    return env->cpuid_apic_id == 0;
950 678e12cc Gleb Natapov
}
951 678e12cc Gleb Natapov
952 3a31f36a Jan Kiszka
static CPUState *pc_new_cpu(const char *cpu_model)
953 3a31f36a Jan Kiszka
{
954 3a31f36a Jan Kiszka
    CPUState *env;
955 3a31f36a Jan Kiszka
956 3a31f36a Jan Kiszka
    env = cpu_init(cpu_model);
957 3a31f36a Jan Kiszka
    if (!env) {
958 3a31f36a Jan Kiszka
        fprintf(stderr, "Unable to find x86 CPU definition\n");
959 3a31f36a Jan Kiszka
        exit(1);
960 3a31f36a Jan Kiszka
    }
961 3a31f36a Jan Kiszka
    if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
962 3a31f36a Jan Kiszka
        env->cpuid_apic_id = env->cpu_index;
963 3a31f36a Jan Kiszka
        /* APIC reset callback resets cpu */
964 3a31f36a Jan Kiszka
        apic_init(env);
965 3a31f36a Jan Kiszka
    } else {
966 3a31f36a Jan Kiszka
        qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
967 3a31f36a Jan Kiszka
    }
968 3a31f36a Jan Kiszka
    return env;
969 3a31f36a Jan Kiszka
}
970 3a31f36a Jan Kiszka
971 80cabfad bellard
/* PC hardware initialisation */
972 c227f099 Anthony Liguori
static void pc_init1(ram_addr_t ram_size,
973 3023f332 aliguori
                     const char *boot_device,
974 e8b2a1c6 Mark McLoughlin
                     const char *kernel_filename,
975 e8b2a1c6 Mark McLoughlin
                     const char *kernel_cmdline,
976 3dbbdc25 bellard
                     const char *initrd_filename,
977 e8b2a1c6 Mark McLoughlin
                     const char *cpu_model,
978 caea79a9 Mark McLoughlin
                     int pci_enabled)
979 80cabfad bellard
{
980 5cea8590 Paul Brook
    char *filename;
981 642a4f96 ths
    int ret, linux_boot, i;
982 c227f099 Anthony Liguori
    ram_addr_t ram_addr, bios_offset, option_rom_offset;
983 c227f099 Anthony Liguori
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
984 45a50b16 Gerd Hoffmann
    int bios_size, isa_bios_size;
985 46e50e9d bellard
    PCIBus *pci_bus;
986 b3999638 Gerd Hoffmann
    ISADevice *isa_dev;
987 5c3ff3a7 pbrook
    int piix3_devfn = -1;
988 59b8ad81 bellard
    CPUState *env;
989 d537cf6c pbrook
    qemu_irq *cpu_irq;
990 1452411b Avi Kivity
    qemu_irq *isa_irq;
991 d537cf6c pbrook
    qemu_irq *i8259;
992 1452411b Avi Kivity
    IsaIrqState *isa_irq_state;
993 f455e98c Gerd Hoffmann
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
994 fd8014e1 Gerd Hoffmann
    DriveInfo *fd[MAX_FD];
995 bf483392 Alexander Graf
    void *fw_cfg;
996 d592d303 bellard
997 00f82b8a aurel32
    if (ram_size >= 0xe0000000 ) {
998 00f82b8a aurel32
        above_4g_mem_size = ram_size - 0xe0000000;
999 00f82b8a aurel32
        below_4g_mem_size = 0xe0000000;
1000 00f82b8a aurel32
    } else {
1001 00f82b8a aurel32
        below_4g_mem_size = ram_size;
1002 00f82b8a aurel32
    }
1003 00f82b8a aurel32
1004 80cabfad bellard
    linux_boot = (kernel_filename != NULL);
1005 80cabfad bellard
1006 59b8ad81 bellard
    /* init CPUs */
1007 a049de61 bellard
    if (cpu_model == NULL) {
1008 a049de61 bellard
#ifdef TARGET_X86_64
1009 a049de61 bellard
        cpu_model = "qemu64";
1010 a049de61 bellard
#else
1011 a049de61 bellard
        cpu_model = "qemu32";
1012 a049de61 bellard
#endif
1013 a049de61 bellard
    }
1014 3a31f36a Jan Kiszka
1015 3a31f36a Jan Kiszka
    for (i = 0; i < smp_cpus; i++) {
1016 3a31f36a Jan Kiszka
        env = pc_new_cpu(cpu_model);
1017 59b8ad81 bellard
    }
1018 59b8ad81 bellard
1019 26fb5e48 aurel32
    vmport_init();
1020 26fb5e48 aurel32
1021 80cabfad bellard
    /* allocate RAM */
1022 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0xa0000);
1023 82b36dc3 aliguori
    cpu_register_physical_memory(0, 0xa0000, ram_addr);
1024 82b36dc3 aliguori
1025 82b36dc3 aliguori
    /* Allocate, even though we won't register, so we don't break the
1026 82b36dc3 aliguori
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1027 82b36dc3 aliguori
     * and some bios areas, which will be registered later
1028 82b36dc3 aliguori
     */
1029 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1030 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1031 82b36dc3 aliguori
    cpu_register_physical_memory(0x100000,
1032 82b36dc3 aliguori
                 below_4g_mem_size - 0x100000,
1033 82b36dc3 aliguori
                 ram_addr);
1034 00f82b8a aurel32
1035 00f82b8a aurel32
    /* above 4giga memory allocation */
1036 00f82b8a aurel32
    if (above_4g_mem_size > 0) {
1037 8a637d44 Paul Brook
#if TARGET_PHYS_ADDR_BITS == 32
1038 8a637d44 Paul Brook
        hw_error("To much RAM for 32-bit physical address");
1039 8a637d44 Paul Brook
#else
1040 82b36dc3 aliguori
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
1041 82b36dc3 aliguori
        cpu_register_physical_memory(0x100000000ULL,
1042 526ccb7a balrog
                                     above_4g_mem_size,
1043 82b36dc3 aliguori
                                     ram_addr);
1044 8a637d44 Paul Brook
#endif
1045 00f82b8a aurel32
    }
1046 80cabfad bellard
1047 82b36dc3 aliguori
1048 970ac5a3 bellard
    /* BIOS load */
1049 1192dad8 j_mayer
    if (bios_name == NULL)
1050 1192dad8 j_mayer
        bios_name = BIOS_FILENAME;
1051 5cea8590 Paul Brook
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1052 5cea8590 Paul Brook
    if (filename) {
1053 5cea8590 Paul Brook
        bios_size = get_image_size(filename);
1054 5cea8590 Paul Brook
    } else {
1055 5cea8590 Paul Brook
        bios_size = -1;
1056 5cea8590 Paul Brook
    }
1057 5fafdf24 ths
    if (bios_size <= 0 ||
1058 970ac5a3 bellard
        (bios_size % 65536) != 0) {
1059 7587cf44 bellard
        goto bios_error;
1060 7587cf44 bellard
    }
1061 970ac5a3 bellard
    bios_offset = qemu_ram_alloc(bios_size);
1062 51edd4e6 Gerd Hoffmann
    ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
1063 51edd4e6 Gerd Hoffmann
    if (ret != 0) {
1064 7587cf44 bellard
    bios_error:
1065 5cea8590 Paul Brook
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1066 80cabfad bellard
        exit(1);
1067 80cabfad bellard
    }
1068 5cea8590 Paul Brook
    if (filename) {
1069 5cea8590 Paul Brook
        qemu_free(filename);
1070 5cea8590 Paul Brook
    }
1071 7587cf44 bellard
    /* map the last 128KB of the BIOS in ISA space */
1072 7587cf44 bellard
    isa_bios_size = bios_size;
1073 7587cf44 bellard
    if (isa_bios_size > (128 * 1024))
1074 7587cf44 bellard
        isa_bios_size = 128 * 1024;
1075 5fafdf24 ths
    cpu_register_physical_memory(0x100000 - isa_bios_size,
1076 5fafdf24 ths
                                 isa_bios_size,
1077 7587cf44 bellard
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1078 9ae02555 ths
1079 4fc9af53 aliguori
1080 f753ff16 pbrook
1081 de2aff17 Gerd Hoffmann
    rom_enable_driver_roms = 1;
1082 45a50b16 Gerd Hoffmann
    option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
1083 45a50b16 Gerd Hoffmann
    cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
1084 f753ff16 pbrook
1085 1d108d97 Alexander Graf
    /* map all the bios at the top of memory */
1086 1d108d97 Alexander Graf
    cpu_register_physical_memory((uint32_t)(-bios_size),
1087 1d108d97 Alexander Graf
                                 bios_size, bios_offset | IO_MEM_ROM);
1088 1d108d97 Alexander Graf
1089 bf483392 Alexander Graf
    fw_cfg = bochs_bios_init();
1090 1d108d97 Alexander Graf
1091 f753ff16 pbrook
    if (linux_boot) {
1092 45a50b16 Gerd Hoffmann
        load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1093 f753ff16 pbrook
    }
1094 f753ff16 pbrook
1095 f753ff16 pbrook
    for (i = 0; i < nb_option_roms; i++) {
1096 45a50b16 Gerd Hoffmann
        rom_add_option(option_rom[i]);
1097 406c8df3 Glauber Costa
    }
1098 406c8df3 Glauber Costa
1099 a5b38b51 aurel32
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1100 d537cf6c pbrook
    i8259 = i8259_init(cpu_irq[0]);
1101 1452411b Avi Kivity
    isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1102 1452411b Avi Kivity
    isa_irq_state->i8259 = i8259;
1103 1632dc6a Avi Kivity
    isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1104 d537cf6c pbrook
1105 69b91039 bellard
    if (pci_enabled) {
1106 85a750ca Juan Quintela
        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1107 46e50e9d bellard
    } else {
1108 46e50e9d bellard
        pci_bus = NULL;
1109 2091ba23 Gerd Hoffmann
        isa_bus_new(NULL);
1110 69b91039 bellard
    }
1111 2091ba23 Gerd Hoffmann
    isa_bus_irqs(isa_irq);
1112 69b91039 bellard
1113 3a38d437 Jes Sorensen
    ferr_irq = isa_reserve_irq(13);
1114 3a38d437 Jes Sorensen
1115 80cabfad bellard
    /* init basic PC hardware */
1116 b41a2cd1 bellard
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1117 80cabfad bellard
1118 f929aad6 bellard
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1119 f929aad6 bellard
1120 1f04275e bellard
    if (cirrus_vga_enabled) {
1121 1f04275e bellard
        if (pci_enabled) {
1122 fbe1b595 Paul Brook
            pci_cirrus_vga_init(pci_bus);
1123 1f04275e bellard
        } else {
1124 fbe1b595 Paul Brook
            isa_cirrus_vga_init();
1125 1f04275e bellard
        }
1126 d34cab9f ths
    } else if (vmsvga_enabled) {
1127 d34cab9f ths
        if (pci_enabled)
1128 fbe1b595 Paul Brook
            pci_vmsvga_init(pci_bus);
1129 d34cab9f ths
        else
1130 d34cab9f ths
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1131 c2b3b41a aliguori
    } else if (std_vga_enabled) {
1132 89b6b508 bellard
        if (pci_enabled) {
1133 fbe1b595 Paul Brook
            pci_vga_init(pci_bus, 0, 0);
1134 89b6b508 bellard
        } else {
1135 fbe1b595 Paul Brook
            isa_vga_init();
1136 89b6b508 bellard
        }
1137 1f04275e bellard
    }
1138 80cabfad bellard
1139 32e0c826 Gerd Hoffmann
    rtc_state = rtc_init(2000);
1140 80cabfad bellard
1141 3b4366de blueswir1
    qemu_register_boot_set(pc_boot_set, rtc_state);
1142 3b4366de blueswir1
1143 e1a23744 bellard
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1144 e1a23744 bellard
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1145 e1a23744 bellard
1146 d592d303 bellard
    if (pci_enabled) {
1147 1632dc6a Avi Kivity
        isa_irq_state->ioapic = ioapic_init();
1148 d592d303 bellard
    }
1149 3a38d437 Jes Sorensen
    pit = pit_init(0x40, isa_reserve_irq(0));
1150 fd06c375 bellard
    pcspk_init(pit);
1151 16b29ae1 aliguori
    if (!no_hpet) {
1152 1452411b Avi Kivity
        hpet_init(isa_irq);
1153 16b29ae1 aliguori
    }
1154 b41a2cd1 bellard
1155 8d11df9e bellard
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1156 8d11df9e bellard
        if (serial_hds[i]) {
1157 ac0be998 Gerd Hoffmann
            serial_isa_init(i, serial_hds[i]);
1158 8d11df9e bellard
        }
1159 8d11df9e bellard
    }
1160 b41a2cd1 bellard
1161 6508fe59 bellard
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1162 6508fe59 bellard
        if (parallel_hds[i]) {
1163 021f0674 Gerd Hoffmann
            parallel_init(i, parallel_hds[i]);
1164 6508fe59 bellard
        }
1165 6508fe59 bellard
    }
1166 6508fe59 bellard
1167 a41b2ff2 pbrook
    for(i = 0; i < nb_nics; i++) {
1168 cb457d76 aliguori
        NICInfo *nd = &nd_table[i];
1169 cb457d76 aliguori
1170 cb457d76 aliguori
        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1171 3a38d437 Jes Sorensen
            pc_init_ne2k_isa(nd);
1172 cb457d76 aliguori
        else
1173 07caea31 Markus Armbruster
            pci_nic_init_nofail(nd, "e1000", NULL);
1174 a41b2ff2 pbrook
    }
1175 b41a2cd1 bellard
1176 e4bcb14c ths
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1177 e4bcb14c ths
        fprintf(stderr, "qemu: too many IDE bus\n");
1178 e4bcb14c ths
        exit(1);
1179 e4bcb14c ths
    }
1180 e4bcb14c ths
1181 e4bcb14c ths
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1182 f455e98c Gerd Hoffmann
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1183 e4bcb14c ths
    }
1184 e4bcb14c ths
1185 a41b2ff2 pbrook
    if (pci_enabled) {
1186 ae027ad3 Stefan Weil
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1187 a41b2ff2 pbrook
    } else {
1188 e4bcb14c ths
        for(i = 0; i < MAX_IDE_BUS; i++) {
1189 dea21e97 Gerd Hoffmann
            isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
1190 e4bcb14c ths
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1191 69b91039 bellard
        }
1192 b41a2cd1 bellard
    }
1193 69b91039 bellard
1194 2e15e23b Gerd Hoffmann
    isa_dev = isa_create_simple("i8042");
1195 7c29d0c0 bellard
    DMA_init(0);
1196 6a36d84e bellard
#ifdef HAS_AUDIO
1197 1452411b Avi Kivity
    audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1198 fb065187 bellard
#endif
1199 80cabfad bellard
1200 e4bcb14c ths
    for(i = 0; i < MAX_FD; i++) {
1201 fd8014e1 Gerd Hoffmann
        fd[i] = drive_get(IF_FLOPPY, 0, i);
1202 e4bcb14c ths
    }
1203 86c86157 Gerd Hoffmann
    floppy_controller = fdctrl_init_isa(fd);
1204 b41a2cd1 bellard
1205 00f82b8a aurel32
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1206 69b91039 bellard
1207 bb36d470 bellard
    if (pci_enabled && usb_enabled) {
1208 afcc3cdf ths
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1209 bb36d470 bellard
    }
1210 bb36d470 bellard
1211 6515b203 bellard
    if (pci_enabled && acpi_enabled) {
1212 3fffc223 ths
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1213 0ff596d0 pbrook
        i2c_bus *smbus;
1214 0ff596d0 pbrook
1215 0ff596d0 pbrook
        /* TODO: Populate SPD eeprom data.  */
1216 3a38d437 Jes Sorensen
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1217 3a38d437 Jes Sorensen
                              isa_reserve_irq(9));
1218 3fffc223 ths
        for (i = 0; i < 8; i++) {
1219 1ea96673 Paul Brook
            DeviceState *eeprom;
1220 02e2da45 Paul Brook
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1221 5b7f5327 Juan Quintela
            qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1222 ee6847d1 Gerd Hoffmann
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1223 e23a1b33 Markus Armbruster
            qdev_init_nofail(eeprom);
1224 3fffc223 ths
        }
1225 3f84865a Gerd Hoffmann
        piix4_acpi_system_hot_add_init(pci_bus);
1226 6515b203 bellard
    }
1227 3b46e624 ths
1228 a5954d5c bellard
    if (i440fx_state) {
1229 a5954d5c bellard
        i440fx_init_memory_mappings(i440fx_state);
1230 a5954d5c bellard
    }
1231 e4bcb14c ths
1232 7d8406be pbrook
    if (pci_enabled) {
1233 e4bcb14c ths
        int max_bus;
1234 9be5dafe Paul Brook
        int bus;
1235 96d30e48 ths
1236 e4bcb14c ths
        max_bus = drive_get_max_bus(IF_SCSI);
1237 e4bcb14c ths
        for (bus = 0; bus <= max_bus; bus++) {
1238 9be5dafe Paul Brook
            pci_create_simple(pci_bus, -1, "lsi53c895a");
1239 e4bcb14c ths
        }
1240 7d8406be pbrook
    }
1241 6e02c38d aliguori
1242 a2fa19f9 aliguori
    /* Add virtio console devices */
1243 a2fa19f9 aliguori
    if (pci_enabled) {
1244 a2fa19f9 aliguori
        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1245 0e058a8a Paul Brook
            if (virtcon_hds[i]) {
1246 caea79a9 Mark McLoughlin
                pci_create_simple(pci_bus, -1, "virtio-console-pci");
1247 0e058a8a Paul Brook
            }
1248 a2fa19f9 aliguori
        }
1249 a2fa19f9 aliguori
    }
1250 80cabfad bellard
}
1251 b5ff2d6e bellard
1252 c227f099 Anthony Liguori
static void pc_init_pci(ram_addr_t ram_size,
1253 3023f332 aliguori
                        const char *boot_device,
1254 5fafdf24 ths
                        const char *kernel_filename,
1255 3dbbdc25 bellard
                        const char *kernel_cmdline,
1256 94fc95cd j_mayer
                        const char *initrd_filename,
1257 94fc95cd j_mayer
                        const char *cpu_model)
1258 3dbbdc25 bellard
{
1259 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1260 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1261 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 1);
1262 3dbbdc25 bellard
}
1263 3dbbdc25 bellard
1264 c227f099 Anthony Liguori
static void pc_init_isa(ram_addr_t ram_size,
1265 3023f332 aliguori
                        const char *boot_device,
1266 5fafdf24 ths
                        const char *kernel_filename,
1267 3dbbdc25 bellard
                        const char *kernel_cmdline,
1268 94fc95cd j_mayer
                        const char *initrd_filename,
1269 94fc95cd j_mayer
                        const char *cpu_model)
1270 3dbbdc25 bellard
{
1271 679a37af Gerd Hoffmann
    if (cpu_model == NULL)
1272 679a37af Gerd Hoffmann
        cpu_model = "486";
1273 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1274 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1275 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 0);
1276 3dbbdc25 bellard
}
1277 3dbbdc25 bellard
1278 0bacd130 aliguori
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1279 0bacd130 aliguori
   BIOS will read it and start S3 resume at POST Entry */
1280 0bacd130 aliguori
void cmos_set_s3_resume(void)
1281 0bacd130 aliguori
{
1282 0bacd130 aliguori
    if (rtc_state)
1283 0bacd130 aliguori
        rtc_set_memory(rtc_state, 0xF, 0xFE);
1284 0bacd130 aliguori
}
1285 0bacd130 aliguori
1286 f80f9ec9 Anthony Liguori
static QEMUMachine pc_machine = {
1287 95747581 Mark McLoughlin
    .name = "pc-0.11",
1288 95747581 Mark McLoughlin
    .alias = "pc",
1289 a245f2e7 aurel32
    .desc = "Standard PC",
1290 a245f2e7 aurel32
    .init = pc_init_pci,
1291 b2097003 aliguori
    .max_cpus = 255,
1292 0c257437 Anthony Liguori
    .is_default = 1,
1293 3dbbdc25 bellard
};
1294 3dbbdc25 bellard
1295 96cc1810 Gerd Hoffmann
static QEMUMachine pc_machine_v0_10 = {
1296 96cc1810 Gerd Hoffmann
    .name = "pc-0.10",
1297 96cc1810 Gerd Hoffmann
    .desc = "Standard PC, qemu 0.10",
1298 96cc1810 Gerd Hoffmann
    .init = pc_init_pci,
1299 96cc1810 Gerd Hoffmann
    .max_cpus = 255,
1300 96cc1810 Gerd Hoffmann
    .compat_props = (CompatProperty[]) {
1301 ab73ff29 Gerd Hoffmann
        {
1302 ab73ff29 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1303 ab73ff29 Gerd Hoffmann
            .property = "class",
1304 ab73ff29 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_STORAGE_OTHER),
1305 d6beee99 Gerd Hoffmann
        },{
1306 d6beee99 Gerd Hoffmann
            .driver   = "virtio-console-pci",
1307 d6beee99 Gerd Hoffmann
            .property = "class",
1308 d6beee99 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
1309 a1e0fea5 Gerd Hoffmann
        },{
1310 a1e0fea5 Gerd Hoffmann
            .driver   = "virtio-net-pci",
1311 a1e0fea5 Gerd Hoffmann
            .property = "vectors",
1312 a1e0fea5 Gerd Hoffmann
            .value    = stringify(0),
1313 177539e0 Gerd Hoffmann
        },{
1314 177539e0 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1315 177539e0 Gerd Hoffmann
            .property = "vectors",
1316 177539e0 Gerd Hoffmann
            .value    = stringify(0),
1317 ab73ff29 Gerd Hoffmann
        },
1318 96cc1810 Gerd Hoffmann
        { /* end of list */ }
1319 96cc1810 Gerd Hoffmann
    },
1320 96cc1810 Gerd Hoffmann
};
1321 96cc1810 Gerd Hoffmann
1322 f80f9ec9 Anthony Liguori
static QEMUMachine isapc_machine = {
1323 a245f2e7 aurel32
    .name = "isapc",
1324 a245f2e7 aurel32
    .desc = "ISA-only PC",
1325 a245f2e7 aurel32
    .init = pc_init_isa,
1326 b2097003 aliguori
    .max_cpus = 1,
1327 b5ff2d6e bellard
};
1328 f80f9ec9 Anthony Liguori
1329 f80f9ec9 Anthony Liguori
static void pc_machine_init(void)
1330 f80f9ec9 Anthony Liguori
{
1331 f80f9ec9 Anthony Liguori
    qemu_register_machine(&pc_machine);
1332 96cc1810 Gerd Hoffmann
    qemu_register_machine(&pc_machine_v0_10);
1333 f80f9ec9 Anthony Liguori
    qemu_register_machine(&isapc_machine);
1334 f80f9ec9 Anthony Liguori
}
1335 f80f9ec9 Anthony Liguori
1336 f80f9ec9 Anthony Liguori
machine_init(pc_machine_init);