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/*
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* SH4 emulation
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*
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* Copyright (c) 2005 Samuel Tardieu
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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|
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static inline void set_flag(uint32_t flag) |
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{ |
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env->flags |= flag; |
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} |
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|
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static inline void clr_flag(uint32_t flag) |
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{ |
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env->flags &= ~flag; |
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} |
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|
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static inline void set_t(void) |
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{ |
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env->sr |= SR_T; |
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} |
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|
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static inline void clr_t(void) |
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{ |
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env->sr &= ~SR_T; |
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} |
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|
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static inline void cond_t(int cond) |
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{ |
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if (cond)
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set_t(); |
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else
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clr_t(); |
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} |
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|
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void OPPROTO op_movl_imm_T0(void) |
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{ |
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T0 = (uint32_t) PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_movl_imm_T1(void) |
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{ |
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T0 = (uint32_t) PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_movl_imm_T2(void) |
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{ |
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T0 = (uint32_t) PARAM1; |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmp_eq_imm_T0(void) |
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{ |
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cond_t((int32_t) T0 == (int32_t) PARAM1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmd_eq_T0_T1(void) |
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{ |
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cond_t(T0 == T1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmd_hs_T0_T1(void) |
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{ |
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cond_t((uint32_t) T0 <= (uint32_t) T1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmd_ge_T0_T1(void) |
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{ |
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cond_t((int32_t) T0 <= (int32_t) T1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmd_hi_T0_T1(void) |
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{ |
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cond_t((uint32_t) T0 < (uint32_t) T1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmd_gt_T0_T1(void) |
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{ |
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cond_t((int32_t) T0 < (int32_t) T1); |
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RETURN(); |
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} |
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|
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void OPPROTO op_not_T0(void) |
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{ |
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T0 = ~T0; |
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RETURN(); |
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} |
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|
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void OPPROTO op_bf_s(void) |
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{ |
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env->delayed_pc = PARAM1; |
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set_flag(DELAY_SLOT_CONDITIONAL | ((~env->sr) & SR_T)); |
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RETURN(); |
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} |
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|
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void OPPROTO op_bt_s(void) |
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{ |
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env->delayed_pc = PARAM1; |
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set_flag(DELAY_SLOT_CONDITIONAL | (env->sr & SR_T)); |
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RETURN(); |
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} |
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|
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void OPPROTO op_bra(void) |
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{ |
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env->delayed_pc = PARAM1; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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|
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void OPPROTO op_braf_T0(void) |
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{ |
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env->delayed_pc = PARAM1 + T0; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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|
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void OPPROTO op_bsr(void) |
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{ |
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env->pr = PARAM1; |
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env->delayed_pc = PARAM2; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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|
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void OPPROTO op_bsrf_T0(void) |
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{ |
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env->pr = PARAM1; |
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env->delayed_pc = PARAM1 + T0; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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void OPPROTO op_jsr_T0(void) |
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{ |
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env->pr = PARAM1; |
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env->delayed_pc = T0; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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|
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void OPPROTO op_rts(void) |
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{ |
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env->delayed_pc = env->pr; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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|
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void OPPROTO op_clr_delay_slot(void) |
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{ |
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clr_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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|
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void OPPROTO op_clr_delay_slot_conditional(void) |
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{ |
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clr_flag(DELAY_SLOT_CONDITIONAL); |
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RETURN(); |
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} |
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|
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void OPPROTO op_exit_tb(void) |
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{ |
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EXIT_TB(); |
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RETURN(); |
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} |
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|
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void OPPROTO op_addl_imm_T0(void) |
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{ |
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T0 += PARAM1; |
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RETURN(); |
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} |
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void OPPROTO op_addl_imm_T1(void) |
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{ |
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T1 += PARAM1; |
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RETURN(); |
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} |
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void OPPROTO op_clrmac(void) |
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{ |
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env->mach = env->macl = 0;
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RETURN(); |
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} |
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void OPPROTO op_clrs(void) |
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{ |
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env->sr &= ~SR_S; |
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RETURN(); |
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} |
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void OPPROTO op_clrt(void) |
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{ |
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env->sr &= ~SR_T; |
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RETURN(); |
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} |
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void OPPROTO op_sets(void) |
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{ |
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env->sr |= SR_S; |
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RETURN(); |
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} |
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void OPPROTO op_sett(void) |
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{ |
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env->sr |= SR_T; |
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RETURN(); |
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} |
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void OPPROTO op_frchg(void) |
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{ |
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env->fpscr ^= FPSCR_FR; |
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RETURN(); |
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} |
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void OPPROTO op_fschg(void) |
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{ |
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env->fpscr ^= FPSCR_SZ; |
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RETURN(); |
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} |
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void OPPROTO op_rte(void) |
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{ |
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env->sr = env->ssr; |
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env->delayed_pc = env->spc; |
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set_flag(DELAY_SLOT); |
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RETURN(); |
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} |
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void OPPROTO op_swapb_T0(void) |
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{ |
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T0 = (T0 & 0xffff0000) | ((T0 & 0xff) << 8) | ((T0 >> 8) & 0xff); |
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RETURN(); |
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} |
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void OPPROTO op_swapw_T0(void) |
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{ |
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T0 = ((T0 & 0xffff) << 16) | ((T0 >> 16) & 0xffff); |
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RETURN(); |
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} |
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void OPPROTO op_xtrct_T0_T1(void) |
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{ |
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T1 = ((T0 & 0xffff) << 16) | ((T1 >> 16) & 0xffff); |
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RETURN(); |
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} |
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void OPPROTO op_addc_T0_T1(void) |
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{ |
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helper_addc_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_addv_T0_T1(void) |
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{ |
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helper_addv_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_eq_T0_T1(void) |
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{ |
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cond_t(T1 == T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_ge_T0_T1(void) |
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{ |
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cond_t((int32_t) T1 >= (int32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_gt_T0_T1(void) |
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{ |
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cond_t((int32_t) T1 > (int32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_hi_T0_T1(void) |
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{ |
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cond_t((uint32_t) T1 > (uint32_t) T0); |
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RETURN(); |
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} |
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|
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void OPPROTO op_cmp_hs_T0_T1(void) |
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{ |
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cond_t((uint32_t) T1 >= (uint32_t) T0); |
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RETURN(); |
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} |
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void OPPROTO op_cmp_str_T0_T1(void) |
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{ |
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cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) || |
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(T0 & 0x0000ff00) == (T1 & 0x0000ff00) || |
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(T0 & 0x00ff0000) == (T1 & 0x00ff0000) || |
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(T0 & 0xff000000) == (T1 & 0xff000000)); |
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RETURN(); |
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} |
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void OPPROTO op_tst_T0_T1(void) |
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{ |
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cond_t((T1 & T0) == 0);
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RETURN(); |
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} |
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|
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void OPPROTO op_div0s_T0_T1(void) |
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{ |
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if (T1 & 0x80000000) |
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env->sr |= SR_Q; |
328 |
else
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env->sr &= ~SR_Q; |
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if (T0 & 0x80000000) |
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env->sr |= SR_M; |
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else
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env->sr &= ~SR_M; |
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cond_t((T1 ^ T0) & 0x80000000);
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RETURN(); |
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} |
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|
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void OPPROTO op_div0u(void) |
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{ |
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env->sr &= ~(SR_M | SR_Q | SR_T); |
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RETURN(); |
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} |
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|
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void OPPROTO op_div1_T0_T1(void) |
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{ |
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helper_div1_T0_T1(); |
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RETURN(); |
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} |
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|
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void OPPROTO op_dmulsl_T0_T1(void) |
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{ |
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helper_dmulsl_T0_T1(); |
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RETURN(); |
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} |
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|
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void OPPROTO op_dmulul_T0_T1(void) |
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{ |
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helper_dmulul_T0_T1(); |
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RETURN(); |
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} |
361 |
|
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void OPPROTO op_macl_T0_T1(void) |
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{ |
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helper_macl_T0_T1(); |
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RETURN(); |
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} |
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|
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void OPPROTO op_macw_T0_T1(void) |
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{ |
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helper_macw_T0_T1(); |
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RETURN(); |
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} |
373 |
|
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void OPPROTO op_mull_T0_T1(void) |
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{ |
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env->macl = (T0 * T1) & 0xffffffff;
|
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RETURN(); |
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} |
379 |
|
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void OPPROTO op_mulsw_T0_T1(void) |
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{ |
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env->macl = (int32_t) T0 *(int32_t) T1; |
383 |
RETURN(); |
384 |
} |
385 |
|
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void OPPROTO op_muluw_T0_T1(void) |
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{ |
388 |
env->macl = (uint32_t) T0 *(uint32_t) T1; |
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RETURN(); |
390 |
} |
391 |
|
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void OPPROTO op_neg_T0(void) |
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{ |
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T0 = -T0; |
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RETURN(); |
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} |
397 |
|
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void OPPROTO op_negc_T0(void) |
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{ |
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helper_negc_T0(); |
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RETURN(); |
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} |
403 |
|
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void OPPROTO op_shad_T0_T1(void) |
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{ |
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if ((T0 & 0x80000000) == 0) |
407 |
T1 <<= (T0 & 0x1f);
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else if ((T0 & 0x1f) == 0) |
409 |
T1 = 0;
|
410 |
else
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411 |
T1 = ((int32_t) T1) >> ((~T0 & 0x1f) + 1); |
412 |
RETURN(); |
413 |
} |
414 |
|
415 |
void OPPROTO op_shld_T0_T1(void) |
416 |
{ |
417 |
if ((T0 & 0x80000000) == 0) |
418 |
T1 <<= (T0 & 0x1f);
|
419 |
else if ((T0 & 0x1f) == 0) |
420 |
T1 = 0;
|
421 |
else
|
422 |
T1 = ((uint32_t) T1) >> ((~T0 & 0x1f) + 1); |
423 |
RETURN(); |
424 |
} |
425 |
|
426 |
void OPPROTO op_subc_T0_T1(void) |
427 |
{ |
428 |
helper_subc_T0_T1(); |
429 |
RETURN(); |
430 |
} |
431 |
|
432 |
void OPPROTO op_subv_T0_T1(void) |
433 |
{ |
434 |
helper_subv_T0_T1(); |
435 |
RETURN(); |
436 |
} |
437 |
|
438 |
void OPPROTO op_trapa(void) |
439 |
{ |
440 |
env->tra = PARAM1 * 2;
|
441 |
env->exception_index = 0x160;
|
442 |
do_raise_exception(); |
443 |
RETURN(); |
444 |
} |
445 |
|
446 |
void OPPROTO op_cmp_pl_T0(void) |
447 |
{ |
448 |
cond_t((int32_t) T0 > 0);
|
449 |
RETURN(); |
450 |
} |
451 |
|
452 |
void OPPROTO op_cmp_pz_T0(void) |
453 |
{ |
454 |
cond_t((int32_t) T0 >= 0);
|
455 |
RETURN(); |
456 |
} |
457 |
|
458 |
void OPPROTO op_jmp_T0(void) |
459 |
{ |
460 |
env->delayed_pc = T0; |
461 |
set_flag(DELAY_SLOT); |
462 |
RETURN(); |
463 |
} |
464 |
|
465 |
void OPPROTO op_movl_rN_rN(void) |
466 |
{ |
467 |
env->gregs[PARAM2] = env->gregs[PARAM1]; |
468 |
RETURN(); |
469 |
} |
470 |
|
471 |
void OPPROTO op_ldcl_rMplus_rN_bank(void) |
472 |
{ |
473 |
env->gregs[PARAM2] = env->gregs[PARAM1]; |
474 |
env->gregs[PARAM1] += 4;
|
475 |
RETURN(); |
476 |
} |
477 |
|
478 |
void OPPROTO op_ldc_T0_sr(void) |
479 |
{ |
480 |
env->sr = T0 & 0x700083f3;
|
481 |
RETURN(); |
482 |
} |
483 |
|
484 |
void OPPROTO op_stc_sr_T0(void) |
485 |
{ |
486 |
T0 = env->sr; |
487 |
RETURN(); |
488 |
} |
489 |
|
490 |
#define LDSTOPS(target,load,store) \
|
491 |
void OPPROTO op_##load##_T0_##target (void) \ |
492 |
{ env ->target = T0; RETURN(); \ |
493 |
} \ |
494 |
void OPPROTO op_##store##_##target##_T0 (void) \ |
495 |
{ T0 = env->target; RETURN(); \ |
496 |
} \ |
497 |
|
498 |
LDSTOPS(gbr, ldc, stc) |
499 |
LDSTOPS(vbr, ldc, stc) |
500 |
LDSTOPS(ssr, ldc, stc) |
501 |
LDSTOPS(spc, ldc, stc) |
502 |
LDSTOPS(sgr, ldc, stc) |
503 |
LDSTOPS(dbr, ldc, stc) |
504 |
LDSTOPS(mach, lds, sts) |
505 |
LDSTOPS(macl, lds, sts) |
506 |
LDSTOPS(pr, lds, sts) |
507 |
LDSTOPS(fpul, lds, sts) |
508 |
|
509 |
void OPPROTO op_lds_T0_fpscr(void) |
510 |
{ |
511 |
env->fpscr = T0 & 0x003fffff;
|
512 |
RETURN(); |
513 |
} |
514 |
|
515 |
void OPPROTO op_sts_fpscr_T0(void) |
516 |
{ |
517 |
T0 = env->fpscr & 0x003fffff;
|
518 |
RETURN(); |
519 |
} |
520 |
|
521 |
void OPPROTO op_movt_rN(void) |
522 |
{ |
523 |
env->gregs[PARAM1] = env->sr & SR_T; |
524 |
RETURN(); |
525 |
} |
526 |
|
527 |
void OPPROTO op_rotcl_Rn(void) |
528 |
{ |
529 |
helper_rotcl(&env->gregs[PARAM1]); |
530 |
RETURN(); |
531 |
} |
532 |
|
533 |
void OPPROTO op_rotcr_Rn(void) |
534 |
{ |
535 |
helper_rotcr(&env->gregs[PARAM1]); |
536 |
RETURN(); |
537 |
} |
538 |
|
539 |
void OPPROTO op_rotl_Rn(void) |
540 |
{ |
541 |
cond_t(env->gregs[PARAM1] & 0x80000000);
|
542 |
env->gregs[PARAM1] = (env->gregs[PARAM1] << 1) | (env->sr & SR_T);
|
543 |
RETURN(); |
544 |
} |
545 |
|
546 |
void OPPROTO op_rotr_Rn(void) |
547 |
{ |
548 |
cond_t(env->gregs[PARAM1] & 1);
|
549 |
env->gregs[PARAM1] = (env->gregs[PARAM1] >> 1) |
|
550 |
((env->sr & SR_T) ? 0x80000000 : 0); |
551 |
RETURN(); |
552 |
} |
553 |
|
554 |
void OPPROTO op_shal_Rn(void) |
555 |
{ |
556 |
cond_t(env->gregs[PARAM1] & 0x80000000);
|
557 |
env->gregs[PARAM1] <<= 1;
|
558 |
RETURN(); |
559 |
} |
560 |
|
561 |
void OPPROTO op_shar_Rn(void) |
562 |
{ |
563 |
cond_t(env->gregs[PARAM1] & 1);
|
564 |
*(int32_t *) & env->gregs[PARAM1] >>= 1;
|
565 |
RETURN(); |
566 |
} |
567 |
|
568 |
void OPPROTO op_shlr_Rn(void) |
569 |
{ |
570 |
cond_t(env->gregs[PARAM1] & 1);
|
571 |
*(uint32_t *) & env->gregs[PARAM1] >>= 1;
|
572 |
RETURN(); |
573 |
} |
574 |
|
575 |
void OPPROTO op_shll2_Rn(void) |
576 |
{ |
577 |
env->gregs[PARAM1] <<= 2;
|
578 |
RETURN(); |
579 |
} |
580 |
|
581 |
void OPPROTO op_shll8_Rn(void) |
582 |
{ |
583 |
env->gregs[PARAM1] <<= 8;
|
584 |
RETURN(); |
585 |
} |
586 |
|
587 |
void OPPROTO op_shll16_Rn(void) |
588 |
{ |
589 |
env->gregs[PARAM1] <<= 16;
|
590 |
RETURN(); |
591 |
} |
592 |
|
593 |
void OPPROTO op_shlr2_Rn(void) |
594 |
{ |
595 |
*(uint32_t *) & env->gregs[PARAM1] >>= 2;
|
596 |
RETURN(); |
597 |
} |
598 |
|
599 |
void OPPROTO op_shlr8_Rn(void) |
600 |
{ |
601 |
*(uint32_t *) & env->gregs[PARAM1] >>= 8;
|
602 |
RETURN(); |
603 |
} |
604 |
|
605 |
void OPPROTO op_shlr16_Rn(void) |
606 |
{ |
607 |
*(uint32_t *) & env->gregs[PARAM1] >>= 16;
|
608 |
RETURN(); |
609 |
} |
610 |
|
611 |
void OPPROTO op_tasb_rN(void) |
612 |
{ |
613 |
cond_t(*(int8_t *) env->gregs[PARAM1] == 0);
|
614 |
*(int8_t *) env->gregs[PARAM1] |= 0x80;
|
615 |
RETURN(); |
616 |
} |
617 |
|
618 |
void OPPROTO op_movl_T0_rN(void) |
619 |
{ |
620 |
env->gregs[PARAM1] = T0; |
621 |
RETURN(); |
622 |
} |
623 |
|
624 |
void OPPROTO op_movl_T1_rN(void) |
625 |
{ |
626 |
env->gregs[PARAM1] = T1; |
627 |
RETURN(); |
628 |
} |
629 |
|
630 |
void OPPROTO op_movb_rN_T0(void) |
631 |
{ |
632 |
T0 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
|
633 |
RETURN(); |
634 |
} |
635 |
|
636 |
void OPPROTO op_movub_rN_T0(void) |
637 |
{ |
638 |
T0 = env->gregs[PARAM1] & 0xff;
|
639 |
RETURN(); |
640 |
} |
641 |
|
642 |
void OPPROTO op_movw_rN_T0(void) |
643 |
{ |
644 |
T0 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
|
645 |
RETURN(); |
646 |
} |
647 |
|
648 |
void OPPROTO op_movuw_rN_T0(void) |
649 |
{ |
650 |
T0 = env->gregs[PARAM1] & 0xffff;
|
651 |
RETURN(); |
652 |
} |
653 |
|
654 |
void OPPROTO op_movl_rN_T0(void) |
655 |
{ |
656 |
T0 = env->gregs[PARAM1]; |
657 |
RETURN(); |
658 |
} |
659 |
|
660 |
void OPPROTO op_movb_rN_T1(void) |
661 |
{ |
662 |
T1 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
|
663 |
RETURN(); |
664 |
} |
665 |
|
666 |
void OPPROTO op_movub_rN_T1(void) |
667 |
{ |
668 |
T1 = env->gregs[PARAM1] & 0xff;
|
669 |
RETURN(); |
670 |
} |
671 |
|
672 |
void OPPROTO op_movw_rN_T1(void) |
673 |
{ |
674 |
T1 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
|
675 |
RETURN(); |
676 |
} |
677 |
|
678 |
void OPPROTO op_movuw_rN_T1(void) |
679 |
{ |
680 |
T1 = env->gregs[PARAM1] & 0xffff;
|
681 |
RETURN(); |
682 |
} |
683 |
|
684 |
void OPPROTO op_movl_rN_T1(void) |
685 |
{ |
686 |
T1 = env->gregs[PARAM1]; |
687 |
RETURN(); |
688 |
} |
689 |
|
690 |
void OPPROTO op_movl_imm_rN(void) |
691 |
{ |
692 |
env->gregs[PARAM2] = PARAM1; |
693 |
RETURN(); |
694 |
} |
695 |
|
696 |
void OPPROTO op_fmov_frN_FT0(void) |
697 |
{ |
698 |
FT0 = *(float32 *)&env->fregs[PARAM1]; |
699 |
RETURN(); |
700 |
} |
701 |
|
702 |
void OPPROTO op_fmov_drN_DT0(void) |
703 |
{ |
704 |
DT0 = *(float64 *)&env->fregs[PARAM1]; |
705 |
RETURN(); |
706 |
} |
707 |
|
708 |
void OPPROTO op_fmov_FT0_frN(void) |
709 |
{ |
710 |
*(float32 *)&env->fregs[PARAM1] = FT0; |
711 |
RETURN(); |
712 |
} |
713 |
|
714 |
void OPPROTO op_fmov_DT0_drN(void) |
715 |
{ |
716 |
*(float64 *)&env->fregs[PARAM1] = DT0; |
717 |
RETURN(); |
718 |
} |
719 |
|
720 |
void OPPROTO op_dec1_rN(void) |
721 |
{ |
722 |
env->gregs[PARAM1] -= 1;
|
723 |
RETURN(); |
724 |
} |
725 |
|
726 |
void OPPROTO op_dec2_rN(void) |
727 |
{ |
728 |
env->gregs[PARAM1] -= 2;
|
729 |
RETURN(); |
730 |
} |
731 |
|
732 |
void OPPROTO op_dec4_rN(void) |
733 |
{ |
734 |
env->gregs[PARAM1] -= 4;
|
735 |
RETURN(); |
736 |
} |
737 |
|
738 |
void OPPROTO op_dec8_rN(void) |
739 |
{ |
740 |
env->gregs[PARAM1] -= 4;
|
741 |
RETURN(); |
742 |
} |
743 |
|
744 |
void OPPROTO op_inc1_rN(void) |
745 |
{ |
746 |
env->gregs[PARAM1] += 1;
|
747 |
RETURN(); |
748 |
} |
749 |
|
750 |
void OPPROTO op_inc2_rN(void) |
751 |
{ |
752 |
env->gregs[PARAM1] += 2;
|
753 |
RETURN(); |
754 |
} |
755 |
|
756 |
void OPPROTO op_inc4_rN(void) |
757 |
{ |
758 |
env->gregs[PARAM1] += 4;
|
759 |
RETURN(); |
760 |
} |
761 |
|
762 |
void OPPROTO op_inc8_rN(void) |
763 |
{ |
764 |
env->gregs[PARAM1] += 4;
|
765 |
RETURN(); |
766 |
} |
767 |
|
768 |
void OPPROTO op_add_T0_rN(void) |
769 |
{ |
770 |
env->gregs[PARAM1] += T0; |
771 |
RETURN(); |
772 |
} |
773 |
|
774 |
void OPPROTO op_sub_T0_rN(void) |
775 |
{ |
776 |
env->gregs[PARAM1] -= T0; |
777 |
RETURN(); |
778 |
} |
779 |
|
780 |
void OPPROTO op_and_T0_rN(void) |
781 |
{ |
782 |
env->gregs[PARAM1] &= T0; |
783 |
RETURN(); |
784 |
} |
785 |
|
786 |
void OPPROTO op_or_T0_rN(void) |
787 |
{ |
788 |
env->gregs[PARAM1] |= T0; |
789 |
RETURN(); |
790 |
} |
791 |
|
792 |
void OPPROTO op_xor_T0_rN(void) |
793 |
{ |
794 |
env->gregs[PARAM1] ^= T0; |
795 |
RETURN(); |
796 |
} |
797 |
|
798 |
void OPPROTO op_add_rN_T0(void) |
799 |
{ |
800 |
T0 += env->gregs[PARAM1]; |
801 |
RETURN(); |
802 |
} |
803 |
|
804 |
void OPPROTO op_add_rN_T1(void) |
805 |
{ |
806 |
T1 += env->gregs[PARAM1]; |
807 |
RETURN(); |
808 |
} |
809 |
|
810 |
void OPPROTO op_add_imm_rN(void) |
811 |
{ |
812 |
env->gregs[PARAM2] += PARAM1; |
813 |
RETURN(); |
814 |
} |
815 |
|
816 |
void OPPROTO op_and_imm_rN(void) |
817 |
{ |
818 |
env->gregs[PARAM2] &= PARAM1; |
819 |
RETURN(); |
820 |
} |
821 |
|
822 |
void OPPROTO op_or_imm_rN(void) |
823 |
{ |
824 |
env->gregs[PARAM2] |= PARAM1; |
825 |
RETURN(); |
826 |
} |
827 |
|
828 |
void OPPROTO op_xor_imm_rN(void) |
829 |
{ |
830 |
env->gregs[PARAM2] ^= PARAM1; |
831 |
RETURN(); |
832 |
} |
833 |
|
834 |
void OPPROTO op_dt_rN(void) |
835 |
{ |
836 |
cond_t((--env->gregs[PARAM1]) == 0);
|
837 |
RETURN(); |
838 |
} |
839 |
|
840 |
void OPPROTO op_tst_imm_rN(void) |
841 |
{ |
842 |
cond_t((env->gregs[PARAM2] & PARAM1) == 0);
|
843 |
RETURN(); |
844 |
} |
845 |
|
846 |
void OPPROTO op_movl_T0_T1(void) |
847 |
{ |
848 |
T1 = T0; |
849 |
RETURN(); |
850 |
} |
851 |
|
852 |
void OPPROTO op_movl_fpul_FT0(void) |
853 |
{ |
854 |
FT0 = *(float32 *)&env->fpul; |
855 |
RETURN(); |
856 |
} |
857 |
|
858 |
void OPPROTO op_movl_FT0_fpul(void) |
859 |
{ |
860 |
*(float32 *)&env->fpul = FT0; |
861 |
RETURN(); |
862 |
} |
863 |
|
864 |
void OPPROTO op_goto_tb0(void) |
865 |
{ |
866 |
GOTO_TB(op_goto_tb0, PARAM1, 0);
|
867 |
RETURN(); |
868 |
} |
869 |
|
870 |
void OPPROTO op_goto_tb1(void) |
871 |
{ |
872 |
GOTO_TB(op_goto_tb1, PARAM1, 1);
|
873 |
RETURN(); |
874 |
} |
875 |
|
876 |
void OPPROTO op_movl_imm_PC(void) |
877 |
{ |
878 |
env->pc = PARAM1; |
879 |
RETURN(); |
880 |
} |
881 |
|
882 |
void OPPROTO op_jT(void) |
883 |
{ |
884 |
if (env->sr & SR_T)
|
885 |
GOTO_LABEL_PARAM(1);
|
886 |
RETURN(); |
887 |
} |
888 |
|
889 |
void OPPROTO op_jdelayed(void) |
890 |
{ |
891 |
uint32_t flags; |
892 |
flags = env->flags; |
893 |
env->flags &= ~(DELAY_SLOT | DELAY_SLOT_CONDITIONAL); |
894 |
if (flags & DELAY_SLOT)
|
895 |
GOTO_LABEL_PARAM(1);
|
896 |
RETURN(); |
897 |
} |
898 |
|
899 |
void OPPROTO op_movl_delayed_pc_PC(void) |
900 |
{ |
901 |
env->pc = env->delayed_pc; |
902 |
RETURN(); |
903 |
} |
904 |
|
905 |
void OPPROTO op_addl_GBR_T0(void) |
906 |
{ |
907 |
T0 += env->gbr; |
908 |
RETURN(); |
909 |
} |
910 |
|
911 |
void OPPROTO op_and_imm_T0(void) |
912 |
{ |
913 |
T0 &= PARAM1; |
914 |
RETURN(); |
915 |
} |
916 |
|
917 |
void OPPROTO op_or_imm_T0(void) |
918 |
{ |
919 |
T0 |= PARAM1; |
920 |
RETURN(); |
921 |
} |
922 |
|
923 |
void OPPROTO op_xor_imm_T0(void) |
924 |
{ |
925 |
T0 ^= PARAM1; |
926 |
RETURN(); |
927 |
} |
928 |
|
929 |
void OPPROTO op_tst_imm_T0(void) |
930 |
{ |
931 |
cond_t((T0 & PARAM1) == 0);
|
932 |
RETURN(); |
933 |
} |
934 |
|
935 |
void OPPROTO op_raise_illegal_instruction(void) |
936 |
{ |
937 |
env->exception_index = 0x180;
|
938 |
do_raise_exception(); |
939 |
RETURN(); |
940 |
} |
941 |
|
942 |
void OPPROTO op_raise_slot_illegal_instruction(void) |
943 |
{ |
944 |
env->exception_index = 0x1a0;
|
945 |
do_raise_exception(); |
946 |
RETURN(); |
947 |
} |
948 |
|
949 |
void OPPROTO op_debug(void) |
950 |
{ |
951 |
env->exception_index = EXCP_DEBUG; |
952 |
cpu_loop_exit(); |
953 |
} |
954 |
|
955 |
/* Load and store */
|
956 |
#define MEMSUFFIX _raw
|
957 |
#include "op_mem.c" |
958 |
#undef MEMSUFFIX
|
959 |
#if !defined(CONFIG_USER_ONLY)
|
960 |
#define MEMSUFFIX _user
|
961 |
#include "op_mem.c" |
962 |
#undef MEMSUFFIX
|
963 |
|
964 |
#define MEMSUFFIX _kernel
|
965 |
#include "op_mem.c" |
966 |
#undef MEMSUFFIX
|
967 |
#endif
|