root / hw / slavio_serial.c @ 43057ab1
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/*
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* QEMU Sparc SLAVIO serial port emulation
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*
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* Copyright (c) 2003-2005 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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/* debug serial */
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//#define DEBUG_SERIAL
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/* debug keyboard */
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//#define DEBUG_KBD
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/* debug mouse */
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//#define DEBUG_MOUSE
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/*
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* This is the serial port, mouse and keyboard part of chip STP2001
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* (Slave I/O), also produced as NCR89C105. See
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* http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
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*
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* The serial ports implement full AMD AM8530 or Zilog Z8530 chips,
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* mouse and keyboard ports don't implement all functions and they are
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* only asynchronous. There is no DMA.
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*
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*/
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#ifdef DEBUG_SERIAL
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#define SER_DPRINTF(fmt, args...) \
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do { printf("SER: " fmt , ##args); } while (0) |
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#define pic_set_irq(irq, level) \
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do { printf("SER: set_irq(%d): %d\n", (irq), (level)); pic_set_irq((irq),(level));} while (0) |
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#else
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#define SER_DPRINTF(fmt, args...)
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#endif
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#ifdef DEBUG_KBD
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#define KBD_DPRINTF(fmt, args...) \
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do { printf("KBD: " fmt , ##args); } while (0) |
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#else
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#define KBD_DPRINTF(fmt, args...)
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#endif
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#ifdef DEBUG_MOUSE
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#define MS_DPRINTF(fmt, args...) \
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do { printf("SER: " fmt , ##args); } while (0) |
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#else
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#define MS_DPRINTF(fmt, args...)
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#endif
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typedef enum { |
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chn_a, chn_b, |
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} chn_id_t; |
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typedef enum { |
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ser, kbd, mouse, |
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} chn_type_t; |
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#define KBD_QUEUE_SIZE 256 |
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typedef struct { |
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uint8_t data[KBD_QUEUE_SIZE]; |
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int rptr, wptr, count;
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} KBDQueue; |
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typedef struct ChannelState { |
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int irq;
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int reg;
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int rxint, txint;
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chn_id_t chn; // this channel, A (base+4) or B (base+0)
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chn_type_t type; |
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struct ChannelState *otherchn;
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uint8_t rx, tx, wregs[16], rregs[16]; |
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KBDQueue queue; |
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CharDriverState *chr; |
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} ChannelState; |
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|
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struct SerialState {
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struct ChannelState chn[2]; |
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}; |
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|
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#define SERIAL_MAXADDR 7 |
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|
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static void handle_kbd_command(ChannelState *s, int val); |
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static int serial_can_receive(void *opaque); |
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static void serial_receive_byte(ChannelState *s, int ch); |
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|
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static void put_queue(void *opaque, int b) |
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{ |
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ChannelState *s = opaque; |
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KBDQueue *q = &s->queue; |
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KBD_DPRINTF("put: 0x%02x\n", b);
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if (q->count >= KBD_QUEUE_SIZE)
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return;
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q->data[q->wptr] = b; |
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if (++q->wptr == KBD_QUEUE_SIZE)
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q->wptr = 0;
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q->count++; |
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serial_receive_byte(s, 0);
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} |
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|
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static uint32_t get_queue(void *opaque) |
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{ |
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ChannelState *s = opaque; |
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KBDQueue *q = &s->queue; |
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int val;
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if (q->count == 0) { |
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return 0; |
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} else {
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val = q->data[q->rptr]; |
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if (++q->rptr == KBD_QUEUE_SIZE)
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q->rptr = 0;
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q->count--; |
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} |
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KBD_DPRINTF("get 0x%02x\n", val);
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if (q->count > 0) |
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serial_receive_byte(s, 0);
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return val;
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} |
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static void slavio_serial_update_irq(ChannelState *s) |
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{ |
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if ((s->wregs[1] & 1) && // interrupts enabled |
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(((s->wregs[1] & 2) && s->txint == 1) || // tx ints enabled, pending |
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((((s->wregs[1] & 0x18) == 8) || ((s->wregs[1] & 0x18) == 0x10)) && |
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s->rxint == 1) || // rx ints enabled, pending |
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((s->wregs[15] & 0x80) && (s->rregs[0] & 0x80)))) { // break int e&p |
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pic_set_irq(s->irq, 1);
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} else {
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pic_set_irq(s->irq, 0);
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} |
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} |
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static void slavio_serial_reset_chn(ChannelState *s) |
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{ |
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int i;
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s->reg = 0;
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for (i = 0; i < SERIAL_MAXADDR; i++) { |
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s->rregs[i] = 0;
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s->wregs[i] = 0;
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} |
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s->wregs[4] = 4; |
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s->wregs[9] = 0xc0; |
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s->wregs[11] = 8; |
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s->wregs[14] = 0x30; |
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s->wregs[15] = 0xf8; |
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s->rregs[0] = 0x44; |
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s->rregs[1] = 6; |
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s->rx = s->tx = 0;
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s->rxint = s->txint = 0;
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} |
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static void slavio_serial_reset(void *opaque) |
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{ |
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SerialState *s = opaque; |
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slavio_serial_reset_chn(&s->chn[0]);
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slavio_serial_reset_chn(&s->chn[1]);
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} |
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static inline void clr_rxint(ChannelState *s) |
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{ |
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s->rxint = 0;
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if (s->chn == 0) |
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s->rregs[3] &= ~0x20; |
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else {
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s->otherchn->rregs[3] &= ~4; |
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} |
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slavio_serial_update_irq(s); |
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} |
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static inline void set_rxint(ChannelState *s) |
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{ |
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s->rxint = 1;
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if (s->chn == 0) |
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s->rregs[3] |= 0x20; |
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else {
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s->otherchn->rregs[3] |= 4; |
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} |
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slavio_serial_update_irq(s); |
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} |
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static inline void clr_txint(ChannelState *s) |
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{ |
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s->txint = 0;
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if (s->chn == 0) |
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s->rregs[3] &= ~0x10; |
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else {
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s->otherchn->rregs[3] &= ~2; |
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} |
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slavio_serial_update_irq(s); |
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} |
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static inline void set_txint(ChannelState *s) |
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{ |
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s->txint = 1;
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if (s->chn == 0) |
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s->rregs[3] |= 0x10; |
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else {
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s->otherchn->rregs[3] |= 2; |
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} |
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slavio_serial_update_irq(s); |
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} |
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static void slavio_serial_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val) |
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{ |
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SerialState *ser = opaque; |
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ChannelState *s; |
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uint32_t saddr; |
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int newreg, channel;
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val &= 0xff;
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saddr = (addr & 3) >> 1; |
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channel = (addr & SERIAL_MAXADDR) >> 2;
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s = &ser->chn[channel]; |
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switch (saddr) {
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case 0: |
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SER_DPRINTF("Write channel %c, reg[%d] = %2.2x\n", channel? 'b' : 'a', s->reg, val & 0xff); |
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newreg = 0;
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switch (s->reg) {
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case 0: |
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newreg = val & 7;
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val &= 0x38;
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switch (val) {
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case 8: |
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newreg |= 0x8;
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break;
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case 0x20: |
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clr_rxint(s); |
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break;
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case 0x28: |
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clr_txint(s); |
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break;
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case 0x38: |
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clr_rxint(s); |
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clr_txint(s); |
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break;
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default:
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break;
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} |
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break;
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case 1 ... 8: |
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case 10 ... 15: |
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s->wregs[s->reg] = val; |
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break;
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case 9: |
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switch (val & 0xc0) { |
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case 0: |
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default:
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break;
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case 0x40: |
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slavio_serial_reset_chn(&ser->chn[1]);
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return;
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case 0x80: |
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slavio_serial_reset_chn(&ser->chn[0]);
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return;
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case 0xc0: |
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slavio_serial_reset(ser); |
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return;
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} |
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break;
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default:
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break;
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} |
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if (s->reg == 0) |
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s->reg = newreg; |
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else
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s->reg = 0;
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break;
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case 1: |
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SER_DPRINTF("Write channel %c, ch %d\n", channel? 'b' : 'a', val); |
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if (s->wregs[5] & 8) { // tx enabled |
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s->tx = val; |
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if (s->chr)
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qemu_chr_write(s->chr, &s->tx, 1);
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else if (s->type == kbd) { |
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handle_kbd_command(s, val); |
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} |
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s->txint = 1;
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s->rregs[0] |= 4; // Tx buffer empty |
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s->rregs[1] |= 1; // All sent |
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set_txint(s); |
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slavio_serial_update_irq(s); |
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} |
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break;
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default:
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break;
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} |
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} |
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static uint32_t slavio_serial_mem_readb(void *opaque, target_phys_addr_t addr) |
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{ |
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SerialState *ser = opaque; |
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ChannelState *s; |
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uint32_t saddr; |
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uint32_t ret; |
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int channel;
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saddr = (addr & 3) >> 1; |
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channel = (addr & SERIAL_MAXADDR) >> 2;
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s = &ser->chn[channel]; |
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switch (saddr) {
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case 0: |
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SER_DPRINTF("Read channel %c, reg[%d] = %2.2x\n", channel? 'b' : 'a', s->reg, s->rregs[s->reg]); |
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ret = s->rregs[s->reg]; |
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s->reg = 0;
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return ret;
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case 1: |
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s->rregs[0] &= ~1; |
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clr_rxint(s); |
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if (s->type == kbd)
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ret = get_queue(s); |
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else
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ret = s->rx; |
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SER_DPRINTF("Read channel %c, ch %d\n", channel? 'b' : 'a', ret); |
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return ret;
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default:
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break;
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} |
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return 0; |
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} |
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|
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static int serial_can_receive(void *opaque) |
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{ |
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ChannelState *s = opaque; |
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if (((s->wregs[3] & 1) == 0) // Rx not enabled |
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|| ((s->rregs[0] & 1) == 1)) // char already available |
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return 0; |
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else
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return 1; |
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} |
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|
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static void serial_receive_byte(ChannelState *s, int ch) |
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{ |
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SER_DPRINTF("put ch %d\n", ch);
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s->rregs[0] |= 1; |
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s->rx = ch; |
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set_rxint(s); |
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} |
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|
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static void serial_receive_break(ChannelState *s) |
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{ |
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s->rregs[0] |= 0x80; |
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slavio_serial_update_irq(s); |
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} |
364 |
|
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static void serial_receive1(void *opaque, const uint8_t *buf, int size) |
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{ |
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ChannelState *s = opaque; |
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serial_receive_byte(s, buf[0]);
|
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} |
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|
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static void serial_event(void *opaque, int event) |
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{ |
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ChannelState *s = opaque; |
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if (event == CHR_EVENT_BREAK)
|
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serial_receive_break(s); |
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} |
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|
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static CPUReadMemoryFunc *slavio_serial_mem_read[3] = { |
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slavio_serial_mem_readb, |
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slavio_serial_mem_readb, |
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slavio_serial_mem_readb, |
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}; |
383 |
|
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static CPUWriteMemoryFunc *slavio_serial_mem_write[3] = { |
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slavio_serial_mem_writeb, |
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slavio_serial_mem_writeb, |
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slavio_serial_mem_writeb, |
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}; |
389 |
|
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static void slavio_serial_save_chn(QEMUFile *f, ChannelState *s) |
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{ |
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qemu_put_be32s(f, &s->irq); |
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qemu_put_be32s(f, &s->reg); |
394 |
qemu_put_be32s(f, &s->rxint); |
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qemu_put_be32s(f, &s->txint); |
396 |
qemu_put_8s(f, &s->rx); |
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qemu_put_8s(f, &s->tx); |
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qemu_put_buffer(f, s->wregs, 16);
|
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qemu_put_buffer(f, s->rregs, 16);
|
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} |
401 |
|
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static void slavio_serial_save(QEMUFile *f, void *opaque) |
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{ |
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SerialState *s = opaque; |
405 |
|
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slavio_serial_save_chn(f, &s->chn[0]);
|
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slavio_serial_save_chn(f, &s->chn[1]);
|
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} |
409 |
|
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static int slavio_serial_load_chn(QEMUFile *f, ChannelState *s, int version_id) |
411 |
{ |
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if (version_id != 1) |
413 |
return -EINVAL;
|
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|
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qemu_get_be32s(f, &s->irq); |
416 |
qemu_get_be32s(f, &s->reg); |
417 |
qemu_get_be32s(f, &s->rxint); |
418 |
qemu_get_be32s(f, &s->txint); |
419 |
qemu_get_8s(f, &s->rx); |
420 |
qemu_get_8s(f, &s->tx); |
421 |
qemu_get_buffer(f, s->wregs, 16);
|
422 |
qemu_get_buffer(f, s->rregs, 16);
|
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return 0; |
424 |
} |
425 |
|
426 |
static int slavio_serial_load(QEMUFile *f, void *opaque, int version_id) |
427 |
{ |
428 |
SerialState *s = opaque; |
429 |
int ret;
|
430 |
|
431 |
ret = slavio_serial_load_chn(f, &s->chn[0], version_id);
|
432 |
if (ret != 0) |
433 |
return ret;
|
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ret = slavio_serial_load_chn(f, &s->chn[1], version_id);
|
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return ret;
|
436 |
|
437 |
} |
438 |
|
439 |
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2) |
440 |
{ |
441 |
int slavio_serial_io_memory, i;
|
442 |
SerialState *s; |
443 |
|
444 |
s = qemu_mallocz(sizeof(SerialState));
|
445 |
if (!s)
|
446 |
return NULL; |
447 |
|
448 |
slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s);
|
449 |
cpu_register_physical_memory(base, SERIAL_MAXADDR, slavio_serial_io_memory); |
450 |
|
451 |
s->chn[0].chr = chr1;
|
452 |
s->chn[1].chr = chr2;
|
453 |
|
454 |
for (i = 0; i < 2; i++) { |
455 |
s->chn[i].irq = irq; |
456 |
s->chn[i].chn = 1 - i;
|
457 |
s->chn[i].type = ser; |
458 |
if (s->chn[i].chr) {
|
459 |
qemu_chr_add_read_handler(s->chn[i].chr, serial_can_receive, serial_receive1, &s->chn[i]); |
460 |
qemu_chr_add_event_handler(s->chn[i].chr, serial_event); |
461 |
} |
462 |
} |
463 |
s->chn[0].otherchn = &s->chn[1]; |
464 |
s->chn[1].otherchn = &s->chn[0]; |
465 |
register_savevm("slavio_serial", base, 1, slavio_serial_save, slavio_serial_load, s); |
466 |
qemu_register_reset(slavio_serial_reset, s); |
467 |
slavio_serial_reset(s); |
468 |
return s;
|
469 |
} |
470 |
|
471 |
static const uint8_t keycodes[128] = { |
472 |
127, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 43, 53, |
473 |
54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 89, 76, 77, 78, |
474 |
79, 80, 81, 82, 83, 84, 85, 86, 87, 42, 99, 88, 100, 101, 102, 103, |
475 |
104, 105, 106, 107, 108, 109, 110, 47, 19, 121, 119, 5, 6, 8, 10, 12, |
476 |
14, 16, 17, 18, 7, 98, 23, 68, 69, 70, 71, 91, 92, 93, 125, 112, |
477 |
113, 114, 94, 50, 0, 0, 124, 9, 11, 0, 0, 0, 0, 0, 0, 0, |
478 |
90, 0, 46, 22, 13, 111, 52, 20, 96, 24, 28, 74, 27, 123, 44, 66, |
479 |
0, 45, 2, 4, 48, 0, 0, 21, 0, 0, 0, 0, 0, 120, 122, 67, |
480 |
}; |
481 |
|
482 |
static void sunkbd_event(void *opaque, int ch) |
483 |
{ |
484 |
ChannelState *s = opaque; |
485 |
int release = ch & 0x80; |
486 |
|
487 |
ch = keycodes[ch & 0x7f];
|
488 |
KBD_DPRINTF("Keycode %d (%s)\n", ch, release? "release" : "press"); |
489 |
put_queue(s, ch | release); |
490 |
} |
491 |
|
492 |
static void handle_kbd_command(ChannelState *s, int val) |
493 |
{ |
494 |
KBD_DPRINTF("Command %d\n", val);
|
495 |
switch (val) {
|
496 |
case 1: // Reset, return type code |
497 |
put_queue(s, 0xff);
|
498 |
put_queue(s, 5); // Type 5 |
499 |
break;
|
500 |
case 7: // Query layout |
501 |
put_queue(s, 0xfe);
|
502 |
put_queue(s, 0x20); // XXX, layout? |
503 |
break;
|
504 |
default:
|
505 |
break;
|
506 |
} |
507 |
} |
508 |
|
509 |
static void sunmouse_event(void *opaque, |
510 |
int dx, int dy, int dz, int buttons_state) |
511 |
{ |
512 |
ChannelState *s = opaque; |
513 |
int ch;
|
514 |
|
515 |
// XXX
|
516 |
ch = 0x42;
|
517 |
serial_receive_byte(s, ch); |
518 |
} |
519 |
|
520 |
void slavio_serial_ms_kbd_init(int base, int irq) |
521 |
{ |
522 |
int slavio_serial_io_memory, i;
|
523 |
SerialState *s; |
524 |
|
525 |
s = qemu_mallocz(sizeof(SerialState));
|
526 |
if (!s)
|
527 |
return;
|
528 |
for (i = 0; i < 2; i++) { |
529 |
s->chn[i].irq = irq; |
530 |
s->chn[i].chn = 1 - i;
|
531 |
s->chn[i].chr = NULL;
|
532 |
} |
533 |
s->chn[0].otherchn = &s->chn[1]; |
534 |
s->chn[1].otherchn = &s->chn[0]; |
535 |
s->chn[0].type = mouse;
|
536 |
s->chn[1].type = kbd;
|
537 |
|
538 |
slavio_serial_io_memory = cpu_register_io_memory(0, slavio_serial_mem_read, slavio_serial_mem_write, s);
|
539 |
cpu_register_physical_memory(base, SERIAL_MAXADDR, slavio_serial_io_memory); |
540 |
|
541 |
qemu_add_mouse_event_handler(sunmouse_event, &s->chn[0], 0); |
542 |
qemu_add_kbd_event_handler(sunkbd_event, &s->chn[1]);
|
543 |
qemu_register_reset(slavio_serial_reset, s); |
544 |
slavio_serial_reset(s); |
545 |
} |