root / hw / axis_dev88.c @ 43997225
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1 | 10c144e2 | edgar_igl | /*
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2 | 10c144e2 | edgar_igl | * QEMU model for the AXIS devboard 88.
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3 | 10c144e2 | edgar_igl | *
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4 | 10c144e2 | edgar_igl | * Copyright (c) 2009 Edgar E. Iglesias, Axis Communications AB.
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5 | 10c144e2 | edgar_igl | *
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6 | 10c144e2 | edgar_igl | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 10c144e2 | edgar_igl | * of this software and associated documentation files (the "Software"), to deal
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8 | 10c144e2 | edgar_igl | * in the Software without restriction, including without limitation the rights
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9 | 10c144e2 | edgar_igl | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 10c144e2 | edgar_igl | * copies of the Software, and to permit persons to whom the Software is
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11 | 10c144e2 | edgar_igl | * furnished to do so, subject to the following conditions:
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12 | 10c144e2 | edgar_igl | *
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13 | 10c144e2 | edgar_igl | * The above copyright notice and this permission notice shall be included in
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14 | 10c144e2 | edgar_igl | * all copies or substantial portions of the Software.
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15 | 10c144e2 | edgar_igl | *
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16 | 10c144e2 | edgar_igl | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 10c144e2 | edgar_igl | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 10c144e2 | edgar_igl | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 10c144e2 | edgar_igl | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 10c144e2 | edgar_igl | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 10c144e2 | edgar_igl | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 10c144e2 | edgar_igl | * THE SOFTWARE.
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23 | 10c144e2 | edgar_igl | */
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24 | 4b816985 | Edgar E. Iglesias | |
25 | 4b816985 | Edgar E. Iglesias | #include "sysbus.h" |
26 | 10c144e2 | edgar_igl | #include "net.h" |
27 | 10c144e2 | edgar_igl | #include "flash.h" |
28 | 10c144e2 | edgar_igl | #include "boards.h" |
29 | 10c144e2 | edgar_igl | #include "etraxfs.h" |
30 | ca20cf32 | Blue Swirl | #include "loader.h" |
31 | ca20cf32 | Blue Swirl | #include "elf.h" |
32 | 77d4f95e | Edgar E. Iglesias | #include "cris-boot.h" |
33 | 522f253c | Peter Maydell | #include "blockdev.h" |
34 | b0e3d5ac | Avi Kivity | #include "exec-memory.h" |
35 | 10c144e2 | edgar_igl | |
36 | 10c144e2 | edgar_igl | #define D(x)
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37 | 10c144e2 | edgar_igl | #define DNAND(x)
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38 | 10c144e2 | edgar_igl | |
39 | 10c144e2 | edgar_igl | struct nand_state_t
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40 | 10c144e2 | edgar_igl | { |
41 | d4220389 | Juha Riihimäki | DeviceState *nand; |
42 | 838335ec | Avi Kivity | MemoryRegion iomem; |
43 | 10c144e2 | edgar_igl | unsigned int rdy:1; |
44 | 10c144e2 | edgar_igl | unsigned int ale:1; |
45 | 10c144e2 | edgar_igl | unsigned int cle:1; |
46 | 10c144e2 | edgar_igl | unsigned int ce:1; |
47 | 10c144e2 | edgar_igl | }; |
48 | 10c144e2 | edgar_igl | |
49 | 10c144e2 | edgar_igl | static struct nand_state_t nand_state; |
50 | 838335ec | Avi Kivity | static uint64_t nand_read(void *opaque, target_phys_addr_t addr, unsigned size) |
51 | 10c144e2 | edgar_igl | { |
52 | 10c144e2 | edgar_igl | struct nand_state_t *s = opaque;
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53 | 10c144e2 | edgar_igl | uint32_t r; |
54 | 10c144e2 | edgar_igl | int rdy;
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55 | 10c144e2 | edgar_igl | |
56 | 10c144e2 | edgar_igl | r = nand_getio(s->nand); |
57 | 10c144e2 | edgar_igl | nand_getpins(s->nand, &rdy); |
58 | 10c144e2 | edgar_igl | s->rdy = rdy; |
59 | 10c144e2 | edgar_igl | |
60 | 10c144e2 | edgar_igl | DNAND(printf("%s addr=%x r=%x\n", __func__, addr, r));
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61 | 10c144e2 | edgar_igl | return r;
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62 | 10c144e2 | edgar_igl | } |
63 | 10c144e2 | edgar_igl | |
64 | 10c144e2 | edgar_igl | static void |
65 | 838335ec | Avi Kivity | nand_write(void *opaque, target_phys_addr_t addr, uint64_t value,
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66 | 838335ec | Avi Kivity | unsigned size)
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67 | 10c144e2 | edgar_igl | { |
68 | 10c144e2 | edgar_igl | struct nand_state_t *s = opaque;
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69 | 10c144e2 | edgar_igl | int rdy;
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70 | 10c144e2 | edgar_igl | |
71 | 838335ec | Avi Kivity | DNAND(printf("%s addr=%x v=%x\n", __func__, addr, (unsigned)value)); |
72 | 10c144e2 | edgar_igl | nand_setpins(s->nand, s->cle, s->ale, s->ce, 1, 0); |
73 | 10c144e2 | edgar_igl | nand_setio(s->nand, value); |
74 | 10c144e2 | edgar_igl | nand_getpins(s->nand, &rdy); |
75 | 10c144e2 | edgar_igl | s->rdy = rdy; |
76 | 10c144e2 | edgar_igl | } |
77 | 10c144e2 | edgar_igl | |
78 | 838335ec | Avi Kivity | static const MemoryRegionOps nand_ops = { |
79 | 838335ec | Avi Kivity | .read = nand_read, |
80 | 838335ec | Avi Kivity | .write = nand_write, |
81 | 838335ec | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
82 | 10c144e2 | edgar_igl | }; |
83 | 10c144e2 | edgar_igl | |
84 | 4a1e6bea | edgar_igl | struct tempsensor_t
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85 | 4a1e6bea | edgar_igl | { |
86 | 4a1e6bea | edgar_igl | unsigned int shiftreg; |
87 | 4a1e6bea | edgar_igl | unsigned int count; |
88 | 4a1e6bea | edgar_igl | enum {
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89 | 4a1e6bea | edgar_igl | ST_OUT, ST_IN, ST_Z |
90 | 4a1e6bea | edgar_igl | } state; |
91 | 4a1e6bea | edgar_igl | |
92 | 4a1e6bea | edgar_igl | uint16_t regs[3];
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93 | 4a1e6bea | edgar_igl | }; |
94 | 4a1e6bea | edgar_igl | |
95 | 4a1e6bea | edgar_igl | static void tempsensor_clkedge(struct tempsensor_t *s, |
96 | 4a1e6bea | edgar_igl | unsigned int clk, unsigned int data_in) |
97 | 4a1e6bea | edgar_igl | { |
98 | 4a1e6bea | edgar_igl | D(printf("%s clk=%d state=%d sr=%x\n", __func__,
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99 | 4a1e6bea | edgar_igl | clk, s->state, s->shiftreg)); |
100 | 4a1e6bea | edgar_igl | if (s->count == 0) { |
101 | 4a1e6bea | edgar_igl | s->count = 16;
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102 | 4a1e6bea | edgar_igl | s->state = ST_OUT; |
103 | 4a1e6bea | edgar_igl | } |
104 | 4a1e6bea | edgar_igl | switch (s->state) {
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105 | 4a1e6bea | edgar_igl | case ST_OUT:
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106 | 4a1e6bea | edgar_igl | /* Output reg is clocked at negedge. */
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107 | 4a1e6bea | edgar_igl | if (!clk) {
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108 | 4a1e6bea | edgar_igl | s->count--; |
109 | 4a1e6bea | edgar_igl | s->shiftreg <<= 1;
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110 | 4a1e6bea | edgar_igl | if (s->count == 0) { |
111 | 4a1e6bea | edgar_igl | s->shiftreg = 0;
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112 | 4a1e6bea | edgar_igl | s->state = ST_IN; |
113 | 4a1e6bea | edgar_igl | s->count = 16;
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114 | 4a1e6bea | edgar_igl | } |
115 | 4a1e6bea | edgar_igl | } |
116 | 4a1e6bea | edgar_igl | break;
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117 | 4a1e6bea | edgar_igl | case ST_Z:
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118 | 4a1e6bea | edgar_igl | if (clk) {
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119 | 4a1e6bea | edgar_igl | s->count--; |
120 | 4a1e6bea | edgar_igl | if (s->count == 0) { |
121 | 4a1e6bea | edgar_igl | s->shiftreg = 0;
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122 | 4a1e6bea | edgar_igl | s->state = ST_OUT; |
123 | 4a1e6bea | edgar_igl | s->count = 16;
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124 | 4a1e6bea | edgar_igl | } |
125 | 4a1e6bea | edgar_igl | } |
126 | 4a1e6bea | edgar_igl | break;
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127 | 4a1e6bea | edgar_igl | case ST_IN:
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128 | 4a1e6bea | edgar_igl | /* Indata is sampled at posedge. */
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129 | 4a1e6bea | edgar_igl | if (clk) {
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130 | 4a1e6bea | edgar_igl | s->count--; |
131 | 4a1e6bea | edgar_igl | s->shiftreg <<= 1;
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132 | 4a1e6bea | edgar_igl | s->shiftreg |= data_in & 1;
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133 | 4a1e6bea | edgar_igl | if (s->count == 0) { |
134 | 4a1e6bea | edgar_igl | D(printf("%s cfgreg=%x\n", __func__, s->shiftreg));
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135 | 4a1e6bea | edgar_igl | s->regs[0] = s->shiftreg;
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136 | 4a1e6bea | edgar_igl | s->state = ST_OUT; |
137 | 4a1e6bea | edgar_igl | s->count = 16;
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138 | 4a1e6bea | edgar_igl | |
139 | 4a1e6bea | edgar_igl | if ((s->regs[0] & 0xff) == 0) { |
140 | 4a1e6bea | edgar_igl | /* 25 degrees celcius. */
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141 | 4a1e6bea | edgar_igl | s->shiftreg = 0x0b9f;
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142 | 4a1e6bea | edgar_igl | } else if ((s->regs[0] & 0xff) == 0xff) { |
143 | 4a1e6bea | edgar_igl | /* Sensor ID, 0x8100 LM70. */
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144 | 4a1e6bea | edgar_igl | s->shiftreg = 0x8100;
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145 | 4a1e6bea | edgar_igl | } else
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146 | 4a1e6bea | edgar_igl | printf("Invalid tempsens state %x\n", s->regs[0]); |
147 | 4a1e6bea | edgar_igl | } |
148 | 4a1e6bea | edgar_igl | } |
149 | 4a1e6bea | edgar_igl | break;
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150 | 4a1e6bea | edgar_igl | } |
151 | 4a1e6bea | edgar_igl | } |
152 | 4a1e6bea | edgar_igl | |
153 | 4a1e6bea | edgar_igl | |
154 | 4a1e6bea | edgar_igl | #define RW_PA_DOUT 0x00 |
155 | 4a1e6bea | edgar_igl | #define R_PA_DIN 0x01 |
156 | 4a1e6bea | edgar_igl | #define RW_PA_OE 0x02 |
157 | 4a1e6bea | edgar_igl | #define RW_PD_DOUT 0x10 |
158 | 4a1e6bea | edgar_igl | #define R_PD_DIN 0x11 |
159 | 4a1e6bea | edgar_igl | #define RW_PD_OE 0x12 |
160 | 4a1e6bea | edgar_igl | |
161 | 4a1e6bea | edgar_igl | static struct gpio_state_t |
162 | 10c144e2 | edgar_igl | { |
163 | 838335ec | Avi Kivity | MemoryRegion iomem; |
164 | 10c144e2 | edgar_igl | struct nand_state_t *nand;
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165 | 4a1e6bea | edgar_igl | struct tempsensor_t tempsensor;
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166 | 10c144e2 | edgar_igl | uint32_t regs[0x5c / 4]; |
167 | 10c144e2 | edgar_igl | } gpio_state; |
168 | 10c144e2 | edgar_igl | |
169 | 838335ec | Avi Kivity | static uint64_t gpio_read(void *opaque, target_phys_addr_t addr, unsigned size) |
170 | 10c144e2 | edgar_igl | { |
171 | 10c144e2 | edgar_igl | struct gpio_state_t *s = opaque;
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172 | 10c144e2 | edgar_igl | uint32_t r = 0;
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173 | 10c144e2 | edgar_igl | |
174 | 10c144e2 | edgar_igl | addr >>= 2;
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175 | 10c144e2 | edgar_igl | switch (addr)
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176 | 10c144e2 | edgar_igl | { |
177 | 10c144e2 | edgar_igl | case R_PA_DIN:
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178 | 10c144e2 | edgar_igl | r = s->regs[RW_PA_DOUT] & s->regs[RW_PA_OE]; |
179 | 10c144e2 | edgar_igl | |
180 | 10c144e2 | edgar_igl | /* Encode pins from the nand. */
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181 | 10c144e2 | edgar_igl | r |= s->nand->rdy << 7;
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182 | 10c144e2 | edgar_igl | break;
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183 | 4a1e6bea | edgar_igl | case R_PD_DIN:
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184 | 4a1e6bea | edgar_igl | r = s->regs[RW_PD_DOUT] & s->regs[RW_PD_OE]; |
185 | 4a1e6bea | edgar_igl | |
186 | 4a1e6bea | edgar_igl | /* Encode temp sensor pins. */
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187 | 4a1e6bea | edgar_igl | r |= (!!(s->tempsensor.shiftreg & 0x10000)) << 4; |
188 | 4a1e6bea | edgar_igl | break;
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189 | 4a1e6bea | edgar_igl | |
190 | 10c144e2 | edgar_igl | default:
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191 | 10c144e2 | edgar_igl | r = s->regs[addr]; |
192 | 10c144e2 | edgar_igl | break;
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193 | 10c144e2 | edgar_igl | } |
194 | 10c144e2 | edgar_igl | return r;
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195 | 10c144e2 | edgar_igl | D(printf("%s %x=%x\n", __func__, addr, r));
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196 | 10c144e2 | edgar_igl | } |
197 | 10c144e2 | edgar_igl | |
198 | 838335ec | Avi Kivity | static void gpio_write(void *opaque, target_phys_addr_t addr, uint64_t value, |
199 | 838335ec | Avi Kivity | unsigned size)
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200 | 10c144e2 | edgar_igl | { |
201 | 10c144e2 | edgar_igl | struct gpio_state_t *s = opaque;
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202 | 838335ec | Avi Kivity | D(printf("%s %x=%x\n", __func__, addr, (unsigned)value)); |
203 | 10c144e2 | edgar_igl | |
204 | 10c144e2 | edgar_igl | addr >>= 2;
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205 | 10c144e2 | edgar_igl | switch (addr)
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206 | 10c144e2 | edgar_igl | { |
207 | 10c144e2 | edgar_igl | case RW_PA_DOUT:
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208 | 10c144e2 | edgar_igl | /* Decode nand pins. */
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209 | 10c144e2 | edgar_igl | s->nand->ale = !!(value & (1 << 6)); |
210 | 10c144e2 | edgar_igl | s->nand->cle = !!(value & (1 << 5)); |
211 | 10c144e2 | edgar_igl | s->nand->ce = !!(value & (1 << 4)); |
212 | 10c144e2 | edgar_igl | |
213 | 10c144e2 | edgar_igl | s->regs[addr] = value; |
214 | 10c144e2 | edgar_igl | break;
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215 | 4a1e6bea | edgar_igl | |
216 | 4a1e6bea | edgar_igl | case RW_PD_DOUT:
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217 | 4a1e6bea | edgar_igl | /* Temp sensor clk. */
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218 | 4a1e6bea | edgar_igl | if ((s->regs[addr] ^ value) & 2) |
219 | 4a1e6bea | edgar_igl | tempsensor_clkedge(&s->tempsensor, !!(value & 2),
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220 | 4a1e6bea | edgar_igl | !!(value & 16));
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221 | 4a1e6bea | edgar_igl | s->regs[addr] = value; |
222 | 4a1e6bea | edgar_igl | break;
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223 | 4a1e6bea | edgar_igl | |
224 | 10c144e2 | edgar_igl | default:
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225 | 10c144e2 | edgar_igl | s->regs[addr] = value; |
226 | 10c144e2 | edgar_igl | break;
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227 | 10c144e2 | edgar_igl | } |
228 | 10c144e2 | edgar_igl | } |
229 | 10c144e2 | edgar_igl | |
230 | 838335ec | Avi Kivity | static const MemoryRegionOps gpio_ops = { |
231 | 838335ec | Avi Kivity | .read = gpio_read, |
232 | 838335ec | Avi Kivity | .write = gpio_write, |
233 | 838335ec | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
234 | 838335ec | Avi Kivity | .valid = { |
235 | 838335ec | Avi Kivity | .min_access_size = 4,
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236 | 838335ec | Avi Kivity | .max_access_size = 4,
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237 | 838335ec | Avi Kivity | }, |
238 | 10c144e2 | edgar_igl | }; |
239 | 10c144e2 | edgar_igl | |
240 | 10c144e2 | edgar_igl | #define INTMEM_SIZE (128 * 1024) |
241 | 10c144e2 | edgar_igl | |
242 | 77d4f95e | Edgar E. Iglesias | static struct cris_load_info li; |
243 | 409dbce5 | Aurelien Jarno | |
244 | 10c144e2 | edgar_igl | static
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245 | c227f099 | Anthony Liguori | void axisdev88_init (ram_addr_t ram_size,
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246 | ef998233 | edgar_igl | const char *boot_device, |
247 | 10c144e2 | edgar_igl | const char *kernel_filename, const char *kernel_cmdline, |
248 | 10c144e2 | edgar_igl | const char *initrd_filename, const char *cpu_model) |
249 | 10c144e2 | edgar_igl | { |
250 | fc9bb176 | Andreas Färber | CPUCRISState *env; |
251 | fd6dc90b | Edgar E. Iglesias | DeviceState *dev; |
252 | fd6dc90b | Edgar E. Iglesias | SysBusDevice *s; |
253 | 522f253c | Peter Maydell | DriveInfo *nand; |
254 | fd6dc90b | Edgar E. Iglesias | qemu_irq irq[30], nmi[2], *cpu_irq; |
255 | 10c144e2 | edgar_igl | void *etraxfs_dmac;
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256 | 1da005b3 | Edgar E. Iglesias | struct etraxfs_dma_client *dma_eth;
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257 | 10c144e2 | edgar_igl | int i;
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258 | b0e3d5ac | Avi Kivity | MemoryRegion *address_space_mem = get_system_memory(); |
259 | b0e3d5ac | Avi Kivity | MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
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260 | b0e3d5ac | Avi Kivity | MemoryRegion *phys_intmem = g_new(MemoryRegion, 1);
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261 | 10c144e2 | edgar_igl | |
262 | 10c144e2 | edgar_igl | /* init CPUs */
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263 | 10c144e2 | edgar_igl | if (cpu_model == NULL) { |
264 | 10c144e2 | edgar_igl | cpu_model = "crisv32";
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265 | 10c144e2 | edgar_igl | } |
266 | 10c144e2 | edgar_igl | env = cpu_init(cpu_model); |
267 | 10c144e2 | edgar_igl | |
268 | 10c144e2 | edgar_igl | /* allocate RAM */
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269 | c5705a77 | Avi Kivity | memory_region_init_ram(phys_ram, "axisdev88.ram", ram_size);
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270 | c5705a77 | Avi Kivity | vmstate_register_ram_global(phys_ram); |
271 | b0e3d5ac | Avi Kivity | memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram);
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272 | 10c144e2 | edgar_igl | |
273 | 10c144e2 | edgar_igl | /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
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274 | 10c144e2 | edgar_igl | internal memory. */
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275 | c5705a77 | Avi Kivity | memory_region_init_ram(phys_intmem, "axisdev88.chipram", INTMEM_SIZE);
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276 | c5705a77 | Avi Kivity | vmstate_register_ram_global(phys_intmem); |
277 | b0e3d5ac | Avi Kivity | memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem);
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278 | 10c144e2 | edgar_igl | |
279 | 10c144e2 | edgar_igl | /* Attach a NAND flash to CS1. */
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280 | 522f253c | Peter Maydell | nand = drive_get(IF_MTD, 0, 0); |
281 | 522f253c | Peter Maydell | nand_state.nand = nand_init(nand ? nand->bdrv : NULL,
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282 | 522f253c | Peter Maydell | NAND_MFR_STMICRO, 0x39);
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283 | 838335ec | Avi Kivity | memory_region_init_io(&nand_state.iomem, &nand_ops, &nand_state, |
284 | 838335ec | Avi Kivity | "nand", 0x05000000); |
285 | 838335ec | Avi Kivity | memory_region_add_subregion(address_space_mem, 0x10000000,
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286 | 838335ec | Avi Kivity | &nand_state.iomem); |
287 | 10c144e2 | edgar_igl | |
288 | 10c144e2 | edgar_igl | gpio_state.nand = &nand_state; |
289 | 838335ec | Avi Kivity | memory_region_init_io(&gpio_state.iomem, &gpio_ops, &gpio_state, |
290 | 838335ec | Avi Kivity | "gpio", 0x5c); |
291 | 838335ec | Avi Kivity | memory_region_add_subregion(address_space_mem, 0x3001a000,
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292 | 838335ec | Avi Kivity | &gpio_state.iomem); |
293 | 10c144e2 | edgar_igl | |
294 | 10c144e2 | edgar_igl | |
295 | fd6dc90b | Edgar E. Iglesias | cpu_irq = cris_pic_init_cpu(env); |
296 | fd6dc90b | Edgar E. Iglesias | dev = qdev_create(NULL, "etraxfs,pic"); |
297 | fd6dc90b | Edgar E. Iglesias | /* FIXME: Is there a proper way to signal vectors to the CPU core? */
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298 | ee6847d1 | Gerd Hoffmann | qdev_prop_set_ptr(dev, "interrupt_vector", &env->interrupt_vector);
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299 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
300 | fd6dc90b | Edgar E. Iglesias | s = sysbus_from_qdev(dev); |
301 | fd6dc90b | Edgar E. Iglesias | sysbus_mmio_map(s, 0, 0x3001c000); |
302 | fd6dc90b | Edgar E. Iglesias | sysbus_connect_irq(s, 0, cpu_irq[0]); |
303 | fd6dc90b | Edgar E. Iglesias | sysbus_connect_irq(s, 1, cpu_irq[1]); |
304 | fd6dc90b | Edgar E. Iglesias | for (i = 0; i < 30; i++) { |
305 | 067a3ddc | Paul Brook | irq[i] = qdev_get_gpio_in(dev, i); |
306 | fd6dc90b | Edgar E. Iglesias | } |
307 | 067a3ddc | Paul Brook | nmi[0] = qdev_get_gpio_in(dev, 30); |
308 | 067a3ddc | Paul Brook | nmi[1] = qdev_get_gpio_in(dev, 31); |
309 | 73cfd29f | Edgar E. Iglesias | |
310 | ba494313 | Edgar E. Iglesias | etraxfs_dmac = etraxfs_dmac_init(0x30000000, 10); |
311 | 10c144e2 | edgar_igl | for (i = 0; i < 10; i++) { |
312 | 10c144e2 | edgar_igl | /* On ETRAX, odd numbered channels are inputs. */
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313 | 73cfd29f | Edgar E. Iglesias | etraxfs_dmac_connect(etraxfs_dmac, i, irq + 7 + i, i & 1); |
314 | 10c144e2 | edgar_igl | } |
315 | 10c144e2 | edgar_igl | |
316 | 10c144e2 | edgar_igl | /* Add the two ethernet blocks. */
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317 | 7267c094 | Anthony Liguori | dma_eth = g_malloc0(sizeof dma_eth[0] * 4); /* Allocate 4 channels. */ |
318 | 1da005b3 | Edgar E. Iglesias | etraxfs_eth_init(&nd_table[0], 0x30034000, 1, &dma_eth[0], &dma_eth[1]); |
319 | 1da005b3 | Edgar E. Iglesias | if (nb_nics > 1) { |
320 | 1da005b3 | Edgar E. Iglesias | etraxfs_eth_init(&nd_table[1], 0x30036000, 2, &dma_eth[2], &dma_eth[3]); |
321 | 1da005b3 | Edgar E. Iglesias | } |
322 | 10c144e2 | edgar_igl | |
323 | 10c144e2 | edgar_igl | /* The DMA Connector block is missing, hardwire things for now. */
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324 | 1da005b3 | Edgar E. Iglesias | etraxfs_dmac_connect_client(etraxfs_dmac, 0, &dma_eth[0]); |
325 | 1da005b3 | Edgar E. Iglesias | etraxfs_dmac_connect_client(etraxfs_dmac, 1, &dma_eth[1]); |
326 | 1da005b3 | Edgar E. Iglesias | if (nb_nics > 1) { |
327 | 1da005b3 | Edgar E. Iglesias | etraxfs_dmac_connect_client(etraxfs_dmac, 6, &dma_eth[2]); |
328 | 1da005b3 | Edgar E. Iglesias | etraxfs_dmac_connect_client(etraxfs_dmac, 7, &dma_eth[3]); |
329 | 10c144e2 | edgar_igl | } |
330 | 10c144e2 | edgar_igl | |
331 | 10c144e2 | edgar_igl | /* 2 timers. */
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332 | 3b1fd90e | Edgar E. Iglesias | sysbus_create_varargs("etraxfs,timer", 0x3001e000, irq[0x1b], nmi[1], NULL); |
333 | 3b1fd90e | Edgar E. Iglesias | sysbus_create_varargs("etraxfs,timer", 0x3005e000, irq[0x1b], nmi[1], NULL); |
334 | 10c144e2 | edgar_igl | |
335 | 10c144e2 | edgar_igl | for (i = 0; i < 4; i++) { |
336 | 4b816985 | Edgar E. Iglesias | sysbus_create_simple("etraxfs,serial", 0x30026000 + i * 0x2000, |
337 | 3b1fd90e | Edgar E. Iglesias | irq[0x14 + i]);
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338 | 10c144e2 | edgar_igl | } |
339 | 10c144e2 | edgar_igl | |
340 | 77d4f95e | Edgar E. Iglesias | if (!kernel_filename) {
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341 | 77d4f95e | Edgar E. Iglesias | fprintf(stderr, "Kernel image must be specified\n");
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342 | 77d4f95e | Edgar E. Iglesias | exit(1);
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343 | 10c144e2 | edgar_igl | } |
344 | 77d4f95e | Edgar E. Iglesias | |
345 | 77d4f95e | Edgar E. Iglesias | li.image_filename = kernel_filename; |
346 | 77d4f95e | Edgar E. Iglesias | li.cmdline = kernel_cmdline; |
347 | 77d4f95e | Edgar E. Iglesias | cris_load_image(env, &li); |
348 | 10c144e2 | edgar_igl | } |
349 | 10c144e2 | edgar_igl | |
350 | f80f9ec9 | Anthony Liguori | static QEMUMachine axisdev88_machine = {
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351 | 10c144e2 | edgar_igl | .name = "axis-dev88",
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352 | 10c144e2 | edgar_igl | .desc = "AXIS devboard 88",
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353 | 10c144e2 | edgar_igl | .init = axisdev88_init, |
354 | bbea04df | Edgar E. Iglesias | .is_default = 1,
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355 | 10c144e2 | edgar_igl | }; |
356 | f80f9ec9 | Anthony Liguori | |
357 | f80f9ec9 | Anthony Liguori | static void axisdev88_machine_init(void) |
358 | f80f9ec9 | Anthony Liguori | { |
359 | f80f9ec9 | Anthony Liguori | qemu_register_machine(&axisdev88_machine); |
360 | f80f9ec9 | Anthony Liguori | } |
361 | f80f9ec9 | Anthony Liguori | |
362 | f80f9ec9 | Anthony Liguori | machine_init(axisdev88_machine_init); |