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1 | 69b91039 | bellard | /*
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2 | 69b91039 | bellard | * QEMU PCI bus manager
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3 | 69b91039 | bellard | *
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4 | 69b91039 | bellard | * Copyright (c) 2004 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 69b91039 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 69b91039 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 69b91039 | bellard | * in the Software without restriction, including without limitation the rights
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9 | 69b91039 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 69b91039 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 69b91039 | bellard | * furnished to do so, subject to the following conditions:
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12 | 69b91039 | bellard | *
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13 | 69b91039 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 69b91039 | bellard | * all copies or substantial portions of the Software.
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15 | 69b91039 | bellard | *
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16 | 69b91039 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 69b91039 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 69b91039 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 69b91039 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 69b91039 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 69b91039 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 69b91039 | bellard | * THE SOFTWARE.
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23 | 69b91039 | bellard | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "pci.h" |
26 | 376253ec | aliguori | #include "monitor.h" |
27 | 87ecb68b | pbrook | #include "net.h" |
28 | 880345c4 | aliguori | #include "sysemu.h" |
29 | c2039bd0 | Anthony Liguori | #include "loader.h" |
30 | 163c8a59 | Luiz Capitulino | #include "qemu-objects.h" |
31 | 69b91039 | bellard | |
32 | 69b91039 | bellard | //#define DEBUG_PCI
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33 | d8d2e079 | Isaku Yamahata | #ifdef DEBUG_PCI
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34 | 2e49d64a | Isaku Yamahata | # define PCI_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) |
35 | d8d2e079 | Isaku Yamahata | #else
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36 | d8d2e079 | Isaku Yamahata | # define PCI_DPRINTF(format, ...) do { } while (0) |
37 | d8d2e079 | Isaku Yamahata | #endif
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38 | 69b91039 | bellard | |
39 | 30468f78 | bellard | struct PCIBus {
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40 | 02e2da45 | Paul Brook | BusState qbus; |
41 | 30468f78 | bellard | int devfn_min;
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42 | 502a5395 | pbrook | pci_set_irq_fn set_irq; |
43 | d2b59317 | pbrook | pci_map_irq_fn map_irq; |
44 | ee995ffb | Gerd Hoffmann | pci_hotplug_fn hotplug; |
45 | 5d4e84c8 | Juan Quintela | void *irq_opaque;
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46 | 30468f78 | bellard | PCIDevice *devices[256];
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47 | 80b3ada7 | pbrook | PCIDevice *parent_dev; |
48 | 2e01c8cf | Blue Swirl | target_phys_addr_t mem_base; |
49 | e822a52a | Isaku Yamahata | |
50 | e822a52a | Isaku Yamahata | QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
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51 | e822a52a | Isaku Yamahata | QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
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52 | e822a52a | Isaku Yamahata | |
53 | d2b59317 | pbrook | /* The bus IRQ state is the logical OR of the connected devices.
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54 | d2b59317 | pbrook | Keep a count of the number of devices with raised IRQs. */
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55 | 52fc1d83 | balrog | int nirq;
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56 | 10c4c98a | Gerd Hoffmann | int *irq_count;
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57 | 10c4c98a | Gerd Hoffmann | }; |
58 | 10c4c98a | Gerd Hoffmann | |
59 | 10c4c98a | Gerd Hoffmann | static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent); |
60 | 10c4c98a | Gerd Hoffmann | |
61 | 10c4c98a | Gerd Hoffmann | static struct BusInfo pci_bus_info = { |
62 | 10c4c98a | Gerd Hoffmann | .name = "PCI",
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63 | 10c4c98a | Gerd Hoffmann | .size = sizeof(PCIBus),
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64 | 10c4c98a | Gerd Hoffmann | .print_dev = pcibus_dev_print, |
65 | ee6847d1 | Gerd Hoffmann | .props = (Property[]) { |
66 | 54586bd1 | Gerd Hoffmann | DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), |
67 | 8c52c8f3 | Gerd Hoffmann | DEFINE_PROP_STRING("romfile", PCIDevice, romfile),
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68 | 88169ddf | Gerd Hoffmann | DEFINE_PROP_UINT32("rombar", PCIDevice, rom_bar, 1), |
69 | 54586bd1 | Gerd Hoffmann | DEFINE_PROP_END_OF_LIST() |
70 | ee6847d1 | Gerd Hoffmann | } |
71 | 30468f78 | bellard | }; |
72 | 69b91039 | bellard | |
73 | 1941d19c | bellard | static void pci_update_mappings(PCIDevice *d); |
74 | d537cf6c | pbrook | static void pci_set_irq(void *opaque, int irq_num, int level); |
75 | 8c52c8f3 | Gerd Hoffmann | static int pci_add_option_rom(PCIDevice *pdev); |
76 | 1941d19c | bellard | |
77 | d350d97d | aliguori | static uint16_t pci_default_sub_vendor_id = PCI_SUBVENDOR_ID_REDHAT_QUMRANET;
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78 | d350d97d | aliguori | static uint16_t pci_default_sub_device_id = PCI_SUBDEVICE_ID_QEMU;
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79 | e822a52a | Isaku Yamahata | |
80 | e822a52a | Isaku Yamahata | struct PCIHostBus {
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81 | e822a52a | Isaku Yamahata | int domain;
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82 | e822a52a | Isaku Yamahata | struct PCIBus *bus;
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83 | e822a52a | Isaku Yamahata | QLIST_ENTRY(PCIHostBus) next; |
84 | e822a52a | Isaku Yamahata | }; |
85 | e822a52a | Isaku Yamahata | static QLIST_HEAD(, PCIHostBus) host_buses;
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86 | 30468f78 | bellard | |
87 | 2d1e9f96 | Juan Quintela | static const VMStateDescription vmstate_pcibus = { |
88 | 2d1e9f96 | Juan Quintela | .name = "PCIBUS",
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89 | 2d1e9f96 | Juan Quintela | .version_id = 1,
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90 | 2d1e9f96 | Juan Quintela | .minimum_version_id = 1,
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91 | 2d1e9f96 | Juan Quintela | .minimum_version_id_old = 1,
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92 | 2d1e9f96 | Juan Quintela | .fields = (VMStateField []) { |
93 | 2d1e9f96 | Juan Quintela | VMSTATE_INT32_EQUAL(nirq, PCIBus), |
94 | c7bde572 | Juan Quintela | VMSTATE_VARRAY_INT32(irq_count, PCIBus, nirq, 0, vmstate_info_int32, int32_t),
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95 | 2d1e9f96 | Juan Quintela | VMSTATE_END_OF_LIST() |
96 | 52fc1d83 | balrog | } |
97 | 2d1e9f96 | Juan Quintela | }; |
98 | 52fc1d83 | balrog | |
99 | b3b11697 | Isaku Yamahata | static int pci_bar(PCIDevice *d, int reg) |
100 | 5330de09 | Michael S. Tsirkin | { |
101 | b3b11697 | Isaku Yamahata | uint8_t type; |
102 | b3b11697 | Isaku Yamahata | |
103 | b3b11697 | Isaku Yamahata | if (reg != PCI_ROM_SLOT)
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104 | b3b11697 | Isaku Yamahata | return PCI_BASE_ADDRESS_0 + reg * 4; |
105 | b3b11697 | Isaku Yamahata | |
106 | b3b11697 | Isaku Yamahata | type = d->config[PCI_HEADER_TYPE] & ~PCI_HEADER_TYPE_MULTI_FUNCTION; |
107 | b3b11697 | Isaku Yamahata | return type == PCI_HEADER_TYPE_BRIDGE ? PCI_ROM_ADDRESS1 : PCI_ROM_ADDRESS;
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108 | 5330de09 | Michael S. Tsirkin | } |
109 | 5330de09 | Michael S. Tsirkin | |
110 | d036bb21 | Michael S. Tsirkin | static inline int pci_irq_state(PCIDevice *d, int irq_num) |
111 | d036bb21 | Michael S. Tsirkin | { |
112 | d036bb21 | Michael S. Tsirkin | return (d->irq_state >> irq_num) & 0x1; |
113 | d036bb21 | Michael S. Tsirkin | } |
114 | d036bb21 | Michael S. Tsirkin | |
115 | d036bb21 | Michael S. Tsirkin | static inline void pci_set_irq_state(PCIDevice *d, int irq_num, int level) |
116 | d036bb21 | Michael S. Tsirkin | { |
117 | d036bb21 | Michael S. Tsirkin | d->irq_state &= ~(0x1 << irq_num);
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118 | d036bb21 | Michael S. Tsirkin | d->irq_state |= level << irq_num; |
119 | d036bb21 | Michael S. Tsirkin | } |
120 | d036bb21 | Michael S. Tsirkin | |
121 | d036bb21 | Michael S. Tsirkin | static void pci_change_irq_level(PCIDevice *pci_dev, int irq_num, int change) |
122 | d036bb21 | Michael S. Tsirkin | { |
123 | d036bb21 | Michael S. Tsirkin | PCIBus *bus; |
124 | d036bb21 | Michael S. Tsirkin | for (;;) {
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125 | d036bb21 | Michael S. Tsirkin | bus = pci_dev->bus; |
126 | d036bb21 | Michael S. Tsirkin | irq_num = bus->map_irq(pci_dev, irq_num); |
127 | d036bb21 | Michael S. Tsirkin | if (bus->set_irq)
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128 | d036bb21 | Michael S. Tsirkin | break;
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129 | d036bb21 | Michael S. Tsirkin | pci_dev = bus->parent_dev; |
130 | d036bb21 | Michael S. Tsirkin | } |
131 | d036bb21 | Michael S. Tsirkin | bus->irq_count[irq_num] += change; |
132 | d036bb21 | Michael S. Tsirkin | bus->set_irq(bus->irq_opaque, irq_num, bus->irq_count[irq_num] != 0);
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133 | d036bb21 | Michael S. Tsirkin | } |
134 | d036bb21 | Michael S. Tsirkin | |
135 | f9bf77dd | Michael S. Tsirkin | /* Update interrupt status bit in config space on interrupt
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136 | f9bf77dd | Michael S. Tsirkin | * state change. */
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137 | f9bf77dd | Michael S. Tsirkin | static void pci_update_irq_status(PCIDevice *dev) |
138 | f9bf77dd | Michael S. Tsirkin | { |
139 | f9bf77dd | Michael S. Tsirkin | if (dev->irq_state) {
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140 | f9bf77dd | Michael S. Tsirkin | dev->config[PCI_STATUS] |= PCI_STATUS_INTERRUPT; |
141 | f9bf77dd | Michael S. Tsirkin | } else {
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142 | f9bf77dd | Michael S. Tsirkin | dev->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; |
143 | f9bf77dd | Michael S. Tsirkin | } |
144 | f9bf77dd | Michael S. Tsirkin | } |
145 | f9bf77dd | Michael S. Tsirkin | |
146 | 5330de09 | Michael S. Tsirkin | static void pci_device_reset(PCIDevice *dev) |
147 | 5330de09 | Michael S. Tsirkin | { |
148 | c0b1905b | Michael S. Tsirkin | int r;
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149 | c0b1905b | Michael S. Tsirkin | |
150 | d036bb21 | Michael S. Tsirkin | dev->irq_state = 0;
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151 | f9bf77dd | Michael S. Tsirkin | pci_update_irq_status(dev); |
152 | c0b1905b | Michael S. Tsirkin | dev->config[PCI_COMMAND] &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | |
153 | c0b1905b | Michael S. Tsirkin | PCI_COMMAND_MASTER); |
154 | c0b1905b | Michael S. Tsirkin | dev->config[PCI_CACHE_LINE_SIZE] = 0x0;
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155 | c0b1905b | Michael S. Tsirkin | dev->config[PCI_INTERRUPT_LINE] = 0x0;
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156 | c0b1905b | Michael S. Tsirkin | for (r = 0; r < PCI_NUM_REGIONS; ++r) { |
157 | c0b1905b | Michael S. Tsirkin | if (!dev->io_regions[r].size) {
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158 | c0b1905b | Michael S. Tsirkin | continue;
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159 | c0b1905b | Michael S. Tsirkin | } |
160 | b3b11697 | Isaku Yamahata | pci_set_long(dev->config + pci_bar(dev, r), dev->io_regions[r].type); |
161 | c0b1905b | Michael S. Tsirkin | } |
162 | c0b1905b | Michael S. Tsirkin | pci_update_mappings(dev); |
163 | 5330de09 | Michael S. Tsirkin | } |
164 | 5330de09 | Michael S. Tsirkin | |
165 | 6eaa6847 | Gleb Natapov | static void pci_bus_reset(void *opaque) |
166 | 6eaa6847 | Gleb Natapov | { |
167 | a60380a5 | Juan Quintela | PCIBus *bus = opaque; |
168 | 6eaa6847 | Gleb Natapov | int i;
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169 | 6eaa6847 | Gleb Natapov | |
170 | 6eaa6847 | Gleb Natapov | for (i = 0; i < bus->nirq; i++) { |
171 | 6eaa6847 | Gleb Natapov | bus->irq_count[i] = 0;
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172 | 6eaa6847 | Gleb Natapov | } |
173 | 5330de09 | Michael S. Tsirkin | for (i = 0; i < ARRAY_SIZE(bus->devices); ++i) { |
174 | 5330de09 | Michael S. Tsirkin | if (bus->devices[i]) {
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175 | 5330de09 | Michael S. Tsirkin | pci_device_reset(bus->devices[i]); |
176 | 5330de09 | Michael S. Tsirkin | } |
177 | 6eaa6847 | Gleb Natapov | } |
178 | 6eaa6847 | Gleb Natapov | } |
179 | 6eaa6847 | Gleb Natapov | |
180 | e822a52a | Isaku Yamahata | static void pci_host_bus_register(int domain, PCIBus *bus) |
181 | e822a52a | Isaku Yamahata | { |
182 | e822a52a | Isaku Yamahata | struct PCIHostBus *host;
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183 | e822a52a | Isaku Yamahata | host = qemu_mallocz(sizeof(*host));
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184 | e822a52a | Isaku Yamahata | host->domain = domain; |
185 | e822a52a | Isaku Yamahata | host->bus = bus; |
186 | e822a52a | Isaku Yamahata | QLIST_INSERT_HEAD(&host_buses, host, next); |
187 | e822a52a | Isaku Yamahata | } |
188 | e822a52a | Isaku Yamahata | |
189 | c469e1dd | Isaku Yamahata | PCIBus *pci_find_root_bus(int domain)
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190 | e822a52a | Isaku Yamahata | { |
191 | e822a52a | Isaku Yamahata | struct PCIHostBus *host;
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192 | e822a52a | Isaku Yamahata | |
193 | e822a52a | Isaku Yamahata | QLIST_FOREACH(host, &host_buses, next) { |
194 | e822a52a | Isaku Yamahata | if (host->domain == domain) {
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195 | e822a52a | Isaku Yamahata | return host->bus;
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196 | e822a52a | Isaku Yamahata | } |
197 | e822a52a | Isaku Yamahata | } |
198 | e822a52a | Isaku Yamahata | |
199 | e822a52a | Isaku Yamahata | return NULL; |
200 | e822a52a | Isaku Yamahata | } |
201 | e822a52a | Isaku Yamahata | |
202 | 21eea4b3 | Gerd Hoffmann | void pci_bus_new_inplace(PCIBus *bus, DeviceState *parent,
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203 | 21eea4b3 | Gerd Hoffmann | const char *name, int devfn_min) |
204 | 30468f78 | bellard | { |
205 | 21eea4b3 | Gerd Hoffmann | qbus_create_inplace(&bus->qbus, &pci_bus_info, parent, name); |
206 | 502a5395 | pbrook | bus->devfn_min = devfn_min; |
207 | e822a52a | Isaku Yamahata | |
208 | e822a52a | Isaku Yamahata | /* host bridge */
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209 | e822a52a | Isaku Yamahata | QLIST_INIT(&bus->child); |
210 | e822a52a | Isaku Yamahata | pci_host_bus_register(0, bus); /* for now only pci domain 0 is supported */ |
211 | e822a52a | Isaku Yamahata | |
212 | 5084bca1 | Juan Quintela | vmstate_register(-1, &vmstate_pcibus, bus);
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213 | a08d4367 | Jan Kiszka | qemu_register_reset(pci_bus_reset, bus); |
214 | 21eea4b3 | Gerd Hoffmann | } |
215 | 21eea4b3 | Gerd Hoffmann | |
216 | 21eea4b3 | Gerd Hoffmann | PCIBus *pci_bus_new(DeviceState *parent, const char *name, int devfn_min) |
217 | 21eea4b3 | Gerd Hoffmann | { |
218 | 21eea4b3 | Gerd Hoffmann | PCIBus *bus; |
219 | 21eea4b3 | Gerd Hoffmann | |
220 | 21eea4b3 | Gerd Hoffmann | bus = qemu_mallocz(sizeof(*bus));
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221 | 21eea4b3 | Gerd Hoffmann | bus->qbus.qdev_allocated = 1;
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222 | 21eea4b3 | Gerd Hoffmann | pci_bus_new_inplace(bus, parent, name, devfn_min); |
223 | 21eea4b3 | Gerd Hoffmann | return bus;
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224 | 21eea4b3 | Gerd Hoffmann | } |
225 | 21eea4b3 | Gerd Hoffmann | |
226 | 21eea4b3 | Gerd Hoffmann | void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
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227 | 21eea4b3 | Gerd Hoffmann | void *irq_opaque, int nirq) |
228 | 21eea4b3 | Gerd Hoffmann | { |
229 | 21eea4b3 | Gerd Hoffmann | bus->set_irq = set_irq; |
230 | 21eea4b3 | Gerd Hoffmann | bus->map_irq = map_irq; |
231 | 21eea4b3 | Gerd Hoffmann | bus->irq_opaque = irq_opaque; |
232 | 21eea4b3 | Gerd Hoffmann | bus->nirq = nirq; |
233 | 21eea4b3 | Gerd Hoffmann | bus->irq_count = qemu_mallocz(nirq * sizeof(bus->irq_count[0])); |
234 | 21eea4b3 | Gerd Hoffmann | } |
235 | 21eea4b3 | Gerd Hoffmann | |
236 | ee995ffb | Gerd Hoffmann | void pci_bus_hotplug(PCIBus *bus, pci_hotplug_fn hotplug)
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237 | ee995ffb | Gerd Hoffmann | { |
238 | ee995ffb | Gerd Hoffmann | bus->qbus.allow_hotplug = 1;
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239 | ee995ffb | Gerd Hoffmann | bus->hotplug = hotplug; |
240 | ee995ffb | Gerd Hoffmann | } |
241 | ee995ffb | Gerd Hoffmann | |
242 | 2e01c8cf | Blue Swirl | void pci_bus_set_mem_base(PCIBus *bus, target_phys_addr_t base)
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243 | 2e01c8cf | Blue Swirl | { |
244 | 2e01c8cf | Blue Swirl | bus->mem_base = base; |
245 | 2e01c8cf | Blue Swirl | } |
246 | 2e01c8cf | Blue Swirl | |
247 | 21eea4b3 | Gerd Hoffmann | PCIBus *pci_register_bus(DeviceState *parent, const char *name, |
248 | 21eea4b3 | Gerd Hoffmann | pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
249 | 21eea4b3 | Gerd Hoffmann | void *irq_opaque, int devfn_min, int nirq) |
250 | 21eea4b3 | Gerd Hoffmann | { |
251 | 21eea4b3 | Gerd Hoffmann | PCIBus *bus; |
252 | 21eea4b3 | Gerd Hoffmann | |
253 | 21eea4b3 | Gerd Hoffmann | bus = pci_bus_new(parent, name, devfn_min); |
254 | 21eea4b3 | Gerd Hoffmann | pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq); |
255 | 30468f78 | bellard | return bus;
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256 | 30468f78 | bellard | } |
257 | 69b91039 | bellard | |
258 | e822a52a | Isaku Yamahata | static void pci_register_secondary_bus(PCIBus *parent, |
259 | e822a52a | Isaku Yamahata | PCIBus *bus, |
260 | 03587182 | Gerd Hoffmann | PCIDevice *dev, |
261 | 03587182 | Gerd Hoffmann | pci_map_irq_fn map_irq, |
262 | 03587182 | Gerd Hoffmann | const char *name) |
263 | 80b3ada7 | pbrook | { |
264 | 03587182 | Gerd Hoffmann | qbus_create_inplace(&bus->qbus, &pci_bus_info, &dev->qdev, name); |
265 | 80b3ada7 | pbrook | bus->map_irq = map_irq; |
266 | 80b3ada7 | pbrook | bus->parent_dev = dev; |
267 | e822a52a | Isaku Yamahata | |
268 | e822a52a | Isaku Yamahata | QLIST_INIT(&bus->child); |
269 | e822a52a | Isaku Yamahata | QLIST_INSERT_HEAD(&parent->child, bus, sibling); |
270 | e822a52a | Isaku Yamahata | } |
271 | e822a52a | Isaku Yamahata | |
272 | e822a52a | Isaku Yamahata | static void pci_unregister_secondary_bus(PCIBus *bus) |
273 | e822a52a | Isaku Yamahata | { |
274 | e822a52a | Isaku Yamahata | assert(QLIST_EMPTY(&bus->child)); |
275 | e822a52a | Isaku Yamahata | QLIST_REMOVE(bus, sibling); |
276 | 80b3ada7 | pbrook | } |
277 | 80b3ada7 | pbrook | |
278 | 502a5395 | pbrook | int pci_bus_num(PCIBus *s)
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279 | 502a5395 | pbrook | { |
280 | e94ff650 | Isaku Yamahata | if (!s->parent_dev)
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281 | e94ff650 | Isaku Yamahata | return 0; /* pci host bridge */ |
282 | e94ff650 | Isaku Yamahata | return s->parent_dev->config[PCI_SECONDARY_BUS];
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283 | 502a5395 | pbrook | } |
284 | 502a5395 | pbrook | |
285 | 73534f2f | Juan Quintela | static int get_pci_config_device(QEMUFile *f, void *pv, size_t size) |
286 | 30ca2aab | bellard | { |
287 | 73534f2f | Juan Quintela | PCIDevice *s = container_of(pv, PCIDevice, config); |
288 | a9f49946 | Isaku Yamahata | uint8_t *config; |
289 | 52fc1d83 | balrog | int i;
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290 | 52fc1d83 | balrog | |
291 | a9f49946 | Isaku Yamahata | assert(size == pci_config_size(s)); |
292 | a9f49946 | Isaku Yamahata | config = qemu_malloc(size); |
293 | a9f49946 | Isaku Yamahata | |
294 | a9f49946 | Isaku Yamahata | qemu_get_buffer(f, config, size); |
295 | a9f49946 | Isaku Yamahata | for (i = 0; i < size; ++i) { |
296 | a9f49946 | Isaku Yamahata | if ((config[i] ^ s->config[i]) & s->cmask[i] & ~s->wmask[i]) {
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297 | a9f49946 | Isaku Yamahata | qemu_free(config); |
298 | bd4b65ee | Michael S. Tsirkin | return -EINVAL;
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299 | a9f49946 | Isaku Yamahata | } |
300 | a9f49946 | Isaku Yamahata | } |
301 | a9f49946 | Isaku Yamahata | memcpy(s->config, config, size); |
302 | bd4b65ee | Michael S. Tsirkin | |
303 | 1941d19c | bellard | pci_update_mappings(s); |
304 | 52fc1d83 | balrog | |
305 | a9f49946 | Isaku Yamahata | qemu_free(config); |
306 | 30ca2aab | bellard | return 0; |
307 | 30ca2aab | bellard | } |
308 | 30ca2aab | bellard | |
309 | 73534f2f | Juan Quintela | /* just put buffer */
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310 | 84e2e3eb | Juan Quintela | static void put_pci_config_device(QEMUFile *f, void *pv, size_t size) |
311 | 73534f2f | Juan Quintela | { |
312 | dbe73d7f | Juan Quintela | const uint8_t **v = pv;
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313 | a9f49946 | Isaku Yamahata | assert(size == pci_config_size(container_of(pv, PCIDevice, config))); |
314 | dbe73d7f | Juan Quintela | qemu_put_buffer(f, *v, size); |
315 | 73534f2f | Juan Quintela | } |
316 | 73534f2f | Juan Quintela | |
317 | 73534f2f | Juan Quintela | static VMStateInfo vmstate_info_pci_config = {
|
318 | 73534f2f | Juan Quintela | .name = "pci config",
|
319 | 73534f2f | Juan Quintela | .get = get_pci_config_device, |
320 | 73534f2f | Juan Quintela | .put = put_pci_config_device, |
321 | 73534f2f | Juan Quintela | }; |
322 | 73534f2f | Juan Quintela | |
323 | d036bb21 | Michael S. Tsirkin | static int get_pci_irq_state(QEMUFile *f, void *pv, size_t size) |
324 | d036bb21 | Michael S. Tsirkin | { |
325 | d036bb21 | Michael S. Tsirkin | PCIDevice *s = container_of(pv, PCIDevice, config); |
326 | d036bb21 | Michael S. Tsirkin | uint32_t irq_state[PCI_NUM_PINS]; |
327 | d036bb21 | Michael S. Tsirkin | int i;
|
328 | d036bb21 | Michael S. Tsirkin | for (i = 0; i < PCI_NUM_PINS; ++i) { |
329 | d036bb21 | Michael S. Tsirkin | irq_state[i] = qemu_get_be32(f); |
330 | d036bb21 | Michael S. Tsirkin | if (irq_state[i] != 0x1 && irq_state[i] != 0) { |
331 | d036bb21 | Michael S. Tsirkin | fprintf(stderr, "irq state %d: must be 0 or 1.\n",
|
332 | d036bb21 | Michael S. Tsirkin | irq_state[i]); |
333 | d036bb21 | Michael S. Tsirkin | return -EINVAL;
|
334 | d036bb21 | Michael S. Tsirkin | } |
335 | d036bb21 | Michael S. Tsirkin | } |
336 | d036bb21 | Michael S. Tsirkin | |
337 | d036bb21 | Michael S. Tsirkin | for (i = 0; i < PCI_NUM_PINS; ++i) { |
338 | d036bb21 | Michael S. Tsirkin | pci_set_irq_state(s, i, irq_state[i]); |
339 | d036bb21 | Michael S. Tsirkin | } |
340 | d036bb21 | Michael S. Tsirkin | |
341 | d036bb21 | Michael S. Tsirkin | return 0; |
342 | d036bb21 | Michael S. Tsirkin | } |
343 | d036bb21 | Michael S. Tsirkin | |
344 | d036bb21 | Michael S. Tsirkin | static void put_pci_irq_state(QEMUFile *f, void *pv, size_t size) |
345 | d036bb21 | Michael S. Tsirkin | { |
346 | d036bb21 | Michael S. Tsirkin | int i;
|
347 | d036bb21 | Michael S. Tsirkin | PCIDevice *s = container_of(pv, PCIDevice, config); |
348 | d036bb21 | Michael S. Tsirkin | |
349 | d036bb21 | Michael S. Tsirkin | for (i = 0; i < PCI_NUM_PINS; ++i) { |
350 | d036bb21 | Michael S. Tsirkin | qemu_put_be32(f, pci_irq_state(s, i)); |
351 | d036bb21 | Michael S. Tsirkin | } |
352 | d036bb21 | Michael S. Tsirkin | } |
353 | d036bb21 | Michael S. Tsirkin | |
354 | d036bb21 | Michael S. Tsirkin | static VMStateInfo vmstate_info_pci_irq_state = {
|
355 | d036bb21 | Michael S. Tsirkin | .name = "pci irq state",
|
356 | d036bb21 | Michael S. Tsirkin | .get = get_pci_irq_state, |
357 | d036bb21 | Michael S. Tsirkin | .put = put_pci_irq_state, |
358 | d036bb21 | Michael S. Tsirkin | }; |
359 | d036bb21 | Michael S. Tsirkin | |
360 | 73534f2f | Juan Quintela | const VMStateDescription vmstate_pci_device = {
|
361 | 73534f2f | Juan Quintela | .name = "PCIDevice",
|
362 | 73534f2f | Juan Quintela | .version_id = 2,
|
363 | 73534f2f | Juan Quintela | .minimum_version_id = 1,
|
364 | 73534f2f | Juan Quintela | .minimum_version_id_old = 1,
|
365 | 73534f2f | Juan Quintela | .fields = (VMStateField []) { |
366 | 73534f2f | Juan Quintela | VMSTATE_INT32_LE(version_id, PCIDevice), |
367 | a9f49946 | Isaku Yamahata | VMSTATE_BUFFER_UNSAFE_INFO(config, PCIDevice, 0,
|
368 | a9f49946 | Isaku Yamahata | vmstate_info_pci_config, |
369 | a9f49946 | Isaku Yamahata | PCI_CONFIG_SPACE_SIZE), |
370 | d036bb21 | Michael S. Tsirkin | VMSTATE_BUFFER_UNSAFE_INFO(irq_state, PCIDevice, 2,
|
371 | d036bb21 | Michael S. Tsirkin | vmstate_info_pci_irq_state, |
372 | d036bb21 | Michael S. Tsirkin | PCI_NUM_PINS * sizeof(int32_t)),
|
373 | a9f49946 | Isaku Yamahata | VMSTATE_END_OF_LIST() |
374 | a9f49946 | Isaku Yamahata | } |
375 | a9f49946 | Isaku Yamahata | }; |
376 | a9f49946 | Isaku Yamahata | |
377 | a9f49946 | Isaku Yamahata | const VMStateDescription vmstate_pcie_device = {
|
378 | a9f49946 | Isaku Yamahata | .name = "PCIDevice",
|
379 | a9f49946 | Isaku Yamahata | .version_id = 2,
|
380 | a9f49946 | Isaku Yamahata | .minimum_version_id = 1,
|
381 | a9f49946 | Isaku Yamahata | .minimum_version_id_old = 1,
|
382 | a9f49946 | Isaku Yamahata | .fields = (VMStateField []) { |
383 | a9f49946 | Isaku Yamahata | VMSTATE_INT32_LE(version_id, PCIDevice), |
384 | a9f49946 | Isaku Yamahata | VMSTATE_BUFFER_UNSAFE_INFO(config, PCIDevice, 0,
|
385 | a9f49946 | Isaku Yamahata | vmstate_info_pci_config, |
386 | a9f49946 | Isaku Yamahata | PCIE_CONFIG_SPACE_SIZE), |
387 | d036bb21 | Michael S. Tsirkin | VMSTATE_BUFFER_UNSAFE_INFO(irq_state, PCIDevice, 2,
|
388 | d036bb21 | Michael S. Tsirkin | vmstate_info_pci_irq_state, |
389 | d036bb21 | Michael S. Tsirkin | PCI_NUM_PINS * sizeof(int32_t)),
|
390 | 73534f2f | Juan Quintela | VMSTATE_END_OF_LIST() |
391 | 73534f2f | Juan Quintela | } |
392 | 73534f2f | Juan Quintela | }; |
393 | 73534f2f | Juan Quintela | |
394 | a9f49946 | Isaku Yamahata | static inline const VMStateDescription *pci_get_vmstate(PCIDevice *s) |
395 | a9f49946 | Isaku Yamahata | { |
396 | a9f49946 | Isaku Yamahata | return pci_is_express(s) ? &vmstate_pcie_device : &vmstate_pci_device;
|
397 | a9f49946 | Isaku Yamahata | } |
398 | a9f49946 | Isaku Yamahata | |
399 | 73534f2f | Juan Quintela | void pci_device_save(PCIDevice *s, QEMUFile *f)
|
400 | 73534f2f | Juan Quintela | { |
401 | f9bf77dd | Michael S. Tsirkin | /* Clear interrupt status bit: it is implicit
|
402 | f9bf77dd | Michael S. Tsirkin | * in irq_state which we are saving.
|
403 | f9bf77dd | Michael S. Tsirkin | * This makes us compatible with old devices
|
404 | f9bf77dd | Michael S. Tsirkin | * which never set or clear this bit. */
|
405 | f9bf77dd | Michael S. Tsirkin | s->config[PCI_STATUS] &= ~PCI_STATUS_INTERRUPT; |
406 | a9f49946 | Isaku Yamahata | vmstate_save_state(f, pci_get_vmstate(s), s); |
407 | f9bf77dd | Michael S. Tsirkin | /* Restore the interrupt status bit. */
|
408 | f9bf77dd | Michael S. Tsirkin | pci_update_irq_status(s); |
409 | 73534f2f | Juan Quintela | } |
410 | 73534f2f | Juan Quintela | |
411 | 73534f2f | Juan Quintela | int pci_device_load(PCIDevice *s, QEMUFile *f)
|
412 | 73534f2f | Juan Quintela | { |
413 | f9bf77dd | Michael S. Tsirkin | int ret;
|
414 | f9bf77dd | Michael S. Tsirkin | ret = vmstate_load_state(f, pci_get_vmstate(s), s, s->version_id); |
415 | f9bf77dd | Michael S. Tsirkin | /* Restore the interrupt status bit. */
|
416 | f9bf77dd | Michael S. Tsirkin | pci_update_irq_status(s); |
417 | f9bf77dd | Michael S. Tsirkin | return ret;
|
418 | 73534f2f | Juan Quintela | } |
419 | 73534f2f | Juan Quintela | |
420 | d350d97d | aliguori | static int pci_set_default_subsystem_id(PCIDevice *pci_dev) |
421 | d350d97d | aliguori | { |
422 | d350d97d | aliguori | uint16_t *id; |
423 | d350d97d | aliguori | |
424 | 3d09c490 | Isaku Yamahata | id = (void*)(&pci_dev->config[PCI_SUBSYSTEM_VENDOR_ID]);
|
425 | d350d97d | aliguori | id[0] = cpu_to_le16(pci_default_sub_vendor_id);
|
426 | d350d97d | aliguori | id[1] = cpu_to_le16(pci_default_sub_device_id);
|
427 | d350d97d | aliguori | return 0; |
428 | d350d97d | aliguori | } |
429 | d350d97d | aliguori | |
430 | 880345c4 | aliguori | /*
|
431 | 880345c4 | aliguori | * Parse [[<domain>:]<bus>:]<slot>, return -1 on error
|
432 | 880345c4 | aliguori | */
|
433 | 880345c4 | aliguori | static int pci_parse_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp) |
434 | 880345c4 | aliguori | { |
435 | 880345c4 | aliguori | const char *p; |
436 | 880345c4 | aliguori | char *e;
|
437 | 880345c4 | aliguori | unsigned long val; |
438 | 880345c4 | aliguori | unsigned long dom = 0, bus = 0; |
439 | 880345c4 | aliguori | unsigned slot = 0; |
440 | 880345c4 | aliguori | |
441 | 880345c4 | aliguori | p = addr; |
442 | 880345c4 | aliguori | val = strtoul(p, &e, 16);
|
443 | 880345c4 | aliguori | if (e == p)
|
444 | 880345c4 | aliguori | return -1; |
445 | 880345c4 | aliguori | if (*e == ':') { |
446 | 880345c4 | aliguori | bus = val; |
447 | 880345c4 | aliguori | p = e + 1;
|
448 | 880345c4 | aliguori | val = strtoul(p, &e, 16);
|
449 | 880345c4 | aliguori | if (e == p)
|
450 | 880345c4 | aliguori | return -1; |
451 | 880345c4 | aliguori | if (*e == ':') { |
452 | 880345c4 | aliguori | dom = bus; |
453 | 880345c4 | aliguori | bus = val; |
454 | 880345c4 | aliguori | p = e + 1;
|
455 | 880345c4 | aliguori | val = strtoul(p, &e, 16);
|
456 | 880345c4 | aliguori | if (e == p)
|
457 | 880345c4 | aliguori | return -1; |
458 | 880345c4 | aliguori | } |
459 | 880345c4 | aliguori | } |
460 | 880345c4 | aliguori | |
461 | 880345c4 | aliguori | if (dom > 0xffff || bus > 0xff || val > 0x1f) |
462 | 880345c4 | aliguori | return -1; |
463 | 880345c4 | aliguori | |
464 | 880345c4 | aliguori | slot = val; |
465 | 880345c4 | aliguori | |
466 | 880345c4 | aliguori | if (*e)
|
467 | 880345c4 | aliguori | return -1; |
468 | 880345c4 | aliguori | |
469 | 880345c4 | aliguori | /* Note: QEMU doesn't implement domains other than 0 */
|
470 | c469e1dd | Isaku Yamahata | if (!pci_find_bus(pci_find_root_bus(dom), bus))
|
471 | 880345c4 | aliguori | return -1; |
472 | 880345c4 | aliguori | |
473 | 880345c4 | aliguori | *domp = dom; |
474 | 880345c4 | aliguori | *busp = bus; |
475 | 880345c4 | aliguori | *slotp = slot; |
476 | 880345c4 | aliguori | return 0; |
477 | 880345c4 | aliguori | } |
478 | 880345c4 | aliguori | |
479 | e9283f8b | Jan Kiszka | int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp, |
480 | e9283f8b | Jan Kiszka | unsigned *slotp)
|
481 | 880345c4 | aliguori | { |
482 | e9283f8b | Jan Kiszka | /* strip legacy tag */
|
483 | e9283f8b | Jan Kiszka | if (!strncmp(addr, "pci_addr=", 9)) { |
484 | e9283f8b | Jan Kiszka | addr += 9;
|
485 | e9283f8b | Jan Kiszka | } |
486 | e9283f8b | Jan Kiszka | if (pci_parse_devaddr(addr, domp, busp, slotp)) {
|
487 | e9283f8b | Jan Kiszka | monitor_printf(mon, "Invalid pci address\n");
|
488 | 880345c4 | aliguori | return -1; |
489 | e9283f8b | Jan Kiszka | } |
490 | e9283f8b | Jan Kiszka | return 0; |
491 | 880345c4 | aliguori | } |
492 | 880345c4 | aliguori | |
493 | 49bd1458 | Markus Armbruster | PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr) |
494 | 5607c388 | Markus Armbruster | { |
495 | 5607c388 | Markus Armbruster | int dom, bus;
|
496 | 5607c388 | Markus Armbruster | unsigned slot;
|
497 | 5607c388 | Markus Armbruster | |
498 | 5607c388 | Markus Armbruster | if (!devaddr) {
|
499 | 5607c388 | Markus Armbruster | *devfnp = -1;
|
500 | c469e1dd | Isaku Yamahata | return pci_find_bus(pci_find_root_bus(0), 0); |
501 | 5607c388 | Markus Armbruster | } |
502 | 5607c388 | Markus Armbruster | |
503 | 5607c388 | Markus Armbruster | if (pci_parse_devaddr(devaddr, &dom, &bus, &slot) < 0) { |
504 | 5607c388 | Markus Armbruster | return NULL; |
505 | 5607c388 | Markus Armbruster | } |
506 | 5607c388 | Markus Armbruster | |
507 | 5607c388 | Markus Armbruster | *devfnp = slot << 3;
|
508 | c469e1dd | Isaku Yamahata | return pci_find_bus(pci_find_root_bus(0), bus); |
509 | 5607c388 | Markus Armbruster | } |
510 | 5607c388 | Markus Armbruster | |
511 | bd4b65ee | Michael S. Tsirkin | static void pci_init_cmask(PCIDevice *dev) |
512 | bd4b65ee | Michael S. Tsirkin | { |
513 | bd4b65ee | Michael S. Tsirkin | pci_set_word(dev->cmask + PCI_VENDOR_ID, 0xffff);
|
514 | bd4b65ee | Michael S. Tsirkin | pci_set_word(dev->cmask + PCI_DEVICE_ID, 0xffff);
|
515 | bd4b65ee | Michael S. Tsirkin | dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST; |
516 | bd4b65ee | Michael S. Tsirkin | dev->cmask[PCI_REVISION_ID] = 0xff;
|
517 | bd4b65ee | Michael S. Tsirkin | dev->cmask[PCI_CLASS_PROG] = 0xff;
|
518 | bd4b65ee | Michael S. Tsirkin | pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff);
|
519 | bd4b65ee | Michael S. Tsirkin | dev->cmask[PCI_HEADER_TYPE] = 0xff;
|
520 | bd4b65ee | Michael S. Tsirkin | dev->cmask[PCI_CAPABILITY_LIST] = 0xff;
|
521 | bd4b65ee | Michael S. Tsirkin | } |
522 | bd4b65ee | Michael S. Tsirkin | |
523 | b7ee1603 | Michael S. Tsirkin | static void pci_init_wmask(PCIDevice *dev) |
524 | b7ee1603 | Michael S. Tsirkin | { |
525 | a9f49946 | Isaku Yamahata | int config_size = pci_config_size(dev);
|
526 | a9f49946 | Isaku Yamahata | |
527 | b7ee1603 | Michael S. Tsirkin | dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff;
|
528 | b7ee1603 | Michael S. Tsirkin | dev->wmask[PCI_INTERRUPT_LINE] = 0xff;
|
529 | 67a51b48 | Isaku Yamahata | pci_set_word(dev->wmask + PCI_COMMAND, |
530 | a7b15a5c | Michael S. Tsirkin | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | |
531 | a7b15a5c | Michael S. Tsirkin | PCI_COMMAND_INTX_DISABLE); |
532 | 3e21ffc9 | Isaku Yamahata | |
533 | 3e21ffc9 | Isaku Yamahata | memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
|
534 | 3e21ffc9 | Isaku Yamahata | config_size - PCI_CONFIG_HEADER_SIZE); |
535 | b7ee1603 | Michael S. Tsirkin | } |
536 | b7ee1603 | Michael S. Tsirkin | |
537 | fb231628 | Isaku Yamahata | static void pci_init_wmask_bridge(PCIDevice *d) |
538 | fb231628 | Isaku Yamahata | { |
539 | fb231628 | Isaku Yamahata | /* PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS and
|
540 | fb231628 | Isaku Yamahata | PCI_SEC_LETENCY_TIMER */
|
541 | fb231628 | Isaku Yamahata | memset(d->wmask + PCI_PRIMARY_BUS, 0xff, 4); |
542 | fb231628 | Isaku Yamahata | |
543 | fb231628 | Isaku Yamahata | /* base and limit */
|
544 | fb231628 | Isaku Yamahata | d->wmask[PCI_IO_BASE] = PCI_IO_RANGE_MASK & 0xff;
|
545 | fb231628 | Isaku Yamahata | d->wmask[PCI_IO_LIMIT] = PCI_IO_RANGE_MASK & 0xff;
|
546 | fb231628 | Isaku Yamahata | pci_set_word(d->wmask + PCI_MEMORY_BASE, |
547 | fb231628 | Isaku Yamahata | PCI_MEMORY_RANGE_MASK & 0xffff);
|
548 | fb231628 | Isaku Yamahata | pci_set_word(d->wmask + PCI_MEMORY_LIMIT, |
549 | fb231628 | Isaku Yamahata | PCI_MEMORY_RANGE_MASK & 0xffff);
|
550 | fb231628 | Isaku Yamahata | pci_set_word(d->wmask + PCI_PREF_MEMORY_BASE, |
551 | fb231628 | Isaku Yamahata | PCI_PREF_RANGE_MASK & 0xffff);
|
552 | fb231628 | Isaku Yamahata | pci_set_word(d->wmask + PCI_PREF_MEMORY_LIMIT, |
553 | fb231628 | Isaku Yamahata | PCI_PREF_RANGE_MASK & 0xffff);
|
554 | fb231628 | Isaku Yamahata | |
555 | fb231628 | Isaku Yamahata | /* PCI_PREF_BASE_UPPER32 and PCI_PREF_LIMIT_UPPER32 */
|
556 | fb231628 | Isaku Yamahata | memset(d->wmask + PCI_PREF_BASE_UPPER32, 0xff, 8); |
557 | fb231628 | Isaku Yamahata | |
558 | fb231628 | Isaku Yamahata | pci_set_word(d->wmask + PCI_BRIDGE_CONTROL, 0xffff);
|
559 | fb231628 | Isaku Yamahata | } |
560 | fb231628 | Isaku Yamahata | |
561 | a9f49946 | Isaku Yamahata | static void pci_config_alloc(PCIDevice *pci_dev) |
562 | a9f49946 | Isaku Yamahata | { |
563 | a9f49946 | Isaku Yamahata | int config_size = pci_config_size(pci_dev);
|
564 | a9f49946 | Isaku Yamahata | |
565 | a9f49946 | Isaku Yamahata | pci_dev->config = qemu_mallocz(config_size); |
566 | a9f49946 | Isaku Yamahata | pci_dev->cmask = qemu_mallocz(config_size); |
567 | a9f49946 | Isaku Yamahata | pci_dev->wmask = qemu_mallocz(config_size); |
568 | a9f49946 | Isaku Yamahata | pci_dev->used = qemu_mallocz(config_size); |
569 | a9f49946 | Isaku Yamahata | } |
570 | a9f49946 | Isaku Yamahata | |
571 | a9f49946 | Isaku Yamahata | static void pci_config_free(PCIDevice *pci_dev) |
572 | a9f49946 | Isaku Yamahata | { |
573 | a9f49946 | Isaku Yamahata | qemu_free(pci_dev->config); |
574 | a9f49946 | Isaku Yamahata | qemu_free(pci_dev->cmask); |
575 | a9f49946 | Isaku Yamahata | qemu_free(pci_dev->wmask); |
576 | a9f49946 | Isaku Yamahata | qemu_free(pci_dev->used); |
577 | a9f49946 | Isaku Yamahata | } |
578 | a9f49946 | Isaku Yamahata | |
579 | 69b91039 | bellard | /* -1 for devfn means auto assign */
|
580 | 6b1b92d3 | Paul Brook | static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
|
581 | 6b1b92d3 | Paul Brook | const char *name, int devfn, |
582 | 6b1b92d3 | Paul Brook | PCIConfigReadFunc *config_read, |
583 | fb231628 | Isaku Yamahata | PCIConfigWriteFunc *config_write, |
584 | fb231628 | Isaku Yamahata | uint8_t header_type) |
585 | 69b91039 | bellard | { |
586 | 69b91039 | bellard | if (devfn < 0) { |
587 | b47b0706 | Isaku Yamahata | for(devfn = bus->devfn_min ; devfn < ARRAY_SIZE(bus->devices);
|
588 | b47b0706 | Isaku Yamahata | devfn += 8) {
|
589 | 30468f78 | bellard | if (!bus->devices[devfn])
|
590 | 69b91039 | bellard | goto found;
|
591 | 69b91039 | bellard | } |
592 | 09e3acc6 | Gerd Hoffmann | qemu_error("PCI: no devfn available for %s, all in use\n", name);
|
593 | 09e3acc6 | Gerd Hoffmann | return NULL; |
594 | 69b91039 | bellard | found: ;
|
595 | 07b7d053 | Markus Armbruster | } else if (bus->devices[devfn]) { |
596 | 09e3acc6 | Gerd Hoffmann | qemu_error("PCI: devfn %d not available for %s, in use by %s\n", devfn,
|
597 | c364c974 | Blue Swirl | name, bus->devices[devfn]->name); |
598 | 09e3acc6 | Gerd Hoffmann | return NULL; |
599 | 69b91039 | bellard | } |
600 | 30468f78 | bellard | pci_dev->bus = bus; |
601 | 69b91039 | bellard | pci_dev->devfn = devfn; |
602 | 69b91039 | bellard | pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
|
603 | d036bb21 | Michael S. Tsirkin | pci_dev->irq_state = 0;
|
604 | a9f49946 | Isaku Yamahata | pci_config_alloc(pci_dev); |
605 | fb231628 | Isaku Yamahata | |
606 | fb231628 | Isaku Yamahata | header_type &= ~PCI_HEADER_TYPE_MULTI_FUNCTION; |
607 | fb231628 | Isaku Yamahata | if (header_type == PCI_HEADER_TYPE_NORMAL) {
|
608 | fb231628 | Isaku Yamahata | pci_set_default_subsystem_id(pci_dev); |
609 | fb231628 | Isaku Yamahata | } |
610 | bd4b65ee | Michael S. Tsirkin | pci_init_cmask(pci_dev); |
611 | b7ee1603 | Michael S. Tsirkin | pci_init_wmask(pci_dev); |
612 | fb231628 | Isaku Yamahata | if (header_type == PCI_HEADER_TYPE_BRIDGE) {
|
613 | fb231628 | Isaku Yamahata | pci_init_wmask_bridge(pci_dev); |
614 | fb231628 | Isaku Yamahata | } |
615 | 0ac32c83 | bellard | |
616 | 0ac32c83 | bellard | if (!config_read)
|
617 | 0ac32c83 | bellard | config_read = pci_default_read_config; |
618 | 0ac32c83 | bellard | if (!config_write)
|
619 | 0ac32c83 | bellard | config_write = pci_default_write_config; |
620 | 69b91039 | bellard | pci_dev->config_read = config_read; |
621 | 69b91039 | bellard | pci_dev->config_write = config_write; |
622 | 30468f78 | bellard | bus->devices[devfn] = pci_dev; |
623 | e369cad7 | Isaku Yamahata | pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS); |
624 | f16c4abf | Juan Quintela | pci_dev->version_id = 2; /* Current pci device vmstate version */ |
625 | 69b91039 | bellard | return pci_dev;
|
626 | 69b91039 | bellard | } |
627 | 69b91039 | bellard | |
628 | 6b1b92d3 | Paul Brook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
629 | 6b1b92d3 | Paul Brook | int instance_size, int devfn, |
630 | 6b1b92d3 | Paul Brook | PCIConfigReadFunc *config_read, |
631 | 6b1b92d3 | Paul Brook | PCIConfigWriteFunc *config_write) |
632 | 6b1b92d3 | Paul Brook | { |
633 | 6b1b92d3 | Paul Brook | PCIDevice *pci_dev; |
634 | 6b1b92d3 | Paul Brook | |
635 | 6b1b92d3 | Paul Brook | pci_dev = qemu_mallocz(instance_size); |
636 | 6b1b92d3 | Paul Brook | pci_dev = do_pci_register_device(pci_dev, bus, name, devfn, |
637 | fb231628 | Isaku Yamahata | config_read, config_write, |
638 | fb231628 | Isaku Yamahata | PCI_HEADER_TYPE_NORMAL); |
639 | 09e3acc6 | Gerd Hoffmann | if (pci_dev == NULL) { |
640 | 09e3acc6 | Gerd Hoffmann | hw_error("PCI: can't register device\n");
|
641 | 09e3acc6 | Gerd Hoffmann | } |
642 | 6b1b92d3 | Paul Brook | return pci_dev;
|
643 | 6b1b92d3 | Paul Brook | } |
644 | 2e01c8cf | Blue Swirl | |
645 | 2e01c8cf | Blue Swirl | static target_phys_addr_t pci_to_cpu_addr(PCIBus *bus,
|
646 | 2e01c8cf | Blue Swirl | target_phys_addr_t addr) |
647 | 5851e08c | aliguori | { |
648 | 2e01c8cf | Blue Swirl | return addr + bus->mem_base;
|
649 | 5851e08c | aliguori | } |
650 | 5851e08c | aliguori | |
651 | 5851e08c | aliguori | static void pci_unregister_io_regions(PCIDevice *pci_dev) |
652 | 5851e08c | aliguori | { |
653 | 5851e08c | aliguori | PCIIORegion *r; |
654 | 5851e08c | aliguori | int i;
|
655 | 5851e08c | aliguori | |
656 | 5851e08c | aliguori | for(i = 0; i < PCI_NUM_REGIONS; i++) { |
657 | 5851e08c | aliguori | r = &pci_dev->io_regions[i]; |
658 | 182f9c8a | Isaku Yamahata | if (!r->size || r->addr == PCI_BAR_UNMAPPED)
|
659 | 5851e08c | aliguori | continue;
|
660 | 0392a017 | Isaku Yamahata | if (r->type == PCI_BASE_ADDRESS_SPACE_IO) {
|
661 | a0c7a97e | Isaku Yamahata | isa_unassign_ioport(r->addr, r->filtered_size); |
662 | 5851e08c | aliguori | } else {
|
663 | 2e01c8cf | Blue Swirl | cpu_register_physical_memory(pci_to_cpu_addr(pci_dev->bus, |
664 | 2e01c8cf | Blue Swirl | r->addr), |
665 | 2e01c8cf | Blue Swirl | r->filtered_size, |
666 | 2e01c8cf | Blue Swirl | IO_MEM_UNASSIGNED); |
667 | 5851e08c | aliguori | } |
668 | 5851e08c | aliguori | } |
669 | 5851e08c | aliguori | } |
670 | 5851e08c | aliguori | |
671 | a36a344d | Gerd Hoffmann | static int pci_unregister_device(DeviceState *dev) |
672 | 5851e08c | aliguori | { |
673 | a36a344d | Gerd Hoffmann | PCIDevice *pci_dev = DO_UPCAST(PCIDevice, qdev, dev); |
674 | e3936fa5 | Gerd Hoffmann | PCIDeviceInfo *info = DO_UPCAST(PCIDeviceInfo, qdev, dev->info); |
675 | 5851e08c | aliguori | int ret = 0; |
676 | 5851e08c | aliguori | |
677 | e3936fa5 | Gerd Hoffmann | if (info->exit)
|
678 | e3936fa5 | Gerd Hoffmann | ret = info->exit(pci_dev); |
679 | 5851e08c | aliguori | if (ret)
|
680 | 5851e08c | aliguori | return ret;
|
681 | 5851e08c | aliguori | |
682 | 5851e08c | aliguori | pci_unregister_io_regions(pci_dev); |
683 | 5851e08c | aliguori | |
684 | 5851e08c | aliguori | qemu_free_irqs(pci_dev->irq); |
685 | 5851e08c | aliguori | pci_dev->bus->devices[pci_dev->devfn] = NULL;
|
686 | a9f49946 | Isaku Yamahata | pci_config_free(pci_dev); |
687 | 5851e08c | aliguori | return 0; |
688 | 5851e08c | aliguori | } |
689 | 5851e08c | aliguori | |
690 | 28c2c264 | Avi Kivity | void pci_register_bar(PCIDevice *pci_dev, int region_num, |
691 | 6e355d90 | Isaku Yamahata | pcibus_t size, int type,
|
692 | 69b91039 | bellard | PCIMapIORegionFunc *map_func) |
693 | 69b91039 | bellard | { |
694 | 69b91039 | bellard | PCIIORegion *r; |
695 | d7ce493a | pbrook | uint32_t addr; |
696 | 6e355d90 | Isaku Yamahata | pcibus_t wmask; |
697 | 69b91039 | bellard | |
698 | 8a8696a3 | bellard | if ((unsigned int)region_num >= PCI_NUM_REGIONS) |
699 | 69b91039 | bellard | return;
|
700 | a4c20c6a | aliguori | |
701 | a4c20c6a | aliguori | if (size & (size-1)) { |
702 | a4c20c6a | aliguori | fprintf(stderr, "ERROR: PCI region size must be pow2 "
|
703 | 89e8b13c | Isaku Yamahata | "type=0x%x, size=0x%"FMT_PCIBUS"\n", type, size); |
704 | a4c20c6a | aliguori | exit(1);
|
705 | a4c20c6a | aliguori | } |
706 | a4c20c6a | aliguori | |
707 | 69b91039 | bellard | r = &pci_dev->io_regions[region_num]; |
708 | 182f9c8a | Isaku Yamahata | r->addr = PCI_BAR_UNMAPPED; |
709 | 69b91039 | bellard | r->size = size; |
710 | a0c7a97e | Isaku Yamahata | r->filtered_size = size; |
711 | 69b91039 | bellard | r->type = type; |
712 | 69b91039 | bellard | r->map_func = map_func; |
713 | b7ee1603 | Michael S. Tsirkin | |
714 | b7ee1603 | Michael S. Tsirkin | wmask = ~(size - 1);
|
715 | b3b11697 | Isaku Yamahata | addr = pci_bar(pci_dev, region_num); |
716 | d7ce493a | pbrook | if (region_num == PCI_ROM_SLOT) {
|
717 | b7ee1603 | Michael S. Tsirkin | /* ROM enable bit is writeable */
|
718 | 5330de09 | Michael S. Tsirkin | wmask |= PCI_ROM_ADDRESS_ENABLE; |
719 | d7ce493a | pbrook | } |
720 | b0ff8eb2 | Isaku Yamahata | pci_set_long(pci_dev->config + addr, type); |
721 | 14421258 | Isaku Yamahata | if (!(r->type & PCI_BASE_ADDRESS_SPACE_IO) &&
|
722 | 14421258 | Isaku Yamahata | r->type & PCI_BASE_ADDRESS_MEM_TYPE_64) { |
723 | 14421258 | Isaku Yamahata | pci_set_quad(pci_dev->wmask + addr, wmask); |
724 | 14421258 | Isaku Yamahata | pci_set_quad(pci_dev->cmask + addr, ~0ULL);
|
725 | 14421258 | Isaku Yamahata | } else {
|
726 | 14421258 | Isaku Yamahata | pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff);
|
727 | 14421258 | Isaku Yamahata | pci_set_long(pci_dev->cmask + addr, 0xffffffff);
|
728 | 14421258 | Isaku Yamahata | } |
729 | 69b91039 | bellard | } |
730 | 69b91039 | bellard | |
731 | a0c7a97e | Isaku Yamahata | static uint32_t pci_config_get_io_base(PCIDevice *d,
|
732 | a0c7a97e | Isaku Yamahata | uint32_t base, uint32_t base_upper16) |
733 | a0c7a97e | Isaku Yamahata | { |
734 | a0c7a97e | Isaku Yamahata | uint32_t val; |
735 | a0c7a97e | Isaku Yamahata | |
736 | a0c7a97e | Isaku Yamahata | val = ((uint32_t)d->config[base] & PCI_IO_RANGE_MASK) << 8;
|
737 | a0c7a97e | Isaku Yamahata | if (d->config[base] & PCI_IO_RANGE_TYPE_32) {
|
738 | 10c9c329 | Isaku Yamahata | val |= (uint32_t)pci_get_word(d->config + base_upper16) << 16;
|
739 | a0c7a97e | Isaku Yamahata | } |
740 | a0c7a97e | Isaku Yamahata | return val;
|
741 | a0c7a97e | Isaku Yamahata | } |
742 | a0c7a97e | Isaku Yamahata | |
743 | d46636b8 | Isaku Yamahata | static pcibus_t pci_config_get_memory_base(PCIDevice *d, uint32_t base)
|
744 | a0c7a97e | Isaku Yamahata | { |
745 | d46636b8 | Isaku Yamahata | return ((pcibus_t)pci_get_word(d->config + base) & PCI_MEMORY_RANGE_MASK)
|
746 | a0c7a97e | Isaku Yamahata | << 16;
|
747 | a0c7a97e | Isaku Yamahata | } |
748 | a0c7a97e | Isaku Yamahata | |
749 | d46636b8 | Isaku Yamahata | static pcibus_t pci_config_get_pref_base(PCIDevice *d,
|
750 | a0c7a97e | Isaku Yamahata | uint32_t base, uint32_t upper) |
751 | a0c7a97e | Isaku Yamahata | { |
752 | d46636b8 | Isaku Yamahata | pcibus_t tmp; |
753 | d46636b8 | Isaku Yamahata | pcibus_t val; |
754 | d46636b8 | Isaku Yamahata | |
755 | d46636b8 | Isaku Yamahata | tmp = (pcibus_t)pci_get_word(d->config + base); |
756 | d46636b8 | Isaku Yamahata | val = (tmp & PCI_PREF_RANGE_MASK) << 16;
|
757 | d46636b8 | Isaku Yamahata | if (tmp & PCI_PREF_RANGE_TYPE_64) {
|
758 | d46636b8 | Isaku Yamahata | val |= (pcibus_t)pci_get_long(d->config + upper) << 32;
|
759 | d46636b8 | Isaku Yamahata | } |
760 | a0c7a97e | Isaku Yamahata | return val;
|
761 | a0c7a97e | Isaku Yamahata | } |
762 | a0c7a97e | Isaku Yamahata | |
763 | a0c7a97e | Isaku Yamahata | static pcibus_t pci_bridge_get_base(PCIDevice *bridge, uint8_t type)
|
764 | a0c7a97e | Isaku Yamahata | { |
765 | a0c7a97e | Isaku Yamahata | pcibus_t base; |
766 | a0c7a97e | Isaku Yamahata | if (type & PCI_BASE_ADDRESS_SPACE_IO) {
|
767 | a0c7a97e | Isaku Yamahata | base = pci_config_get_io_base(bridge, |
768 | a0c7a97e | Isaku Yamahata | PCI_IO_BASE, PCI_IO_BASE_UPPER16); |
769 | a0c7a97e | Isaku Yamahata | } else {
|
770 | a0c7a97e | Isaku Yamahata | if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
|
771 | a0c7a97e | Isaku Yamahata | base = pci_config_get_pref_base( |
772 | a0c7a97e | Isaku Yamahata | bridge, PCI_PREF_MEMORY_BASE, PCI_PREF_BASE_UPPER32); |
773 | a0c7a97e | Isaku Yamahata | } else {
|
774 | a0c7a97e | Isaku Yamahata | base = pci_config_get_memory_base(bridge, PCI_MEMORY_BASE); |
775 | a0c7a97e | Isaku Yamahata | } |
776 | a0c7a97e | Isaku Yamahata | } |
777 | a0c7a97e | Isaku Yamahata | |
778 | a0c7a97e | Isaku Yamahata | return base;
|
779 | a0c7a97e | Isaku Yamahata | } |
780 | a0c7a97e | Isaku Yamahata | |
781 | a0c7a97e | Isaku Yamahata | static pcibus_t pci_bridge_get_limit(PCIDevice *bridge, uint8_t type)
|
782 | a0c7a97e | Isaku Yamahata | { |
783 | a0c7a97e | Isaku Yamahata | pcibus_t limit; |
784 | a0c7a97e | Isaku Yamahata | if (type & PCI_BASE_ADDRESS_SPACE_IO) {
|
785 | a0c7a97e | Isaku Yamahata | limit = pci_config_get_io_base(bridge, |
786 | a0c7a97e | Isaku Yamahata | PCI_IO_LIMIT, PCI_IO_LIMIT_UPPER16); |
787 | a0c7a97e | Isaku Yamahata | limit |= 0xfff; /* PCI bridge spec 3.2.5.6. */ |
788 | a0c7a97e | Isaku Yamahata | } else {
|
789 | a0c7a97e | Isaku Yamahata | if (type & PCI_BASE_ADDRESS_MEM_PREFETCH) {
|
790 | a0c7a97e | Isaku Yamahata | limit = pci_config_get_pref_base( |
791 | a0c7a97e | Isaku Yamahata | bridge, PCI_PREF_MEMORY_LIMIT, PCI_PREF_LIMIT_UPPER32); |
792 | a0c7a97e | Isaku Yamahata | } else {
|
793 | a0c7a97e | Isaku Yamahata | limit = pci_config_get_memory_base(bridge, PCI_MEMORY_LIMIT); |
794 | a0c7a97e | Isaku Yamahata | } |
795 | a0c7a97e | Isaku Yamahata | limit |= 0xfffff; /* PCI bridge spec 3.2.5.{1, 8}. */ |
796 | a0c7a97e | Isaku Yamahata | } |
797 | a0c7a97e | Isaku Yamahata | return limit;
|
798 | a0c7a97e | Isaku Yamahata | } |
799 | a0c7a97e | Isaku Yamahata | |
800 | a0c7a97e | Isaku Yamahata | static void pci_bridge_filter(PCIDevice *d, pcibus_t *addr, pcibus_t *size, |
801 | a0c7a97e | Isaku Yamahata | uint8_t type) |
802 | a0c7a97e | Isaku Yamahata | { |
803 | a0c7a97e | Isaku Yamahata | pcibus_t base = *addr; |
804 | a0c7a97e | Isaku Yamahata | pcibus_t limit = *addr + *size - 1;
|
805 | a0c7a97e | Isaku Yamahata | PCIDevice *br; |
806 | a0c7a97e | Isaku Yamahata | |
807 | a0c7a97e | Isaku Yamahata | for (br = d->bus->parent_dev; br; br = br->bus->parent_dev) {
|
808 | a0c7a97e | Isaku Yamahata | uint16_t cmd = pci_get_word(d->config + PCI_COMMAND); |
809 | a0c7a97e | Isaku Yamahata | |
810 | a0c7a97e | Isaku Yamahata | if (type & PCI_BASE_ADDRESS_SPACE_IO) {
|
811 | a0c7a97e | Isaku Yamahata | if (!(cmd & PCI_COMMAND_IO)) {
|
812 | a0c7a97e | Isaku Yamahata | goto no_map;
|
813 | a0c7a97e | Isaku Yamahata | } |
814 | a0c7a97e | Isaku Yamahata | } else {
|
815 | a0c7a97e | Isaku Yamahata | if (!(cmd & PCI_COMMAND_MEMORY)) {
|
816 | a0c7a97e | Isaku Yamahata | goto no_map;
|
817 | a0c7a97e | Isaku Yamahata | } |
818 | a0c7a97e | Isaku Yamahata | } |
819 | a0c7a97e | Isaku Yamahata | |
820 | a0c7a97e | Isaku Yamahata | base = MAX(base, pci_bridge_get_base(br, type)); |
821 | a0c7a97e | Isaku Yamahata | limit = MIN(limit, pci_bridge_get_limit(br, type)); |
822 | a0c7a97e | Isaku Yamahata | } |
823 | a0c7a97e | Isaku Yamahata | |
824 | a0c7a97e | Isaku Yamahata | if (base > limit) {
|
825 | 88a95564 | Michael S. Tsirkin | goto no_map;
|
826 | a0c7a97e | Isaku Yamahata | } |
827 | 88a95564 | Michael S. Tsirkin | *addr = base; |
828 | 88a95564 | Michael S. Tsirkin | *size = limit - base + 1;
|
829 | 88a95564 | Michael S. Tsirkin | return;
|
830 | 88a95564 | Michael S. Tsirkin | no_map:
|
831 | 88a95564 | Michael S. Tsirkin | *addr = PCI_BAR_UNMAPPED; |
832 | 88a95564 | Michael S. Tsirkin | *size = 0;
|
833 | a0c7a97e | Isaku Yamahata | } |
834 | a0c7a97e | Isaku Yamahata | |
835 | 876a350d | Michael S. Tsirkin | static pcibus_t pci_bar_address(PCIDevice *d,
|
836 | 876a350d | Michael S. Tsirkin | int reg, uint8_t type, pcibus_t size)
|
837 | 876a350d | Michael S. Tsirkin | { |
838 | 876a350d | Michael S. Tsirkin | pcibus_t new_addr, last_addr; |
839 | 876a350d | Michael S. Tsirkin | int bar = pci_bar(d, reg);
|
840 | 876a350d | Michael S. Tsirkin | uint16_t cmd = pci_get_word(d->config + PCI_COMMAND); |
841 | 876a350d | Michael S. Tsirkin | |
842 | 876a350d | Michael S. Tsirkin | if (type & PCI_BASE_ADDRESS_SPACE_IO) {
|
843 | 876a350d | Michael S. Tsirkin | if (!(cmd & PCI_COMMAND_IO)) {
|
844 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
845 | 876a350d | Michael S. Tsirkin | } |
846 | 876a350d | Michael S. Tsirkin | new_addr = pci_get_long(d->config + bar) & ~(size - 1);
|
847 | 876a350d | Michael S. Tsirkin | last_addr = new_addr + size - 1;
|
848 | 876a350d | Michael S. Tsirkin | /* NOTE: we have only 64K ioports on PC */
|
849 | 876a350d | Michael S. Tsirkin | if (last_addr <= new_addr || new_addr == 0 || last_addr > UINT16_MAX) { |
850 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
851 | 876a350d | Michael S. Tsirkin | } |
852 | 876a350d | Michael S. Tsirkin | return new_addr;
|
853 | 876a350d | Michael S. Tsirkin | } |
854 | 876a350d | Michael S. Tsirkin | |
855 | 876a350d | Michael S. Tsirkin | if (!(cmd & PCI_COMMAND_MEMORY)) {
|
856 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
857 | 876a350d | Michael S. Tsirkin | } |
858 | 876a350d | Michael S. Tsirkin | if (type & PCI_BASE_ADDRESS_MEM_TYPE_64) {
|
859 | 876a350d | Michael S. Tsirkin | new_addr = pci_get_quad(d->config + bar); |
860 | 876a350d | Michael S. Tsirkin | } else {
|
861 | 876a350d | Michael S. Tsirkin | new_addr = pci_get_long(d->config + bar); |
862 | 876a350d | Michael S. Tsirkin | } |
863 | 876a350d | Michael S. Tsirkin | /* the ROM slot has a specific enable bit */
|
864 | 876a350d | Michael S. Tsirkin | if (reg == PCI_ROM_SLOT && !(new_addr & PCI_ROM_ADDRESS_ENABLE)) {
|
865 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
866 | 876a350d | Michael S. Tsirkin | } |
867 | 876a350d | Michael S. Tsirkin | new_addr &= ~(size - 1);
|
868 | 876a350d | Michael S. Tsirkin | last_addr = new_addr + size - 1;
|
869 | 876a350d | Michael S. Tsirkin | /* NOTE: we do not support wrapping */
|
870 | 876a350d | Michael S. Tsirkin | /* XXX: as we cannot support really dynamic
|
871 | 876a350d | Michael S. Tsirkin | mappings, we handle specific values as invalid
|
872 | 876a350d | Michael S. Tsirkin | mappings. */
|
873 | 876a350d | Michael S. Tsirkin | if (last_addr <= new_addr || new_addr == 0 || |
874 | 876a350d | Michael S. Tsirkin | last_addr == PCI_BAR_UNMAPPED) { |
875 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
876 | 876a350d | Michael S. Tsirkin | } |
877 | 876a350d | Michael S. Tsirkin | |
878 | 876a350d | Michael S. Tsirkin | /* Now pcibus_t is 64bit.
|
879 | 876a350d | Michael S. Tsirkin | * Check if 32 bit BAR wraps around explicitly.
|
880 | 876a350d | Michael S. Tsirkin | * Without this, PC ide doesn't work well.
|
881 | 876a350d | Michael S. Tsirkin | * TODO: remove this work around.
|
882 | 876a350d | Michael S. Tsirkin | */
|
883 | 876a350d | Michael S. Tsirkin | if (!(type & PCI_BASE_ADDRESS_MEM_TYPE_64) && last_addr >= UINT32_MAX) {
|
884 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
885 | 876a350d | Michael S. Tsirkin | } |
886 | 876a350d | Michael S. Tsirkin | |
887 | 876a350d | Michael S. Tsirkin | /*
|
888 | 876a350d | Michael S. Tsirkin | * OS is allowed to set BAR beyond its addressable
|
889 | 876a350d | Michael S. Tsirkin | * bits. For example, 32 bit OS can set 64bit bar
|
890 | 876a350d | Michael S. Tsirkin | * to >4G. Check it. TODO: we might need to support
|
891 | 876a350d | Michael S. Tsirkin | * it in the future for e.g. PAE.
|
892 | 876a350d | Michael S. Tsirkin | */
|
893 | 876a350d | Michael S. Tsirkin | if (last_addr >= TARGET_PHYS_ADDR_MAX) {
|
894 | 876a350d | Michael S. Tsirkin | return PCI_BAR_UNMAPPED;
|
895 | 876a350d | Michael S. Tsirkin | } |
896 | 876a350d | Michael S. Tsirkin | |
897 | 876a350d | Michael S. Tsirkin | return new_addr;
|
898 | 876a350d | Michael S. Tsirkin | } |
899 | 876a350d | Michael S. Tsirkin | |
900 | 0ac32c83 | bellard | static void pci_update_mappings(PCIDevice *d) |
901 | 0ac32c83 | bellard | { |
902 | 0ac32c83 | bellard | PCIIORegion *r; |
903 | 876a350d | Michael S. Tsirkin | int i;
|
904 | c71b5b4a | Blue Swirl | pcibus_t new_addr, filtered_size; |
905 | 3b46e624 | ths | |
906 | 8a8696a3 | bellard | for(i = 0; i < PCI_NUM_REGIONS; i++) { |
907 | 0ac32c83 | bellard | r = &d->io_regions[i]; |
908 | a9688570 | Isaku Yamahata | |
909 | a9688570 | Isaku Yamahata | /* this region isn't registered */
|
910 | ec503442 | Isaku Yamahata | if (!r->size)
|
911 | a9688570 | Isaku Yamahata | continue;
|
912 | a9688570 | Isaku Yamahata | |
913 | 876a350d | Michael S. Tsirkin | new_addr = pci_bar_address(d, i, r->type, r->size); |
914 | a9688570 | Isaku Yamahata | |
915 | a0c7a97e | Isaku Yamahata | /* bridge filtering */
|
916 | a0c7a97e | Isaku Yamahata | filtered_size = r->size; |
917 | a0c7a97e | Isaku Yamahata | if (new_addr != PCI_BAR_UNMAPPED) {
|
918 | a0c7a97e | Isaku Yamahata | pci_bridge_filter(d, &new_addr, &filtered_size, r->type); |
919 | a0c7a97e | Isaku Yamahata | } |
920 | a0c7a97e | Isaku Yamahata | |
921 | a9688570 | Isaku Yamahata | /* This bar isn't changed */
|
922 | a0c7a97e | Isaku Yamahata | if (new_addr == r->addr && filtered_size == r->filtered_size)
|
923 | a9688570 | Isaku Yamahata | continue;
|
924 | a9688570 | Isaku Yamahata | |
925 | a9688570 | Isaku Yamahata | /* now do the real mapping */
|
926 | a9688570 | Isaku Yamahata | if (r->addr != PCI_BAR_UNMAPPED) {
|
927 | a9688570 | Isaku Yamahata | if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
|
928 | a9688570 | Isaku Yamahata | int class;
|
929 | a9688570 | Isaku Yamahata | /* NOTE: specific hack for IDE in PC case:
|
930 | a9688570 | Isaku Yamahata | only one byte must be mapped. */
|
931 | a9688570 | Isaku Yamahata | class = pci_get_word(d->config + PCI_CLASS_DEVICE); |
932 | a9688570 | Isaku Yamahata | if (class == 0x0101 && r->size == 4) { |
933 | a9688570 | Isaku Yamahata | isa_unassign_ioport(r->addr + 2, 1); |
934 | a9688570 | Isaku Yamahata | } else {
|
935 | a0c7a97e | Isaku Yamahata | isa_unassign_ioport(r->addr, r->filtered_size); |
936 | 0ac32c83 | bellard | } |
937 | a9688570 | Isaku Yamahata | } else {
|
938 | c71b5b4a | Blue Swirl | cpu_register_physical_memory(pci_to_cpu_addr(d->bus, r->addr), |
939 | a0c7a97e | Isaku Yamahata | r->filtered_size, |
940 | a9688570 | Isaku Yamahata | IO_MEM_UNASSIGNED); |
941 | a0c7a97e | Isaku Yamahata | qemu_unregister_coalesced_mmio(r->addr, r->filtered_size); |
942 | 0ac32c83 | bellard | } |
943 | 0ac32c83 | bellard | } |
944 | a9688570 | Isaku Yamahata | r->addr = new_addr; |
945 | a0c7a97e | Isaku Yamahata | r->filtered_size = filtered_size; |
946 | a9688570 | Isaku Yamahata | if (r->addr != PCI_BAR_UNMAPPED) {
|
947 | a0c7a97e | Isaku Yamahata | /*
|
948 | a0c7a97e | Isaku Yamahata | * TODO: currently almost all the map funcions assumes
|
949 | a0c7a97e | Isaku Yamahata | * filtered_size == size and addr & ~(size - 1) == addr.
|
950 | a0c7a97e | Isaku Yamahata | * However with bridge filtering, they aren't always true.
|
951 | a0c7a97e | Isaku Yamahata | * Teach them such cases, such that filtered_size < size and
|
952 | a0c7a97e | Isaku Yamahata | * addr & (size - 1) != 0.
|
953 | a0c7a97e | Isaku Yamahata | */
|
954 | cf616802 | Blue Swirl | if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
|
955 | cf616802 | Blue Swirl | r->map_func(d, i, r->addr, r->filtered_size, r->type); |
956 | cf616802 | Blue Swirl | } else {
|
957 | cf616802 | Blue Swirl | r->map_func(d, i, pci_to_cpu_addr(d->bus, r->addr), |
958 | cf616802 | Blue Swirl | r->filtered_size, r->type); |
959 | cf616802 | Blue Swirl | } |
960 | a9688570 | Isaku Yamahata | } |
961 | 0ac32c83 | bellard | } |
962 | 0ac32c83 | bellard | } |
963 | 0ac32c83 | bellard | |
964 | a7b15a5c | Michael S. Tsirkin | static inline int pci_irq_disabled(PCIDevice *d) |
965 | a7b15a5c | Michael S. Tsirkin | { |
966 | a7b15a5c | Michael S. Tsirkin | return pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_INTX_DISABLE;
|
967 | a7b15a5c | Michael S. Tsirkin | } |
968 | a7b15a5c | Michael S. Tsirkin | |
969 | a7b15a5c | Michael S. Tsirkin | /* Called after interrupt disabled field update in config space,
|
970 | a7b15a5c | Michael S. Tsirkin | * assert/deassert interrupts if necessary.
|
971 | a7b15a5c | Michael S. Tsirkin | * Gets original interrupt disable bit value (before update). */
|
972 | a7b15a5c | Michael S. Tsirkin | static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled) |
973 | a7b15a5c | Michael S. Tsirkin | { |
974 | a7b15a5c | Michael S. Tsirkin | int i, disabled = pci_irq_disabled(d);
|
975 | a7b15a5c | Michael S. Tsirkin | if (disabled == was_irq_disabled)
|
976 | a7b15a5c | Michael S. Tsirkin | return;
|
977 | a7b15a5c | Michael S. Tsirkin | for (i = 0; i < PCI_NUM_PINS; ++i) { |
978 | a7b15a5c | Michael S. Tsirkin | int state = pci_irq_state(d, i);
|
979 | a7b15a5c | Michael S. Tsirkin | pci_change_irq_level(d, i, disabled ? -state : state); |
980 | a7b15a5c | Michael S. Tsirkin | } |
981 | a7b15a5c | Michael S. Tsirkin | } |
982 | a7b15a5c | Michael S. Tsirkin | |
983 | 5fafdf24 | ths | uint32_t pci_default_read_config(PCIDevice *d, |
984 | 0ac32c83 | bellard | uint32_t address, int len)
|
985 | 69b91039 | bellard | { |
986 | 5029fe12 | Isaku Yamahata | uint32_t val = 0;
|
987 | 5029fe12 | Isaku Yamahata | assert(len == 1 || len == 2 || len == 4); |
988 | a9f49946 | Isaku Yamahata | len = MIN(len, pci_config_size(d) - address); |
989 | 5029fe12 | Isaku Yamahata | memcpy(&val, d->config + address, len); |
990 | 5029fe12 | Isaku Yamahata | return le32_to_cpu(val);
|
991 | 0ac32c83 | bellard | } |
992 | 0ac32c83 | bellard | |
993 | b7ee1603 | Michael S. Tsirkin | void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) |
994 | 0ac32c83 | bellard | { |
995 | a7b15a5c | Michael S. Tsirkin | int i, was_irq_disabled = pci_irq_disabled(d);
|
996 | a9f49946 | Isaku Yamahata | uint32_t config_size = pci_config_size(d); |
997 | 0ac32c83 | bellard | |
998 | 91011d4f | Stefan Weil | for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { |
999 | 91011d4f | Stefan Weil | uint8_t wmask = d->wmask[addr + i]; |
1000 | 91011d4f | Stefan Weil | d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask); |
1001 | 0ac32c83 | bellard | } |
1002 | 260c0cd3 | Isaku Yamahata | if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) || |
1003 | edb00035 | Isaku Yamahata | ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) ||
|
1004 | edb00035 | Isaku Yamahata | ranges_overlap(addr, l, PCI_ROM_ADDRESS1, 4) ||
|
1005 | 260c0cd3 | Isaku Yamahata | range_covers_byte(addr, l, PCI_COMMAND)) |
1006 | 0ac32c83 | bellard | pci_update_mappings(d); |
1007 | a7b15a5c | Michael S. Tsirkin | |
1008 | a7b15a5c | Michael S. Tsirkin | if (range_covers_byte(addr, l, PCI_COMMAND))
|
1009 | a7b15a5c | Michael S. Tsirkin | pci_update_irq_disabled(d, was_irq_disabled); |
1010 | 69b91039 | bellard | } |
1011 | 69b91039 | bellard | |
1012 | 502a5395 | pbrook | /***********************************************************/
|
1013 | 502a5395 | pbrook | /* generic PCI irq support */
|
1014 | 30468f78 | bellard | |
1015 | 502a5395 | pbrook | /* 0 <= irq_num <= 3. level must be 0 or 1 */
|
1016 | d537cf6c | pbrook | static void pci_set_irq(void *opaque, int irq_num, int level) |
1017 | 69b91039 | bellard | { |
1018 | a60380a5 | Juan Quintela | PCIDevice *pci_dev = opaque; |
1019 | 80b3ada7 | pbrook | int change;
|
1020 | 3b46e624 | ths | |
1021 | d036bb21 | Michael S. Tsirkin | change = level - pci_irq_state(pci_dev, irq_num); |
1022 | 80b3ada7 | pbrook | if (!change)
|
1023 | 80b3ada7 | pbrook | return;
|
1024 | d2b59317 | pbrook | |
1025 | d036bb21 | Michael S. Tsirkin | pci_set_irq_state(pci_dev, irq_num, level); |
1026 | f9bf77dd | Michael S. Tsirkin | pci_update_irq_status(pci_dev); |
1027 | a7b15a5c | Michael S. Tsirkin | if (pci_irq_disabled(pci_dev))
|
1028 | a7b15a5c | Michael S. Tsirkin | return;
|
1029 | d036bb21 | Michael S. Tsirkin | pci_change_irq_level(pci_dev, irq_num, change); |
1030 | 69b91039 | bellard | } |
1031 | 69b91039 | bellard | |
1032 | 502a5395 | pbrook | /***********************************************************/
|
1033 | 502a5395 | pbrook | /* monitor info on PCI */
|
1034 | 0ac32c83 | bellard | |
1035 | 6650ee6d | pbrook | typedef struct { |
1036 | 6650ee6d | pbrook | uint16_t class; |
1037 | 6650ee6d | pbrook | const char *desc; |
1038 | 6650ee6d | pbrook | } pci_class_desc; |
1039 | 6650ee6d | pbrook | |
1040 | 09bc878a | blueswir1 | static const pci_class_desc pci_class_descriptions[] = |
1041 | 6650ee6d | pbrook | { |
1042 | 4ca9c76f | pbrook | { 0x0100, "SCSI controller"}, |
1043 | 6650ee6d | pbrook | { 0x0101, "IDE controller"}, |
1044 | dcb5b19a | ths | { 0x0102, "Floppy controller"}, |
1045 | dcb5b19a | ths | { 0x0103, "IPI controller"}, |
1046 | dcb5b19a | ths | { 0x0104, "RAID controller"}, |
1047 | dcb5b19a | ths | { 0x0106, "SATA controller"}, |
1048 | dcb5b19a | ths | { 0x0107, "SAS controller"}, |
1049 | dcb5b19a | ths | { 0x0180, "Storage controller"}, |
1050 | 6650ee6d | pbrook | { 0x0200, "Ethernet controller"}, |
1051 | dcb5b19a | ths | { 0x0201, "Token Ring controller"}, |
1052 | dcb5b19a | ths | { 0x0202, "FDDI controller"}, |
1053 | dcb5b19a | ths | { 0x0203, "ATM controller"}, |
1054 | dcb5b19a | ths | { 0x0280, "Network controller"}, |
1055 | 6650ee6d | pbrook | { 0x0300, "VGA controller"}, |
1056 | dcb5b19a | ths | { 0x0301, "XGA controller"}, |
1057 | dcb5b19a | ths | { 0x0302, "3D controller"}, |
1058 | dcb5b19a | ths | { 0x0380, "Display controller"}, |
1059 | dcb5b19a | ths | { 0x0400, "Video controller"}, |
1060 | dcb5b19a | ths | { 0x0401, "Audio controller"}, |
1061 | dcb5b19a | ths | { 0x0402, "Phone"}, |
1062 | dcb5b19a | ths | { 0x0480, "Multimedia controller"}, |
1063 | dcb5b19a | ths | { 0x0500, "RAM controller"}, |
1064 | dcb5b19a | ths | { 0x0501, "Flash controller"}, |
1065 | dcb5b19a | ths | { 0x0580, "Memory controller"}, |
1066 | 6650ee6d | pbrook | { 0x0600, "Host bridge"}, |
1067 | 6650ee6d | pbrook | { 0x0601, "ISA bridge"}, |
1068 | dcb5b19a | ths | { 0x0602, "EISA bridge"}, |
1069 | dcb5b19a | ths | { 0x0603, "MC bridge"}, |
1070 | 6650ee6d | pbrook | { 0x0604, "PCI bridge"}, |
1071 | dcb5b19a | ths | { 0x0605, "PCMCIA bridge"}, |
1072 | dcb5b19a | ths | { 0x0606, "NUBUS bridge"}, |
1073 | dcb5b19a | ths | { 0x0607, "CARDBUS bridge"}, |
1074 | dcb5b19a | ths | { 0x0608, "RACEWAY bridge"}, |
1075 | dcb5b19a | ths | { 0x0680, "Bridge"}, |
1076 | 6650ee6d | pbrook | { 0x0c03, "USB controller"}, |
1077 | 6650ee6d | pbrook | { 0, NULL} |
1078 | 6650ee6d | pbrook | }; |
1079 | 6650ee6d | pbrook | |
1080 | 163c8a59 | Luiz Capitulino | static void pci_for_each_device_under_bus(PCIBus *bus, |
1081 | 163c8a59 | Luiz Capitulino | void (*fn)(PCIBus *b, PCIDevice *d))
|
1082 | 30468f78 | bellard | { |
1083 | 163c8a59 | Luiz Capitulino | PCIDevice *d; |
1084 | 163c8a59 | Luiz Capitulino | int devfn;
|
1085 | 30468f78 | bellard | |
1086 | 163c8a59 | Luiz Capitulino | for(devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { |
1087 | 163c8a59 | Luiz Capitulino | d = bus->devices[devfn]; |
1088 | 163c8a59 | Luiz Capitulino | if (d) {
|
1089 | 163c8a59 | Luiz Capitulino | fn(bus, d); |
1090 | 163c8a59 | Luiz Capitulino | } |
1091 | 163c8a59 | Luiz Capitulino | } |
1092 | 163c8a59 | Luiz Capitulino | } |
1093 | 163c8a59 | Luiz Capitulino | |
1094 | 163c8a59 | Luiz Capitulino | void pci_for_each_device(PCIBus *bus, int bus_num, |
1095 | 163c8a59 | Luiz Capitulino | void (*fn)(PCIBus *b, PCIDevice *d))
|
1096 | 163c8a59 | Luiz Capitulino | { |
1097 | 163c8a59 | Luiz Capitulino | bus = pci_find_bus(bus, bus_num); |
1098 | 163c8a59 | Luiz Capitulino | |
1099 | 163c8a59 | Luiz Capitulino | if (bus) {
|
1100 | 163c8a59 | Luiz Capitulino | pci_for_each_device_under_bus(bus, fn); |
1101 | 163c8a59 | Luiz Capitulino | } |
1102 | 163c8a59 | Luiz Capitulino | } |
1103 | 163c8a59 | Luiz Capitulino | |
1104 | 163c8a59 | Luiz Capitulino | static void pci_device_print(Monitor *mon, QDict *device) |
1105 | 163c8a59 | Luiz Capitulino | { |
1106 | 163c8a59 | Luiz Capitulino | QDict *qdict; |
1107 | 163c8a59 | Luiz Capitulino | QListEntry *entry; |
1108 | 163c8a59 | Luiz Capitulino | uint64_t addr, size; |
1109 | 163c8a59 | Luiz Capitulino | |
1110 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " Bus %2" PRId64 ", ", qdict_get_int(device, "bus")); |
1111 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, "device %3" PRId64 ", function %" PRId64 ":\n", |
1112 | 163c8a59 | Luiz Capitulino | qdict_get_int(device, "slot"),
|
1113 | 163c8a59 | Luiz Capitulino | qdict_get_int(device, "function"));
|
1114 | 376253ec | aliguori | monitor_printf(mon, " ");
|
1115 | 163c8a59 | Luiz Capitulino | |
1116 | 163c8a59 | Luiz Capitulino | qdict = qdict_get_qdict(device, "class_info");
|
1117 | 163c8a59 | Luiz Capitulino | if (qdict_haskey(qdict, "desc")) { |
1118 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, "%s", qdict_get_str(qdict, "desc")); |
1119 | 6650ee6d | pbrook | } else {
|
1120 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, "Class %04" PRId64, qdict_get_int(qdict, "class")); |
1121 | 72cc6cfe | bellard | } |
1122 | 30468f78 | bellard | |
1123 | 163c8a59 | Luiz Capitulino | qdict = qdict_get_qdict(device, "id");
|
1124 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n", |
1125 | 163c8a59 | Luiz Capitulino | qdict_get_int(qdict, "device"),
|
1126 | 163c8a59 | Luiz Capitulino | qdict_get_int(qdict, "vendor"));
|
1127 | 163c8a59 | Luiz Capitulino | |
1128 | 163c8a59 | Luiz Capitulino | if (qdict_haskey(device, "irq")) { |
1129 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " IRQ %" PRId64 ".\n", |
1130 | 163c8a59 | Luiz Capitulino | qdict_get_int(device, "irq"));
|
1131 | 30468f78 | bellard | } |
1132 | b4dccd8d | Isaku Yamahata | |
1133 | 163c8a59 | Luiz Capitulino | if (qdict_haskey(device, "pci_bridge")) { |
1134 | 163c8a59 | Luiz Capitulino | QDict *info; |
1135 | 163c8a59 | Luiz Capitulino | |
1136 | 163c8a59 | Luiz Capitulino | qdict = qdict_get_qdict(device, "pci_bridge");
|
1137 | 163c8a59 | Luiz Capitulino | |
1138 | 163c8a59 | Luiz Capitulino | info = qdict_get_qdict(qdict, "bus");
|
1139 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " BUS %" PRId64 ".\n", |
1140 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "number"));
|
1141 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " secondary bus %" PRId64 ".\n", |
1142 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "secondary"));
|
1143 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " subordinate bus %" PRId64 ".\n", |
1144 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "subordinate"));
|
1145 | b4dccd8d | Isaku Yamahata | |
1146 | 163c8a59 | Luiz Capitulino | info = qdict_get_qdict(qdict, "io_range");
|
1147 | b4dccd8d | Isaku Yamahata | monitor_printf(mon, " IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n", |
1148 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "base"),
|
1149 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "limit"));
|
1150 | b4dccd8d | Isaku Yamahata | |
1151 | 163c8a59 | Luiz Capitulino | info = qdict_get_qdict(qdict, "memory_range");
|
1152 | b4dccd8d | Isaku Yamahata | monitor_printf(mon, |
1153 | b4dccd8d | Isaku Yamahata | " memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n", |
1154 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "base"),
|
1155 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "limit"));
|
1156 | b4dccd8d | Isaku Yamahata | |
1157 | 163c8a59 | Luiz Capitulino | info = qdict_get_qdict(qdict, "prefetchable_range");
|
1158 | b4dccd8d | Isaku Yamahata | monitor_printf(mon, " prefetchable memory range "
|
1159 | 163c8a59 | Luiz Capitulino | "[0x%08"PRIx64", 0x%08"PRIx64"]\n", |
1160 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "base"),
|
1161 | 163c8a59 | Luiz Capitulino | qdict_get_int(info, "limit"));
|
1162 | 80b3ada7 | pbrook | } |
1163 | 14421258 | Isaku Yamahata | |
1164 | 163c8a59 | Luiz Capitulino | QLIST_FOREACH_ENTRY(qdict_get_qlist(device, "regions"), entry) {
|
1165 | 163c8a59 | Luiz Capitulino | qdict = qobject_to_qdict(qlist_entry_obj(entry)); |
1166 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " BAR%d: ", (int) qdict_get_int(qdict, "bar")); |
1167 | 163c8a59 | Luiz Capitulino | |
1168 | 163c8a59 | Luiz Capitulino | addr = qdict_get_int(qdict, "address");
|
1169 | 163c8a59 | Luiz Capitulino | size = qdict_get_int(qdict, "size");
|
1170 | 163c8a59 | Luiz Capitulino | |
1171 | 163c8a59 | Luiz Capitulino | if (!strcmp(qdict_get_str(qdict, "type"), "io")) { |
1172 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, "I/O at 0x%04"FMT_PCIBUS
|
1173 | 163c8a59 | Luiz Capitulino | " [0x%04"FMT_PCIBUS"].\n", |
1174 | 163c8a59 | Luiz Capitulino | addr, addr + size - 1);
|
1175 | 163c8a59 | Luiz Capitulino | } else {
|
1176 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, "%d bit%s memory at 0x%08"FMT_PCIBUS
|
1177 | 89e8b13c | Isaku Yamahata | " [0x%08"FMT_PCIBUS"].\n", |
1178 | 163c8a59 | Luiz Capitulino | qdict_get_bool(qdict, "mem_type_64") ? 64 : 32, |
1179 | 163c8a59 | Luiz Capitulino | qdict_get_bool(qdict, "prefetch") ?
|
1180 | 163c8a59 | Luiz Capitulino | " prefetchable" : "", addr, addr + size - 1); |
1181 | 502a5395 | pbrook | } |
1182 | 77d4bc34 | bellard | } |
1183 | 163c8a59 | Luiz Capitulino | |
1184 | 163c8a59 | Luiz Capitulino | monitor_printf(mon, " id \"%s\"\n", qdict_get_str(device, "qdev_id")); |
1185 | 163c8a59 | Luiz Capitulino | |
1186 | d5e4acf7 | Luiz Capitulino | if (qdict_haskey(device, "pci_bridge")) { |
1187 | d5e4acf7 | Luiz Capitulino | qdict = qdict_get_qdict(device, "pci_bridge");
|
1188 | d5e4acf7 | Luiz Capitulino | if (qdict_haskey(qdict, "devices")) { |
1189 | d5e4acf7 | Luiz Capitulino | QListEntry *dev; |
1190 | d5e4acf7 | Luiz Capitulino | QLIST_FOREACH_ENTRY(qdict_get_qlist(qdict, "devices"), dev) {
|
1191 | d5e4acf7 | Luiz Capitulino | pci_device_print(mon, qobject_to_qdict(qlist_entry_obj(dev))); |
1192 | d5e4acf7 | Luiz Capitulino | } |
1193 | d5e4acf7 | Luiz Capitulino | } |
1194 | d5e4acf7 | Luiz Capitulino | } |
1195 | 163c8a59 | Luiz Capitulino | } |
1196 | 163c8a59 | Luiz Capitulino | |
1197 | 163c8a59 | Luiz Capitulino | void do_pci_info_print(Monitor *mon, const QObject *data) |
1198 | 163c8a59 | Luiz Capitulino | { |
1199 | 163c8a59 | Luiz Capitulino | QListEntry *bus, *dev; |
1200 | 163c8a59 | Luiz Capitulino | |
1201 | 163c8a59 | Luiz Capitulino | QLIST_FOREACH_ENTRY(qobject_to_qlist(data), bus) { |
1202 | 163c8a59 | Luiz Capitulino | QDict *qdict = qobject_to_qdict(qlist_entry_obj(bus)); |
1203 | 163c8a59 | Luiz Capitulino | QLIST_FOREACH_ENTRY(qdict_get_qlist(qdict, "devices"), dev) {
|
1204 | 163c8a59 | Luiz Capitulino | pci_device_print(mon, qobject_to_qdict(qlist_entry_obj(dev))); |
1205 | 163c8a59 | Luiz Capitulino | } |
1206 | 80b3ada7 | pbrook | } |
1207 | 384d8876 | bellard | } |
1208 | 384d8876 | bellard | |
1209 | 163c8a59 | Luiz Capitulino | static QObject *pci_get_dev_class(const PCIDevice *dev) |
1210 | 163c8a59 | Luiz Capitulino | { |
1211 | 163c8a59 | Luiz Capitulino | int class;
|
1212 | 163c8a59 | Luiz Capitulino | const pci_class_desc *desc;
|
1213 | 163c8a59 | Luiz Capitulino | |
1214 | 163c8a59 | Luiz Capitulino | class = pci_get_word(dev->config + PCI_CLASS_DEVICE); |
1215 | 163c8a59 | Luiz Capitulino | desc = pci_class_descriptions; |
1216 | 163c8a59 | Luiz Capitulino | while (desc->desc && class != desc->class)
|
1217 | 163c8a59 | Luiz Capitulino | desc++; |
1218 | 163c8a59 | Luiz Capitulino | |
1219 | 163c8a59 | Luiz Capitulino | if (desc->desc) {
|
1220 | 163c8a59 | Luiz Capitulino | return qobject_from_jsonf("{ 'desc': %s, 'class': %d }", |
1221 | 163c8a59 | Luiz Capitulino | desc->desc, class); |
1222 | 163c8a59 | Luiz Capitulino | } else {
|
1223 | 163c8a59 | Luiz Capitulino | return qobject_from_jsonf("{ 'class': %d }", class); |
1224 | 163c8a59 | Luiz Capitulino | } |
1225 | 163c8a59 | Luiz Capitulino | } |
1226 | 163c8a59 | Luiz Capitulino | |
1227 | 163c8a59 | Luiz Capitulino | static QObject *pci_get_dev_id(const PCIDevice *dev) |
1228 | 163c8a59 | Luiz Capitulino | { |
1229 | 163c8a59 | Luiz Capitulino | return qobject_from_jsonf("{ 'device': %d, 'vendor': %d }", |
1230 | 163c8a59 | Luiz Capitulino | pci_get_word(dev->config + PCI_VENDOR_ID), |
1231 | 163c8a59 | Luiz Capitulino | pci_get_word(dev->config + PCI_DEVICE_ID)); |
1232 | 163c8a59 | Luiz Capitulino | } |
1233 | 163c8a59 | Luiz Capitulino | |
1234 | 163c8a59 | Luiz Capitulino | static QObject *pci_get_regions_list(const PCIDevice *dev) |
1235 | 163c8a59 | Luiz Capitulino | { |
1236 | 163c8a59 | Luiz Capitulino | int i;
|
1237 | 163c8a59 | Luiz Capitulino | QList *regions_list; |
1238 | 163c8a59 | Luiz Capitulino | |
1239 | 163c8a59 | Luiz Capitulino | regions_list = qlist_new(); |
1240 | 163c8a59 | Luiz Capitulino | |
1241 | 163c8a59 | Luiz Capitulino | for (i = 0; i < PCI_NUM_REGIONS; i++) { |
1242 | 163c8a59 | Luiz Capitulino | QObject *obj; |
1243 | 163c8a59 | Luiz Capitulino | const PCIIORegion *r = &dev->io_regions[i];
|
1244 | 163c8a59 | Luiz Capitulino | |
1245 | 163c8a59 | Luiz Capitulino | if (!r->size) {
|
1246 | 163c8a59 | Luiz Capitulino | continue;
|
1247 | 163c8a59 | Luiz Capitulino | } |
1248 | 163c8a59 | Luiz Capitulino | |
1249 | 163c8a59 | Luiz Capitulino | if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
|
1250 | 163c8a59 | Luiz Capitulino | obj = qobject_from_jsonf("{ 'bar': %d, 'type': 'io', "
|
1251 | 163c8a59 | Luiz Capitulino | "'address': %" PRId64 ", " |
1252 | 163c8a59 | Luiz Capitulino | "'size': %" PRId64 " }", |
1253 | 163c8a59 | Luiz Capitulino | i, r->addr, r->size); |
1254 | 163c8a59 | Luiz Capitulino | } else {
|
1255 | 163c8a59 | Luiz Capitulino | int mem_type_64 = r->type & PCI_BASE_ADDRESS_MEM_TYPE_64;
|
1256 | 163c8a59 | Luiz Capitulino | |
1257 | 163c8a59 | Luiz Capitulino | obj = qobject_from_jsonf("{ 'bar': %d, 'type': 'memory', "
|
1258 | 163c8a59 | Luiz Capitulino | "'mem_type_64': %i, 'prefetch': %i, "
|
1259 | 163c8a59 | Luiz Capitulino | "'address': %" PRId64 ", " |
1260 | 163c8a59 | Luiz Capitulino | "'size': %" PRId64 " }", |
1261 | 163c8a59 | Luiz Capitulino | i, mem_type_64, |
1262 | 163c8a59 | Luiz Capitulino | r->type & PCI_BASE_ADDRESS_MEM_PREFETCH, |
1263 | 163c8a59 | Luiz Capitulino | r->addr, r->size); |
1264 | 163c8a59 | Luiz Capitulino | } |
1265 | 163c8a59 | Luiz Capitulino | |
1266 | 163c8a59 | Luiz Capitulino | qlist_append_obj(regions_list, obj); |
1267 | 163c8a59 | Luiz Capitulino | } |
1268 | 163c8a59 | Luiz Capitulino | |
1269 | 163c8a59 | Luiz Capitulino | return QOBJECT(regions_list);
|
1270 | 163c8a59 | Luiz Capitulino | } |
1271 | 163c8a59 | Luiz Capitulino | |
1272 | d5e4acf7 | Luiz Capitulino | static QObject *pci_get_devices_list(PCIBus *bus, int bus_num); |
1273 | d5e4acf7 | Luiz Capitulino | |
1274 | d5e4acf7 | Luiz Capitulino | static QObject *pci_get_dev_dict(PCIDevice *dev, PCIBus *bus, int bus_num) |
1275 | 163c8a59 | Luiz Capitulino | { |
1276 | 163c8a59 | Luiz Capitulino | int class;
|
1277 | 163c8a59 | Luiz Capitulino | QObject *obj; |
1278 | 163c8a59 | Luiz Capitulino | |
1279 | 163c8a59 | Luiz Capitulino | obj = qobject_from_jsonf("{ 'bus': %d, 'slot': %d, 'function': %d," "'class_info': %p, 'id': %p, 'regions': %p," |
1280 | 163c8a59 | Luiz Capitulino | " 'qdev_id': %s }",
|
1281 | 163c8a59 | Luiz Capitulino | bus_num, |
1282 | 163c8a59 | Luiz Capitulino | PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), |
1283 | 163c8a59 | Luiz Capitulino | pci_get_dev_class(dev), pci_get_dev_id(dev), |
1284 | 163c8a59 | Luiz Capitulino | pci_get_regions_list(dev), |
1285 | 163c8a59 | Luiz Capitulino | dev->qdev.id ? dev->qdev.id : "");
|
1286 | 163c8a59 | Luiz Capitulino | |
1287 | 163c8a59 | Luiz Capitulino | if (dev->config[PCI_INTERRUPT_PIN] != 0) { |
1288 | 163c8a59 | Luiz Capitulino | QDict *qdict = qobject_to_qdict(obj); |
1289 | 163c8a59 | Luiz Capitulino | qdict_put(qdict, "irq", qint_from_int(dev->config[PCI_INTERRUPT_LINE]));
|
1290 | 163c8a59 | Luiz Capitulino | } |
1291 | 163c8a59 | Luiz Capitulino | |
1292 | 163c8a59 | Luiz Capitulino | class = pci_get_word(dev->config + PCI_CLASS_DEVICE); |
1293 | 525e0514 | Blue Swirl | if (class == PCI_CLASS_BRIDGE_HOST || class == PCI_CLASS_BRIDGE_PCI) {
|
1294 | 163c8a59 | Luiz Capitulino | QDict *qdict; |
1295 | 163c8a59 | Luiz Capitulino | QObject *pci_bridge; |
1296 | 163c8a59 | Luiz Capitulino | |
1297 | 163c8a59 | Luiz Capitulino | pci_bridge = qobject_from_jsonf("{ 'bus': "
|
1298 | 163c8a59 | Luiz Capitulino | "{ 'number': %d, 'secondary': %d, 'subordinate': %d }, "
|
1299 | 163c8a59 | Luiz Capitulino | "'io_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, " |
1300 | 163c8a59 | Luiz Capitulino | "'memory_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, " |
1301 | 163c8a59 | Luiz Capitulino | "'prefetchable_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "} }", |
1302 | c021f8e6 | Blue Swirl | dev->config[PCI_PRIMARY_BUS], dev->config[PCI_SECONDARY_BUS], |
1303 | 163c8a59 | Luiz Capitulino | dev->config[PCI_SUBORDINATE_BUS], |
1304 | 163c8a59 | Luiz Capitulino | pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO), |
1305 | 163c8a59 | Luiz Capitulino | pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO), |
1306 | 163c8a59 | Luiz Capitulino | pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY), |
1307 | 163c8a59 | Luiz Capitulino | pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY), |
1308 | 163c8a59 | Luiz Capitulino | pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY | |
1309 | 163c8a59 | Luiz Capitulino | PCI_BASE_ADDRESS_MEM_PREFETCH), |
1310 | 163c8a59 | Luiz Capitulino | pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY | |
1311 | 163c8a59 | Luiz Capitulino | PCI_BASE_ADDRESS_MEM_PREFETCH)); |
1312 | 163c8a59 | Luiz Capitulino | |
1313 | c021f8e6 | Blue Swirl | if (dev->config[PCI_SECONDARY_BUS] != 0) { |
1314 | c021f8e6 | Blue Swirl | PCIBus *child_bus = pci_find_bus(bus, dev->config[PCI_SECONDARY_BUS]); |
1315 | d5e4acf7 | Luiz Capitulino | |
1316 | c021f8e6 | Blue Swirl | if (child_bus) {
|
1317 | c021f8e6 | Blue Swirl | qdict = qobject_to_qdict(pci_bridge); |
1318 | c021f8e6 | Blue Swirl | qdict_put_obj(qdict, "devices",
|
1319 | c021f8e6 | Blue Swirl | pci_get_devices_list(child_bus, |
1320 | c021f8e6 | Blue Swirl | dev->config[PCI_SECONDARY_BUS])); |
1321 | c021f8e6 | Blue Swirl | } |
1322 | c021f8e6 | Blue Swirl | } |
1323 | 163c8a59 | Luiz Capitulino | qdict = qobject_to_qdict(obj); |
1324 | 163c8a59 | Luiz Capitulino | qdict_put_obj(qdict, "pci_bridge", pci_bridge);
|
1325 | 163c8a59 | Luiz Capitulino | } |
1326 | 163c8a59 | Luiz Capitulino | |
1327 | 163c8a59 | Luiz Capitulino | return obj;
|
1328 | 163c8a59 | Luiz Capitulino | } |
1329 | 163c8a59 | Luiz Capitulino | |
1330 | 163c8a59 | Luiz Capitulino | static QObject *pci_get_devices_list(PCIBus *bus, int bus_num) |
1331 | 384d8876 | bellard | { |
1332 | 502a5395 | pbrook | int devfn;
|
1333 | 163c8a59 | Luiz Capitulino | PCIDevice *dev; |
1334 | 163c8a59 | Luiz Capitulino | QList *dev_list; |
1335 | 3b46e624 | ths | |
1336 | 163c8a59 | Luiz Capitulino | dev_list = qlist_new(); |
1337 | 163c8a59 | Luiz Capitulino | |
1338 | 163c8a59 | Luiz Capitulino | for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { |
1339 | 163c8a59 | Luiz Capitulino | dev = bus->devices[devfn]; |
1340 | 163c8a59 | Luiz Capitulino | if (dev) {
|
1341 | d5e4acf7 | Luiz Capitulino | qlist_append_obj(dev_list, pci_get_dev_dict(dev, bus, bus_num)); |
1342 | 163c8a59 | Luiz Capitulino | } |
1343 | 1074df4f | Isaku Yamahata | } |
1344 | 163c8a59 | Luiz Capitulino | |
1345 | 163c8a59 | Luiz Capitulino | return QOBJECT(dev_list);
|
1346 | 1074df4f | Isaku Yamahata | } |
1347 | 1074df4f | Isaku Yamahata | |
1348 | 163c8a59 | Luiz Capitulino | static QObject *pci_get_bus_dict(PCIBus *bus, int bus_num) |
1349 | 1074df4f | Isaku Yamahata | { |
1350 | e822a52a | Isaku Yamahata | bus = pci_find_bus(bus, bus_num); |
1351 | 502a5395 | pbrook | if (bus) {
|
1352 | 163c8a59 | Luiz Capitulino | return qobject_from_jsonf("{ 'bus': %d, 'devices': %p }", |
1353 | 163c8a59 | Luiz Capitulino | bus_num, pci_get_devices_list(bus, bus_num)); |
1354 | f2aa58c6 | bellard | } |
1355 | 163c8a59 | Luiz Capitulino | |
1356 | 163c8a59 | Luiz Capitulino | return NULL; |
1357 | f2aa58c6 | bellard | } |
1358 | f2aa58c6 | bellard | |
1359 | 163c8a59 | Luiz Capitulino | /**
|
1360 | 163c8a59 | Luiz Capitulino | * do_pci_info(): PCI buses and devices information
|
1361 | 163c8a59 | Luiz Capitulino | *
|
1362 | 163c8a59 | Luiz Capitulino | * The returned QObject is a QList of all buses. Each bus is
|
1363 | 163c8a59 | Luiz Capitulino | * represented by a QDict, which has a key with a QList of all
|
1364 | 163c8a59 | Luiz Capitulino | * PCI devices attached to it. Each device is represented by
|
1365 | 163c8a59 | Luiz Capitulino | * a QDict.
|
1366 | 163c8a59 | Luiz Capitulino | *
|
1367 | 163c8a59 | Luiz Capitulino | * The bus QDict contains the following:
|
1368 | 163c8a59 | Luiz Capitulino | *
|
1369 | 163c8a59 | Luiz Capitulino | * - "bus": bus number
|
1370 | 163c8a59 | Luiz Capitulino | * - "devices": a QList of QDicts, each QDict represents a PCI
|
1371 | 163c8a59 | Luiz Capitulino | * device
|
1372 | 163c8a59 | Luiz Capitulino | *
|
1373 | 163c8a59 | Luiz Capitulino | * The PCI device QDict contains the following:
|
1374 | 163c8a59 | Luiz Capitulino | *
|
1375 | 163c8a59 | Luiz Capitulino | * - "bus": identical to the parent's bus number
|
1376 | 163c8a59 | Luiz Capitulino | * - "slot": slot number
|
1377 | 163c8a59 | Luiz Capitulino | * - "function": function number
|
1378 | 163c8a59 | Luiz Capitulino | * - "class_info": a QDict containing:
|
1379 | 163c8a59 | Luiz Capitulino | * - "desc": device class description (optional)
|
1380 | 163c8a59 | Luiz Capitulino | * - "class": device class number
|
1381 | 163c8a59 | Luiz Capitulino | * - "id": a QDict containing:
|
1382 | 163c8a59 | Luiz Capitulino | * - "device": device ID
|
1383 | 163c8a59 | Luiz Capitulino | * - "vendor": vendor ID
|
1384 | 163c8a59 | Luiz Capitulino | * - "irq": device's IRQ if assigned (optional)
|
1385 | 163c8a59 | Luiz Capitulino | * - "qdev_id": qdev id string
|
1386 | 163c8a59 | Luiz Capitulino | * - "pci_bridge": It's a QDict, only present if this device is a
|
1387 | 163c8a59 | Luiz Capitulino | * PCI bridge, contains:
|
1388 | 163c8a59 | Luiz Capitulino | * - "bus": bus number
|
1389 | 163c8a59 | Luiz Capitulino | * - "secondary": secondary bus number
|
1390 | 163c8a59 | Luiz Capitulino | * - "subordinate": subordinate bus number
|
1391 | 163c8a59 | Luiz Capitulino | * - "io_range": a QDict with memory range information
|
1392 | 163c8a59 | Luiz Capitulino | * - "memory_range": a QDict with memory range information
|
1393 | 163c8a59 | Luiz Capitulino | * - "prefetchable_range": a QDict with memory range information
|
1394 | d5e4acf7 | Luiz Capitulino | * - "devices": a QList of PCI devices if there's any attached (optional)
|
1395 | 163c8a59 | Luiz Capitulino | * - "regions": a QList of QDicts, each QDict represents a
|
1396 | 163c8a59 | Luiz Capitulino | * memory region of this device
|
1397 | 163c8a59 | Luiz Capitulino | *
|
1398 | 163c8a59 | Luiz Capitulino | * The memory range QDict contains the following:
|
1399 | 163c8a59 | Luiz Capitulino | *
|
1400 | 163c8a59 | Luiz Capitulino | * - "base": base memory address
|
1401 | 163c8a59 | Luiz Capitulino | * - "limit": limit value
|
1402 | 163c8a59 | Luiz Capitulino | *
|
1403 | 163c8a59 | Luiz Capitulino | * The region QDict can be an I/O region or a memory region,
|
1404 | 163c8a59 | Luiz Capitulino | * an I/O region QDict contains the following:
|
1405 | 163c8a59 | Luiz Capitulino | *
|
1406 | 163c8a59 | Luiz Capitulino | * - "type": "io"
|
1407 | 163c8a59 | Luiz Capitulino | * - "bar": BAR number
|
1408 | 163c8a59 | Luiz Capitulino | * - "address": memory address
|
1409 | 163c8a59 | Luiz Capitulino | * - "size": memory size
|
1410 | 163c8a59 | Luiz Capitulino | *
|
1411 | 163c8a59 | Luiz Capitulino | * A memory region QDict contains the following:
|
1412 | 163c8a59 | Luiz Capitulino | *
|
1413 | 163c8a59 | Luiz Capitulino | * - "type": "memory"
|
1414 | 163c8a59 | Luiz Capitulino | * - "bar": BAR number
|
1415 | 163c8a59 | Luiz Capitulino | * - "address": memory address
|
1416 | 163c8a59 | Luiz Capitulino | * - "size": memory size
|
1417 | 163c8a59 | Luiz Capitulino | * - "mem_type_64": true or false
|
1418 | 163c8a59 | Luiz Capitulino | * - "prefetch": true or false
|
1419 | 163c8a59 | Luiz Capitulino | */
|
1420 | 163c8a59 | Luiz Capitulino | void do_pci_info(Monitor *mon, QObject **ret_data)
|
1421 | f2aa58c6 | bellard | { |
1422 | 163c8a59 | Luiz Capitulino | QList *bus_list; |
1423 | e822a52a | Isaku Yamahata | struct PCIHostBus *host;
|
1424 | 163c8a59 | Luiz Capitulino | |
1425 | 163c8a59 | Luiz Capitulino | bus_list = qlist_new(); |
1426 | 163c8a59 | Luiz Capitulino | |
1427 | e822a52a | Isaku Yamahata | QLIST_FOREACH(host, &host_buses, next) { |
1428 | 163c8a59 | Luiz Capitulino | QObject *obj = pci_get_bus_dict(host->bus, 0);
|
1429 | 163c8a59 | Luiz Capitulino | if (obj) {
|
1430 | 163c8a59 | Luiz Capitulino | qlist_append_obj(bus_list, obj); |
1431 | 163c8a59 | Luiz Capitulino | } |
1432 | e822a52a | Isaku Yamahata | } |
1433 | 163c8a59 | Luiz Capitulino | |
1434 | 163c8a59 | Luiz Capitulino | *ret_data = QOBJECT(bus_list); |
1435 | 77d4bc34 | bellard | } |
1436 | a41b2ff2 | pbrook | |
1437 | cb457d76 | aliguori | static const char * const pci_nic_models[] = { |
1438 | cb457d76 | aliguori | "ne2k_pci",
|
1439 | cb457d76 | aliguori | "i82551",
|
1440 | cb457d76 | aliguori | "i82557b",
|
1441 | cb457d76 | aliguori | "i82559er",
|
1442 | cb457d76 | aliguori | "rtl8139",
|
1443 | cb457d76 | aliguori | "e1000",
|
1444 | cb457d76 | aliguori | "pcnet",
|
1445 | cb457d76 | aliguori | "virtio",
|
1446 | cb457d76 | aliguori | NULL
|
1447 | cb457d76 | aliguori | }; |
1448 | cb457d76 | aliguori | |
1449 | 9d07d757 | Paul Brook | static const char * const pci_nic_names[] = { |
1450 | 9d07d757 | Paul Brook | "ne2k_pci",
|
1451 | 9d07d757 | Paul Brook | "i82551",
|
1452 | 9d07d757 | Paul Brook | "i82557b",
|
1453 | 9d07d757 | Paul Brook | "i82559er",
|
1454 | 9d07d757 | Paul Brook | "rtl8139",
|
1455 | 9d07d757 | Paul Brook | "e1000",
|
1456 | 9d07d757 | Paul Brook | "pcnet",
|
1457 | 53c25cea | Paul Brook | "virtio-net-pci",
|
1458 | cb457d76 | aliguori | NULL
|
1459 | cb457d76 | aliguori | }; |
1460 | cb457d76 | aliguori | |
1461 | a41b2ff2 | pbrook | /* Initialize a PCI NIC. */
|
1462 | 33e66b86 | Markus Armbruster | /* FIXME callers should check for failure, but don't */
|
1463 | 5607c388 | Markus Armbruster | PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, |
1464 | 5607c388 | Markus Armbruster | const char *default_devaddr) |
1465 | a41b2ff2 | pbrook | { |
1466 | 5607c388 | Markus Armbruster | const char *devaddr = nd->devaddr ? nd->devaddr : default_devaddr; |
1467 | 07caea31 | Markus Armbruster | PCIBus *bus; |
1468 | 07caea31 | Markus Armbruster | int devfn;
|
1469 | 5607c388 | Markus Armbruster | PCIDevice *pci_dev; |
1470 | 9d07d757 | Paul Brook | DeviceState *dev; |
1471 | cb457d76 | aliguori | int i;
|
1472 | cb457d76 | aliguori | |
1473 | 07caea31 | Markus Armbruster | i = qemu_find_nic_model(nd, pci_nic_models, default_model); |
1474 | 07caea31 | Markus Armbruster | if (i < 0) |
1475 | 07caea31 | Markus Armbruster | return NULL; |
1476 | 07caea31 | Markus Armbruster | |
1477 | 07caea31 | Markus Armbruster | bus = pci_get_bus_devfn(&devfn, devaddr); |
1478 | 07caea31 | Markus Armbruster | if (!bus) {
|
1479 | 07caea31 | Markus Armbruster | qemu_error("Invalid PCI device address %s for device %s\n",
|
1480 | 07caea31 | Markus Armbruster | devaddr, pci_nic_names[i]); |
1481 | 07caea31 | Markus Armbruster | return NULL; |
1482 | 07caea31 | Markus Armbruster | } |
1483 | 07caea31 | Markus Armbruster | |
1484 | 499cf102 | Markus Armbruster | pci_dev = pci_create(bus, devfn, pci_nic_names[i]); |
1485 | 9ee05825 | Markus Armbruster | dev = &pci_dev->qdev; |
1486 | dea7b3b9 | Mark McLoughlin | if (nd->name)
|
1487 | dea7b3b9 | Mark McLoughlin | dev->id = qemu_strdup(nd->name); |
1488 | 1cc33683 | Gerd Hoffmann | qdev_set_nic_properties(dev, nd); |
1489 | 07caea31 | Markus Armbruster | if (qdev_init(dev) < 0) |
1490 | 07caea31 | Markus Armbruster | return NULL; |
1491 | 9ee05825 | Markus Armbruster | return pci_dev;
|
1492 | a41b2ff2 | pbrook | } |
1493 | a41b2ff2 | pbrook | |
1494 | 07caea31 | Markus Armbruster | PCIDevice *pci_nic_init_nofail(NICInfo *nd, const char *default_model, |
1495 | 07caea31 | Markus Armbruster | const char *default_devaddr) |
1496 | 07caea31 | Markus Armbruster | { |
1497 | 07caea31 | Markus Armbruster | PCIDevice *res; |
1498 | 07caea31 | Markus Armbruster | |
1499 | 07caea31 | Markus Armbruster | if (qemu_show_nic_models(nd->model, pci_nic_models))
|
1500 | 07caea31 | Markus Armbruster | exit(0);
|
1501 | 07caea31 | Markus Armbruster | |
1502 | 07caea31 | Markus Armbruster | res = pci_nic_init(nd, default_model, default_devaddr); |
1503 | 07caea31 | Markus Armbruster | if (!res)
|
1504 | 07caea31 | Markus Armbruster | exit(1);
|
1505 | 07caea31 | Markus Armbruster | return res;
|
1506 | 07caea31 | Markus Armbruster | } |
1507 | 07caea31 | Markus Armbruster | |
1508 | 80b3ada7 | pbrook | typedef struct { |
1509 | 80b3ada7 | pbrook | PCIDevice dev; |
1510 | 03587182 | Gerd Hoffmann | PCIBus bus; |
1511 | 03587182 | Gerd Hoffmann | uint32_t vid; |
1512 | 03587182 | Gerd Hoffmann | uint32_t did; |
1513 | 80b3ada7 | pbrook | } PCIBridge; |
1514 | 80b3ada7 | pbrook | |
1515 | a0c7a97e | Isaku Yamahata | |
1516 | a0c7a97e | Isaku Yamahata | static void pci_bridge_update_mappings_fn(PCIBus *b, PCIDevice *d) |
1517 | a0c7a97e | Isaku Yamahata | { |
1518 | a0c7a97e | Isaku Yamahata | pci_update_mappings(d); |
1519 | a0c7a97e | Isaku Yamahata | } |
1520 | a0c7a97e | Isaku Yamahata | |
1521 | a0c7a97e | Isaku Yamahata | static void pci_bridge_update_mappings(PCIBus *b) |
1522 | a0c7a97e | Isaku Yamahata | { |
1523 | a0c7a97e | Isaku Yamahata | PCIBus *child; |
1524 | a0c7a97e | Isaku Yamahata | |
1525 | a0c7a97e | Isaku Yamahata | pci_for_each_device_under_bus(b, pci_bridge_update_mappings_fn); |
1526 | a0c7a97e | Isaku Yamahata | |
1527 | a0c7a97e | Isaku Yamahata | QLIST_FOREACH(child, &b->child, sibling) { |
1528 | a0c7a97e | Isaku Yamahata | pci_bridge_update_mappings(child); |
1529 | a0c7a97e | Isaku Yamahata | } |
1530 | a0c7a97e | Isaku Yamahata | } |
1531 | a0c7a97e | Isaku Yamahata | |
1532 | 9596ebb7 | pbrook | static void pci_bridge_write_config(PCIDevice *d, |
1533 | 80b3ada7 | pbrook | uint32_t address, uint32_t val, int len)
|
1534 | 80b3ada7 | pbrook | { |
1535 | 80b3ada7 | pbrook | pci_default_write_config(d, address, val, len); |
1536 | a0c7a97e | Isaku Yamahata | |
1537 | a0c7a97e | Isaku Yamahata | if (/* io base/limit */ |
1538 | a0c7a97e | Isaku Yamahata | ranges_overlap(address, len, PCI_IO_BASE, 2) ||
|
1539 | a0c7a97e | Isaku Yamahata | |
1540 | a0c7a97e | Isaku Yamahata | /* memory base/limit, prefetchable base/limit and
|
1541 | a0c7a97e | Isaku Yamahata | io base/limit upper 16 */
|
1542 | a0c7a97e | Isaku Yamahata | ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) {
|
1543 | a0c7a97e | Isaku Yamahata | pci_bridge_update_mappings(d->bus); |
1544 | a0c7a97e | Isaku Yamahata | } |
1545 | 80b3ada7 | pbrook | } |
1546 | 80b3ada7 | pbrook | |
1547 | e822a52a | Isaku Yamahata | PCIBus *pci_find_bus(PCIBus *bus, int bus_num)
|
1548 | 3ae80618 | aliguori | { |
1549 | c021f8e6 | Blue Swirl | PCIBus *sec, *ret; |
1550 | 3ae80618 | aliguori | |
1551 | e822a52a | Isaku Yamahata | if (!bus)
|
1552 | e822a52a | Isaku Yamahata | return NULL; |
1553 | 3ae80618 | aliguori | |
1554 | e822a52a | Isaku Yamahata | if (pci_bus_num(bus) == bus_num) {
|
1555 | e822a52a | Isaku Yamahata | return bus;
|
1556 | e822a52a | Isaku Yamahata | } |
1557 | e822a52a | Isaku Yamahata | |
1558 | e822a52a | Isaku Yamahata | /* try child bus */
|
1559 | e822a52a | Isaku Yamahata | QLIST_FOREACH(sec, &bus->child, sibling) { |
1560 | 070297d2 | Isaku Yamahata | if (!bus->parent_dev /* pci host bridge */ |
1561 | c021f8e6 | Blue Swirl | || (pci_bus_num(sec) >= bus_num && |
1562 | c021f8e6 | Blue Swirl | bus_num <= bus->parent_dev->config[PCI_SUBORDINATE_BUS]) ) { |
1563 | c021f8e6 | Blue Swirl | ret = pci_find_bus(sec, bus_num); |
1564 | c021f8e6 | Blue Swirl | if (ret) {
|
1565 | c021f8e6 | Blue Swirl | return ret;
|
1566 | c021f8e6 | Blue Swirl | } |
1567 | e822a52a | Isaku Yamahata | } |
1568 | e822a52a | Isaku Yamahata | } |
1569 | e822a52a | Isaku Yamahata | |
1570 | e822a52a | Isaku Yamahata | return NULL; |
1571 | 3ae80618 | aliguori | } |
1572 | 3ae80618 | aliguori | |
1573 | e822a52a | Isaku Yamahata | PCIDevice *pci_find_device(PCIBus *bus, int bus_num, int slot, int function) |
1574 | 3ae80618 | aliguori | { |
1575 | e822a52a | Isaku Yamahata | bus = pci_find_bus(bus, bus_num); |
1576 | 3ae80618 | aliguori | |
1577 | 3ae80618 | aliguori | if (!bus)
|
1578 | 3ae80618 | aliguori | return NULL; |
1579 | 3ae80618 | aliguori | |
1580 | 3ae80618 | aliguori | return bus->devices[PCI_DEVFN(slot, function)];
|
1581 | 3ae80618 | aliguori | } |
1582 | 3ae80618 | aliguori | |
1583 | 03587182 | Gerd Hoffmann | static int pci_bridge_initfn(PCIDevice *dev) |
1584 | 80b3ada7 | pbrook | { |
1585 | 03587182 | Gerd Hoffmann | PCIBridge *s = DO_UPCAST(PCIBridge, dev, dev); |
1586 | 480b9f24 | blueswir1 | |
1587 | 03587182 | Gerd Hoffmann | pci_config_set_vendor_id(s->dev.config, s->vid); |
1588 | 03587182 | Gerd Hoffmann | pci_config_set_device_id(s->dev.config, s->did); |
1589 | 480b9f24 | blueswir1 | |
1590 | 74c01823 | Isaku Yamahata | pci_set_word(dev->config + PCI_STATUS, |
1591 | 74c01823 | Isaku Yamahata | PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); |
1592 | 74c01823 | Isaku Yamahata | pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_PCI); |
1593 | d6318738 | Michael S. Tsirkin | dev->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_BRIDGE; |
1594 | 74c01823 | Isaku Yamahata | pci_set_word(dev->config + PCI_SEC_STATUS, |
1595 | 74c01823 | Isaku Yamahata | PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); |
1596 | 03587182 | Gerd Hoffmann | return 0; |
1597 | 03587182 | Gerd Hoffmann | } |
1598 | 80b3ada7 | pbrook | |
1599 | e822a52a | Isaku Yamahata | static int pci_bridge_exitfn(PCIDevice *pci_dev) |
1600 | e822a52a | Isaku Yamahata | { |
1601 | e822a52a | Isaku Yamahata | PCIBridge *s = DO_UPCAST(PCIBridge, dev, pci_dev); |
1602 | e822a52a | Isaku Yamahata | PCIBus *bus = &s->bus; |
1603 | e822a52a | Isaku Yamahata | pci_unregister_secondary_bus(bus); |
1604 | e822a52a | Isaku Yamahata | return 0; |
1605 | e822a52a | Isaku Yamahata | } |
1606 | e822a52a | Isaku Yamahata | |
1607 | 03587182 | Gerd Hoffmann | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
|
1608 | 03587182 | Gerd Hoffmann | pci_map_irq_fn map_irq, const char *name) |
1609 | 03587182 | Gerd Hoffmann | { |
1610 | 03587182 | Gerd Hoffmann | PCIDevice *dev; |
1611 | 03587182 | Gerd Hoffmann | PCIBridge *s; |
1612 | 03587182 | Gerd Hoffmann | |
1613 | 499cf102 | Markus Armbruster | dev = pci_create(bus, devfn, "pci-bridge");
|
1614 | 03587182 | Gerd Hoffmann | qdev_prop_set_uint32(&dev->qdev, "vendorid", vid);
|
1615 | 03587182 | Gerd Hoffmann | qdev_prop_set_uint32(&dev->qdev, "deviceid", did);
|
1616 | e23a1b33 | Markus Armbruster | qdev_init_nofail(&dev->qdev); |
1617 | 03587182 | Gerd Hoffmann | |
1618 | 03587182 | Gerd Hoffmann | s = DO_UPCAST(PCIBridge, dev, dev); |
1619 | e822a52a | Isaku Yamahata | pci_register_secondary_bus(bus, &s->bus, &s->dev, map_irq, name); |
1620 | 03587182 | Gerd Hoffmann | return &s->bus;
|
1621 | 80b3ada7 | pbrook | } |
1622 | 6b1b92d3 | Paul Brook | |
1623 | d6318738 | Michael S. Tsirkin | PCIDevice *pci_bridge_get_device(PCIBus *bus) |
1624 | d6318738 | Michael S. Tsirkin | { |
1625 | d6318738 | Michael S. Tsirkin | return bus->parent_dev;
|
1626 | d6318738 | Michael S. Tsirkin | } |
1627 | d6318738 | Michael S. Tsirkin | |
1628 | 81a322d4 | Gerd Hoffmann | static int pci_qdev_init(DeviceState *qdev, DeviceInfo *base) |
1629 | 6b1b92d3 | Paul Brook | { |
1630 | 6b1b92d3 | Paul Brook | PCIDevice *pci_dev = (PCIDevice *)qdev; |
1631 | 02e2da45 | Paul Brook | PCIDeviceInfo *info = container_of(base, PCIDeviceInfo, qdev); |
1632 | 6b1b92d3 | Paul Brook | PCIBus *bus; |
1633 | ee995ffb | Gerd Hoffmann | int devfn, rc;
|
1634 | 6b1b92d3 | Paul Brook | |
1635 | a9f49946 | Isaku Yamahata | /* initialize cap_present for pci_is_express() and pci_config_size() */
|
1636 | a9f49946 | Isaku Yamahata | if (info->is_express) {
|
1637 | a9f49946 | Isaku Yamahata | pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; |
1638 | a9f49946 | Isaku Yamahata | } |
1639 | a9f49946 | Isaku Yamahata | |
1640 | 02e2da45 | Paul Brook | bus = FROM_QBUS(PCIBus, qdev_get_parent_bus(qdev)); |
1641 | ee6847d1 | Gerd Hoffmann | devfn = pci_dev->devfn; |
1642 | 16eaedf2 | Gerd Hoffmann | pci_dev = do_pci_register_device(pci_dev, bus, base->name, devfn, |
1643 | fb231628 | Isaku Yamahata | info->config_read, info->config_write, |
1644 | fb231628 | Isaku Yamahata | info->header_type); |
1645 | 09e3acc6 | Gerd Hoffmann | if (pci_dev == NULL) |
1646 | 09e3acc6 | Gerd Hoffmann | return -1; |
1647 | ee995ffb | Gerd Hoffmann | rc = info->init(pci_dev); |
1648 | ee995ffb | Gerd Hoffmann | if (rc != 0) |
1649 | ee995ffb | Gerd Hoffmann | return rc;
|
1650 | 8c52c8f3 | Gerd Hoffmann | |
1651 | 8c52c8f3 | Gerd Hoffmann | /* rom loading */
|
1652 | 8c52c8f3 | Gerd Hoffmann | if (pci_dev->romfile == NULL && info->romfile != NULL) |
1653 | 8c52c8f3 | Gerd Hoffmann | pci_dev->romfile = qemu_strdup(info->romfile); |
1654 | 8c52c8f3 | Gerd Hoffmann | pci_add_option_rom(pci_dev); |
1655 | 8c52c8f3 | Gerd Hoffmann | |
1656 | ee995ffb | Gerd Hoffmann | if (qdev->hotplugged)
|
1657 | ee995ffb | Gerd Hoffmann | bus->hotplug(pci_dev, 1);
|
1658 | ee995ffb | Gerd Hoffmann | return 0; |
1659 | ee995ffb | Gerd Hoffmann | } |
1660 | ee995ffb | Gerd Hoffmann | |
1661 | ee995ffb | Gerd Hoffmann | static int pci_unplug_device(DeviceState *qdev) |
1662 | ee995ffb | Gerd Hoffmann | { |
1663 | ee995ffb | Gerd Hoffmann | PCIDevice *dev = DO_UPCAST(PCIDevice, qdev, qdev); |
1664 | ee995ffb | Gerd Hoffmann | |
1665 | ee995ffb | Gerd Hoffmann | dev->bus->hotplug(dev, 0);
|
1666 | ee995ffb | Gerd Hoffmann | return 0; |
1667 | 6b1b92d3 | Paul Brook | } |
1668 | 6b1b92d3 | Paul Brook | |
1669 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register(PCIDeviceInfo *info)
|
1670 | 6b1b92d3 | Paul Brook | { |
1671 | 02e2da45 | Paul Brook | info->qdev.init = pci_qdev_init; |
1672 | ee995ffb | Gerd Hoffmann | info->qdev.unplug = pci_unplug_device; |
1673 | a36a344d | Gerd Hoffmann | info->qdev.exit = pci_unregister_device; |
1674 | 10c4c98a | Gerd Hoffmann | info->qdev.bus_info = &pci_bus_info; |
1675 | 074f2fff | Gerd Hoffmann | qdev_register(&info->qdev); |
1676 | 6b1b92d3 | Paul Brook | } |
1677 | 6b1b92d3 | Paul Brook | |
1678 | 0aab0d3a | Gerd Hoffmann | void pci_qdev_register_many(PCIDeviceInfo *info)
|
1679 | 0aab0d3a | Gerd Hoffmann | { |
1680 | 0aab0d3a | Gerd Hoffmann | while (info->qdev.name) {
|
1681 | 0aab0d3a | Gerd Hoffmann | pci_qdev_register(info); |
1682 | 0aab0d3a | Gerd Hoffmann | info++; |
1683 | 0aab0d3a | Gerd Hoffmann | } |
1684 | 0aab0d3a | Gerd Hoffmann | } |
1685 | 0aab0d3a | Gerd Hoffmann | |
1686 | 499cf102 | Markus Armbruster | PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name) |
1687 | 6b1b92d3 | Paul Brook | { |
1688 | 6b1b92d3 | Paul Brook | DeviceState *dev; |
1689 | 6b1b92d3 | Paul Brook | |
1690 | 02e2da45 | Paul Brook | dev = qdev_create(&bus->qbus, name); |
1691 | a6307b08 | Gerd Hoffmann | qdev_prop_set_uint32(dev, "addr", devfn);
|
1692 | 71077c1c | Gerd Hoffmann | return DO_UPCAST(PCIDevice, qdev, dev);
|
1693 | 71077c1c | Gerd Hoffmann | } |
1694 | 6b1b92d3 | Paul Brook | |
1695 | 71077c1c | Gerd Hoffmann | PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name) |
1696 | 71077c1c | Gerd Hoffmann | { |
1697 | 499cf102 | Markus Armbruster | PCIDevice *dev = pci_create(bus, devfn, name); |
1698 | e23a1b33 | Markus Armbruster | qdev_init_nofail(&dev->qdev); |
1699 | 71077c1c | Gerd Hoffmann | return dev;
|
1700 | 6b1b92d3 | Paul Brook | } |
1701 | 6f4cbd39 | Michael S. Tsirkin | |
1702 | 6f4cbd39 | Michael S. Tsirkin | static int pci_find_space(PCIDevice *pdev, uint8_t size) |
1703 | 6f4cbd39 | Michael S. Tsirkin | { |
1704 | a9f49946 | Isaku Yamahata | int config_size = pci_config_size(pdev);
|
1705 | 6f4cbd39 | Michael S. Tsirkin | int offset = PCI_CONFIG_HEADER_SIZE;
|
1706 | 6f4cbd39 | Michael S. Tsirkin | int i;
|
1707 | a9f49946 | Isaku Yamahata | for (i = PCI_CONFIG_HEADER_SIZE; i < config_size; ++i)
|
1708 | 6f4cbd39 | Michael S. Tsirkin | if (pdev->used[i])
|
1709 | 6f4cbd39 | Michael S. Tsirkin | offset = i + 1;
|
1710 | 6f4cbd39 | Michael S. Tsirkin | else if (i - offset + 1 == size) |
1711 | 6f4cbd39 | Michael S. Tsirkin | return offset;
|
1712 | 6f4cbd39 | Michael S. Tsirkin | return 0; |
1713 | 6f4cbd39 | Michael S. Tsirkin | } |
1714 | 6f4cbd39 | Michael S. Tsirkin | |
1715 | 6f4cbd39 | Michael S. Tsirkin | static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
|
1716 | 6f4cbd39 | Michael S. Tsirkin | uint8_t *prev_p) |
1717 | 6f4cbd39 | Michael S. Tsirkin | { |
1718 | 6f4cbd39 | Michael S. Tsirkin | uint8_t next, prev; |
1719 | 6f4cbd39 | Michael S. Tsirkin | |
1720 | 6f4cbd39 | Michael S. Tsirkin | if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
|
1721 | 6f4cbd39 | Michael S. Tsirkin | return 0; |
1722 | 6f4cbd39 | Michael S. Tsirkin | |
1723 | 6f4cbd39 | Michael S. Tsirkin | for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
|
1724 | 6f4cbd39 | Michael S. Tsirkin | prev = next + PCI_CAP_LIST_NEXT) |
1725 | 6f4cbd39 | Michael S. Tsirkin | if (pdev->config[next + PCI_CAP_LIST_ID] == cap_id)
|
1726 | 6f4cbd39 | Michael S. Tsirkin | break;
|
1727 | 6f4cbd39 | Michael S. Tsirkin | |
1728 | 6f4cbd39 | Michael S. Tsirkin | if (prev_p)
|
1729 | 6f4cbd39 | Michael S. Tsirkin | *prev_p = prev; |
1730 | 6f4cbd39 | Michael S. Tsirkin | return next;
|
1731 | 6f4cbd39 | Michael S. Tsirkin | } |
1732 | 6f4cbd39 | Michael S. Tsirkin | |
1733 | c2039bd0 | Anthony Liguori | static void pci_map_option_rom(PCIDevice *pdev, int region_num, pcibus_t addr, pcibus_t size, int type) |
1734 | c2039bd0 | Anthony Liguori | { |
1735 | c2039bd0 | Anthony Liguori | cpu_register_physical_memory(addr, size, pdev->rom_offset); |
1736 | c2039bd0 | Anthony Liguori | } |
1737 | c2039bd0 | Anthony Liguori | |
1738 | c2039bd0 | Anthony Liguori | /* Add an option rom for the device */
|
1739 | 8c52c8f3 | Gerd Hoffmann | static int pci_add_option_rom(PCIDevice *pdev) |
1740 | c2039bd0 | Anthony Liguori | { |
1741 | c2039bd0 | Anthony Liguori | int size;
|
1742 | c2039bd0 | Anthony Liguori | char *path;
|
1743 | c2039bd0 | Anthony Liguori | void *ptr;
|
1744 | c2039bd0 | Anthony Liguori | |
1745 | 8c52c8f3 | Gerd Hoffmann | if (!pdev->romfile)
|
1746 | 8c52c8f3 | Gerd Hoffmann | return 0; |
1747 | 8c52c8f3 | Gerd Hoffmann | if (strlen(pdev->romfile) == 0) |
1748 | 8c52c8f3 | Gerd Hoffmann | return 0; |
1749 | 8c52c8f3 | Gerd Hoffmann | |
1750 | 88169ddf | Gerd Hoffmann | if (!pdev->rom_bar) {
|
1751 | 88169ddf | Gerd Hoffmann | /*
|
1752 | 88169ddf | Gerd Hoffmann | * Load rom via fw_cfg instead of creating a rom bar,
|
1753 | 88169ddf | Gerd Hoffmann | * for 0.11 compatibility.
|
1754 | 88169ddf | Gerd Hoffmann | */
|
1755 | 88169ddf | Gerd Hoffmann | int class = pci_get_word(pdev->config + PCI_CLASS_DEVICE);
|
1756 | 88169ddf | Gerd Hoffmann | if (class == 0x0300) { |
1757 | 88169ddf | Gerd Hoffmann | rom_add_vga(pdev->romfile); |
1758 | 88169ddf | Gerd Hoffmann | } else {
|
1759 | 88169ddf | Gerd Hoffmann | rom_add_option(pdev->romfile); |
1760 | 88169ddf | Gerd Hoffmann | } |
1761 | 88169ddf | Gerd Hoffmann | return 0; |
1762 | 88169ddf | Gerd Hoffmann | } |
1763 | 88169ddf | Gerd Hoffmann | |
1764 | 8c52c8f3 | Gerd Hoffmann | path = qemu_find_file(QEMU_FILE_TYPE_BIOS, pdev->romfile); |
1765 | c2039bd0 | Anthony Liguori | if (path == NULL) { |
1766 | 8c52c8f3 | Gerd Hoffmann | path = qemu_strdup(pdev->romfile); |
1767 | c2039bd0 | Anthony Liguori | } |
1768 | c2039bd0 | Anthony Liguori | |
1769 | c2039bd0 | Anthony Liguori | size = get_image_size(path); |
1770 | 8c52c8f3 | Gerd Hoffmann | if (size < 0) { |
1771 | 8c52c8f3 | Gerd Hoffmann | qemu_error("%s: failed to find romfile \"%s\"\n", __FUNCTION__,
|
1772 | 8c52c8f3 | Gerd Hoffmann | pdev->romfile); |
1773 | 8c52c8f3 | Gerd Hoffmann | return -1; |
1774 | 8c52c8f3 | Gerd Hoffmann | } |
1775 | c2039bd0 | Anthony Liguori | if (size & (size - 1)) { |
1776 | c2039bd0 | Anthony Liguori | size = 1 << qemu_fls(size);
|
1777 | c2039bd0 | Anthony Liguori | } |
1778 | c2039bd0 | Anthony Liguori | |
1779 | c2039bd0 | Anthony Liguori | pdev->rom_offset = qemu_ram_alloc(size); |
1780 | c2039bd0 | Anthony Liguori | |
1781 | c2039bd0 | Anthony Liguori | ptr = qemu_get_ram_ptr(pdev->rom_offset); |
1782 | c2039bd0 | Anthony Liguori | load_image(path, ptr); |
1783 | c2039bd0 | Anthony Liguori | qemu_free(path); |
1784 | c2039bd0 | Anthony Liguori | |
1785 | c2039bd0 | Anthony Liguori | pci_register_bar(pdev, PCI_ROM_SLOT, size, |
1786 | c2039bd0 | Anthony Liguori | 0, pci_map_option_rom);
|
1787 | c2039bd0 | Anthony Liguori | |
1788 | c2039bd0 | Anthony Liguori | return 0; |
1789 | c2039bd0 | Anthony Liguori | } |
1790 | c2039bd0 | Anthony Liguori | |
1791 | 6f4cbd39 | Michael S. Tsirkin | /* Reserve space and add capability to the linked list in pci config space */
|
1792 | 6f4cbd39 | Michael S. Tsirkin | int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
|
1793 | 6f4cbd39 | Michael S. Tsirkin | { |
1794 | 6f4cbd39 | Michael S. Tsirkin | uint8_t offset = pci_find_space(pdev, size); |
1795 | 6f4cbd39 | Michael S. Tsirkin | uint8_t *config = pdev->config + offset; |
1796 | 6f4cbd39 | Michael S. Tsirkin | if (!offset)
|
1797 | 6f4cbd39 | Michael S. Tsirkin | return -ENOSPC;
|
1798 | 6f4cbd39 | Michael S. Tsirkin | config[PCI_CAP_LIST_ID] = cap_id; |
1799 | 6f4cbd39 | Michael S. Tsirkin | config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST]; |
1800 | 6f4cbd39 | Michael S. Tsirkin | pdev->config[PCI_CAPABILITY_LIST] = offset; |
1801 | 6f4cbd39 | Michael S. Tsirkin | pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST; |
1802 | 6f4cbd39 | Michael S. Tsirkin | memset(pdev->used + offset, 0xFF, size);
|
1803 | 6f4cbd39 | Michael S. Tsirkin | /* Make capability read-only by default */
|
1804 | 6f4cbd39 | Michael S. Tsirkin | memset(pdev->wmask + offset, 0, size);
|
1805 | bd4b65ee | Michael S. Tsirkin | /* Check capability by default */
|
1806 | bd4b65ee | Michael S. Tsirkin | memset(pdev->cmask + offset, 0xFF, size);
|
1807 | 6f4cbd39 | Michael S. Tsirkin | return offset;
|
1808 | 6f4cbd39 | Michael S. Tsirkin | } |
1809 | 6f4cbd39 | Michael S. Tsirkin | |
1810 | 6f4cbd39 | Michael S. Tsirkin | /* Unlink capability from the pci config space. */
|
1811 | 6f4cbd39 | Michael S. Tsirkin | void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
|
1812 | 6f4cbd39 | Michael S. Tsirkin | { |
1813 | 6f4cbd39 | Michael S. Tsirkin | uint8_t prev, offset = pci_find_capability_list(pdev, cap_id, &prev); |
1814 | 6f4cbd39 | Michael S. Tsirkin | if (!offset)
|
1815 | 6f4cbd39 | Michael S. Tsirkin | return;
|
1816 | 6f4cbd39 | Michael S. Tsirkin | pdev->config[prev] = pdev->config[offset + PCI_CAP_LIST_NEXT]; |
1817 | 6f4cbd39 | Michael S. Tsirkin | /* Make capability writeable again */
|
1818 | 6f4cbd39 | Michael S. Tsirkin | memset(pdev->wmask + offset, 0xff, size);
|
1819 | bd4b65ee | Michael S. Tsirkin | /* Clear cmask as device-specific registers can't be checked */
|
1820 | bd4b65ee | Michael S. Tsirkin | memset(pdev->cmask + offset, 0, size);
|
1821 | 6f4cbd39 | Michael S. Tsirkin | memset(pdev->used + offset, 0, size);
|
1822 | 6f4cbd39 | Michael S. Tsirkin | |
1823 | 6f4cbd39 | Michael S. Tsirkin | if (!pdev->config[PCI_CAPABILITY_LIST])
|
1824 | 6f4cbd39 | Michael S. Tsirkin | pdev->config[PCI_STATUS] &= ~PCI_STATUS_CAP_LIST; |
1825 | 6f4cbd39 | Michael S. Tsirkin | } |
1826 | 6f4cbd39 | Michael S. Tsirkin | |
1827 | 6f4cbd39 | Michael S. Tsirkin | /* Reserve space for capability at a known offset (to call after load). */
|
1828 | 6f4cbd39 | Michael S. Tsirkin | void pci_reserve_capability(PCIDevice *pdev, uint8_t offset, uint8_t size)
|
1829 | 6f4cbd39 | Michael S. Tsirkin | { |
1830 | 6f4cbd39 | Michael S. Tsirkin | memset(pdev->used + offset, 0xff, size);
|
1831 | 6f4cbd39 | Michael S. Tsirkin | } |
1832 | 6f4cbd39 | Michael S. Tsirkin | |
1833 | 6f4cbd39 | Michael S. Tsirkin | uint8_t pci_find_capability(PCIDevice *pdev, uint8_t cap_id) |
1834 | 6f4cbd39 | Michael S. Tsirkin | { |
1835 | 6f4cbd39 | Michael S. Tsirkin | return pci_find_capability_list(pdev, cap_id, NULL); |
1836 | 6f4cbd39 | Michael S. Tsirkin | } |
1837 | 10c4c98a | Gerd Hoffmann | |
1838 | 10c4c98a | Gerd Hoffmann | static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent) |
1839 | 10c4c98a | Gerd Hoffmann | { |
1840 | 10c4c98a | Gerd Hoffmann | PCIDevice *d = (PCIDevice *)dev; |
1841 | 10c4c98a | Gerd Hoffmann | const pci_class_desc *desc;
|
1842 | 10c4c98a | Gerd Hoffmann | char ctxt[64]; |
1843 | 10c4c98a | Gerd Hoffmann | PCIIORegion *r; |
1844 | 10c4c98a | Gerd Hoffmann | int i, class;
|
1845 | 10c4c98a | Gerd Hoffmann | |
1846 | b0ff8eb2 | Isaku Yamahata | class = pci_get_word(d->config + PCI_CLASS_DEVICE); |
1847 | 10c4c98a | Gerd Hoffmann | desc = pci_class_descriptions; |
1848 | 10c4c98a | Gerd Hoffmann | while (desc->desc && class != desc->class)
|
1849 | 10c4c98a | Gerd Hoffmann | desc++; |
1850 | 10c4c98a | Gerd Hoffmann | if (desc->desc) {
|
1851 | 10c4c98a | Gerd Hoffmann | snprintf(ctxt, sizeof(ctxt), "%s", desc->desc); |
1852 | 10c4c98a | Gerd Hoffmann | } else {
|
1853 | 10c4c98a | Gerd Hoffmann | snprintf(ctxt, sizeof(ctxt), "Class %04x", class); |
1854 | 10c4c98a | Gerd Hoffmann | } |
1855 | 10c4c98a | Gerd Hoffmann | |
1856 | 10c4c98a | Gerd Hoffmann | monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, "
|
1857 | 10c4c98a | Gerd Hoffmann | "pci id %04x:%04x (sub %04x:%04x)\n",
|
1858 | 10c4c98a | Gerd Hoffmann | indent, "", ctxt,
|
1859 | e822a52a | Isaku Yamahata | d->config[PCI_SECONDARY_BUS], |
1860 | e822a52a | Isaku Yamahata | PCI_SLOT(d->devfn), PCI_FUNC(d->devfn), |
1861 | b0ff8eb2 | Isaku Yamahata | pci_get_word(d->config + PCI_VENDOR_ID), |
1862 | b0ff8eb2 | Isaku Yamahata | pci_get_word(d->config + PCI_DEVICE_ID), |
1863 | b0ff8eb2 | Isaku Yamahata | pci_get_word(d->config + PCI_SUBSYSTEM_VENDOR_ID), |
1864 | b0ff8eb2 | Isaku Yamahata | pci_get_word(d->config + PCI_SUBSYSTEM_ID)); |
1865 | 10c4c98a | Gerd Hoffmann | for (i = 0; i < PCI_NUM_REGIONS; i++) { |
1866 | 10c4c98a | Gerd Hoffmann | r = &d->io_regions[i]; |
1867 | 10c4c98a | Gerd Hoffmann | if (!r->size)
|
1868 | 10c4c98a | Gerd Hoffmann | continue;
|
1869 | 89e8b13c | Isaku Yamahata | monitor_printf(mon, "%*sbar %d: %s at 0x%"FMT_PCIBUS
|
1870 | 89e8b13c | Isaku Yamahata | " [0x%"FMT_PCIBUS"]\n", |
1871 | 89e8b13c | Isaku Yamahata | indent, "",
|
1872 | 0392a017 | Isaku Yamahata | i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem", |
1873 | 10c4c98a | Gerd Hoffmann | r->addr, r->addr + r->size - 1);
|
1874 | 10c4c98a | Gerd Hoffmann | } |
1875 | 10c4c98a | Gerd Hoffmann | } |
1876 | 03587182 | Gerd Hoffmann | |
1877 | 03587182 | Gerd Hoffmann | static PCIDeviceInfo bridge_info = {
|
1878 | 03587182 | Gerd Hoffmann | .qdev.name = "pci-bridge",
|
1879 | 03587182 | Gerd Hoffmann | .qdev.size = sizeof(PCIBridge),
|
1880 | 03587182 | Gerd Hoffmann | .init = pci_bridge_initfn, |
1881 | e822a52a | Isaku Yamahata | .exit = pci_bridge_exitfn, |
1882 | 03587182 | Gerd Hoffmann | .config_write = pci_bridge_write_config, |
1883 | 776e1bbb | Blue Swirl | .header_type = PCI_HEADER_TYPE_BRIDGE, |
1884 | 03587182 | Gerd Hoffmann | .qdev.props = (Property[]) { |
1885 | 03587182 | Gerd Hoffmann | DEFINE_PROP_HEX32("vendorid", PCIBridge, vid, 0), |
1886 | 03587182 | Gerd Hoffmann | DEFINE_PROP_HEX32("deviceid", PCIBridge, did, 0), |
1887 | 03587182 | Gerd Hoffmann | DEFINE_PROP_END_OF_LIST(), |
1888 | 03587182 | Gerd Hoffmann | } |
1889 | 03587182 | Gerd Hoffmann | }; |
1890 | 03587182 | Gerd Hoffmann | |
1891 | 03587182 | Gerd Hoffmann | static void pci_register_devices(void) |
1892 | 03587182 | Gerd Hoffmann | { |
1893 | 03587182 | Gerd Hoffmann | pci_qdev_register(&bridge_info); |
1894 | 03587182 | Gerd Hoffmann | } |
1895 | 03587182 | Gerd Hoffmann | |
1896 | 03587182 | Gerd Hoffmann | device_init(pci_register_devices) |