root / hppa-dis.c @ 44e4c0ba
History | View | Annotate | Download (100.1 kB)
1 | f54b3f92 | aurel32 | /* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
|
---|---|---|---|
2 | f54b3f92 | aurel32 | Copyright 1989, 1990, 1992, 1993, 1994, 1995, 1998, 1999, 2000, 2001, 2003,
|
3 | f54b3f92 | aurel32 | 2005 Free Software Foundation, Inc.
|
4 | f54b3f92 | aurel32 | |
5 | f54b3f92 | aurel32 | Contributed by the Center for Software Science at the
|
6 | f54b3f92 | aurel32 | University of Utah (pa-gdb-bugs@cs.utah.edu).
|
7 | f54b3f92 | aurel32 | |
8 | f54b3f92 | aurel32 | This program is free software; you can redistribute it and/or modify
|
9 | f54b3f92 | aurel32 | it under the terms of the GNU General Public License as published by
|
10 | f54b3f92 | aurel32 | the Free Software Foundation; either version 2 of the License, or
|
11 | f54b3f92 | aurel32 | (at your option) any later version.
|
12 | f54b3f92 | aurel32 | |
13 | f54b3f92 | aurel32 | This program is distributed in the hope that it will be useful,
|
14 | f54b3f92 | aurel32 | but WITHOUT ANY WARRANTY; without even the implied warranty of
|
15 | f54b3f92 | aurel32 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
16 | f54b3f92 | aurel32 | GNU General Public License for more details.
|
17 | f54b3f92 | aurel32 | |
18 | f54b3f92 | aurel32 | You should have received a copy of the GNU General Public License
|
19 | 8167ee88 | Blue Swirl | along with this program; if not, see <http://www.gnu.org/licenses/>. */
|
20 | f54b3f92 | aurel32 | |
21 | f54b3f92 | aurel32 | #include "dis-asm.h" |
22 | f54b3f92 | aurel32 | |
23 | f54b3f92 | aurel32 | /* HP PA-RISC SOM object file format: definitions internal to BFD.
|
24 | f54b3f92 | aurel32 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
|
25 | f54b3f92 | aurel32 | 2003 Free Software Foundation, Inc.
|
26 | f54b3f92 | aurel32 | |
27 | f54b3f92 | aurel32 | Contributed by the Center for Software Science at the
|
28 | f54b3f92 | aurel32 | University of Utah (pa-gdb-bugs@cs.utah.edu).
|
29 | f54b3f92 | aurel32 | |
30 | f54b3f92 | aurel32 | This file is part of BFD, the Binary File Descriptor library.
|
31 | f54b3f92 | aurel32 | |
32 | f54b3f92 | aurel32 | This program is free software; you can redistribute it and/or modify
|
33 | f54b3f92 | aurel32 | it under the terms of the GNU General Public License as published by
|
34 | f54b3f92 | aurel32 | the Free Software Foundation; either version 2 of the License, or
|
35 | f54b3f92 | aurel32 | (at your option) any later version.
|
36 | f54b3f92 | aurel32 | |
37 | f54b3f92 | aurel32 | This program is distributed in the hope that it will be useful,
|
38 | f54b3f92 | aurel32 | but WITHOUT ANY WARRANTY; without even the implied warranty of
|
39 | f54b3f92 | aurel32 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
40 | f54b3f92 | aurel32 | GNU General Public License for more details.
|
41 | f54b3f92 | aurel32 | |
42 | f54b3f92 | aurel32 | You should have received a copy of the GNU General Public License
|
43 | 8167ee88 | Blue Swirl | along with this program; if not, see <http://www.gnu.org/licenses/>. */
|
44 | f54b3f92 | aurel32 | |
45 | f54b3f92 | aurel32 | #ifndef _LIBHPPA_H
|
46 | f54b3f92 | aurel32 | #define _LIBHPPA_H
|
47 | f54b3f92 | aurel32 | |
48 | f54b3f92 | aurel32 | #define BYTES_IN_WORD 4 |
49 | f54b3f92 | aurel32 | #define PA_PAGESIZE 0x1000 |
50 | f54b3f92 | aurel32 | |
51 | f54b3f92 | aurel32 | /* The PA instruction set variants. */
|
52 | f54b3f92 | aurel32 | enum pa_arch {pa10 = 10, pa11 = 11, pa20 = 20, pa20w = 25}; |
53 | f54b3f92 | aurel32 | |
54 | f54b3f92 | aurel32 | /* HP PA-RISC relocation types */
|
55 | f54b3f92 | aurel32 | |
56 | f54b3f92 | aurel32 | enum hppa_reloc_field_selector_type
|
57 | f54b3f92 | aurel32 | { |
58 | f54b3f92 | aurel32 | R_HPPA_FSEL = 0x0,
|
59 | f54b3f92 | aurel32 | R_HPPA_LSSEL = 0x1,
|
60 | f54b3f92 | aurel32 | R_HPPA_RSSEL = 0x2,
|
61 | f54b3f92 | aurel32 | R_HPPA_LSEL = 0x3,
|
62 | f54b3f92 | aurel32 | R_HPPA_RSEL = 0x4,
|
63 | f54b3f92 | aurel32 | R_HPPA_LDSEL = 0x5,
|
64 | f54b3f92 | aurel32 | R_HPPA_RDSEL = 0x6,
|
65 | f54b3f92 | aurel32 | R_HPPA_LRSEL = 0x7,
|
66 | f54b3f92 | aurel32 | R_HPPA_RRSEL = 0x8,
|
67 | f54b3f92 | aurel32 | R_HPPA_NSEL = 0x9,
|
68 | f54b3f92 | aurel32 | R_HPPA_NLSEL = 0xa,
|
69 | f54b3f92 | aurel32 | R_HPPA_NLRSEL = 0xb,
|
70 | f54b3f92 | aurel32 | R_HPPA_PSEL = 0xc,
|
71 | f54b3f92 | aurel32 | R_HPPA_LPSEL = 0xd,
|
72 | f54b3f92 | aurel32 | R_HPPA_RPSEL = 0xe,
|
73 | f54b3f92 | aurel32 | R_HPPA_TSEL = 0xf,
|
74 | f54b3f92 | aurel32 | R_HPPA_LTSEL = 0x10,
|
75 | f54b3f92 | aurel32 | R_HPPA_RTSEL = 0x11,
|
76 | f54b3f92 | aurel32 | R_HPPA_LTPSEL = 0x12,
|
77 | f54b3f92 | aurel32 | R_HPPA_RTPSEL = 0x13
|
78 | f54b3f92 | aurel32 | }; |
79 | f54b3f92 | aurel32 | |
80 | f54b3f92 | aurel32 | /* /usr/include/reloc.h defines these to constants. We want to use
|
81 | f54b3f92 | aurel32 | them in enums, so #undef them before we start using them. We might
|
82 | f54b3f92 | aurel32 | be able to fix this another way by simply managing not to include
|
83 | f54b3f92 | aurel32 | /usr/include/reloc.h, but currently GDB picks up these defines
|
84 | f54b3f92 | aurel32 | somewhere. */
|
85 | f54b3f92 | aurel32 | #undef e_fsel
|
86 | f54b3f92 | aurel32 | #undef e_lssel
|
87 | f54b3f92 | aurel32 | #undef e_rssel
|
88 | f54b3f92 | aurel32 | #undef e_lsel
|
89 | f54b3f92 | aurel32 | #undef e_rsel
|
90 | f54b3f92 | aurel32 | #undef e_ldsel
|
91 | f54b3f92 | aurel32 | #undef e_rdsel
|
92 | f54b3f92 | aurel32 | #undef e_lrsel
|
93 | f54b3f92 | aurel32 | #undef e_rrsel
|
94 | f54b3f92 | aurel32 | #undef e_nsel
|
95 | f54b3f92 | aurel32 | #undef e_nlsel
|
96 | f54b3f92 | aurel32 | #undef e_nlrsel
|
97 | f54b3f92 | aurel32 | #undef e_psel
|
98 | f54b3f92 | aurel32 | #undef e_lpsel
|
99 | f54b3f92 | aurel32 | #undef e_rpsel
|
100 | f54b3f92 | aurel32 | #undef e_tsel
|
101 | f54b3f92 | aurel32 | #undef e_ltsel
|
102 | f54b3f92 | aurel32 | #undef e_rtsel
|
103 | f54b3f92 | aurel32 | #undef e_one
|
104 | f54b3f92 | aurel32 | #undef e_two
|
105 | f54b3f92 | aurel32 | #undef e_pcrel
|
106 | f54b3f92 | aurel32 | #undef e_con
|
107 | f54b3f92 | aurel32 | #undef e_plabel
|
108 | f54b3f92 | aurel32 | #undef e_abs
|
109 | f54b3f92 | aurel32 | |
110 | f54b3f92 | aurel32 | /* for compatibility */
|
111 | f54b3f92 | aurel32 | enum hppa_reloc_field_selector_type_alt
|
112 | f54b3f92 | aurel32 | { |
113 | f54b3f92 | aurel32 | e_fsel = R_HPPA_FSEL, |
114 | f54b3f92 | aurel32 | e_lssel = R_HPPA_LSSEL, |
115 | f54b3f92 | aurel32 | e_rssel = R_HPPA_RSSEL, |
116 | f54b3f92 | aurel32 | e_lsel = R_HPPA_LSEL, |
117 | f54b3f92 | aurel32 | e_rsel = R_HPPA_RSEL, |
118 | f54b3f92 | aurel32 | e_ldsel = R_HPPA_LDSEL, |
119 | f54b3f92 | aurel32 | e_rdsel = R_HPPA_RDSEL, |
120 | f54b3f92 | aurel32 | e_lrsel = R_HPPA_LRSEL, |
121 | f54b3f92 | aurel32 | e_rrsel = R_HPPA_RRSEL, |
122 | f54b3f92 | aurel32 | e_nsel = R_HPPA_NSEL, |
123 | f54b3f92 | aurel32 | e_nlsel = R_HPPA_NLSEL, |
124 | f54b3f92 | aurel32 | e_nlrsel = R_HPPA_NLRSEL, |
125 | f54b3f92 | aurel32 | e_psel = R_HPPA_PSEL, |
126 | f54b3f92 | aurel32 | e_lpsel = R_HPPA_LPSEL, |
127 | f54b3f92 | aurel32 | e_rpsel = R_HPPA_RPSEL, |
128 | f54b3f92 | aurel32 | e_tsel = R_HPPA_TSEL, |
129 | f54b3f92 | aurel32 | e_ltsel = R_HPPA_LTSEL, |
130 | f54b3f92 | aurel32 | e_rtsel = R_HPPA_RTSEL, |
131 | f54b3f92 | aurel32 | e_ltpsel = R_HPPA_LTPSEL, |
132 | f54b3f92 | aurel32 | e_rtpsel = R_HPPA_RTPSEL |
133 | f54b3f92 | aurel32 | }; |
134 | f54b3f92 | aurel32 | |
135 | f54b3f92 | aurel32 | enum hppa_reloc_expr_type
|
136 | f54b3f92 | aurel32 | { |
137 | f54b3f92 | aurel32 | R_HPPA_E_ONE = 0,
|
138 | f54b3f92 | aurel32 | R_HPPA_E_TWO = 1,
|
139 | f54b3f92 | aurel32 | R_HPPA_E_PCREL = 2,
|
140 | f54b3f92 | aurel32 | R_HPPA_E_CON = 3,
|
141 | f54b3f92 | aurel32 | R_HPPA_E_PLABEL = 7,
|
142 | f54b3f92 | aurel32 | R_HPPA_E_ABS = 18
|
143 | f54b3f92 | aurel32 | }; |
144 | f54b3f92 | aurel32 | |
145 | f54b3f92 | aurel32 | /* for compatibility */
|
146 | f54b3f92 | aurel32 | enum hppa_reloc_expr_type_alt
|
147 | f54b3f92 | aurel32 | { |
148 | f54b3f92 | aurel32 | e_one = R_HPPA_E_ONE, |
149 | f54b3f92 | aurel32 | e_two = R_HPPA_E_TWO, |
150 | f54b3f92 | aurel32 | e_pcrel = R_HPPA_E_PCREL, |
151 | f54b3f92 | aurel32 | e_con = R_HPPA_E_CON, |
152 | f54b3f92 | aurel32 | e_plabel = R_HPPA_E_PLABEL, |
153 | f54b3f92 | aurel32 | e_abs = R_HPPA_E_ABS |
154 | f54b3f92 | aurel32 | }; |
155 | f54b3f92 | aurel32 | |
156 | f54b3f92 | aurel32 | |
157 | f54b3f92 | aurel32 | /* Relocations for function calls must be accompanied by parameter
|
158 | f54b3f92 | aurel32 | relocation bits. These bits describe exactly where the caller has
|
159 | f54b3f92 | aurel32 | placed the function's arguments and where it expects to find a return
|
160 | f54b3f92 | aurel32 | value.
|
161 | f54b3f92 | aurel32 | |
162 | f54b3f92 | aurel32 | Both ELF and SOM encode this information within the addend field
|
163 | f54b3f92 | aurel32 | of the call relocation. (Note this could break very badly if one
|
164 | f54b3f92 | aurel32 | was to make a call like bl foo + 0x12345678).
|
165 | f54b3f92 | aurel32 | |
166 | f54b3f92 | aurel32 | The high order 10 bits contain parameter relocation information,
|
167 | f54b3f92 | aurel32 | the low order 22 bits contain the constant offset. */
|
168 | f54b3f92 | aurel32 | |
169 | f54b3f92 | aurel32 | #define HPPA_R_ARG_RELOC(a) \
|
170 | f54b3f92 | aurel32 | (((a) >> 22) & 0x3ff) |
171 | f54b3f92 | aurel32 | #define HPPA_R_CONSTANT(a) \
|
172 | f54b3f92 | aurel32 | ((((bfd_signed_vma)(a)) << (BFD_ARCH_SIZE-22)) >> (BFD_ARCH_SIZE-22)) |
173 | f54b3f92 | aurel32 | #define HPPA_R_ADDEND(r, c) \
|
174 | f54b3f92 | aurel32 | (((r) << 22) + ((c) & 0x3fffff)) |
175 | f54b3f92 | aurel32 | |
176 | f54b3f92 | aurel32 | |
177 | f54b3f92 | aurel32 | /* Some functions to manipulate PA instructions. */
|
178 | f54b3f92 | aurel32 | |
179 | f54b3f92 | aurel32 | /* Declare the functions with the unused attribute to avoid warnings. */
|
180 | f54b3f92 | aurel32 | static inline int sign_extend (int, int) ATTRIBUTE_UNUSED; |
181 | f54b3f92 | aurel32 | static inline int low_sign_extend (int, int) ATTRIBUTE_UNUSED; |
182 | f54b3f92 | aurel32 | static inline int sign_unext (int, int) ATTRIBUTE_UNUSED; |
183 | f54b3f92 | aurel32 | static inline int low_sign_unext (int, int) ATTRIBUTE_UNUSED; |
184 | f54b3f92 | aurel32 | static inline int re_assemble_3 (int) ATTRIBUTE_UNUSED; |
185 | f54b3f92 | aurel32 | static inline int re_assemble_12 (int) ATTRIBUTE_UNUSED; |
186 | f54b3f92 | aurel32 | static inline int re_assemble_14 (int) ATTRIBUTE_UNUSED; |
187 | f54b3f92 | aurel32 | static inline int re_assemble_16 (int) ATTRIBUTE_UNUSED; |
188 | f54b3f92 | aurel32 | static inline int re_assemble_17 (int) ATTRIBUTE_UNUSED; |
189 | f54b3f92 | aurel32 | static inline int re_assemble_21 (int) ATTRIBUTE_UNUSED; |
190 | f54b3f92 | aurel32 | static inline int re_assemble_22 (int) ATTRIBUTE_UNUSED; |
191 | f54b3f92 | aurel32 | static inline bfd_signed_vma hppa_field_adjust |
192 | f54b3f92 | aurel32 | (bfd_vma, bfd_signed_vma, enum hppa_reloc_field_selector_type_alt)
|
193 | f54b3f92 | aurel32 | ATTRIBUTE_UNUSED; |
194 | f54b3f92 | aurel32 | static inline int hppa_rebuild_insn (int, int, int) ATTRIBUTE_UNUSED; |
195 | f54b3f92 | aurel32 | |
196 | f54b3f92 | aurel32 | |
197 | f54b3f92 | aurel32 | /* The *sign_extend functions are used to assemble various bitfields
|
198 | f54b3f92 | aurel32 | taken from an instruction and return the resulting immediate
|
199 | f54b3f92 | aurel32 | value. */
|
200 | f54b3f92 | aurel32 | |
201 | f54b3f92 | aurel32 | static inline int |
202 | f54b3f92 | aurel32 | sign_extend (int x, int len) |
203 | f54b3f92 | aurel32 | { |
204 | f54b3f92 | aurel32 | int signbit = (1 << (len - 1)); |
205 | f54b3f92 | aurel32 | int mask = (signbit << 1) - 1; |
206 | f54b3f92 | aurel32 | return ((x & mask) ^ signbit) - signbit;
|
207 | f54b3f92 | aurel32 | } |
208 | f54b3f92 | aurel32 | |
209 | f54b3f92 | aurel32 | static inline int |
210 | f54b3f92 | aurel32 | low_sign_extend (int x, int len) |
211 | f54b3f92 | aurel32 | { |
212 | f54b3f92 | aurel32 | return (x >> 1) - ((x & 1) << (len - 1)); |
213 | f54b3f92 | aurel32 | } |
214 | f54b3f92 | aurel32 | |
215 | f54b3f92 | aurel32 | |
216 | f54b3f92 | aurel32 | /* The re_assemble_* functions prepare an immediate value for
|
217 | f54b3f92 | aurel32 | insertion into an opcode. pa-risc uses all sorts of weird bitfields
|
218 | f54b3f92 | aurel32 | in the instruction to hold the value. */
|
219 | f54b3f92 | aurel32 | |
220 | f54b3f92 | aurel32 | static inline int |
221 | f54b3f92 | aurel32 | sign_unext (int x, int len) |
222 | f54b3f92 | aurel32 | { |
223 | f54b3f92 | aurel32 | int len_ones;
|
224 | f54b3f92 | aurel32 | |
225 | f54b3f92 | aurel32 | len_ones = (1 << len) - 1; |
226 | f54b3f92 | aurel32 | |
227 | f54b3f92 | aurel32 | return x & len_ones;
|
228 | f54b3f92 | aurel32 | } |
229 | f54b3f92 | aurel32 | |
230 | f54b3f92 | aurel32 | static inline int |
231 | f54b3f92 | aurel32 | low_sign_unext (int x, int len) |
232 | f54b3f92 | aurel32 | { |
233 | f54b3f92 | aurel32 | int temp;
|
234 | f54b3f92 | aurel32 | int sign;
|
235 | f54b3f92 | aurel32 | |
236 | f54b3f92 | aurel32 | sign = (x >> (len-1)) & 1; |
237 | f54b3f92 | aurel32 | |
238 | f54b3f92 | aurel32 | temp = sign_unext (x, len-1);
|
239 | f54b3f92 | aurel32 | |
240 | f54b3f92 | aurel32 | return (temp << 1) | sign; |
241 | f54b3f92 | aurel32 | } |
242 | f54b3f92 | aurel32 | |
243 | f54b3f92 | aurel32 | static inline int |
244 | f54b3f92 | aurel32 | re_assemble_3 (int as3)
|
245 | f54b3f92 | aurel32 | { |
246 | f54b3f92 | aurel32 | return (( (as3 & 4) << (13-2)) |
247 | f54b3f92 | aurel32 | | ((as3 & 3) << (13+1))); |
248 | f54b3f92 | aurel32 | } |
249 | f54b3f92 | aurel32 | |
250 | f54b3f92 | aurel32 | static inline int |
251 | f54b3f92 | aurel32 | re_assemble_12 (int as12)
|
252 | f54b3f92 | aurel32 | { |
253 | f54b3f92 | aurel32 | return (( (as12 & 0x800) >> 11) |
254 | f54b3f92 | aurel32 | | ((as12 & 0x400) >> (10 - 2)) |
255 | f54b3f92 | aurel32 | | ((as12 & 0x3ff) << (1 + 2))); |
256 | f54b3f92 | aurel32 | } |
257 | f54b3f92 | aurel32 | |
258 | f54b3f92 | aurel32 | static inline int |
259 | f54b3f92 | aurel32 | re_assemble_14 (int as14)
|
260 | f54b3f92 | aurel32 | { |
261 | f54b3f92 | aurel32 | return (( (as14 & 0x1fff) << 1) |
262 | f54b3f92 | aurel32 | | ((as14 & 0x2000) >> 13)); |
263 | f54b3f92 | aurel32 | } |
264 | f54b3f92 | aurel32 | |
265 | f54b3f92 | aurel32 | static inline int |
266 | f54b3f92 | aurel32 | re_assemble_16 (int as16)
|
267 | f54b3f92 | aurel32 | { |
268 | f54b3f92 | aurel32 | int s, t;
|
269 | f54b3f92 | aurel32 | |
270 | f54b3f92 | aurel32 | /* Unusual 16-bit encoding, for wide mode only. */
|
271 | f54b3f92 | aurel32 | t = (as16 << 1) & 0xffff; |
272 | f54b3f92 | aurel32 | s = (as16 & 0x8000);
|
273 | f54b3f92 | aurel32 | return (t ^ s ^ (s >> 1)) | (s >> 15); |
274 | f54b3f92 | aurel32 | } |
275 | f54b3f92 | aurel32 | |
276 | f54b3f92 | aurel32 | static inline int |
277 | f54b3f92 | aurel32 | re_assemble_17 (int as17)
|
278 | f54b3f92 | aurel32 | { |
279 | f54b3f92 | aurel32 | return (( (as17 & 0x10000) >> 16) |
280 | f54b3f92 | aurel32 | | ((as17 & 0x0f800) << (16 - 11)) |
281 | f54b3f92 | aurel32 | | ((as17 & 0x00400) >> (10 - 2)) |
282 | f54b3f92 | aurel32 | | ((as17 & 0x003ff) << (1 + 2))); |
283 | f54b3f92 | aurel32 | } |
284 | f54b3f92 | aurel32 | |
285 | f54b3f92 | aurel32 | static inline int |
286 | f54b3f92 | aurel32 | re_assemble_21 (int as21)
|
287 | f54b3f92 | aurel32 | { |
288 | f54b3f92 | aurel32 | return (( (as21 & 0x100000) >> 20) |
289 | f54b3f92 | aurel32 | | ((as21 & 0x0ffe00) >> 8) |
290 | f54b3f92 | aurel32 | | ((as21 & 0x000180) << 7) |
291 | f54b3f92 | aurel32 | | ((as21 & 0x00007c) << 14) |
292 | f54b3f92 | aurel32 | | ((as21 & 0x000003) << 12)); |
293 | f54b3f92 | aurel32 | } |
294 | f54b3f92 | aurel32 | |
295 | f54b3f92 | aurel32 | static inline int |
296 | f54b3f92 | aurel32 | re_assemble_22 (int as22)
|
297 | f54b3f92 | aurel32 | { |
298 | f54b3f92 | aurel32 | return (( (as22 & 0x200000) >> 21) |
299 | f54b3f92 | aurel32 | | ((as22 & 0x1f0000) << (21 - 16)) |
300 | f54b3f92 | aurel32 | | ((as22 & 0x00f800) << (16 - 11)) |
301 | f54b3f92 | aurel32 | | ((as22 & 0x000400) >> (10 - 2)) |
302 | f54b3f92 | aurel32 | | ((as22 & 0x0003ff) << (1 + 2))); |
303 | f54b3f92 | aurel32 | } |
304 | f54b3f92 | aurel32 | |
305 | f54b3f92 | aurel32 | |
306 | f54b3f92 | aurel32 | /* Handle field selectors for PA instructions.
|
307 | f54b3f92 | aurel32 | The L and R (and LS, RS etc.) selectors are used in pairs to form a
|
308 | f54b3f92 | aurel32 | full 32 bit address. eg.
|
309 | f54b3f92 | aurel32 | |
310 | f54b3f92 | aurel32 | LDIL L'start,%r1 ; put left part into r1
|
311 | f54b3f92 | aurel32 | LDW R'start(%r1),%r2 ; add r1 and right part to form address
|
312 | f54b3f92 | aurel32 | |
313 | f54b3f92 | aurel32 | This function returns sign extended values in all cases.
|
314 | f54b3f92 | aurel32 | */
|
315 | f54b3f92 | aurel32 | |
316 | f54b3f92 | aurel32 | static inline bfd_signed_vma |
317 | f54b3f92 | aurel32 | hppa_field_adjust (bfd_vma sym_val, |
318 | f54b3f92 | aurel32 | bfd_signed_vma addend, |
319 | f54b3f92 | aurel32 | enum hppa_reloc_field_selector_type_alt r_field)
|
320 | f54b3f92 | aurel32 | { |
321 | f54b3f92 | aurel32 | bfd_signed_vma value; |
322 | f54b3f92 | aurel32 | |
323 | f54b3f92 | aurel32 | value = sym_val + addend; |
324 | f54b3f92 | aurel32 | switch (r_field)
|
325 | f54b3f92 | aurel32 | { |
326 | f54b3f92 | aurel32 | case e_fsel:
|
327 | f54b3f92 | aurel32 | /* F: No change. */
|
328 | f54b3f92 | aurel32 | break;
|
329 | f54b3f92 | aurel32 | |
330 | f54b3f92 | aurel32 | case e_nsel:
|
331 | f54b3f92 | aurel32 | /* N: null selector. I don't really understand what this is all
|
332 | f54b3f92 | aurel32 | about, but HP's documentation says "this indicates that zero
|
333 | f54b3f92 | aurel32 | bits are to be used for the displacement on the instruction.
|
334 | f54b3f92 | aurel32 | This fixup is used to identify three-instruction sequences to
|
335 | f54b3f92 | aurel32 | access data (for importing shared library data)." */
|
336 | f54b3f92 | aurel32 | value = 0;
|
337 | f54b3f92 | aurel32 | break;
|
338 | f54b3f92 | aurel32 | |
339 | f54b3f92 | aurel32 | case e_lsel:
|
340 | f54b3f92 | aurel32 | case e_nlsel:
|
341 | f54b3f92 | aurel32 | /* L: Select top 21 bits. */
|
342 | f54b3f92 | aurel32 | value = value >> 11;
|
343 | f54b3f92 | aurel32 | break;
|
344 | f54b3f92 | aurel32 | |
345 | f54b3f92 | aurel32 | case e_rsel:
|
346 | f54b3f92 | aurel32 | /* R: Select bottom 11 bits. */
|
347 | f54b3f92 | aurel32 | value = value & 0x7ff;
|
348 | f54b3f92 | aurel32 | break;
|
349 | f54b3f92 | aurel32 | |
350 | f54b3f92 | aurel32 | case e_lssel:
|
351 | f54b3f92 | aurel32 | /* LS: Round to nearest multiple of 2048 then select top 21 bits. */
|
352 | f54b3f92 | aurel32 | value = value + 0x400;
|
353 | f54b3f92 | aurel32 | value = value >> 11;
|
354 | f54b3f92 | aurel32 | break;
|
355 | f54b3f92 | aurel32 | |
356 | f54b3f92 | aurel32 | case e_rssel:
|
357 | f54b3f92 | aurel32 | /* RS: Select bottom 11 bits for LS.
|
358 | f54b3f92 | aurel32 | We need to return a value such that 2048 * LS'x + RS'x == x.
|
359 | f54b3f92 | aurel32 | ie. RS'x = x - ((x + 0x400) & -0x800)
|
360 | f54b3f92 | aurel32 | this is just a sign extension from bit 21. */
|
361 | f54b3f92 | aurel32 | value = ((value & 0x7ff) ^ 0x400) - 0x400; |
362 | f54b3f92 | aurel32 | break;
|
363 | f54b3f92 | aurel32 | |
364 | f54b3f92 | aurel32 | case e_ldsel:
|
365 | f54b3f92 | aurel32 | /* LD: Round to next multiple of 2048 then select top 21 bits.
|
366 | f54b3f92 | aurel32 | Yes, if we are already on a multiple of 2048, we go up to the
|
367 | f54b3f92 | aurel32 | next one. RD in this case will be -2048. */
|
368 | f54b3f92 | aurel32 | value = value + 0x800;
|
369 | f54b3f92 | aurel32 | value = value >> 11;
|
370 | f54b3f92 | aurel32 | break;
|
371 | f54b3f92 | aurel32 | |
372 | f54b3f92 | aurel32 | case e_rdsel:
|
373 | f54b3f92 | aurel32 | /* RD: Set bits 0-20 to one. */
|
374 | f54b3f92 | aurel32 | value = value | -0x800;
|
375 | f54b3f92 | aurel32 | break;
|
376 | f54b3f92 | aurel32 | |
377 | f54b3f92 | aurel32 | case e_lrsel:
|
378 | f54b3f92 | aurel32 | case e_nlrsel:
|
379 | f54b3f92 | aurel32 | /* LR: L with rounding of the addend to nearest 8k. */
|
380 | f54b3f92 | aurel32 | value = sym_val + ((addend + 0x1000) & -0x2000); |
381 | f54b3f92 | aurel32 | value = value >> 11;
|
382 | f54b3f92 | aurel32 | break;
|
383 | f54b3f92 | aurel32 | |
384 | f54b3f92 | aurel32 | case e_rrsel:
|
385 | f54b3f92 | aurel32 | /* RR: R with rounding of the addend to nearest 8k.
|
386 | f54b3f92 | aurel32 | We need to return a value such that 2048 * LR'x + RR'x == x
|
387 | f54b3f92 | aurel32 | ie. RR'x = s+a - (s + (((a + 0x1000) & -0x2000) & -0x800))
|
388 | f54b3f92 | aurel32 | . = s+a - ((s & -0x800) + ((a + 0x1000) & -0x2000))
|
389 | f54b3f92 | aurel32 | . = (s & 0x7ff) + a - ((a + 0x1000) & -0x2000) */
|
390 | f54b3f92 | aurel32 | value = (sym_val & 0x7ff) + (((addend & 0x1fff) ^ 0x1000) - 0x1000); |
391 | f54b3f92 | aurel32 | break;
|
392 | f54b3f92 | aurel32 | |
393 | f54b3f92 | aurel32 | default:
|
394 | f54b3f92 | aurel32 | abort (); |
395 | f54b3f92 | aurel32 | } |
396 | f54b3f92 | aurel32 | return value;
|
397 | f54b3f92 | aurel32 | } |
398 | f54b3f92 | aurel32 | |
399 | f54b3f92 | aurel32 | /* PA-RISC OPCODES */
|
400 | f54b3f92 | aurel32 | #define get_opcode(insn) (((insn) >> 26) & 0x3f) |
401 | f54b3f92 | aurel32 | |
402 | f54b3f92 | aurel32 | enum hppa_opcode_type
|
403 | f54b3f92 | aurel32 | { |
404 | f54b3f92 | aurel32 | /* None of the opcodes in the first group generate relocs, so we
|
405 | f54b3f92 | aurel32 | aren't too concerned about them. */
|
406 | f54b3f92 | aurel32 | OP_SYSOP = 0x00,
|
407 | f54b3f92 | aurel32 | OP_MEMMNG = 0x01,
|
408 | f54b3f92 | aurel32 | OP_ALU = 0x02,
|
409 | f54b3f92 | aurel32 | OP_NDXMEM = 0x03,
|
410 | f54b3f92 | aurel32 | OP_SPOP = 0x04,
|
411 | f54b3f92 | aurel32 | OP_DIAG = 0x05,
|
412 | f54b3f92 | aurel32 | OP_FMPYADD = 0x06,
|
413 | f54b3f92 | aurel32 | OP_UNDEF07 = 0x07,
|
414 | f54b3f92 | aurel32 | OP_COPRW = 0x09,
|
415 | f54b3f92 | aurel32 | OP_COPRDW = 0x0b,
|
416 | f54b3f92 | aurel32 | OP_COPR = 0x0c,
|
417 | f54b3f92 | aurel32 | OP_FLOAT = 0x0e,
|
418 | f54b3f92 | aurel32 | OP_PRDSPEC = 0x0f,
|
419 | f54b3f92 | aurel32 | OP_UNDEF15 = 0x15,
|
420 | f54b3f92 | aurel32 | OP_UNDEF1d = 0x1d,
|
421 | f54b3f92 | aurel32 | OP_FMPYSUB = 0x26,
|
422 | f54b3f92 | aurel32 | OP_FPFUSED = 0x2e,
|
423 | f54b3f92 | aurel32 | OP_SHEXDP0 = 0x34,
|
424 | f54b3f92 | aurel32 | OP_SHEXDP1 = 0x35,
|
425 | f54b3f92 | aurel32 | OP_SHEXDP2 = 0x36,
|
426 | f54b3f92 | aurel32 | OP_UNDEF37 = 0x37,
|
427 | f54b3f92 | aurel32 | OP_SHEXDP3 = 0x3c,
|
428 | f54b3f92 | aurel32 | OP_SHEXDP4 = 0x3d,
|
429 | f54b3f92 | aurel32 | OP_MULTMED = 0x3e,
|
430 | f54b3f92 | aurel32 | OP_UNDEF3f = 0x3f,
|
431 | f54b3f92 | aurel32 | |
432 | f54b3f92 | aurel32 | OP_LDIL = 0x08,
|
433 | f54b3f92 | aurel32 | OP_ADDIL = 0x0a,
|
434 | f54b3f92 | aurel32 | |
435 | f54b3f92 | aurel32 | OP_LDO = 0x0d,
|
436 | f54b3f92 | aurel32 | OP_LDB = 0x10,
|
437 | f54b3f92 | aurel32 | OP_LDH = 0x11,
|
438 | f54b3f92 | aurel32 | OP_LDW = 0x12,
|
439 | f54b3f92 | aurel32 | OP_LDWM = 0x13,
|
440 | f54b3f92 | aurel32 | OP_STB = 0x18,
|
441 | f54b3f92 | aurel32 | OP_STH = 0x19,
|
442 | f54b3f92 | aurel32 | OP_STW = 0x1a,
|
443 | f54b3f92 | aurel32 | OP_STWM = 0x1b,
|
444 | f54b3f92 | aurel32 | |
445 | f54b3f92 | aurel32 | OP_LDD = 0x14,
|
446 | f54b3f92 | aurel32 | OP_STD = 0x1c,
|
447 | f54b3f92 | aurel32 | |
448 | f54b3f92 | aurel32 | OP_FLDW = 0x16,
|
449 | f54b3f92 | aurel32 | OP_LDWL = 0x17,
|
450 | f54b3f92 | aurel32 | OP_FSTW = 0x1e,
|
451 | f54b3f92 | aurel32 | OP_STWL = 0x1f,
|
452 | f54b3f92 | aurel32 | |
453 | f54b3f92 | aurel32 | OP_COMBT = 0x20,
|
454 | f54b3f92 | aurel32 | OP_COMIBT = 0x21,
|
455 | f54b3f92 | aurel32 | OP_COMBF = 0x22,
|
456 | f54b3f92 | aurel32 | OP_COMIBF = 0x23,
|
457 | f54b3f92 | aurel32 | OP_CMPBDT = 0x27,
|
458 | f54b3f92 | aurel32 | OP_ADDBT = 0x28,
|
459 | f54b3f92 | aurel32 | OP_ADDIBT = 0x29,
|
460 | f54b3f92 | aurel32 | OP_ADDBF = 0x2a,
|
461 | f54b3f92 | aurel32 | OP_ADDIBF = 0x2b,
|
462 | f54b3f92 | aurel32 | OP_CMPBDF = 0x2f,
|
463 | f54b3f92 | aurel32 | OP_BVB = 0x30,
|
464 | f54b3f92 | aurel32 | OP_BB = 0x31,
|
465 | f54b3f92 | aurel32 | OP_MOVB = 0x32,
|
466 | f54b3f92 | aurel32 | OP_MOVIB = 0x33,
|
467 | f54b3f92 | aurel32 | OP_CMPIBD = 0x3b,
|
468 | f54b3f92 | aurel32 | |
469 | f54b3f92 | aurel32 | OP_COMICLR = 0x24,
|
470 | f54b3f92 | aurel32 | OP_SUBI = 0x25,
|
471 | f54b3f92 | aurel32 | OP_ADDIT = 0x2c,
|
472 | f54b3f92 | aurel32 | OP_ADDI = 0x2d,
|
473 | f54b3f92 | aurel32 | |
474 | f54b3f92 | aurel32 | OP_BE = 0x38,
|
475 | f54b3f92 | aurel32 | OP_BLE = 0x39,
|
476 | f54b3f92 | aurel32 | OP_BL = 0x3a
|
477 | f54b3f92 | aurel32 | }; |
478 | f54b3f92 | aurel32 | |
479 | f54b3f92 | aurel32 | |
480 | f54b3f92 | aurel32 | /* Insert VALUE into INSN using R_FORMAT to determine exactly what
|
481 | f54b3f92 | aurel32 | bits to change. */
|
482 | f54b3f92 | aurel32 | |
483 | f54b3f92 | aurel32 | static inline int |
484 | f54b3f92 | aurel32 | hppa_rebuild_insn (int insn, int value, int r_format) |
485 | f54b3f92 | aurel32 | { |
486 | f54b3f92 | aurel32 | switch (r_format)
|
487 | f54b3f92 | aurel32 | { |
488 | f54b3f92 | aurel32 | case 11: |
489 | f54b3f92 | aurel32 | return (insn & ~ 0x7ff) | low_sign_unext (value, 11); |
490 | f54b3f92 | aurel32 | |
491 | f54b3f92 | aurel32 | case 12: |
492 | f54b3f92 | aurel32 | return (insn & ~ 0x1ffd) | re_assemble_12 (value); |
493 | f54b3f92 | aurel32 | |
494 | f54b3f92 | aurel32 | |
495 | f54b3f92 | aurel32 | case 10: |
496 | f54b3f92 | aurel32 | return (insn & ~ 0x3ff1) | re_assemble_14 (value & -8); |
497 | f54b3f92 | aurel32 | |
498 | f54b3f92 | aurel32 | case -11: |
499 | f54b3f92 | aurel32 | return (insn & ~ 0x3ff9) | re_assemble_14 (value & -4); |
500 | f54b3f92 | aurel32 | |
501 | f54b3f92 | aurel32 | case 14: |
502 | f54b3f92 | aurel32 | return (insn & ~ 0x3fff) | re_assemble_14 (value); |
503 | f54b3f92 | aurel32 | |
504 | f54b3f92 | aurel32 | |
505 | f54b3f92 | aurel32 | case -10: |
506 | f54b3f92 | aurel32 | return (insn & ~ 0xfff1) | re_assemble_16 (value & -8); |
507 | f54b3f92 | aurel32 | |
508 | f54b3f92 | aurel32 | case -16: |
509 | f54b3f92 | aurel32 | return (insn & ~ 0xfff9) | re_assemble_16 (value & -4); |
510 | f54b3f92 | aurel32 | |
511 | f54b3f92 | aurel32 | case 16: |
512 | f54b3f92 | aurel32 | return (insn & ~ 0xffff) | re_assemble_16 (value); |
513 | f54b3f92 | aurel32 | |
514 | f54b3f92 | aurel32 | |
515 | f54b3f92 | aurel32 | case 17: |
516 | f54b3f92 | aurel32 | return (insn & ~ 0x1f1ffd) | re_assemble_17 (value); |
517 | f54b3f92 | aurel32 | |
518 | f54b3f92 | aurel32 | case 21: |
519 | f54b3f92 | aurel32 | return (insn & ~ 0x1fffff) | re_assemble_21 (value); |
520 | f54b3f92 | aurel32 | |
521 | f54b3f92 | aurel32 | case 22: |
522 | f54b3f92 | aurel32 | return (insn & ~ 0x3ff1ffd) | re_assemble_22 (value); |
523 | f54b3f92 | aurel32 | |
524 | f54b3f92 | aurel32 | case 32: |
525 | f54b3f92 | aurel32 | return value;
|
526 | f54b3f92 | aurel32 | |
527 | f54b3f92 | aurel32 | default:
|
528 | f54b3f92 | aurel32 | abort (); |
529 | f54b3f92 | aurel32 | } |
530 | f54b3f92 | aurel32 | return insn;
|
531 | f54b3f92 | aurel32 | } |
532 | f54b3f92 | aurel32 | |
533 | f54b3f92 | aurel32 | #endif /* _LIBHPPA_H */ |
534 | f54b3f92 | aurel32 | /* Table of opcodes for the PA-RISC.
|
535 | f54b3f92 | aurel32 | Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000,
|
536 | f54b3f92 | aurel32 | 2001, 2002, 2003, 2004, 2005
|
537 | f54b3f92 | aurel32 | Free Software Foundation, Inc.
|
538 | f54b3f92 | aurel32 | |
539 | f54b3f92 | aurel32 | Contributed by the Center for Software Science at the
|
540 | f54b3f92 | aurel32 | University of Utah (pa-gdb-bugs@cs.utah.edu).
|
541 | f54b3f92 | aurel32 | |
542 | f54b3f92 | aurel32 | This file is part of GAS, the GNU Assembler, and GDB, the GNU disassembler.
|
543 | f54b3f92 | aurel32 | |
544 | f54b3f92 | aurel32 | GAS/GDB is free software; you can redistribute it and/or modify
|
545 | f54b3f92 | aurel32 | it under the terms of the GNU General Public License as published by
|
546 | f54b3f92 | aurel32 | the Free Software Foundation; either version 1, or (at your option)
|
547 | f54b3f92 | aurel32 | any later version.
|
548 | f54b3f92 | aurel32 | |
549 | f54b3f92 | aurel32 | GAS/GDB is distributed in the hope that it will be useful,
|
550 | f54b3f92 | aurel32 | but WITHOUT ANY WARRANTY; without even the implied warranty of
|
551 | f54b3f92 | aurel32 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
552 | f54b3f92 | aurel32 | GNU General Public License for more details.
|
553 | f54b3f92 | aurel32 | |
554 | f54b3f92 | aurel32 | You should have received a copy of the GNU General Public License
|
555 | 8167ee88 | Blue Swirl | along with GAS or GDB; see the file COPYING.
|
556 | 8167ee88 | Blue Swirl | If not, see <http://www.gnu.org/licenses/>. */
|
557 | f54b3f92 | aurel32 | |
558 | f54b3f92 | aurel32 | #if !defined(__STDC__) && !defined(const) |
559 | f54b3f92 | aurel32 | #define const |
560 | f54b3f92 | aurel32 | #endif
|
561 | f54b3f92 | aurel32 | |
562 | f54b3f92 | aurel32 | /*
|
563 | f54b3f92 | aurel32 | * Structure of an opcode table entry.
|
564 | f54b3f92 | aurel32 | */
|
565 | f54b3f92 | aurel32 | |
566 | f54b3f92 | aurel32 | /* There are two kinds of delay slot nullification: normal which is
|
567 | f54b3f92 | aurel32 | * controled by the nullification bit, and conditional, which depends
|
568 | f54b3f92 | aurel32 | * on the direction of the branch and its success or failure.
|
569 | f54b3f92 | aurel32 | *
|
570 | f54b3f92 | aurel32 | * NONE is unfortunately #defined in the hiux system include files.
|
571 | f54b3f92 | aurel32 | * #undef it away.
|
572 | f54b3f92 | aurel32 | */
|
573 | f54b3f92 | aurel32 | #undef NONE
|
574 | f54b3f92 | aurel32 | struct pa_opcode
|
575 | f54b3f92 | aurel32 | { |
576 | f54b3f92 | aurel32 | const char *name; |
577 | f54b3f92 | aurel32 | unsigned long int match; /* Bits that must be set... */ |
578 | f54b3f92 | aurel32 | unsigned long int mask; /* ... in these bits. */ |
579 | f54b3f92 | aurel32 | char *args;
|
580 | f54b3f92 | aurel32 | enum pa_arch arch;
|
581 | f54b3f92 | aurel32 | char flags;
|
582 | f54b3f92 | aurel32 | }; |
583 | f54b3f92 | aurel32 | |
584 | f54b3f92 | aurel32 | /* Enables strict matching. Opcodes with match errors are skipped
|
585 | f54b3f92 | aurel32 | when this bit is set. */
|
586 | f54b3f92 | aurel32 | #define FLAG_STRICT 0x1 |
587 | f54b3f92 | aurel32 | |
588 | f54b3f92 | aurel32 | /*
|
589 | f54b3f92 | aurel32 | All hppa opcodes are 32 bits.
|
590 | f54b3f92 | aurel32 | |
591 | f54b3f92 | aurel32 | The match component is a mask saying which bits must match a
|
592 | f54b3f92 | aurel32 | particular opcode in order for an instruction to be an instance
|
593 | f54b3f92 | aurel32 | of that opcode.
|
594 | f54b3f92 | aurel32 | |
595 | f54b3f92 | aurel32 | The args component is a string containing one character for each operand of
|
596 | f54b3f92 | aurel32 | the instruction. Characters used as a prefix allow any second character to
|
597 | f54b3f92 | aurel32 | be used without conflicting with the main operand characters.
|
598 | f54b3f92 | aurel32 | |
599 | f54b3f92 | aurel32 | Bit positions in this description follow HP usage of lsb = 31,
|
600 | f54b3f92 | aurel32 | "at" is lsb of field.
|
601 | f54b3f92 | aurel32 | |
602 | f54b3f92 | aurel32 | In the args field, the following characters must match exactly:
|
603 | f54b3f92 | aurel32 | |
604 | f54b3f92 | aurel32 | '+,() '
|
605 | f54b3f92 | aurel32 | |
606 | f54b3f92 | aurel32 | In the args field, the following characters are unused:
|
607 | f54b3f92 | aurel32 | |
608 | f54b3f92 | aurel32 | ' " - / 34 6789:; '
|
609 | f54b3f92 | aurel32 | '@ C M [\] '
|
610 | f54b3f92 | aurel32 | '` e g } '
|
611 | f54b3f92 | aurel32 | |
612 | f54b3f92 | aurel32 | Here are all the characters:
|
613 | f54b3f92 | aurel32 | |
614 | f54b3f92 | aurel32 | ' !"#$%&'()*+-,./0123456789:;<=>?'
|
615 | f54b3f92 | aurel32 | '@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_'
|
616 | f54b3f92 | aurel32 | '`abcdefghijklmnopqrstuvwxyz{|}~ '
|
617 | f54b3f92 | aurel32 | |
618 | f54b3f92 | aurel32 | Kinds of operands:
|
619 | f54b3f92 | aurel32 | x integer register field at 15.
|
620 | f54b3f92 | aurel32 | b integer register field at 10.
|
621 | f54b3f92 | aurel32 | t integer register field at 31.
|
622 | f54b3f92 | aurel32 | a integer register field at 10 and 15 (for PERMH)
|
623 | f54b3f92 | aurel32 | 5 5 bit immediate at 15.
|
624 | f54b3f92 | aurel32 | s 2 bit space specifier at 17.
|
625 | f54b3f92 | aurel32 | S 3 bit space specifier at 18.
|
626 | f54b3f92 | aurel32 | V 5 bit immediate value at 31
|
627 | f54b3f92 | aurel32 | i 11 bit immediate value at 31
|
628 | f54b3f92 | aurel32 | j 14 bit immediate value at 31
|
629 | f54b3f92 | aurel32 | k 21 bit immediate value at 31
|
630 | f54b3f92 | aurel32 | l 16 bit immediate value at 31 (wide mode only, unusual encoding).
|
631 | f54b3f92 | aurel32 | n nullification for branch instructions
|
632 | f54b3f92 | aurel32 | N nullification for spop and copr instructions
|
633 | f54b3f92 | aurel32 | w 12 bit branch displacement
|
634 | f54b3f92 | aurel32 | W 17 bit branch displacement (PC relative)
|
635 | f54b3f92 | aurel32 | X 22 bit branch displacement (PC relative)
|
636 | f54b3f92 | aurel32 | z 17 bit branch displacement (just a number, not an address)
|
637 | f54b3f92 | aurel32 | |
638 | f54b3f92 | aurel32 | Also these:
|
639 | f54b3f92 | aurel32 | |
640 | f54b3f92 | aurel32 | . 2 bit shift amount at 25
|
641 | f54b3f92 | aurel32 | * 4 bit shift amount at 25
|
642 | f54b3f92 | aurel32 | p 5 bit shift count at 26 (to support the SHD instruction) encoded as
|
643 | f54b3f92 | aurel32 | 31-p
|
644 | f54b3f92 | aurel32 | ~ 6 bit shift count at 20,22:26 encoded as 63-~.
|
645 | f54b3f92 | aurel32 | P 5 bit bit position at 26
|
646 | f54b3f92 | aurel32 | q 6 bit bit position at 20,22:26
|
647 | f54b3f92 | aurel32 | T 5 bit field length at 31 (encoded as 32-T)
|
648 | f54b3f92 | aurel32 | % 6 bit field length at 23,27:31 (variable extract/deposit)
|
649 | f54b3f92 | aurel32 | | 6 bit field length at 19,27:31 (fixed extract/deposit)
|
650 | f54b3f92 | aurel32 | A 13 bit immediate at 18 (to support the BREAK instruction)
|
651 | f54b3f92 | aurel32 | ^ like b, but describes a control register
|
652 | f54b3f92 | aurel32 | ! sar (cr11) register
|
653 | f54b3f92 | aurel32 | D 26 bit immediate at 31 (to support the DIAG instruction)
|
654 | f54b3f92 | aurel32 | $ 9 bit immediate at 28 (to support POPBTS)
|
655 | f54b3f92 | aurel32 | |
656 | f54b3f92 | aurel32 | v 3 bit Special Function Unit identifier at 25
|
657 | f54b3f92 | aurel32 | O 20 bit Special Function Unit operation split between 15 bits at 20
|
658 | f54b3f92 | aurel32 | and 5 bits at 31
|
659 | f54b3f92 | aurel32 | o 15 bit Special Function Unit operation at 20
|
660 | f54b3f92 | aurel32 | 2 22 bit Special Function Unit operation split between 17 bits at 20
|
661 | f54b3f92 | aurel32 | and 5 bits at 31
|
662 | f54b3f92 | aurel32 | 1 15 bit Special Function Unit operation split between 10 bits at 20
|
663 | f54b3f92 | aurel32 | and 5 bits at 31
|
664 | f54b3f92 | aurel32 | 0 10 bit Special Function Unit operation split between 5 bits at 20
|
665 | f54b3f92 | aurel32 | and 5 bits at 31
|
666 | f54b3f92 | aurel32 | u 3 bit coprocessor unit identifier at 25
|
667 | f54b3f92 | aurel32 | F Source Floating Point Operand Format Completer encoded 2 bits at 20
|
668 | f54b3f92 | aurel32 | I Source Floating Point Operand Format Completer encoded 1 bits at 20
|
669 | f54b3f92 | aurel32 | (for 0xe format FP instructions)
|
670 | f54b3f92 | aurel32 | G Destination Floating Point Operand Format Completer encoded 2 bits at 18
|
671 | f54b3f92 | aurel32 | H Floating Point Operand Format at 26 for 'fmpyadd' and 'fmpysub'
|
672 | f54b3f92 | aurel32 | (very similar to 'F')
|
673 | f54b3f92 | aurel32 | |
674 | f54b3f92 | aurel32 | r 5 bit immediate value at 31 (for the break instruction)
|
675 | f54b3f92 | aurel32 | (very similar to V above, except the value is unsigned instead of
|
676 | f54b3f92 | aurel32 | low_sign_ext)
|
677 | f54b3f92 | aurel32 | R 5 bit immediate value at 15 (for the ssm, rsm, probei instructions)
|
678 | f54b3f92 | aurel32 | (same as r above, except the value is in a different location)
|
679 | f54b3f92 | aurel32 | U 10 bit immediate value at 15 (for SSM, RSM on pa2.0)
|
680 | f54b3f92 | aurel32 | Q 5 bit immediate value at 10 (a bit position specified in
|
681 | f54b3f92 | aurel32 | the bb instruction. It's the same as r above, except the
|
682 | f54b3f92 | aurel32 | value is in a different location)
|
683 | f54b3f92 | aurel32 | B 5 bit immediate value at 10 (a bit position specified in
|
684 | f54b3f92 | aurel32 | the bb instruction. Similar to Q, but 64 bit handling is
|
685 | f54b3f92 | aurel32 | different.
|
686 | f54b3f92 | aurel32 | Z %r1 -- implicit target of addil instruction.
|
687 | f54b3f92 | aurel32 | L ,%r2 completer for new syntax branch
|
688 | f54b3f92 | aurel32 | { Source format completer for fcnv
|
689 | f54b3f92 | aurel32 | _ Destination format completer for fcnv
|
690 | f54b3f92 | aurel32 | h cbit for fcmp
|
691 | f54b3f92 | aurel32 | = gfx tests for ftest
|
692 | f54b3f92 | aurel32 | d 14 bit offset for single precision FP long load/store.
|
693 | f54b3f92 | aurel32 | # 14 bit offset for double precision FP load long/store.
|
694 | f54b3f92 | aurel32 | J Yet another 14 bit offset for load/store with ma,mb completers.
|
695 | f54b3f92 | aurel32 | K Yet another 14 bit offset for load/store with ma,mb completers.
|
696 | f54b3f92 | aurel32 | y 16 bit offset for word aligned load/store (PA2.0 wide).
|
697 | f54b3f92 | aurel32 | & 16 bit offset for dword aligned load/store (PA2.0 wide).
|
698 | f54b3f92 | aurel32 | < 16 bit offset for load/store with ma,mb completers (PA2.0 wide).
|
699 | f54b3f92 | aurel32 | > 16 bit offset for load/store with ma,mb completers (PA2.0 wide).
|
700 | f54b3f92 | aurel32 | Y %sr0,%r31 -- implicit target of be,l instruction.
|
701 | f54b3f92 | aurel32 | @ implicit immediate value of 0
|
702 | f54b3f92 | aurel32 | |
703 | f54b3f92 | aurel32 | Completer operands all have 'c' as the prefix:
|
704 | f54b3f92 | aurel32 | |
705 | f54b3f92 | aurel32 | cx indexed load and store completer.
|
706 | f54b3f92 | aurel32 | cX indexed load and store completer. Like cx, but emits a space
|
707 | f54b3f92 | aurel32 | after in disassembler.
|
708 | f54b3f92 | aurel32 | cm short load and store completer.
|
709 | f54b3f92 | aurel32 | cM short load and store completer. Like cm, but emits a space
|
710 | f54b3f92 | aurel32 | after in disassembler.
|
711 | f54b3f92 | aurel32 | cq long load and store completer (like cm, but inserted into a
|
712 | f54b3f92 | aurel32 | different location in the target instruction).
|
713 | f54b3f92 | aurel32 | cs store bytes short completer.
|
714 | f54b3f92 | aurel32 | cA store bytes short completer. Like cs, but emits a space
|
715 | f54b3f92 | aurel32 | after in disassembler.
|
716 | f54b3f92 | aurel32 | ce long load/store completer for LDW/STW with a different encoding
|
717 | f54b3f92 | aurel32 | than the others
|
718 | f54b3f92 | aurel32 | cc load cache control hint
|
719 | f54b3f92 | aurel32 | cd load and clear cache control hint
|
720 | f54b3f92 | aurel32 | cC store cache control hint
|
721 | f54b3f92 | aurel32 | co ordered access
|
722 | f54b3f92 | aurel32 | |
723 | f54b3f92 | aurel32 | cp branch link and push completer
|
724 | f54b3f92 | aurel32 | cP branch pop completer
|
725 | f54b3f92 | aurel32 | cl branch link completer
|
726 | f54b3f92 | aurel32 | cg branch gate completer
|
727 | f54b3f92 | aurel32 | |
728 | f54b3f92 | aurel32 | cw read/write completer for PROBE
|
729 | f54b3f92 | aurel32 | cW wide completer for MFCTL
|
730 | f54b3f92 | aurel32 | cL local processor completer for cache control
|
731 | f54b3f92 | aurel32 | cZ System Control Completer (to support LPA, LHA, etc.)
|
732 | f54b3f92 | aurel32 | |
733 | f54b3f92 | aurel32 | ci correction completer for DCOR
|
734 | f54b3f92 | aurel32 | ca add completer
|
735 | f54b3f92 | aurel32 | cy 32 bit add carry completer
|
736 | f54b3f92 | aurel32 | cY 64 bit add carry completer
|
737 | f54b3f92 | aurel32 | cv signed overflow trap completer
|
738 | f54b3f92 | aurel32 | ct trap on condition completer for ADDI, SUB
|
739 | f54b3f92 | aurel32 | cT trap on condition completer for UADDCM
|
740 | f54b3f92 | aurel32 | cb 32 bit borrow completer for SUB
|
741 | f54b3f92 | aurel32 | cB 64 bit borrow completer for SUB
|
742 | f54b3f92 | aurel32 | |
743 | f54b3f92 | aurel32 | ch left/right half completer
|
744 | f54b3f92 | aurel32 | cH signed/unsigned saturation completer
|
745 | f54b3f92 | aurel32 | cS signed/unsigned completer at 21
|
746 | f54b3f92 | aurel32 | cz zero/sign extension completer.
|
747 | f54b3f92 | aurel32 | c* permutation completer
|
748 | f54b3f92 | aurel32 | |
749 | f54b3f92 | aurel32 | Condition operands all have '?' as the prefix:
|
750 | f54b3f92 | aurel32 | |
751 | f54b3f92 | aurel32 | ?f Floating point compare conditions (encoded as 5 bits at 31)
|
752 | f54b3f92 | aurel32 | |
753 | f54b3f92 | aurel32 | ?a add conditions
|
754 | f54b3f92 | aurel32 | ?A 64 bit add conditions
|
755 | f54b3f92 | aurel32 | ?@ add branch conditions followed by nullify
|
756 | f54b3f92 | aurel32 | ?d non-negated add branch conditions
|
757 | f54b3f92 | aurel32 | ?D negated add branch conditions
|
758 | f54b3f92 | aurel32 | ?w wide mode non-negated add branch conditions
|
759 | f54b3f92 | aurel32 | ?W wide mode negated add branch conditions
|
760 | f54b3f92 | aurel32 | |
761 | f54b3f92 | aurel32 | ?s compare/subtract conditions
|
762 | f54b3f92 | aurel32 | ?S 64 bit compare/subtract conditions
|
763 | f54b3f92 | aurel32 | ?t non-negated compare and branch conditions
|
764 | f54b3f92 | aurel32 | ?n 32 bit compare and branch conditions followed by nullify
|
765 | f54b3f92 | aurel32 | ?N 64 bit compare and branch conditions followed by nullify
|
766 | f54b3f92 | aurel32 | ?Q 64 bit compare and branch conditions for CMPIB instruction
|
767 | f54b3f92 | aurel32 | |
768 | f54b3f92 | aurel32 | ?l logical conditions
|
769 | f54b3f92 | aurel32 | ?L 64 bit logical conditions
|
770 | f54b3f92 | aurel32 | |
771 | f54b3f92 | aurel32 | ?b branch on bit conditions
|
772 | f54b3f92 | aurel32 | ?B 64 bit branch on bit conditions
|
773 | f54b3f92 | aurel32 | |
774 | f54b3f92 | aurel32 | ?x shift/extract/deposit conditions
|
775 | f54b3f92 | aurel32 | ?X 64 bit shift/extract/deposit conditions
|
776 | f54b3f92 | aurel32 | ?y shift/extract/deposit conditions followed by nullify for conditional
|
777 | f54b3f92 | aurel32 | branches
|
778 | f54b3f92 | aurel32 | |
779 | f54b3f92 | aurel32 | ?u unit conditions
|
780 | f54b3f92 | aurel32 | ?U 64 bit unit conditions
|
781 | f54b3f92 | aurel32 | |
782 | f54b3f92 | aurel32 | Floating point registers all have 'f' as a prefix:
|
783 | f54b3f92 | aurel32 | |
784 | f54b3f92 | aurel32 | ft target register at 31
|
785 | f54b3f92 | aurel32 | fT target register with L/R halves at 31
|
786 | f54b3f92 | aurel32 | fa operand 1 register at 10
|
787 | f54b3f92 | aurel32 | fA operand 1 register with L/R halves at 10
|
788 | f54b3f92 | aurel32 | fX Same as fA, except prints a space before register during disasm
|
789 | f54b3f92 | aurel32 | fb operand 2 register at 15
|
790 | f54b3f92 | aurel32 | fB operand 2 register with L/R halves at 15
|
791 | f54b3f92 | aurel32 | fC operand 3 register with L/R halves at 16:18,21:23
|
792 | f54b3f92 | aurel32 | fe Like fT, but encoding is different.
|
793 | f54b3f92 | aurel32 | fE Same as fe, except prints a space before register during disasm.
|
794 | f54b3f92 | aurel32 | fx target register at 15 (only for PA 2.0 long format FLDD/FSTD).
|
795 | f54b3f92 | aurel32 | |
796 | f54b3f92 | aurel32 | Float registers for fmpyadd and fmpysub:
|
797 | f54b3f92 | aurel32 | |
798 | f54b3f92 | aurel32 | fi mult operand 1 register at 10
|
799 | f54b3f92 | aurel32 | fj mult operand 2 register at 15
|
800 | f54b3f92 | aurel32 | fk mult target register at 20
|
801 | f54b3f92 | aurel32 | fl add/sub operand register at 25
|
802 | f54b3f92 | aurel32 | fm add/sub target register at 31
|
803 | f54b3f92 | aurel32 | |
804 | f54b3f92 | aurel32 | */
|
805 | f54b3f92 | aurel32 | |
806 | f54b3f92 | aurel32 | |
807 | f54b3f92 | aurel32 | #if 0
|
808 | f54b3f92 | aurel32 | /* List of characters not to put a space after. Note that
|
809 | f54b3f92 | aurel32 | "," is included, as the "spopN" operations use literal
|
810 | f54b3f92 | aurel32 | commas in their completer sections. */
|
811 | f54b3f92 | aurel32 | static const char *const completer_chars = ",CcY<>?!@+&U~FfGHINnOoZMadu|/=0123%e$m}";
|
812 | f54b3f92 | aurel32 | #endif
|
813 | f54b3f92 | aurel32 | |
814 | f54b3f92 | aurel32 | /* The order of the opcodes in this table is significant:
|
815 | f54b3f92 | aurel32 | |
816 | f54b3f92 | aurel32 | * The assembler requires that all instances of the same mnemonic be
|
817 | f54b3f92 | aurel32 | consecutive. If they aren't, the assembler will bomb at runtime.
|
818 | f54b3f92 | aurel32 | |
819 | f54b3f92 | aurel32 | * Immediate fields use pa_get_absolute_expression to parse the
|
820 | f54b3f92 | aurel32 | string. It will generate a "bad expression" error if passed
|
821 | f54b3f92 | aurel32 | a register name. Thus, register index variants of an opcode
|
822 | f54b3f92 | aurel32 | need to precede immediate variants.
|
823 | f54b3f92 | aurel32 | |
824 | f54b3f92 | aurel32 | * The disassembler does not care about the order of the opcodes
|
825 | f54b3f92 | aurel32 | except in cases where implicit addressing is used.
|
826 | f54b3f92 | aurel32 | |
827 | f54b3f92 | aurel32 | Here are the rules for ordering the opcodes of a mnemonic:
|
828 | f54b3f92 | aurel32 | |
829 | f54b3f92 | aurel32 | 1) Opcodes with FLAG_STRICT should precede opcodes without
|
830 | f54b3f92 | aurel32 | FLAG_STRICT.
|
831 | f54b3f92 | aurel32 | |
832 | f54b3f92 | aurel32 | 2) Opcodes with FLAG_STRICT should be ordered as follows:
|
833 | f54b3f92 | aurel32 | register index opcodes, short immediate opcodes, and finally
|
834 | f54b3f92 | aurel32 | long immediate opcodes. When both pa10 and pa11 variants
|
835 | f54b3f92 | aurel32 | of the same opcode are available, the pa10 opcode should
|
836 | f54b3f92 | aurel32 | come first for correct architectural promotion.
|
837 | f54b3f92 | aurel32 | |
838 | f54b3f92 | aurel32 | 3) When implicit addressing is available for an opcode, the
|
839 | f54b3f92 | aurel32 | implicit opcode should precede the explicit opcode.
|
840 | f54b3f92 | aurel32 | |
841 | f54b3f92 | aurel32 | 4) Opcodes without FLAG_STRICT should be ordered as follows:
|
842 | f54b3f92 | aurel32 | register index opcodes, long immediate opcodes, and finally
|
843 | f54b3f92 | aurel32 | short immediate opcodes. */
|
844 | f54b3f92 | aurel32 | |
845 | f54b3f92 | aurel32 | static const struct pa_opcode pa_opcodes[] = |
846 | f54b3f92 | aurel32 | { |
847 | f54b3f92 | aurel32 | |
848 | f54b3f92 | aurel32 | /* Pseudo-instructions. */
|
849 | f54b3f92 | aurel32 | |
850 | f54b3f92 | aurel32 | { "ldi", 0x34000000, 0xffe00000, "l,x", pa20w, 0},/* ldo val(r0),r */ |
851 | f54b3f92 | aurel32 | { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10, 0},/* ldo val(r0),r */ |
852 | f54b3f92 | aurel32 | |
853 | f54b3f92 | aurel32 | { "cmpib", 0xec000000, 0xfc000000, "?Qn5,b,w", pa20, FLAG_STRICT}, |
854 | f54b3f92 | aurel32 | { "cmpib", 0x84000000, 0xf4000000, "?nn5,b,w", pa10, FLAG_STRICT}, |
855 | f54b3f92 | aurel32 | { "comib", 0x84000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ |
856 | f54b3f92 | aurel32 | /* This entry is for the disassembler only. It will never be used by
|
857 | f54b3f92 | aurel32 | assembler. */
|
858 | f54b3f92 | aurel32 | { "comib", 0x8c000000, 0xfc000000, "?nn5,b,w", pa10, 0}, /* comib{tf}*/ |
859 | f54b3f92 | aurel32 | { "cmpb", 0x9c000000, 0xdc000000, "?Nnx,b,w", pa20, FLAG_STRICT}, |
860 | f54b3f92 | aurel32 | { "cmpb", 0x80000000, 0xf4000000, "?nnx,b,w", pa10, FLAG_STRICT}, |
861 | f54b3f92 | aurel32 | { "comb", 0x80000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ |
862 | f54b3f92 | aurel32 | /* This entry is for the disassembler only. It will never be used by
|
863 | f54b3f92 | aurel32 | assembler. */
|
864 | f54b3f92 | aurel32 | { "comb", 0x88000000, 0xfc000000, "?nnx,b,w", pa10, 0}, /* comb{tf} */ |
865 | f54b3f92 | aurel32 | { "addb", 0xa0000000, 0xf4000000, "?Wnx,b,w", pa20w, FLAG_STRICT}, |
866 | f54b3f92 | aurel32 | { "addb", 0xa0000000, 0xfc000000, "?@nx,b,w", pa10, 0}, /* addb{tf} */ |
867 | f54b3f92 | aurel32 | /* This entry is for the disassembler only. It will never be used by
|
868 | f54b3f92 | aurel32 | assembler. */
|
869 | f54b3f92 | aurel32 | { "addb", 0xa8000000, 0xfc000000, "?@nx,b,w", pa10, 0}, |
870 | f54b3f92 | aurel32 | { "addib", 0xa4000000, 0xf4000000, "?Wn5,b,w", pa20w, FLAG_STRICT}, |
871 | f54b3f92 | aurel32 | { "addib", 0xa4000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ |
872 | f54b3f92 | aurel32 | /* This entry is for the disassembler only. It will never be used by
|
873 | f54b3f92 | aurel32 | assembler. */
|
874 | f54b3f92 | aurel32 | { "addib", 0xac000000, 0xfc000000, "?@n5,b,w", pa10, 0}, /* addib{tf}*/ |
875 | f54b3f92 | aurel32 | { "nop", 0x08000240, 0xffffffff, "", pa10, 0}, /* or 0,0,0 */ |
876 | f54b3f92 | aurel32 | { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10, 0}, /* or r,0,t */ |
877 | f54b3f92 | aurel32 | { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10, 0}, /* mtctl r,cr11 */ |
878 | f54b3f92 | aurel32 | |
879 | f54b3f92 | aurel32 | /* Loads and Stores for integer registers. */
|
880 | f54b3f92 | aurel32 | |
881 | f54b3f92 | aurel32 | { "ldd", 0x0c0000c0, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, |
882 | f54b3f92 | aurel32 | { "ldd", 0x0c0000c0, 0xfc0013c0, "cxccx(s,b),t", pa20, FLAG_STRICT}, |
883 | f54b3f92 | aurel32 | { "ldd", 0x0c0010e0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
884 | f54b3f92 | aurel32 | { "ldd", 0x0c0010e0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
885 | f54b3f92 | aurel32 | { "ldd", 0x0c0010c0, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, |
886 | f54b3f92 | aurel32 | { "ldd", 0x0c0010c0, 0xfc0013c0, "cmcc5(s,b),t", pa20, FLAG_STRICT}, |
887 | f54b3f92 | aurel32 | { "ldd", 0x50000000, 0xfc000002, "cq&(b),x", pa20w, FLAG_STRICT}, |
888 | f54b3f92 | aurel32 | { "ldd", 0x50000000, 0xfc00c002, "cq#(b),x", pa20, FLAG_STRICT}, |
889 | f54b3f92 | aurel32 | { "ldd", 0x50000000, 0xfc000002, "cq#(s,b),x", pa20, FLAG_STRICT}, |
890 | f54b3f92 | aurel32 | { "ldw", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
891 | f54b3f92 | aurel32 | { "ldw", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
892 | f54b3f92 | aurel32 | { "ldw", 0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
893 | f54b3f92 | aurel32 | { "ldw", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
894 | f54b3f92 | aurel32 | { "ldw", 0x0c0010a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
895 | f54b3f92 | aurel32 | { "ldw", 0x0c0010a0, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
896 | f54b3f92 | aurel32 | { "ldw", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
897 | f54b3f92 | aurel32 | { "ldw", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
898 | f54b3f92 | aurel32 | { "ldw", 0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
899 | f54b3f92 | aurel32 | { "ldw", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
900 | f54b3f92 | aurel32 | { "ldw", 0x4c000000, 0xfc000000, "ce<(b),x", pa20w, FLAG_STRICT}, |
901 | f54b3f92 | aurel32 | { "ldw", 0x5c000004, 0xfc000006, "ce>(b),x", pa20w, FLAG_STRICT}, |
902 | f54b3f92 | aurel32 | { "ldw", 0x48000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
903 | f54b3f92 | aurel32 | { "ldw", 0x5c000004, 0xfc00c006, "ceK(b),x", pa20, FLAG_STRICT}, |
904 | f54b3f92 | aurel32 | { "ldw", 0x5c000004, 0xfc000006, "ceK(s,b),x", pa20, FLAG_STRICT}, |
905 | f54b3f92 | aurel32 | { "ldw", 0x4c000000, 0xfc00c000, "ceJ(b),x", pa10, FLAG_STRICT}, |
906 | f54b3f92 | aurel32 | { "ldw", 0x4c000000, 0xfc000000, "ceJ(s,b),x", pa10, FLAG_STRICT}, |
907 | f54b3f92 | aurel32 | { "ldw", 0x48000000, 0xfc00c000, "j(b),x", pa10, 0}, |
908 | f54b3f92 | aurel32 | { "ldw", 0x48000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
909 | f54b3f92 | aurel32 | { "ldh", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
910 | f54b3f92 | aurel32 | { "ldh", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
911 | f54b3f92 | aurel32 | { "ldh", 0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
912 | f54b3f92 | aurel32 | { "ldh", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
913 | f54b3f92 | aurel32 | { "ldh", 0x0c001060, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
914 | f54b3f92 | aurel32 | { "ldh", 0x0c001060, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
915 | f54b3f92 | aurel32 | { "ldh", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
916 | f54b3f92 | aurel32 | { "ldh", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
917 | f54b3f92 | aurel32 | { "ldh", 0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
918 | f54b3f92 | aurel32 | { "ldh", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
919 | f54b3f92 | aurel32 | { "ldh", 0x44000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
920 | f54b3f92 | aurel32 | { "ldh", 0x44000000, 0xfc00c000, "j(b),x", pa10, 0}, |
921 | f54b3f92 | aurel32 | { "ldh", 0x44000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
922 | f54b3f92 | aurel32 | { "ldb", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
923 | f54b3f92 | aurel32 | { "ldb", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
924 | f54b3f92 | aurel32 | { "ldb", 0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
925 | f54b3f92 | aurel32 | { "ldb", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
926 | f54b3f92 | aurel32 | { "ldb", 0x0c001020, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
927 | f54b3f92 | aurel32 | { "ldb", 0x0c001020, 0xfc1f33e0, "cocc@(s,b),t", pa20, FLAG_STRICT}, |
928 | f54b3f92 | aurel32 | { "ldb", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
929 | f54b3f92 | aurel32 | { "ldb", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
930 | f54b3f92 | aurel32 | { "ldb", 0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
931 | f54b3f92 | aurel32 | { "ldb", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
932 | f54b3f92 | aurel32 | { "ldb", 0x40000000, 0xfc000000, "l(b),x", pa20w, FLAG_STRICT}, |
933 | f54b3f92 | aurel32 | { "ldb", 0x40000000, 0xfc00c000, "j(b),x", pa10, 0}, |
934 | f54b3f92 | aurel32 | { "ldb", 0x40000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
935 | f54b3f92 | aurel32 | { "std", 0x0c0012e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
936 | f54b3f92 | aurel32 | { "std", 0x0c0012e0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
937 | f54b3f92 | aurel32 | { "std", 0x0c0012c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, |
938 | f54b3f92 | aurel32 | { "std", 0x0c0012c0, 0xfc0013c0, "cmcCx,V(s,b)", pa20, FLAG_STRICT}, |
939 | f54b3f92 | aurel32 | { "std", 0x70000000, 0xfc000002, "cqx,&(b)", pa20w, FLAG_STRICT}, |
940 | f54b3f92 | aurel32 | { "std", 0x70000000, 0xfc00c002, "cqx,#(b)", pa20, FLAG_STRICT}, |
941 | f54b3f92 | aurel32 | { "std", 0x70000000, 0xfc000002, "cqx,#(s,b)", pa20, FLAG_STRICT}, |
942 | f54b3f92 | aurel32 | { "stw", 0x0c0012a0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
943 | f54b3f92 | aurel32 | { "stw", 0x0c0012a0, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
944 | f54b3f92 | aurel32 | { "stw", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
945 | f54b3f92 | aurel32 | { "stw", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, |
946 | f54b3f92 | aurel32 | { "stw", 0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
947 | f54b3f92 | aurel32 | { "stw", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
948 | f54b3f92 | aurel32 | { "stw", 0x6c000000, 0xfc000000, "cex,<(b)", pa20w, FLAG_STRICT}, |
949 | f54b3f92 | aurel32 | { "stw", 0x7c000004, 0xfc000006, "cex,>(b)", pa20w, FLAG_STRICT}, |
950 | f54b3f92 | aurel32 | { "stw", 0x68000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
951 | f54b3f92 | aurel32 | { "stw", 0x7c000004, 0xfc00c006, "cex,K(b)", pa20, FLAG_STRICT}, |
952 | f54b3f92 | aurel32 | { "stw", 0x7c000004, 0xfc000006, "cex,K(s,b)", pa20, FLAG_STRICT}, |
953 | f54b3f92 | aurel32 | { "stw", 0x6c000000, 0xfc00c000, "cex,J(b)", pa10, FLAG_STRICT}, |
954 | f54b3f92 | aurel32 | { "stw", 0x6c000000, 0xfc000000, "cex,J(s,b)", pa10, FLAG_STRICT}, |
955 | f54b3f92 | aurel32 | { "stw", 0x68000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
956 | f54b3f92 | aurel32 | { "stw", 0x68000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
957 | f54b3f92 | aurel32 | { "sth", 0x0c001260, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
958 | f54b3f92 | aurel32 | { "sth", 0x0c001260, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
959 | f54b3f92 | aurel32 | { "sth", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
960 | f54b3f92 | aurel32 | { "sth", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, |
961 | f54b3f92 | aurel32 | { "sth", 0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
962 | f54b3f92 | aurel32 | { "sth", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
963 | f54b3f92 | aurel32 | { "sth", 0x64000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
964 | f54b3f92 | aurel32 | { "sth", 0x64000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
965 | f54b3f92 | aurel32 | { "sth", 0x64000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
966 | f54b3f92 | aurel32 | { "stb", 0x0c001220, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
967 | f54b3f92 | aurel32 | { "stb", 0x0c001220, 0xfc0033ff, "cocCx,@(s,b)", pa20, FLAG_STRICT}, |
968 | f54b3f92 | aurel32 | { "stb", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
969 | f54b3f92 | aurel32 | { "stb", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, |
970 | f54b3f92 | aurel32 | { "stb", 0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
971 | f54b3f92 | aurel32 | { "stb", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
972 | f54b3f92 | aurel32 | { "stb", 0x60000000, 0xfc000000, "x,l(b)", pa20w, FLAG_STRICT}, |
973 | f54b3f92 | aurel32 | { "stb", 0x60000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
974 | f54b3f92 | aurel32 | { "stb", 0x60000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
975 | f54b3f92 | aurel32 | { "ldwm", 0x4c000000, 0xfc00c000, "j(b),x", pa10, 0}, |
976 | f54b3f92 | aurel32 | { "ldwm", 0x4c000000, 0xfc000000, "j(s,b),x", pa10, 0}, |
977 | f54b3f92 | aurel32 | { "stwm", 0x6c000000, 0xfc00c000, "x,j(b)", pa10, 0}, |
978 | f54b3f92 | aurel32 | { "stwm", 0x6c000000, 0xfc000000, "x,j(s,b)", pa10, 0}, |
979 | f54b3f92 | aurel32 | { "ldwx", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
980 | f54b3f92 | aurel32 | { "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
981 | f54b3f92 | aurel32 | { "ldwx", 0x0c000080, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
982 | f54b3f92 | aurel32 | { "ldwx", 0x0c000080, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
983 | f54b3f92 | aurel32 | { "ldwx", 0x0c000080, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
984 | f54b3f92 | aurel32 | { "ldwx", 0x0c000080, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
985 | f54b3f92 | aurel32 | { "ldhx", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
986 | f54b3f92 | aurel32 | { "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
987 | f54b3f92 | aurel32 | { "ldhx", 0x0c000040, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
988 | f54b3f92 | aurel32 | { "ldhx", 0x0c000040, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
989 | f54b3f92 | aurel32 | { "ldhx", 0x0c000040, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
990 | f54b3f92 | aurel32 | { "ldhx", 0x0c000040, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
991 | f54b3f92 | aurel32 | { "ldbx", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
992 | f54b3f92 | aurel32 | { "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
993 | f54b3f92 | aurel32 | { "ldbx", 0x0c000000, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
994 | f54b3f92 | aurel32 | { "ldbx", 0x0c000000, 0xfc0013c0, "cxccx(s,b),t", pa11, FLAG_STRICT}, |
995 | f54b3f92 | aurel32 | { "ldbx", 0x0c000000, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
996 | f54b3f92 | aurel32 | { "ldbx", 0x0c000000, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
997 | f54b3f92 | aurel32 | { "ldwa", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
998 | f54b3f92 | aurel32 | { "ldwa", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
999 | f54b3f92 | aurel32 | { "ldwa", 0x0c0011a0, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
1000 | f54b3f92 | aurel32 | { "ldwa", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1001 | f54b3f92 | aurel32 | { "ldwa", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
1002 | f54b3f92 | aurel32 | { "ldcw", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
1003 | f54b3f92 | aurel32 | { "ldcw", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
1004 | f54b3f92 | aurel32 | { "ldcw", 0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT}, |
1005 | f54b3f92 | aurel32 | { "ldcw", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, |
1006 | f54b3f92 | aurel32 | { "ldcw", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1007 | f54b3f92 | aurel32 | { "ldcw", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
1008 | f54b3f92 | aurel32 | { "ldcw", 0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT}, |
1009 | f54b3f92 | aurel32 | { "ldcw", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, |
1010 | f54b3f92 | aurel32 | { "stwa", 0x0c0013a0, 0xfc00d3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
1011 | f54b3f92 | aurel32 | { "stwa", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
1012 | f54b3f92 | aurel32 | { "stwa", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
1013 | f54b3f92 | aurel32 | { "stby", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT}, |
1014 | f54b3f92 | aurel32 | { "stby", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT}, |
1015 | f54b3f92 | aurel32 | { "stby", 0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT}, |
1016 | f54b3f92 | aurel32 | { "stby", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, |
1017 | f54b3f92 | aurel32 | { "ldda", 0x0c000100, 0xfc00d3c0, "cxccx(b),t", pa20, FLAG_STRICT}, |
1018 | f54b3f92 | aurel32 | { "ldda", 0x0c001120, 0xfc1ff3e0, "cocc@(b),t", pa20, FLAG_STRICT}, |
1019 | f54b3f92 | aurel32 | { "ldda", 0x0c001100, 0xfc00d3c0, "cmcc5(b),t", pa20, FLAG_STRICT}, |
1020 | f54b3f92 | aurel32 | { "ldcd", 0x0c000140, 0xfc00d3c0, "cxcdx(b),t", pa20, FLAG_STRICT}, |
1021 | f54b3f92 | aurel32 | { "ldcd", 0x0c000140, 0xfc0013c0, "cxcdx(s,b),t", pa20, FLAG_STRICT}, |
1022 | f54b3f92 | aurel32 | { "ldcd", 0x0c001140, 0xfc00d3c0, "cmcd5(b),t", pa20, FLAG_STRICT}, |
1023 | f54b3f92 | aurel32 | { "ldcd", 0x0c001140, 0xfc0013c0, "cmcd5(s,b),t", pa20, FLAG_STRICT}, |
1024 | f54b3f92 | aurel32 | { "stda", 0x0c0013e0, 0xfc00f3ff, "cocCx,@(b)", pa20, FLAG_STRICT}, |
1025 | f54b3f92 | aurel32 | { "stda", 0x0c0013c0, 0xfc00d3c0, "cmcCx,V(b)", pa20, FLAG_STRICT}, |
1026 | f54b3f92 | aurel32 | { "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
1027 | f54b3f92 | aurel32 | { "ldwax", 0x0c000180, 0xfc00d3c0, "cxccx(b),t", pa11, FLAG_STRICT}, |
1028 | f54b3f92 | aurel32 | { "ldwax", 0x0c000180, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
1029 | f54b3f92 | aurel32 | { "ldcwx", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, FLAG_STRICT}, |
1030 | f54b3f92 | aurel32 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, FLAG_STRICT}, |
1031 | f54b3f92 | aurel32 | { "ldcwx", 0x0c0001c0, 0xfc00d3c0, "cxcdx(b),t", pa11, FLAG_STRICT}, |
1032 | f54b3f92 | aurel32 | { "ldcwx", 0x0c0001c0, 0xfc0013c0, "cxcdx(s,b),t", pa11, FLAG_STRICT}, |
1033 | f54b3f92 | aurel32 | { "ldcwx", 0x0c0001c0, 0xfc00dfc0, "cXx(b),t", pa10, 0}, |
1034 | f54b3f92 | aurel32 | { "ldcwx", 0x0c0001c0, 0xfc001fc0, "cXx(s,b),t", pa10, 0}, |
1035 | f54b3f92 | aurel32 | { "ldws", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1036 | f54b3f92 | aurel32 | { "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
1037 | f54b3f92 | aurel32 | { "ldws", 0x0c001080, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
1038 | f54b3f92 | aurel32 | { "ldws", 0x0c001080, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
1039 | f54b3f92 | aurel32 | { "ldws", 0x0c001080, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
1040 | f54b3f92 | aurel32 | { "ldws", 0x0c001080, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
1041 | f54b3f92 | aurel32 | { "ldhs", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1042 | f54b3f92 | aurel32 | { "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
1043 | f54b3f92 | aurel32 | { "ldhs", 0x0c001040, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
1044 | f54b3f92 | aurel32 | { "ldhs", 0x0c001040, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
1045 | f54b3f92 | aurel32 | { "ldhs", 0x0c001040, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
1046 | f54b3f92 | aurel32 | { "ldhs", 0x0c001040, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
1047 | f54b3f92 | aurel32 | { "ldbs", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1048 | f54b3f92 | aurel32 | { "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
1049 | f54b3f92 | aurel32 | { "ldbs", 0x0c001000, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
1050 | f54b3f92 | aurel32 | { "ldbs", 0x0c001000, 0xfc0013c0, "cmcc5(s,b),t", pa11, FLAG_STRICT}, |
1051 | f54b3f92 | aurel32 | { "ldbs", 0x0c001000, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
1052 | f54b3f92 | aurel32 | { "ldbs", 0x0c001000, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
1053 | f54b3f92 | aurel32 | { "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1054 | f54b3f92 | aurel32 | { "ldwas", 0x0c001180, 0xfc00d3c0, "cmcc5(b),t", pa11, FLAG_STRICT}, |
1055 | f54b3f92 | aurel32 | { "ldwas", 0x0c001180, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
1056 | f54b3f92 | aurel32 | { "ldcws", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, FLAG_STRICT}, |
1057 | f54b3f92 | aurel32 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, FLAG_STRICT}, |
1058 | f54b3f92 | aurel32 | { "ldcws", 0x0c0011c0, 0xfc00d3c0, "cmcd5(b),t", pa11, FLAG_STRICT}, |
1059 | f54b3f92 | aurel32 | { "ldcws", 0x0c0011c0, 0xfc0013c0, "cmcd5(s,b),t", pa11, FLAG_STRICT}, |
1060 | f54b3f92 | aurel32 | { "ldcws", 0x0c0011c0, 0xfc00dfc0, "cM5(b),t", pa10, 0}, |
1061 | f54b3f92 | aurel32 | { "ldcws", 0x0c0011c0, 0xfc001fc0, "cM5(s,b),t", pa10, 0}, |
1062 | f54b3f92 | aurel32 | { "stws", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
1063 | f54b3f92 | aurel32 | { "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, |
1064 | f54b3f92 | aurel32 | { "stws", 0x0c001280, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
1065 | f54b3f92 | aurel32 | { "stws", 0x0c001280, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
1066 | f54b3f92 | aurel32 | { "stws", 0x0c001280, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
1067 | f54b3f92 | aurel32 | { "stws", 0x0c001280, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
1068 | f54b3f92 | aurel32 | { "sths", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
1069 | f54b3f92 | aurel32 | { "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, |
1070 | f54b3f92 | aurel32 | { "sths", 0x0c001240, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
1071 | f54b3f92 | aurel32 | { "sths", 0x0c001240, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
1072 | f54b3f92 | aurel32 | { "sths", 0x0c001240, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
1073 | f54b3f92 | aurel32 | { "sths", 0x0c001240, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
1074 | f54b3f92 | aurel32 | { "stbs", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
1075 | f54b3f92 | aurel32 | { "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, FLAG_STRICT}, |
1076 | f54b3f92 | aurel32 | { "stbs", 0x0c001200, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
1077 | f54b3f92 | aurel32 | { "stbs", 0x0c001200, 0xfc0013c0, "cmcCx,V(s,b)", pa11, FLAG_STRICT}, |
1078 | f54b3f92 | aurel32 | { "stbs", 0x0c001200, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
1079 | f54b3f92 | aurel32 | { "stbs", 0x0c001200, 0xfc001fc0, "cMx,V(s,b)", pa10, 0}, |
1080 | f54b3f92 | aurel32 | { "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, FLAG_STRICT}, |
1081 | f54b3f92 | aurel32 | { "stwas", 0x0c001380, 0xfc00d3c0, "cmcCx,V(b)", pa11, FLAG_STRICT}, |
1082 | f54b3f92 | aurel32 | { "stwas", 0x0c001380, 0xfc00dfc0, "cMx,V(b)", pa10, 0}, |
1083 | f54b3f92 | aurel32 | { "stdby", 0x0c001340, 0xfc00d3c0, "cscCx,V(b)", pa20, FLAG_STRICT}, |
1084 | f54b3f92 | aurel32 | { "stdby", 0x0c001340, 0xfc0013c0, "cscCx,V(s,b)", pa20, FLAG_STRICT}, |
1085 | f54b3f92 | aurel32 | { "stbys", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, FLAG_STRICT}, |
1086 | f54b3f92 | aurel32 | { "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, FLAG_STRICT}, |
1087 | f54b3f92 | aurel32 | { "stbys", 0x0c001300, 0xfc00d3c0, "cscCx,V(b)", pa11, FLAG_STRICT}, |
1088 | f54b3f92 | aurel32 | { "stbys", 0x0c001300, 0xfc0013c0, "cscCx,V(s,b)", pa11, FLAG_STRICT}, |
1089 | f54b3f92 | aurel32 | { "stbys", 0x0c001300, 0xfc00dfc0, "cAx,V(b)", pa10, 0}, |
1090 | f54b3f92 | aurel32 | { "stbys", 0x0c001300, 0xfc001fc0, "cAx,V(s,b)", pa10, 0}, |
1091 | f54b3f92 | aurel32 | |
1092 | f54b3f92 | aurel32 | /* Immediate instructions. */
|
1093 | f54b3f92 | aurel32 | { "ldo", 0x34000000, 0xfc000000, "l(b),x", pa20w, 0}, |
1094 | f54b3f92 | aurel32 | { "ldo", 0x34000000, 0xfc00c000, "j(b),x", pa10, 0}, |
1095 | f54b3f92 | aurel32 | { "ldil", 0x20000000, 0xfc000000, "k,b", pa10, 0}, |
1096 | f54b3f92 | aurel32 | { "addil", 0x28000000, 0xfc000000, "k,b,Z", pa10, 0}, |
1097 | f54b3f92 | aurel32 | { "addil", 0x28000000, 0xfc000000, "k,b", pa10, 0}, |
1098 | f54b3f92 | aurel32 | |
1099 | f54b3f92 | aurel32 | /* Branching instructions. */
|
1100 | f54b3f92 | aurel32 | { "b", 0xe8008000, 0xfc00e000, "cpnXL", pa20, FLAG_STRICT}, |
1101 | f54b3f92 | aurel32 | { "b", 0xe800a000, 0xfc00e000, "clnXL", pa20, FLAG_STRICT}, |
1102 | f54b3f92 | aurel32 | { "b", 0xe8000000, 0xfc00e000, "clnW,b", pa10, FLAG_STRICT}, |
1103 | f54b3f92 | aurel32 | { "b", 0xe8002000, 0xfc00e000, "cgnW,b", pa10, FLAG_STRICT}, |
1104 | f54b3f92 | aurel32 | { "b", 0xe8000000, 0xffe0e000, "nW", pa10, 0}, /* b,l foo,r0 */ |
1105 | f54b3f92 | aurel32 | { "bl", 0xe8000000, 0xfc00e000, "nW,b", pa10, 0}, |
1106 | f54b3f92 | aurel32 | { "gate", 0xe8002000, 0xfc00e000, "nW,b", pa10, 0}, |
1107 | f54b3f92 | aurel32 | { "blr", 0xe8004000, 0xfc00e001, "nx,b", pa10, 0}, |
1108 | f54b3f92 | aurel32 | { "bv", 0xe800c000, 0xfc00fffd, "nx(b)", pa10, 0}, |
1109 | f54b3f92 | aurel32 | { "bv", 0xe800c000, 0xfc00fffd, "n(b)", pa10, 0}, |
1110 | f54b3f92 | aurel32 | { "bve", 0xe800f001, 0xfc1ffffd, "cpn(b)L", pa20, FLAG_STRICT}, |
1111 | f54b3f92 | aurel32 | { "bve", 0xe800f000, 0xfc1ffffd, "cln(b)L", pa20, FLAG_STRICT}, |
1112 | f54b3f92 | aurel32 | { "bve", 0xe800d001, 0xfc1ffffd, "cPn(b)", pa20, FLAG_STRICT}, |
1113 | f54b3f92 | aurel32 | { "bve", 0xe800d000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, |
1114 | f54b3f92 | aurel32 | { "be", 0xe4000000, 0xfc000000, "clnz(S,b),Y", pa10, FLAG_STRICT}, |
1115 | f54b3f92 | aurel32 | { "be", 0xe4000000, 0xfc000000, "clnz(b),Y", pa10, FLAG_STRICT}, |
1116 | f54b3f92 | aurel32 | { "be", 0xe0000000, 0xfc000000, "nz(S,b)", pa10, 0}, |
1117 | f54b3f92 | aurel32 | { "be", 0xe0000000, 0xfc000000, "nz(b)", pa10, 0}, |
1118 | f54b3f92 | aurel32 | { "ble", 0xe4000000, 0xfc000000, "nz(S,b)", pa10, 0}, |
1119 | f54b3f92 | aurel32 | { "movb", 0xc8000000, 0xfc000000, "?ynx,b,w", pa10, 0}, |
1120 | f54b3f92 | aurel32 | { "movib", 0xcc000000, 0xfc000000, "?yn5,b,w", pa10, 0}, |
1121 | f54b3f92 | aurel32 | { "combt", 0x80000000, 0xfc000000, "?tnx,b,w", pa10, 0}, |
1122 | f54b3f92 | aurel32 | { "combf", 0x88000000, 0xfc000000, "?tnx,b,w", pa10, 0}, |
1123 | f54b3f92 | aurel32 | { "comibt", 0x84000000, 0xfc000000, "?tn5,b,w", pa10, 0}, |
1124 | f54b3f92 | aurel32 | { "comibf", 0x8c000000, 0xfc000000, "?tn5,b,w", pa10, 0}, |
1125 | f54b3f92 | aurel32 | { "addbt", 0xa0000000, 0xfc000000, "?dnx,b,w", pa10, 0}, |
1126 | f54b3f92 | aurel32 | { "addbf", 0xa8000000, 0xfc000000, "?dnx,b,w", pa10, 0}, |
1127 | f54b3f92 | aurel32 | { "addibt", 0xa4000000, 0xfc000000, "?dn5,b,w", pa10, 0}, |
1128 | f54b3f92 | aurel32 | { "addibf", 0xac000000, 0xfc000000, "?dn5,b,w", pa10, 0}, |
1129 | f54b3f92 | aurel32 | { "bb", 0xc0004000, 0xffe06000, "?bnx,!,w", pa10, FLAG_STRICT}, |
1130 | f54b3f92 | aurel32 | { "bb", 0xc0006000, 0xffe06000, "?Bnx,!,w", pa20, FLAG_STRICT}, |
1131 | f54b3f92 | aurel32 | { "bb", 0xc4004000, 0xfc006000, "?bnx,Q,w", pa10, FLAG_STRICT}, |
1132 | f54b3f92 | aurel32 | { "bb", 0xc4004000, 0xfc004000, "?Bnx,B,w", pa20, FLAG_STRICT}, |
1133 | f54b3f92 | aurel32 | { "bvb", 0xc0004000, 0xffe04000, "?bnx,w", pa10, 0}, |
1134 | f54b3f92 | aurel32 | { "clrbts", 0xe8004005, 0xffffffff, "", pa20, FLAG_STRICT}, |
1135 | f54b3f92 | aurel32 | { "popbts", 0xe8004005, 0xfffff007, "$", pa20, FLAG_STRICT}, |
1136 | f54b3f92 | aurel32 | { "pushnom", 0xe8004001, 0xffffffff, "", pa20, FLAG_STRICT}, |
1137 | f54b3f92 | aurel32 | { "pushbts", 0xe8004001, 0xffe0ffff, "x", pa20, FLAG_STRICT}, |
1138 | f54b3f92 | aurel32 | |
1139 | f54b3f92 | aurel32 | /* Computation Instructions. */
|
1140 | f54b3f92 | aurel32 | |
1141 | f54b3f92 | aurel32 | { "cmpclr", 0x080008a0, 0xfc000fe0, "?Sx,b,t", pa20, FLAG_STRICT}, |
1142 | f54b3f92 | aurel32 | { "cmpclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, FLAG_STRICT}, |
1143 | f54b3f92 | aurel32 | { "comclr", 0x08000880, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1144 | f54b3f92 | aurel32 | { "or", 0x08000260, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, |
1145 | f54b3f92 | aurel32 | { "or", 0x08000240, 0xfc000fe0, "?lx,b,t", pa10, 0}, |
1146 | f54b3f92 | aurel32 | { "xor", 0x080002a0, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, |
1147 | f54b3f92 | aurel32 | { "xor", 0x08000280, 0xfc000fe0, "?lx,b,t", pa10, 0}, |
1148 | f54b3f92 | aurel32 | { "and", 0x08000220, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, |
1149 | f54b3f92 | aurel32 | { "and", 0x08000200, 0xfc000fe0, "?lx,b,t", pa10, 0}, |
1150 | f54b3f92 | aurel32 | { "andcm", 0x08000020, 0xfc000fe0, "?Lx,b,t", pa20, FLAG_STRICT}, |
1151 | f54b3f92 | aurel32 | { "andcm", 0x08000000, 0xfc000fe0, "?lx,b,t", pa10, 0}, |
1152 | f54b3f92 | aurel32 | { "uxor", 0x080003a0, 0xfc000fe0, "?Ux,b,t", pa20, FLAG_STRICT}, |
1153 | f54b3f92 | aurel32 | { "uxor", 0x08000380, 0xfc000fe0, "?ux,b,t", pa10, 0}, |
1154 | f54b3f92 | aurel32 | { "uaddcm", 0x080009a0, 0xfc000fa0, "cT?Ux,b,t", pa20, FLAG_STRICT}, |
1155 | f54b3f92 | aurel32 | { "uaddcm", 0x08000980, 0xfc000fa0, "cT?ux,b,t", pa10, FLAG_STRICT}, |
1156 | f54b3f92 | aurel32 | { "uaddcm", 0x08000980, 0xfc000fe0, "?ux,b,t", pa10, 0}, |
1157 | f54b3f92 | aurel32 | { "uaddcmt", 0x080009c0, 0xfc000fe0, "?ux,b,t", pa10, 0}, |
1158 | f54b3f92 | aurel32 | { "dcor", 0x08000ba0, 0xfc1f0fa0, "ci?Ub,t", pa20, FLAG_STRICT}, |
1159 | f54b3f92 | aurel32 | { "dcor", 0x08000b80, 0xfc1f0fa0, "ci?ub,t", pa10, FLAG_STRICT}, |
1160 | f54b3f92 | aurel32 | { "dcor", 0x08000b80, 0xfc1f0fe0, "?ub,t", pa10, 0}, |
1161 | f54b3f92 | aurel32 | { "idcor", 0x08000bc0, 0xfc1f0fe0, "?ub,t", pa10, 0}, |
1162 | f54b3f92 | aurel32 | { "addi", 0xb0000000, 0xfc000000, "ct?ai,b,x", pa10, FLAG_STRICT}, |
1163 | f54b3f92 | aurel32 | { "addi", 0xb4000000, 0xfc000000, "cv?ai,b,x", pa10, FLAG_STRICT}, |
1164 | f54b3f92 | aurel32 | { "addi", 0xb4000000, 0xfc000800, "?ai,b,x", pa10, 0}, |
1165 | f54b3f92 | aurel32 | { "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0}, |
1166 | f54b3f92 | aurel32 | { "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0}, |
1167 | f54b3f92 | aurel32 | { "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0}, |
1168 | f54b3f92 | aurel32 | { "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT}, |
1169 | f54b3f92 | aurel32 | { "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT}, |
1170 | f54b3f92 | aurel32 | { "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT}, |
1171 | f54b3f92 | aurel32 | { "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT}, |
1172 | f54b3f92 | aurel32 | { "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1173 | f54b3f92 | aurel32 | { "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1174 | f54b3f92 | aurel32 | { "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1175 | f54b3f92 | aurel32 | { "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1176 | f54b3f92 | aurel32 | { "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1177 | f54b3f92 | aurel32 | { "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT}, |
1178 | f54b3f92 | aurel32 | { "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT}, |
1179 | f54b3f92 | aurel32 | { "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT}, |
1180 | f54b3f92 | aurel32 | { "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT}, |
1181 | f54b3f92 | aurel32 | { "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT}, |
1182 | f54b3f92 | aurel32 | { "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT}, |
1183 | f54b3f92 | aurel32 | { "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1184 | f54b3f92 | aurel32 | { "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1185 | f54b3f92 | aurel32 | { "subb", 0x08000500, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1186 | f54b3f92 | aurel32 | { "subbo", 0x08000d00, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1187 | f54b3f92 | aurel32 | { "subt", 0x080004c0, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1188 | f54b3f92 | aurel32 | { "subto", 0x08000cc0, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1189 | f54b3f92 | aurel32 | { "ds", 0x08000440, 0xfc000fe0, "?sx,b,t", pa10, 0}, |
1190 | f54b3f92 | aurel32 | { "subi", 0x94000000, 0xfc000000, "cv?si,b,x", pa10, FLAG_STRICT}, |
1191 | f54b3f92 | aurel32 | { "subi", 0x94000000, 0xfc000800, "?si,b,x", pa10, 0}, |
1192 | f54b3f92 | aurel32 | { "subio", 0x94000800, 0xfc000800, "?si,b,x", pa10, 0}, |
1193 | f54b3f92 | aurel32 | { "cmpiclr", 0x90000800, 0xfc000800, "?Si,b,x", pa20, FLAG_STRICT}, |
1194 | f54b3f92 | aurel32 | { "cmpiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, FLAG_STRICT}, |
1195 | f54b3f92 | aurel32 | { "comiclr", 0x90000000, 0xfc000800, "?si,b,x", pa10, 0}, |
1196 | f54b3f92 | aurel32 | { "shladd", 0x08000220, 0xfc000320, "ca?Ax,.,b,t", pa20, FLAG_STRICT}, |
1197 | f54b3f92 | aurel32 | { "shladd", 0x08000200, 0xfc000320, "ca?ax,.,b,t", pa10, FLAG_STRICT}, |
1198 | f54b3f92 | aurel32 | { "sh1add", 0x08000640, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1199 | f54b3f92 | aurel32 | { "sh1addl", 0x08000a40, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1200 | f54b3f92 | aurel32 | { "sh1addo", 0x08000e40, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1201 | f54b3f92 | aurel32 | { "sh2add", 0x08000680, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1202 | f54b3f92 | aurel32 | { "sh2addl", 0x08000a80, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1203 | f54b3f92 | aurel32 | { "sh2addo", 0x08000e80, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1204 | f54b3f92 | aurel32 | { "sh3add", 0x080006c0, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1205 | f54b3f92 | aurel32 | { "sh3addl", 0x08000ac0, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1206 | f54b3f92 | aurel32 | { "sh3addo", 0x08000ec0, 0xfc000fe0, "?ax,b,t", pa10, 0}, |
1207 | f54b3f92 | aurel32 | |
1208 | f54b3f92 | aurel32 | /* Subword Operation Instructions. */
|
1209 | f54b3f92 | aurel32 | |
1210 | f54b3f92 | aurel32 | { "hadd", 0x08000300, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, |
1211 | f54b3f92 | aurel32 | { "havg", 0x080002c0, 0xfc00ffe0, "x,b,t", pa20, FLAG_STRICT}, |
1212 | f54b3f92 | aurel32 | { "hshl", 0xf8008800, 0xffe0fc20, "x,*,t", pa20, FLAG_STRICT}, |
1213 | f54b3f92 | aurel32 | { "hshladd", 0x08000700, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, |
1214 | f54b3f92 | aurel32 | { "hshr", 0xf800c800, 0xfc1ff820, "cSb,*,t", pa20, FLAG_STRICT}, |
1215 | f54b3f92 | aurel32 | { "hshradd", 0x08000500, 0xfc00ff20, "x,.,b,t", pa20, FLAG_STRICT}, |
1216 | f54b3f92 | aurel32 | { "hsub", 0x08000100, 0xfc00ff20, "cHx,b,t", pa20, FLAG_STRICT}, |
1217 | f54b3f92 | aurel32 | { "mixh", 0xf8008400, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, |
1218 | f54b3f92 | aurel32 | { "mixw", 0xf8008000, 0xfc009fe0, "chx,b,t", pa20, FLAG_STRICT}, |
1219 | f54b3f92 | aurel32 | { "permh", 0xf8000000, 0xfc009020, "c*a,t", pa20, FLAG_STRICT}, |
1220 | f54b3f92 | aurel32 | |
1221 | f54b3f92 | aurel32 | |
1222 | f54b3f92 | aurel32 | /* Extract and Deposit Instructions. */
|
1223 | f54b3f92 | aurel32 | |
1224 | f54b3f92 | aurel32 | { "shrpd", 0xd0000200, 0xfc001fe0, "?Xx,b,!,t", pa20, FLAG_STRICT}, |
1225 | f54b3f92 | aurel32 | { "shrpd", 0xd0000400, 0xfc001400, "?Xx,b,~,t", pa20, FLAG_STRICT}, |
1226 | f54b3f92 | aurel32 | { "shrpw", 0xd0000000, 0xfc001fe0, "?xx,b,!,t", pa10, FLAG_STRICT}, |
1227 | f54b3f92 | aurel32 | { "shrpw", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, FLAG_STRICT}, |
1228 | f54b3f92 | aurel32 | { "vshd", 0xd0000000, 0xfc001fe0, "?xx,b,t", pa10, 0}, |
1229 | f54b3f92 | aurel32 | { "shd", 0xd0000800, 0xfc001c00, "?xx,b,p,t", pa10, 0}, |
1230 | f54b3f92 | aurel32 | { "extrd", 0xd0001200, 0xfc001ae0, "cS?Xb,!,%,x", pa20, FLAG_STRICT}, |
1231 | f54b3f92 | aurel32 | { "extrd", 0xd8000000, 0xfc000000, "cS?Xb,q,|,x", pa20, FLAG_STRICT}, |
1232 | f54b3f92 | aurel32 | { "extrw", 0xd0001000, 0xfc001be0, "cS?xb,!,T,x", pa10, FLAG_STRICT}, |
1233 | f54b3f92 | aurel32 | { "extrw", 0xd0001800, 0xfc001800, "cS?xb,P,T,x", pa10, FLAG_STRICT}, |
1234 | f54b3f92 | aurel32 | { "vextru", 0xd0001000, 0xfc001fe0, "?xb,T,x", pa10, 0}, |
1235 | f54b3f92 | aurel32 | { "vextrs", 0xd0001400, 0xfc001fe0, "?xb,T,x", pa10, 0}, |
1236 | f54b3f92 | aurel32 | { "extru", 0xd0001800, 0xfc001c00, "?xb,P,T,x", pa10, 0}, |
1237 | f54b3f92 | aurel32 | { "extrs", 0xd0001c00, 0xfc001c00, "?xb,P,T,x", pa10, 0}, |
1238 | f54b3f92 | aurel32 | { "depd", 0xd4000200, 0xfc001ae0, "cz?Xx,!,%,b", pa20, FLAG_STRICT}, |
1239 | f54b3f92 | aurel32 | { "depd", 0xf0000000, 0xfc000000, "cz?Xx,~,|,b", pa20, FLAG_STRICT}, |
1240 | f54b3f92 | aurel32 | { "depdi", 0xd4001200, 0xfc001ae0, "cz?X5,!,%,b", pa20, FLAG_STRICT}, |
1241 | f54b3f92 | aurel32 | { "depdi", 0xf4000000, 0xfc000000, "cz?X5,~,|,b", pa20, FLAG_STRICT}, |
1242 | f54b3f92 | aurel32 | { "depw", 0xd4000000, 0xfc001be0, "cz?xx,!,T,b", pa10, FLAG_STRICT}, |
1243 | f54b3f92 | aurel32 | { "depw", 0xd4000800, 0xfc001800, "cz?xx,p,T,b", pa10, FLAG_STRICT}, |
1244 | f54b3f92 | aurel32 | { "depwi", 0xd4001000, 0xfc001be0, "cz?x5,!,T,b", pa10, FLAG_STRICT}, |
1245 | f54b3f92 | aurel32 | { "depwi", 0xd4001800, 0xfc001800, "cz?x5,p,T,b", pa10, FLAG_STRICT}, |
1246 | f54b3f92 | aurel32 | { "zvdep", 0xd4000000, 0xfc001fe0, "?xx,T,b", pa10, 0}, |
1247 | f54b3f92 | aurel32 | { "vdep", 0xd4000400, 0xfc001fe0, "?xx,T,b", pa10, 0}, |
1248 | f54b3f92 | aurel32 | { "zdep", 0xd4000800, 0xfc001c00, "?xx,p,T,b", pa10, 0}, |
1249 | f54b3f92 | aurel32 | { "dep", 0xd4000c00, 0xfc001c00, "?xx,p,T,b", pa10, 0}, |
1250 | f54b3f92 | aurel32 | { "zvdepi", 0xd4001000, 0xfc001fe0, "?x5,T,b", pa10, 0}, |
1251 | f54b3f92 | aurel32 | { "vdepi", 0xd4001400, 0xfc001fe0, "?x5,T,b", pa10, 0}, |
1252 | f54b3f92 | aurel32 | { "zdepi", 0xd4001800, 0xfc001c00, "?x5,p,T,b", pa10, 0}, |
1253 | f54b3f92 | aurel32 | { "depi", 0xd4001c00, 0xfc001c00, "?x5,p,T,b", pa10, 0}, |
1254 | f54b3f92 | aurel32 | |
1255 | f54b3f92 | aurel32 | /* System Control Instructions. */
|
1256 | f54b3f92 | aurel32 | |
1257 | f54b3f92 | aurel32 | { "break", 0x00000000, 0xfc001fe0, "r,A", pa10, 0}, |
1258 | f54b3f92 | aurel32 | { "rfi", 0x00000c00, 0xffffff1f, "cr", pa10, FLAG_STRICT}, |
1259 | f54b3f92 | aurel32 | { "rfi", 0x00000c00, 0xffffffff, "", pa10, 0}, |
1260 | f54b3f92 | aurel32 | { "rfir", 0x00000ca0, 0xffffffff, "", pa11, 0}, |
1261 | f54b3f92 | aurel32 | { "ssm", 0x00000d60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, |
1262 | f54b3f92 | aurel32 | { "ssm", 0x00000d60, 0xffe0ffe0, "R,t", pa10, 0}, |
1263 | f54b3f92 | aurel32 | { "rsm", 0x00000e60, 0xfc00ffe0, "U,t", pa20, FLAG_STRICT}, |
1264 | f54b3f92 | aurel32 | { "rsm", 0x00000e60, 0xffe0ffe0, "R,t", pa10, 0}, |
1265 | f54b3f92 | aurel32 | { "mtsm", 0x00001860, 0xffe0ffff, "x", pa10, 0}, |
1266 | f54b3f92 | aurel32 | { "ldsid", 0x000010a0, 0xfc1fffe0, "(b),t", pa10, 0}, |
1267 | f54b3f92 | aurel32 | { "ldsid", 0x000010a0, 0xfc1f3fe0, "(s,b),t", pa10, 0}, |
1268 | f54b3f92 | aurel32 | { "mtsp", 0x00001820, 0xffe01fff, "x,S", pa10, 0}, |
1269 | f54b3f92 | aurel32 | { "mtctl", 0x00001840, 0xfc00ffff, "x,^", pa10, 0}, |
1270 | f54b3f92 | aurel32 | { "mtsarcm", 0x016018C0, 0xffe0ffff, "x", pa20, FLAG_STRICT}, |
1271 | f54b3f92 | aurel32 | { "mfia", 0x000014A0, 0xffffffe0, "t", pa20, FLAG_STRICT}, |
1272 | f54b3f92 | aurel32 | { "mfsp", 0x000004a0, 0xffff1fe0, "S,t", pa10, 0}, |
1273 | f54b3f92 | aurel32 | { "mfctl", 0x016048a0, 0xffffffe0, "cW!,t", pa20, FLAG_STRICT}, |
1274 | f54b3f92 | aurel32 | { "mfctl", 0x000008a0, 0xfc1fffe0, "^,t", pa10, 0}, |
1275 | f54b3f92 | aurel32 | { "sync", 0x00000400, 0xffffffff, "", pa10, 0}, |
1276 | f54b3f92 | aurel32 | { "syncdma", 0x00100400, 0xffffffff, "", pa10, 0}, |
1277 | f54b3f92 | aurel32 | { "probe", 0x04001180, 0xfc00ffa0, "cw(b),x,t", pa10, FLAG_STRICT}, |
1278 | f54b3f92 | aurel32 | { "probe", 0x04001180, 0xfc003fa0, "cw(s,b),x,t", pa10, FLAG_STRICT}, |
1279 | f54b3f92 | aurel32 | { "probei", 0x04003180, 0xfc00ffa0, "cw(b),R,t", pa10, FLAG_STRICT}, |
1280 | f54b3f92 | aurel32 | { "probei", 0x04003180, 0xfc003fa0, "cw(s,b),R,t", pa10, FLAG_STRICT}, |
1281 | f54b3f92 | aurel32 | { "prober", 0x04001180, 0xfc00ffe0, "(b),x,t", pa10, 0}, |
1282 | f54b3f92 | aurel32 | { "prober", 0x04001180, 0xfc003fe0, "(s,b),x,t", pa10, 0}, |
1283 | f54b3f92 | aurel32 | { "proberi", 0x04003180, 0xfc00ffe0, "(b),R,t", pa10, 0}, |
1284 | f54b3f92 | aurel32 | { "proberi", 0x04003180, 0xfc003fe0, "(s,b),R,t", pa10, 0}, |
1285 | f54b3f92 | aurel32 | { "probew", 0x040011c0, 0xfc00ffe0, "(b),x,t", pa10, 0}, |
1286 | f54b3f92 | aurel32 | { "probew", 0x040011c0, 0xfc003fe0, "(s,b),x,t", pa10, 0}, |
1287 | f54b3f92 | aurel32 | { "probewi", 0x040031c0, 0xfc00ffe0, "(b),R,t", pa10, 0}, |
1288 | f54b3f92 | aurel32 | { "probewi", 0x040031c0, 0xfc003fe0, "(s,b),R,t", pa10, 0}, |
1289 | f54b3f92 | aurel32 | { "lpa", 0x04001340, 0xfc00ffc0, "cZx(b),t", pa10, 0}, |
1290 | f54b3f92 | aurel32 | { "lpa", 0x04001340, 0xfc003fc0, "cZx(s,b),t", pa10, 0}, |
1291 | f54b3f92 | aurel32 | { "lci", 0x04001300, 0xfc00ffe0, "x(b),t", pa11, 0}, |
1292 | f54b3f92 | aurel32 | { "lci", 0x04001300, 0xfc003fe0, "x(s,b),t", pa11, 0}, |
1293 | f54b3f92 | aurel32 | { "pdtlb", 0x04001600, 0xfc00ffdf, "cLcZx(b)", pa20, FLAG_STRICT}, |
1294 | f54b3f92 | aurel32 | { "pdtlb", 0x04001600, 0xfc003fdf, "cLcZx(s,b)", pa20, FLAG_STRICT}, |
1295 | f54b3f92 | aurel32 | { "pdtlb", 0x04001600, 0xfc1fffdf, "cLcZ@(b)", pa20, FLAG_STRICT}, |
1296 | f54b3f92 | aurel32 | { "pdtlb", 0x04001600, 0xfc1f3fdf, "cLcZ@(s,b)", pa20, FLAG_STRICT}, |
1297 | f54b3f92 | aurel32 | { "pdtlb", 0x04001200, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
1298 | f54b3f92 | aurel32 | { "pdtlb", 0x04001200, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
1299 | f54b3f92 | aurel32 | { "pitlb", 0x04000600, 0xfc001fdf, "cLcZx(S,b)", pa20, FLAG_STRICT}, |
1300 | f54b3f92 | aurel32 | { "pitlb", 0x04000600, 0xfc1f1fdf, "cLcZ@(S,b)", pa20, FLAG_STRICT}, |
1301 | f54b3f92 | aurel32 | { "pitlb", 0x04000200, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
1302 | f54b3f92 | aurel32 | { "pdtlbe", 0x04001240, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
1303 | f54b3f92 | aurel32 | { "pdtlbe", 0x04001240, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
1304 | f54b3f92 | aurel32 | { "pitlbe", 0x04000240, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
1305 | f54b3f92 | aurel32 | { "idtlba", 0x04001040, 0xfc00ffff, "x,(b)", pa10, 0}, |
1306 | f54b3f92 | aurel32 | { "idtlba", 0x04001040, 0xfc003fff, "x,(s,b)", pa10, 0}, |
1307 | f54b3f92 | aurel32 | { "iitlba", 0x04000040, 0xfc001fff, "x,(S,b)", pa10, 0}, |
1308 | f54b3f92 | aurel32 | { "idtlbp", 0x04001000, 0xfc00ffff, "x,(b)", pa10, 0}, |
1309 | f54b3f92 | aurel32 | { "idtlbp", 0x04001000, 0xfc003fff, "x,(s,b)", pa10, 0}, |
1310 | f54b3f92 | aurel32 | { "iitlbp", 0x04000000, 0xfc001fff, "x,(S,b)", pa10, 0}, |
1311 | f54b3f92 | aurel32 | { "pdc", 0x04001380, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
1312 | f54b3f92 | aurel32 | { "pdc", 0x04001380, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
1313 | f54b3f92 | aurel32 | { "fdc", 0x04001280, 0xfc00ffdf, "cZx(b)", pa10, FLAG_STRICT}, |
1314 | f54b3f92 | aurel32 | { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, FLAG_STRICT}, |
1315 | f54b3f92 | aurel32 | { "fdc", 0x04003280, 0xfc00ffff, "5(b)", pa20, FLAG_STRICT}, |
1316 | f54b3f92 | aurel32 | { "fdc", 0x04003280, 0xfc003fff, "5(s,b)", pa20, FLAG_STRICT}, |
1317 | f54b3f92 | aurel32 | { "fdc", 0x04001280, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
1318 | f54b3f92 | aurel32 | { "fdc", 0x04001280, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
1319 | f54b3f92 | aurel32 | { "fic", 0x040013c0, 0xfc00dfdf, "cZx(b)", pa20, FLAG_STRICT}, |
1320 | f54b3f92 | aurel32 | { "fic", 0x04000280, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
1321 | f54b3f92 | aurel32 | { "fdce", 0x040012c0, 0xfc00ffdf, "cZx(b)", pa10, 0}, |
1322 | f54b3f92 | aurel32 | { "fdce", 0x040012c0, 0xfc003fdf, "cZx(s,b)", pa10, 0}, |
1323 | f54b3f92 | aurel32 | { "fice", 0x040002c0, 0xfc001fdf, "cZx(S,b)", pa10, 0}, |
1324 | f54b3f92 | aurel32 | { "diag", 0x14000000, 0xfc000000, "D", pa10, 0}, |
1325 | f54b3f92 | aurel32 | { "idtlbt", 0x04001800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, |
1326 | f54b3f92 | aurel32 | { "iitlbt", 0x04000800, 0xfc00ffff, "x,b", pa20, FLAG_STRICT}, |
1327 | f54b3f92 | aurel32 | |
1328 | f54b3f92 | aurel32 | /* These may be specific to certain versions of the PA. Joel claimed
|
1329 | f54b3f92 | aurel32 | they were 72000 (7200?) specific. However, I'm almost certain the
|
1330 | f54b3f92 | aurel32 | mtcpu/mfcpu were undocumented, but available in the older 700 machines. */
|
1331 | f54b3f92 | aurel32 | { "mtcpu", 0x14001600, 0xfc00ffff, "x,^", pa10, 0}, |
1332 | f54b3f92 | aurel32 | { "mfcpu", 0x14001A00, 0xfc00ffff, "^,x", pa10, 0}, |
1333 | f54b3f92 | aurel32 | { "tocen", 0x14403600, 0xffffffff, "", pa10, 0}, |
1334 | f54b3f92 | aurel32 | { "tocdis", 0x14401620, 0xffffffff, "", pa10, 0}, |
1335 | f54b3f92 | aurel32 | { "shdwgr", 0x14402600, 0xffffffff, "", pa10, 0}, |
1336 | f54b3f92 | aurel32 | { "grshdw", 0x14400620, 0xffffffff, "", pa10, 0}, |
1337 | f54b3f92 | aurel32 | |
1338 | f54b3f92 | aurel32 | /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either
|
1339 | f54b3f92 | aurel32 | the Timex FPU or the Mustang ERS (not sure which) manual. */
|
1340 | f54b3f92 | aurel32 | { "gfw", 0x04001680, 0xfc00ffdf, "cZx(b)", pa11, 0}, |
1341 | f54b3f92 | aurel32 | { "gfw", 0x04001680, 0xfc003fdf, "cZx(s,b)", pa11, 0}, |
1342 | f54b3f92 | aurel32 | { "gfr", 0x04001a80, 0xfc00ffdf, "cZx(b)", pa11, 0}, |
1343 | f54b3f92 | aurel32 | { "gfr", 0x04001a80, 0xfc003fdf, "cZx(s,b)", pa11, 0}, |
1344 | f54b3f92 | aurel32 | |
1345 | f54b3f92 | aurel32 | /* Floating Point Coprocessor Instructions. */
|
1346 | f54b3f92 | aurel32 | |
1347 | f54b3f92 | aurel32 | { "fldw", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT}, |
1348 | f54b3f92 | aurel32 | { "fldw", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT}, |
1349 | f54b3f92 | aurel32 | { "fldw", 0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT}, |
1350 | f54b3f92 | aurel32 | { "fldw", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, |
1351 | f54b3f92 | aurel32 | { "fldw", 0x24001020, 0xfc1ff3a0, "cocc@(b),fT", pa20, FLAG_STRICT}, |
1352 | f54b3f92 | aurel32 | { "fldw", 0x24001020, 0xfc1f33a0, "cocc@(s,b),fT", pa20, FLAG_STRICT}, |
1353 | f54b3f92 | aurel32 | { "fldw", 0x24001000, 0xfc00df80, "cM5(b),fT", pa10, FLAG_STRICT}, |
1354 | f54b3f92 | aurel32 | { "fldw", 0x24001000, 0xfc001f80, "cM5(s,b),fT", pa10, FLAG_STRICT}, |
1355 | f54b3f92 | aurel32 | { "fldw", 0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT}, |
1356 | f54b3f92 | aurel32 | { "fldw", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, |
1357 | f54b3f92 | aurel32 | { "fldw", 0x5c000000, 0xfc000004, "y(b),fe", pa20w, FLAG_STRICT}, |
1358 | f54b3f92 | aurel32 | { "fldw", 0x58000000, 0xfc000000, "cJy(b),fe", pa20w, FLAG_STRICT}, |
1359 | f54b3f92 | aurel32 | { "fldw", 0x5c000000, 0xfc00c004, "d(b),fe", pa20, FLAG_STRICT}, |
1360 | f54b3f92 | aurel32 | { "fldw", 0x5c000000, 0xfc000004, "d(s,b),fe", pa20, FLAG_STRICT}, |
1361 | f54b3f92 | aurel32 | { "fldw", 0x58000000, 0xfc00c000, "cJd(b),fe", pa20, FLAG_STRICT}, |
1362 | f54b3f92 | aurel32 | { "fldw", 0x58000000, 0xfc000000, "cJd(s,b),fe", pa20, FLAG_STRICT}, |
1363 | f54b3f92 | aurel32 | { "fldd", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT}, |
1364 | f54b3f92 | aurel32 | { "fldd", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT}, |
1365 | f54b3f92 | aurel32 | { "fldd", 0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT}, |
1366 | f54b3f92 | aurel32 | { "fldd", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, |
1367 | f54b3f92 | aurel32 | { "fldd", 0x2c001020, 0xfc1ff3e0, "cocc@(b),ft", pa20, FLAG_STRICT}, |
1368 | f54b3f92 | aurel32 | { "fldd", 0x2c001020, 0xfc1f33e0, "cocc@(s,b),ft", pa20, FLAG_STRICT}, |
1369 | f54b3f92 | aurel32 | { "fldd", 0x2c001000, 0xfc00dfc0, "cM5(b),ft", pa10, FLAG_STRICT}, |
1370 | f54b3f92 | aurel32 | { "fldd", 0x2c001000, 0xfc001fc0, "cM5(s,b),ft", pa10, FLAG_STRICT}, |
1371 | f54b3f92 | aurel32 | { "fldd", 0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, |
1372 | f54b3f92 | aurel32 | { "fldd", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, |
1373 | f54b3f92 | aurel32 | { "fldd", 0x50000002, 0xfc000002, "cq&(b),fx", pa20w, FLAG_STRICT}, |
1374 | f54b3f92 | aurel32 | { "fldd", 0x50000002, 0xfc00c002, "cq#(b),fx", pa20, FLAG_STRICT}, |
1375 | f54b3f92 | aurel32 | { "fldd", 0x50000002, 0xfc000002, "cq#(s,b),fx", pa20, FLAG_STRICT}, |
1376 | f54b3f92 | aurel32 | { "fstw", 0x24000200, 0xfc00df80, "cXfT,x(b)", pa10, FLAG_STRICT}, |
1377 | f54b3f92 | aurel32 | { "fstw", 0x24000200, 0xfc001f80, "cXfT,x(s,b)", pa10, FLAG_STRICT}, |
1378 | f54b3f92 | aurel32 | { "fstw", 0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, |
1379 | f54b3f92 | aurel32 | { "fstw", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, |
1380 | f54b3f92 | aurel32 | { "fstw", 0x24001220, 0xfc1ff3a0, "cocCfT,@(b)", pa20, FLAG_STRICT}, |
1381 | f54b3f92 | aurel32 | { "fstw", 0x24001220, 0xfc1f33a0, "cocCfT,@(s,b)", pa20, FLAG_STRICT}, |
1382 | f54b3f92 | aurel32 | { "fstw", 0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT}, |
1383 | f54b3f92 | aurel32 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, |
1384 | f54b3f92 | aurel32 | { "fstw", 0x24001200, 0xfc00df80, "cMfT,5(b)", pa10, FLAG_STRICT}, |
1385 | f54b3f92 | aurel32 | { "fstw", 0x24001200, 0xfc001f80, "cMfT,5(s,b)", pa10, FLAG_STRICT}, |
1386 | f54b3f92 | aurel32 | { "fstw", 0x7c000000, 0xfc000004, "fE,y(b)", pa20w, FLAG_STRICT}, |
1387 | f54b3f92 | aurel32 | { "fstw", 0x78000000, 0xfc000000, "cJfE,y(b)", pa20w, FLAG_STRICT}, |
1388 | f54b3f92 | aurel32 | { "fstw", 0x7c000000, 0xfc00c004, "fE,d(b)", pa20, FLAG_STRICT}, |
1389 | f54b3f92 | aurel32 | { "fstw", 0x7c000000, 0xfc000004, "fE,d(s,b)", pa20, FLAG_STRICT}, |
1390 | f54b3f92 | aurel32 | { "fstw", 0x78000000, 0xfc00c000, "cJfE,d(b)", pa20, FLAG_STRICT}, |
1391 | f54b3f92 | aurel32 | { "fstw", 0x78000000, 0xfc000000, "cJfE,d(s,b)", pa20, FLAG_STRICT}, |
1392 | f54b3f92 | aurel32 | { "fstd", 0x2c000200, 0xfc00dfc0, "cXft,x(b)", pa10, FLAG_STRICT}, |
1393 | f54b3f92 | aurel32 | { "fstd", 0x2c000200, 0xfc001fc0, "cXft,x(s,b)", pa10, FLAG_STRICT}, |
1394 | f54b3f92 | aurel32 | { "fstd", 0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, |
1395 | f54b3f92 | aurel32 | { "fstd", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, |
1396 | f54b3f92 | aurel32 | { "fstd", 0x2c001220, 0xfc1ff3e0, "cocCft,@(b)", pa20, FLAG_STRICT}, |
1397 | f54b3f92 | aurel32 | { "fstd", 0x2c001220, 0xfc1f33e0, "cocCft,@(s,b)", pa20, FLAG_STRICT}, |
1398 | f54b3f92 | aurel32 | { "fstd", 0x2c001200, 0xfc00dfc0, "cMft,5(b)", pa10, FLAG_STRICT}, |
1399 | f54b3f92 | aurel32 | { "fstd", 0x2c001200, 0xfc001fc0, "cMft,5(s,b)", pa10, FLAG_STRICT}, |
1400 | f54b3f92 | aurel32 | { "fstd", 0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, |
1401 | f54b3f92 | aurel32 | { "fstd", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, |
1402 | f54b3f92 | aurel32 | { "fstd", 0x70000002, 0xfc000002, "cqfx,&(b)", pa20w, FLAG_STRICT}, |
1403 | f54b3f92 | aurel32 | { "fstd", 0x70000002, 0xfc00c002, "cqfx,#(b)", pa20, FLAG_STRICT}, |
1404 | f54b3f92 | aurel32 | { "fstd", 0x70000002, 0xfc000002, "cqfx,#(s,b)", pa20, FLAG_STRICT}, |
1405 | f54b3f92 | aurel32 | { "fldwx", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, FLAG_STRICT}, |
1406 | f54b3f92 | aurel32 | { "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, FLAG_STRICT}, |
1407 | f54b3f92 | aurel32 | { "fldwx", 0x24000000, 0xfc00d380, "cxccx(b),fT", pa11, FLAG_STRICT}, |
1408 | f54b3f92 | aurel32 | { "fldwx", 0x24000000, 0xfc001380, "cxccx(s,b),fT", pa11, FLAG_STRICT}, |
1409 | f54b3f92 | aurel32 | { "fldwx", 0x24000000, 0xfc00df80, "cXx(b),fT", pa10, 0}, |
1410 | f54b3f92 | aurel32 | { "fldwx", 0x24000000, 0xfc001f80, "cXx(s,b),fT", pa10, 0}, |
1411 | f54b3f92 | aurel32 | { "flddx", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, FLAG_STRICT}, |
1412 | f54b3f92 | aurel32 | { "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, FLAG_STRICT}, |
1413 | f54b3f92 | aurel32 | { "flddx", 0x2c000000, 0xfc00d3c0, "cxccx(b),ft", pa11, FLAG_STRICT}, |
1414 | f54b3f92 | aurel32 | { "flddx", 0x2c000000, 0xfc0013c0, "cxccx(s,b),ft", pa11, FLAG_STRICT}, |
1415 | f54b3f92 | aurel32 | { "flddx", 0x2c000000, 0xfc00dfc0, "cXx(b),ft", pa10, 0}, |
1416 | f54b3f92 | aurel32 | { "flddx", 0x2c000000, 0xfc001fc0, "cXx(s,b),ft", pa10, 0}, |
1417 | f54b3f92 | aurel32 | { "fstwx", 0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, FLAG_STRICT}, |
1418 | f54b3f92 | aurel32 | { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, FLAG_STRICT}, |
1419 | f54b3f92 | aurel32 | { "fstwx", 0x24000200, 0xfc00d380, "cxcCfT,x(b)", pa11, FLAG_STRICT}, |
1420 | f54b3f92 | aurel32 | { "fstwx", 0x24000200, 0xfc001380, "cxcCfT,x(s,b)", pa11, FLAG_STRICT}, |
1421 | f54b3f92 | aurel32 | { "fstwx", 0x24000200, 0xfc00df80, "cxfT,x(b)", pa10, 0}, |
1422 | f54b3f92 | aurel32 | { "fstwx", 0x24000200, 0xfc001f80, "cxfT,x(s,b)", pa10, 0}, |
1423 | f54b3f92 | aurel32 | { "fstdx", 0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, FLAG_STRICT}, |
1424 | f54b3f92 | aurel32 | { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, FLAG_STRICT}, |
1425 | f54b3f92 | aurel32 | { "fstdx", 0x2c000200, 0xfc00d3c0, "cxcCft,x(b)", pa11, FLAG_STRICT}, |
1426 | f54b3f92 | aurel32 | { "fstdx", 0x2c000200, 0xfc0013c0, "cxcCft,x(s,b)", pa11, FLAG_STRICT}, |
1427 | f54b3f92 | aurel32 | { "fstdx", 0x2c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0}, |
1428 | f54b3f92 | aurel32 | { "fstdx", 0x2c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, |
1429 | f54b3f92 | aurel32 | { "fstqx", 0x3c000200, 0xfc00dfc0, "cxft,x(b)", pa10, 0}, |
1430 | f54b3f92 | aurel32 | { "fstqx", 0x3c000200, 0xfc001fc0, "cxft,x(s,b)", pa10, 0}, |
1431 | f54b3f92 | aurel32 | { "fldws", 0x24001000, 0xfc00df80, "cm5(b),fT", pa10, FLAG_STRICT}, |
1432 | f54b3f92 | aurel32 | { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, FLAG_STRICT}, |
1433 | f54b3f92 | aurel32 | { "fldws", 0x24001000, 0xfc00d380, "cmcc5(b),fT", pa11, FLAG_STRICT}, |
1434 | f54b3f92 | aurel32 | { "fldws", 0x24001000, 0xfc001380, "cmcc5(s,b),fT", pa11, FLAG_STRICT}, |
1435 | f54b3f92 | aurel32 | { "fldws", 0x24001000, 0xfc00df80, "cm5(b),fT", pa10, 0}, |
1436 | f54b3f92 | aurel32 | { "fldws", 0x24001000, 0xfc001f80, "cm5(s,b),fT", pa10, 0}, |
1437 | f54b3f92 | aurel32 | { "fldds", 0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, FLAG_STRICT}, |
1438 | f54b3f92 | aurel32 | { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, FLAG_STRICT}, |
1439 | f54b3f92 | aurel32 | { "fldds", 0x2c001000, 0xfc00d3c0, "cmcc5(b),ft", pa11, FLAG_STRICT}, |
1440 | f54b3f92 | aurel32 | { "fldds", 0x2c001000, 0xfc0013c0, "cmcc5(s,b),ft", pa11, FLAG_STRICT}, |
1441 | f54b3f92 | aurel32 | { "fldds", 0x2c001000, 0xfc00dfc0, "cm5(b),ft", pa10, 0}, |
1442 | f54b3f92 | aurel32 | { "fldds", 0x2c001000, 0xfc001fc0, "cm5(s,b),ft", pa10, 0}, |
1443 | f54b3f92 | aurel32 | { "fstws", 0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, FLAG_STRICT}, |
1444 | f54b3f92 | aurel32 | { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, FLAG_STRICT}, |
1445 | f54b3f92 | aurel32 | { "fstws", 0x24001200, 0xfc00d380, "cmcCfT,5(b)", pa11, FLAG_STRICT}, |
1446 | f54b3f92 | aurel32 | { "fstws", 0x24001200, 0xfc001380, "cmcCfT,5(s,b)", pa11, FLAG_STRICT}, |
1447 | f54b3f92 | aurel32 | { "fstws", 0x24001200, 0xfc00df80, "cmfT,5(b)", pa10, 0}, |
1448 | f54b3f92 | aurel32 | { "fstws", 0x24001200, 0xfc001f80, "cmfT,5(s,b)", pa10, 0}, |
1449 | f54b3f92 | aurel32 | { "fstds", 0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, FLAG_STRICT}, |
1450 | f54b3f92 | aurel32 | { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, FLAG_STRICT}, |
1451 | f54b3f92 | aurel32 | { "fstds", 0x2c001200, 0xfc00d3c0, "cmcCft,5(b)", pa11, FLAG_STRICT}, |
1452 | f54b3f92 | aurel32 | { "fstds", 0x2c001200, 0xfc0013c0, "cmcCft,5(s,b)", pa11, FLAG_STRICT}, |
1453 | f54b3f92 | aurel32 | { "fstds", 0x2c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0}, |
1454 | f54b3f92 | aurel32 | { "fstds", 0x2c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, |
1455 | f54b3f92 | aurel32 | { "fstqs", 0x3c001200, 0xfc00dfc0, "cmft,5(b)", pa10, 0}, |
1456 | f54b3f92 | aurel32 | { "fstqs", 0x3c001200, 0xfc001fc0, "cmft,5(s,b)", pa10, 0}, |
1457 | f54b3f92 | aurel32 | { "fadd", 0x30000600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, |
1458 | f54b3f92 | aurel32 | { "fadd", 0x38000600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, |
1459 | f54b3f92 | aurel32 | { "fsub", 0x30002600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, |
1460 | f54b3f92 | aurel32 | { "fsub", 0x38002600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, |
1461 | f54b3f92 | aurel32 | { "fmpy", 0x30004600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, |
1462 | f54b3f92 | aurel32 | { "fmpy", 0x38004600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, |
1463 | f54b3f92 | aurel32 | { "fdiv", 0x30006600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, |
1464 | f54b3f92 | aurel32 | { "fdiv", 0x38006600, 0xfc00e720, "IfA,fB,fT", pa10, 0}, |
1465 | f54b3f92 | aurel32 | { "fsqrt", 0x30008000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, |
1466 | f54b3f92 | aurel32 | { "fsqrt", 0x38008000, 0xfc1fe720, "FfA,fT", pa10, 0}, |
1467 | f54b3f92 | aurel32 | { "fabs", 0x30006000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, |
1468 | f54b3f92 | aurel32 | { "fabs", 0x38006000, 0xfc1fe720, "FfA,fT", pa10, 0}, |
1469 | f54b3f92 | aurel32 | { "frem", 0x30008600, 0xfc00e7e0, "Ffa,fb,fT", pa10, 0}, |
1470 | f54b3f92 | aurel32 | { "frem", 0x38008600, 0xfc00e720, "FfA,fB,fT", pa10, 0}, |
1471 | f54b3f92 | aurel32 | { "frnd", 0x3000a000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, |
1472 | f54b3f92 | aurel32 | { "frnd", 0x3800a000, 0xfc1fe720, "FfA,fT", pa10, 0}, |
1473 | f54b3f92 | aurel32 | { "fcpy", 0x30004000, 0xfc1fe7e0, "Ffa,fT", pa10, 0}, |
1474 | f54b3f92 | aurel32 | { "fcpy", 0x38004000, 0xfc1fe720, "FfA,fT", pa10, 0}, |
1475 | f54b3f92 | aurel32 | { "fcnvff", 0x30000200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, |
1476 | f54b3f92 | aurel32 | { "fcnvff", 0x38000200, 0xfc1f8720, "FGfA,fT", pa10, 0}, |
1477 | f54b3f92 | aurel32 | { "fcnvxf", 0x30008200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, |
1478 | f54b3f92 | aurel32 | { "fcnvxf", 0x38008200, 0xfc1f8720, "FGfA,fT", pa10, 0}, |
1479 | f54b3f92 | aurel32 | { "fcnvfx", 0x30010200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, |
1480 | f54b3f92 | aurel32 | { "fcnvfx", 0x38010200, 0xfc1f8720, "FGfA,fT", pa10, 0}, |
1481 | f54b3f92 | aurel32 | { "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGfa,fT", pa10, 0}, |
1482 | f54b3f92 | aurel32 | { "fcnvfxt", 0x38018200, 0xfc1f8720, "FGfA,fT", pa10, 0}, |
1483 | f54b3f92 | aurel32 | { "fmpyfadd", 0xb8000000, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, |
1484 | f54b3f92 | aurel32 | { "fmpynfadd", 0xb8000020, 0xfc000020, "IfA,fB,fC,fT", pa20, FLAG_STRICT}, |
1485 | f54b3f92 | aurel32 | { "fneg", 0x3000c000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, |
1486 | f54b3f92 | aurel32 | { "fneg", 0x3800c000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, |
1487 | f54b3f92 | aurel32 | { "fnegabs", 0x3000e000, 0xfc1fe7e0, "Ffa,fT", pa20, FLAG_STRICT}, |
1488 | f54b3f92 | aurel32 | { "fnegabs", 0x3800e000, 0xfc1fe720, "IfA,fT", pa20, FLAG_STRICT}, |
1489 | f54b3f92 | aurel32 | { "fcnv", 0x30000200, 0xfc1c0720, "{_fa,fT", pa20, FLAG_STRICT}, |
1490 | f54b3f92 | aurel32 | { "fcnv", 0x38000200, 0xfc1c0720, "FGfA,fT", pa20, FLAG_STRICT}, |
1491 | f54b3f92 | aurel32 | { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, FLAG_STRICT}, |
1492 | f54b3f92 | aurel32 | { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, FLAG_STRICT}, |
1493 | f54b3f92 | aurel32 | { "fcmp", 0x30000400, 0xfc0007e0, "F?ffa,fb,h", pa20, FLAG_STRICT}, |
1494 | f54b3f92 | aurel32 | { "fcmp", 0x38000400, 0xfc000720, "I?ffA,fB,h", pa20, FLAG_STRICT}, |
1495 | f54b3f92 | aurel32 | { "fcmp", 0x30000400, 0xfc00e7e0, "F?ffa,fb", pa10, 0}, |
1496 | f54b3f92 | aurel32 | { "fcmp", 0x38000400, 0xfc00e720, "I?ffA,fB", pa10, 0}, |
1497 | f54b3f92 | aurel32 | { "xmpyu", 0x38004700, 0xfc00e720, "fX,fB,fT", pa11, 0}, |
1498 | f54b3f92 | aurel32 | { "fmpyadd", 0x18000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, |
1499 | f54b3f92 | aurel32 | { "fmpysub", 0x98000000, 0xfc000000, "Hfi,fj,fk,fl,fm", pa11, 0}, |
1500 | f54b3f92 | aurel32 | { "ftest", 0x30002420, 0xffffffff, "", pa10, FLAG_STRICT}, |
1501 | f54b3f92 | aurel32 | { "ftest", 0x30002420, 0xffffffe0, ",=", pa20, FLAG_STRICT}, |
1502 | f54b3f92 | aurel32 | { "ftest", 0x30000420, 0xffff1fff, "m", pa20, FLAG_STRICT}, |
1503 | f54b3f92 | aurel32 | { "fid", 0x30000000, 0xffffffff, "", pa11, 0}, |
1504 | f54b3f92 | aurel32 | |
1505 | f54b3f92 | aurel32 | /* Performance Monitor Instructions. */
|
1506 | f54b3f92 | aurel32 | |
1507 | f54b3f92 | aurel32 | { "pmdis", 0x30000280, 0xffffffdf, "N", pa20, FLAG_STRICT}, |
1508 | f54b3f92 | aurel32 | { "pmenb", 0x30000680, 0xffffffff, "", pa20, FLAG_STRICT}, |
1509 | f54b3f92 | aurel32 | |
1510 | f54b3f92 | aurel32 | /* Assist Instructions. */
|
1511 | f54b3f92 | aurel32 | |
1512 | f54b3f92 | aurel32 | { "spop0", 0x10000000, 0xfc000600, "v,ON", pa10, 0}, |
1513 | f54b3f92 | aurel32 | { "spop1", 0x10000200, 0xfc000600, "v,oNt", pa10, 0}, |
1514 | f54b3f92 | aurel32 | { "spop2", 0x10000400, 0xfc000600, "v,1Nb", pa10, 0}, |
1515 | f54b3f92 | aurel32 | { "spop3", 0x10000600, 0xfc000600, "v,0Nx,b", pa10, 0}, |
1516 | f54b3f92 | aurel32 | { "copr", 0x30000000, 0xfc000000, "u,2N", pa10, 0}, |
1517 | f54b3f92 | aurel32 | { "cldw", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
1518 | f54b3f92 | aurel32 | { "cldw", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, |
1519 | f54b3f92 | aurel32 | { "cldw", 0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
1520 | f54b3f92 | aurel32 | { "cldw", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
1521 | f54b3f92 | aurel32 | { "cldw", 0x24001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT}, |
1522 | f54b3f92 | aurel32 | { "cldw", 0x24001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, |
1523 | f54b3f92 | aurel32 | { "cldw", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1524 | f54b3f92 | aurel32 | { "cldw", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, |
1525 | f54b3f92 | aurel32 | { "cldw", 0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
1526 | f54b3f92 | aurel32 | { "cldw", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
1527 | f54b3f92 | aurel32 | { "cldd", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
1528 | f54b3f92 | aurel32 | { "cldd", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, |
1529 | f54b3f92 | aurel32 | { "cldd", 0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
1530 | f54b3f92 | aurel32 | { "cldd", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
1531 | f54b3f92 | aurel32 | { "cldd", 0x2c001000, 0xfc00d200, "ucocc@(b),t", pa20, FLAG_STRICT}, |
1532 | f54b3f92 | aurel32 | { "cldd", 0x2c001000, 0xfc001200, "ucocc@(s,b),t", pa20, FLAG_STRICT}, |
1533 | f54b3f92 | aurel32 | { "cldd", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1534 | f54b3f92 | aurel32 | { "cldd", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, |
1535 | f54b3f92 | aurel32 | { "cldd", 0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
1536 | f54b3f92 | aurel32 | { "cldd", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
1537 | f54b3f92 | aurel32 | { "cstw", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1538 | f54b3f92 | aurel32 | { "cstw", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, |
1539 | f54b3f92 | aurel32 | { "cstw", 0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
1540 | f54b3f92 | aurel32 | { "cstw", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
1541 | f54b3f92 | aurel32 | { "cstw", 0x24001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT}, |
1542 | f54b3f92 | aurel32 | { "cstw", 0x24001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, |
1543 | f54b3f92 | aurel32 | { "cstw", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1544 | f54b3f92 | aurel32 | { "cstw", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, |
1545 | f54b3f92 | aurel32 | { "cstw", 0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
1546 | f54b3f92 | aurel32 | { "cstw", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
1547 | f54b3f92 | aurel32 | { "cstd", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1548 | f54b3f92 | aurel32 | { "cstd", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, |
1549 | f54b3f92 | aurel32 | { "cstd", 0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
1550 | f54b3f92 | aurel32 | { "cstd", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
1551 | f54b3f92 | aurel32 | { "cstd", 0x2c001200, 0xfc00d200, "ucocCt,@(b)", pa20, FLAG_STRICT}, |
1552 | f54b3f92 | aurel32 | { "cstd", 0x2c001200, 0xfc001200, "ucocCt,@(s,b)", pa20, FLAG_STRICT}, |
1553 | f54b3f92 | aurel32 | { "cstd", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1554 | f54b3f92 | aurel32 | { "cstd", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, |
1555 | f54b3f92 | aurel32 | { "cstd", 0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
1556 | f54b3f92 | aurel32 | { "cstd", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
1557 | f54b3f92 | aurel32 | { "cldwx", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
1558 | f54b3f92 | aurel32 | { "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, |
1559 | f54b3f92 | aurel32 | { "cldwx", 0x24000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
1560 | f54b3f92 | aurel32 | { "cldwx", 0x24000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
1561 | f54b3f92 | aurel32 | { "cldwx", 0x24000000, 0xfc00de00, "ucXx(b),t", pa10, 0}, |
1562 | f54b3f92 | aurel32 | { "cldwx", 0x24000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, |
1563 | f54b3f92 | aurel32 | { "clddx", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, FLAG_STRICT}, |
1564 | f54b3f92 | aurel32 | { "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, FLAG_STRICT}, |
1565 | f54b3f92 | aurel32 | { "clddx", 0x2c000000, 0xfc00d200, "ucxccx(b),t", pa11, FLAG_STRICT}, |
1566 | f54b3f92 | aurel32 | { "clddx", 0x2c000000, 0xfc001200, "ucxccx(s,b),t", pa11, FLAG_STRICT}, |
1567 | f54b3f92 | aurel32 | { "clddx", 0x2c000000, 0xfc00de00, "ucXx(b),t", pa10, 0}, |
1568 | f54b3f92 | aurel32 | { "clddx", 0x2c000000, 0xfc001e00, "ucXx(s,b),t", pa10, 0}, |
1569 | f54b3f92 | aurel32 | { "cstwx", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1570 | f54b3f92 | aurel32 | { "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, |
1571 | f54b3f92 | aurel32 | { "cstwx", 0x24000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
1572 | f54b3f92 | aurel32 | { "cstwx", 0x24000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
1573 | f54b3f92 | aurel32 | { "cstwx", 0x24000200, 0xfc00de00, "ucXt,x(b)", pa10, 0}, |
1574 | f54b3f92 | aurel32 | { "cstwx", 0x24000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, |
1575 | f54b3f92 | aurel32 | { "cstdx", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, FLAG_STRICT}, |
1576 | f54b3f92 | aurel32 | { "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, FLAG_STRICT}, |
1577 | f54b3f92 | aurel32 | { "cstdx", 0x2c000200, 0xfc00d200, "ucxcCt,x(b)", pa11, FLAG_STRICT}, |
1578 | f54b3f92 | aurel32 | { "cstdx", 0x2c000200, 0xfc001200, "ucxcCt,x(s,b)", pa11, FLAG_STRICT}, |
1579 | f54b3f92 | aurel32 | { "cstdx", 0x2c000200, 0xfc00de00, "ucXt,x(b)", pa10, 0}, |
1580 | f54b3f92 | aurel32 | { "cstdx", 0x2c000200, 0xfc001e00, "ucXt,x(s,b)", pa10, 0}, |
1581 | f54b3f92 | aurel32 | { "cldws", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1582 | f54b3f92 | aurel32 | { "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, |
1583 | f54b3f92 | aurel32 | { "cldws", 0x24001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
1584 | f54b3f92 | aurel32 | { "cldws", 0x24001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
1585 | f54b3f92 | aurel32 | { "cldws", 0x24001000, 0xfc00de00, "ucM5(b),t", pa10, 0}, |
1586 | f54b3f92 | aurel32 | { "cldws", 0x24001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
1587 | f54b3f92 | aurel32 | { "cldds", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, FLAG_STRICT}, |
1588 | f54b3f92 | aurel32 | { "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, FLAG_STRICT}, |
1589 | f54b3f92 | aurel32 | { "cldds", 0x2c001000, 0xfc00d200, "ucmcc5(b),t", pa11, FLAG_STRICT}, |
1590 | f54b3f92 | aurel32 | { "cldds", 0x2c001000, 0xfc001200, "ucmcc5(s,b),t", pa11, FLAG_STRICT}, |
1591 | f54b3f92 | aurel32 | { "cldds", 0x2c001000, 0xfc00de00, "ucM5(b),t", pa10, 0}, |
1592 | f54b3f92 | aurel32 | { "cldds", 0x2c001000, 0xfc001e00, "ucM5(s,b),t", pa10, 0}, |
1593 | f54b3f92 | aurel32 | { "cstws", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1594 | f54b3f92 | aurel32 | { "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, |
1595 | f54b3f92 | aurel32 | { "cstws", 0x24001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
1596 | f54b3f92 | aurel32 | { "cstws", 0x24001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
1597 | f54b3f92 | aurel32 | { "cstws", 0x24001200, 0xfc00de00, "ucMt,5(b)", pa10, 0}, |
1598 | f54b3f92 | aurel32 | { "cstws", 0x24001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
1599 | f54b3f92 | aurel32 | { "cstds", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, FLAG_STRICT}, |
1600 | f54b3f92 | aurel32 | { "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, FLAG_STRICT}, |
1601 | f54b3f92 | aurel32 | { "cstds", 0x2c001200, 0xfc00d200, "ucmcCt,5(b)", pa11, FLAG_STRICT}, |
1602 | f54b3f92 | aurel32 | { "cstds", 0x2c001200, 0xfc001200, "ucmcCt,5(s,b)", pa11, FLAG_STRICT}, |
1603 | f54b3f92 | aurel32 | { "cstds", 0x2c001200, 0xfc00de00, "ucMt,5(b)", pa10, 0}, |
1604 | f54b3f92 | aurel32 | { "cstds", 0x2c001200, 0xfc001e00, "ucMt,5(s,b)", pa10, 0}, |
1605 | f54b3f92 | aurel32 | |
1606 | f54b3f92 | aurel32 | /* More pseudo instructions which must follow the main table. */
|
1607 | f54b3f92 | aurel32 | { "call", 0xe800f000, 0xfc1ffffd, "n(b)", pa20, FLAG_STRICT}, |
1608 | f54b3f92 | aurel32 | { "call", 0xe800a000, 0xffe0e000, "nW", pa10, FLAG_STRICT}, |
1609 | f54b3f92 | aurel32 | { "ret", 0xe840d000, 0xfffffffd, "n", pa20, FLAG_STRICT}, |
1610 | f54b3f92 | aurel32 | |
1611 | f54b3f92 | aurel32 | }; |
1612 | f54b3f92 | aurel32 | |
1613 | f54b3f92 | aurel32 | #define NUMOPCODES ((sizeof pa_opcodes)/(sizeof pa_opcodes[0])) |
1614 | f54b3f92 | aurel32 | |
1615 | f54b3f92 | aurel32 | /* SKV 12/18/92. Added some denotations for various operands. */
|
1616 | f54b3f92 | aurel32 | |
1617 | f54b3f92 | aurel32 | #define PA_IMM11_AT_31 'i' |
1618 | f54b3f92 | aurel32 | #define PA_IMM14_AT_31 'j' |
1619 | f54b3f92 | aurel32 | #define PA_IMM21_AT_31 'k' |
1620 | f54b3f92 | aurel32 | #define PA_DISP12 'w' |
1621 | f54b3f92 | aurel32 | #define PA_DISP17 'W' |
1622 | f54b3f92 | aurel32 | |
1623 | f54b3f92 | aurel32 | #define N_HPPA_OPERAND_FORMATS 5 |
1624 | f54b3f92 | aurel32 | |
1625 | f54b3f92 | aurel32 | /* Integer register names, indexed by the numbers which appear in the
|
1626 | f54b3f92 | aurel32 | opcodes. */
|
1627 | f54b3f92 | aurel32 | static const char *const reg_names[] = |
1628 | f54b3f92 | aurel32 | { |
1629 | f54b3f92 | aurel32 | "flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9", |
1630 | f54b3f92 | aurel32 | "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", |
1631 | f54b3f92 | aurel32 | "r20", "r21", "r22", "r23", "r24", "r25", "r26", "dp", "ret0", "ret1", |
1632 | f54b3f92 | aurel32 | "sp", "r31" |
1633 | f54b3f92 | aurel32 | }; |
1634 | f54b3f92 | aurel32 | |
1635 | f54b3f92 | aurel32 | /* Floating point register names, indexed by the numbers which appear in the
|
1636 | f54b3f92 | aurel32 | opcodes. */
|
1637 | f54b3f92 | aurel32 | static const char *const fp_reg_names[] = |
1638 | f54b3f92 | aurel32 | { |
1639 | f54b3f92 | aurel32 | "fpsr", "fpe2", "fpe4", "fpe6", |
1640 | f54b3f92 | aurel32 | "fr4", "fr5", "fr6", "fr7", "fr8", |
1641 | f54b3f92 | aurel32 | "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", |
1642 | f54b3f92 | aurel32 | "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", |
1643 | f54b3f92 | aurel32 | "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31" |
1644 | f54b3f92 | aurel32 | }; |
1645 | f54b3f92 | aurel32 | |
1646 | f54b3f92 | aurel32 | typedef unsigned int CORE_ADDR; |
1647 | f54b3f92 | aurel32 | |
1648 | f54b3f92 | aurel32 | /* Get at various relevent fields of an instruction word. */
|
1649 | f54b3f92 | aurel32 | |
1650 | f54b3f92 | aurel32 | #define MASK_5 0x1f |
1651 | f54b3f92 | aurel32 | #define MASK_10 0x3ff |
1652 | f54b3f92 | aurel32 | #define MASK_11 0x7ff |
1653 | f54b3f92 | aurel32 | #define MASK_14 0x3fff |
1654 | f54b3f92 | aurel32 | #define MASK_16 0xffff |
1655 | f54b3f92 | aurel32 | #define MASK_21 0x1fffff |
1656 | f54b3f92 | aurel32 | |
1657 | f54b3f92 | aurel32 | /* These macros get bit fields using HP's numbering (MSB = 0). */
|
1658 | f54b3f92 | aurel32 | |
1659 | f54b3f92 | aurel32 | #define GET_FIELD(X, FROM, TO) \
|
1660 | f54b3f92 | aurel32 | ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1)) |
1661 | f54b3f92 | aurel32 | |
1662 | f54b3f92 | aurel32 | #define GET_BIT(X, WHICH) \
|
1663 | f54b3f92 | aurel32 | GET_FIELD (X, WHICH, WHICH) |
1664 | f54b3f92 | aurel32 | |
1665 | f54b3f92 | aurel32 | /* Some of these have been converted to 2-d arrays because they
|
1666 | f54b3f92 | aurel32 | consume less storage this way. If the maintenance becomes a
|
1667 | f54b3f92 | aurel32 | problem, convert them back to const 1-d pointer arrays. */
|
1668 | f54b3f92 | aurel32 | static const char *const control_reg[] = |
1669 | f54b3f92 | aurel32 | { |
1670 | f54b3f92 | aurel32 | "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", |
1671 | f54b3f92 | aurel32 | "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4", |
1672 | f54b3f92 | aurel32 | "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr", |
1673 | f54b3f92 | aurel32 | "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3", |
1674 | f54b3f92 | aurel32 | "tr4", "tr5", "tr6", "tr7" |
1675 | f54b3f92 | aurel32 | }; |
1676 | f54b3f92 | aurel32 | |
1677 | f54b3f92 | aurel32 | static const char *const compare_cond_names[] = |
1678 | f54b3f92 | aurel32 | { |
1679 | f54b3f92 | aurel32 | "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv", ",od", |
1680 | f54b3f92 | aurel32 | ",tr", ",<>", ",>=", ",>", ",>>=", ",>>", ",nsv", ",ev" |
1681 | f54b3f92 | aurel32 | }; |
1682 | f54b3f92 | aurel32 | static const char *const compare_cond_64_names[] = |
1683 | f54b3f92 | aurel32 | { |
1684 | f54b3f92 | aurel32 | "", ",*=", ",*<", ",*<=", ",*<<", ",*<<=", ",*sv", ",*od", |
1685 | f54b3f92 | aurel32 | ",*tr", ",*<>", ",*>=", ",*>", ",*>>=", ",*>>", ",*nsv", ",*ev" |
1686 | f54b3f92 | aurel32 | }; |
1687 | f54b3f92 | aurel32 | static const char *const cmpib_cond_64_names[] = |
1688 | f54b3f92 | aurel32 | { |
1689 | f54b3f92 | aurel32 | ",*<<", ",*=", ",*<", ",*<=", ",*>>=", ",*<>", ",*>=", ",*>" |
1690 | f54b3f92 | aurel32 | }; |
1691 | f54b3f92 | aurel32 | static const char *const add_cond_names[] = |
1692 | f54b3f92 | aurel32 | { |
1693 | f54b3f92 | aurel32 | "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv", ",od", |
1694 | f54b3f92 | aurel32 | ",tr", ",<>", ",>=", ",>", ",uv", ",vnz", ",nsv", ",ev" |
1695 | f54b3f92 | aurel32 | }; |
1696 | f54b3f92 | aurel32 | static const char *const add_cond_64_names[] = |
1697 | f54b3f92 | aurel32 | { |
1698 | f54b3f92 | aurel32 | "", ",*=", ",*<", ",*<=", ",*nuv", ",*znv", ",*sv", ",*od", |
1699 | f54b3f92 | aurel32 | ",*tr", ",*<>", ",*>=", ",*>", ",*uv", ",*vnz", ",*nsv", ",*ev" |
1700 | f54b3f92 | aurel32 | }; |
1701 | f54b3f92 | aurel32 | static const char *const wide_add_cond_names[] = |
1702 | f54b3f92 | aurel32 | { |
1703 | f54b3f92 | aurel32 | "", ",=", ",<", ",<=", ",nuv", ",*=", ",*<", ",*<=", |
1704 | f54b3f92 | aurel32 | ",tr", ",<>", ",>=", ",>", ",uv", ",*<>", ",*>=", ",*>" |
1705 | f54b3f92 | aurel32 | }; |
1706 | f54b3f92 | aurel32 | static const char *const logical_cond_names[] = |
1707 | f54b3f92 | aurel32 | { |
1708 | f54b3f92 | aurel32 | "", ",=", ",<", ",<=", 0, 0, 0, ",od", |
1709 | f54b3f92 | aurel32 | ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"}; |
1710 | f54b3f92 | aurel32 | static const char *const logical_cond_64_names[] = |
1711 | f54b3f92 | aurel32 | { |
1712 | f54b3f92 | aurel32 | "", ",*=", ",*<", ",*<=", 0, 0, 0, ",*od", |
1713 | f54b3f92 | aurel32 | ",*tr", ",*<>", ",*>=", ",*>", 0, 0, 0, ",*ev"}; |
1714 | f54b3f92 | aurel32 | static const char *const unit_cond_names[] = |
1715 | f54b3f92 | aurel32 | { |
1716 | f54b3f92 | aurel32 | "", ",swz", ",sbz", ",shz", ",sdc", ",swc", ",sbc", ",shc", |
1717 | f54b3f92 | aurel32 | ",tr", ",nwz", ",nbz", ",nhz", ",ndc", ",nwc", ",nbc", ",nhc" |
1718 | f54b3f92 | aurel32 | }; |
1719 | f54b3f92 | aurel32 | static const char *const unit_cond_64_names[] = |
1720 | f54b3f92 | aurel32 | { |
1721 | f54b3f92 | aurel32 | "", ",*swz", ",*sbz", ",*shz", ",*sdc", ",*swc", ",*sbc", ",*shc", |
1722 | f54b3f92 | aurel32 | ",*tr", ",*nwz", ",*nbz", ",*nhz", ",*ndc", ",*nwc", ",*nbc", ",*nhc" |
1723 | f54b3f92 | aurel32 | }; |
1724 | f54b3f92 | aurel32 | static const char *const shift_cond_names[] = |
1725 | f54b3f92 | aurel32 | { |
1726 | f54b3f92 | aurel32 | "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev" |
1727 | f54b3f92 | aurel32 | }; |
1728 | f54b3f92 | aurel32 | static const char *const shift_cond_64_names[] = |
1729 | f54b3f92 | aurel32 | { |
1730 | f54b3f92 | aurel32 | "", ",*=", ",*<", ",*od", ",*tr", ",*<>", ",*>=", ",*ev" |
1731 | f54b3f92 | aurel32 | }; |
1732 | f54b3f92 | aurel32 | static const char *const bb_cond_64_names[] = |
1733 | f54b3f92 | aurel32 | { |
1734 | f54b3f92 | aurel32 | ",*<", ",*>=" |
1735 | f54b3f92 | aurel32 | }; |
1736 | f54b3f92 | aurel32 | static const char *const index_compl_names[] = {"", ",m", ",s", ",sm"}; |
1737 | f54b3f92 | aurel32 | static const char *const short_ldst_compl_names[] = {"", ",ma", "", ",mb"}; |
1738 | f54b3f92 | aurel32 | static const char *const short_bytes_compl_names[] = |
1739 | f54b3f92 | aurel32 | { |
1740 | f54b3f92 | aurel32 | "", ",b,m", ",e", ",e,m" |
1741 | f54b3f92 | aurel32 | }; |
1742 | f54b3f92 | aurel32 | static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"}; |
1743 | f54b3f92 | aurel32 | static const char *const fcnv_fixed_names[] = {",w", ",dw", "", ",qw"}; |
1744 | f54b3f92 | aurel32 | static const char *const fcnv_ufixed_names[] = {",uw", ",udw", "", ",uqw"}; |
1745 | f54b3f92 | aurel32 | static const char *const float_comp_names[] = |
1746 | f54b3f92 | aurel32 | { |
1747 | f54b3f92 | aurel32 | ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>", |
1748 | f54b3f92 | aurel32 | ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>", |
1749 | f54b3f92 | aurel32 | ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<", |
1750 | f54b3f92 | aurel32 | ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true" |
1751 | f54b3f92 | aurel32 | }; |
1752 | f54b3f92 | aurel32 | static const char *const signed_unsigned_names[] = {",u", ",s"}; |
1753 | f54b3f92 | aurel32 | static const char *const mix_half_names[] = {",l", ",r"}; |
1754 | f54b3f92 | aurel32 | static const char *const saturation_names[] = {",us", ",ss", 0, ""}; |
1755 | f54b3f92 | aurel32 | static const char *const read_write_names[] = {",r", ",w"}; |
1756 | f54b3f92 | aurel32 | static const char *const add_compl_names[] = { 0, "", ",l", ",tsv" }; |
1757 | f54b3f92 | aurel32 | |
1758 | f54b3f92 | aurel32 | /* For a bunch of different instructions form an index into a
|
1759 | f54b3f92 | aurel32 | completer name table. */
|
1760 | f54b3f92 | aurel32 | #define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \ |
1761 | f54b3f92 | aurel32 | GET_FIELD (insn, 18, 18) << 1) |
1762 | f54b3f92 | aurel32 | |
1763 | f54b3f92 | aurel32 | #define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \ |
1764 | f54b3f92 | aurel32 | (GET_FIELD ((insn), 19, 19) ? 8 : 0)) |
1765 | f54b3f92 | aurel32 | |
1766 | f54b3f92 | aurel32 | /* Utility function to print registers. Put these first, so gcc's function
|
1767 | f54b3f92 | aurel32 | inlining can do its stuff. */
|
1768 | f54b3f92 | aurel32 | |
1769 | f54b3f92 | aurel32 | #define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR) |
1770 | f54b3f92 | aurel32 | |
1771 | f54b3f92 | aurel32 | static void |
1772 | f54b3f92 | aurel32 | fput_reg (unsigned reg, disassemble_info *info)
|
1773 | f54b3f92 | aurel32 | { |
1774 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
|
1775 | f54b3f92 | aurel32 | } |
1776 | f54b3f92 | aurel32 | |
1777 | f54b3f92 | aurel32 | static void |
1778 | f54b3f92 | aurel32 | fput_fp_reg (unsigned reg, disassemble_info *info)
|
1779 | f54b3f92 | aurel32 | { |
1780 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
|
1781 | f54b3f92 | aurel32 | } |
1782 | f54b3f92 | aurel32 | |
1783 | f54b3f92 | aurel32 | static void |
1784 | f54b3f92 | aurel32 | fput_fp_reg_r (unsigned reg, disassemble_info *info)
|
1785 | f54b3f92 | aurel32 | { |
1786 | f54b3f92 | aurel32 | /* Special case floating point exception registers. */
|
1787 | f54b3f92 | aurel32 | if (reg < 4) |
1788 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1); |
1789 | f54b3f92 | aurel32 | else
|
1790 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%sR",
|
1791 | f54b3f92 | aurel32 | reg ? fp_reg_names[reg] : "fr0");
|
1792 | f54b3f92 | aurel32 | } |
1793 | f54b3f92 | aurel32 | |
1794 | f54b3f92 | aurel32 | static void |
1795 | f54b3f92 | aurel32 | fput_creg (unsigned reg, disassemble_info *info)
|
1796 | f54b3f92 | aurel32 | { |
1797 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, control_reg[reg]); |
1798 | f54b3f92 | aurel32 | } |
1799 | f54b3f92 | aurel32 | |
1800 | f54b3f92 | aurel32 | /* Print constants with sign. */
|
1801 | f54b3f92 | aurel32 | |
1802 | f54b3f92 | aurel32 | static void |
1803 | f54b3f92 | aurel32 | fput_const (unsigned num, disassemble_info *info)
|
1804 | f54b3f92 | aurel32 | { |
1805 | f54b3f92 | aurel32 | if ((int) num < 0) |
1806 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "-%x", - (int) num); |
1807 | f54b3f92 | aurel32 | else
|
1808 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%x", num);
|
1809 | f54b3f92 | aurel32 | } |
1810 | f54b3f92 | aurel32 | |
1811 | f54b3f92 | aurel32 | /* Routines to extract various sized constants out of hppa
|
1812 | f54b3f92 | aurel32 | instructions. */
|
1813 | f54b3f92 | aurel32 | |
1814 | f54b3f92 | aurel32 | /* Extract a 3-bit space register number from a be, ble, mtsp or mfsp. */
|
1815 | f54b3f92 | aurel32 | static int |
1816 | f54b3f92 | aurel32 | extract_3 (unsigned word)
|
1817 | f54b3f92 | aurel32 | { |
1818 | f54b3f92 | aurel32 | return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17); |
1819 | f54b3f92 | aurel32 | } |
1820 | f54b3f92 | aurel32 | |
1821 | f54b3f92 | aurel32 | static int |
1822 | f54b3f92 | aurel32 | extract_5_load (unsigned word)
|
1823 | f54b3f92 | aurel32 | { |
1824 | f54b3f92 | aurel32 | return low_sign_extend (word >> 16 & MASK_5, 5); |
1825 | f54b3f92 | aurel32 | } |
1826 | f54b3f92 | aurel32 | |
1827 | f54b3f92 | aurel32 | /* Extract the immediate field from a st{bhw}s instruction. */
|
1828 | f54b3f92 | aurel32 | |
1829 | f54b3f92 | aurel32 | static int |
1830 | f54b3f92 | aurel32 | extract_5_store (unsigned word)
|
1831 | f54b3f92 | aurel32 | { |
1832 | f54b3f92 | aurel32 | return low_sign_extend (word & MASK_5, 5); |
1833 | f54b3f92 | aurel32 | } |
1834 | f54b3f92 | aurel32 | |
1835 | f54b3f92 | aurel32 | /* Extract the immediate field from a break instruction. */
|
1836 | f54b3f92 | aurel32 | |
1837 | f54b3f92 | aurel32 | static unsigned |
1838 | f54b3f92 | aurel32 | extract_5r_store (unsigned word)
|
1839 | f54b3f92 | aurel32 | { |
1840 | f54b3f92 | aurel32 | return (word & MASK_5);
|
1841 | f54b3f92 | aurel32 | } |
1842 | f54b3f92 | aurel32 | |
1843 | f54b3f92 | aurel32 | /* Extract the immediate field from a {sr}sm instruction. */
|
1844 | f54b3f92 | aurel32 | |
1845 | f54b3f92 | aurel32 | static unsigned |
1846 | f54b3f92 | aurel32 | extract_5R_store (unsigned word)
|
1847 | f54b3f92 | aurel32 | { |
1848 | f54b3f92 | aurel32 | return (word >> 16 & MASK_5); |
1849 | f54b3f92 | aurel32 | } |
1850 | f54b3f92 | aurel32 | |
1851 | f54b3f92 | aurel32 | /* Extract the 10 bit immediate field from a {sr}sm instruction. */
|
1852 | f54b3f92 | aurel32 | |
1853 | f54b3f92 | aurel32 | static unsigned |
1854 | f54b3f92 | aurel32 | extract_10U_store (unsigned word)
|
1855 | f54b3f92 | aurel32 | { |
1856 | f54b3f92 | aurel32 | return (word >> 16 & MASK_10); |
1857 | f54b3f92 | aurel32 | } |
1858 | f54b3f92 | aurel32 | |
1859 | f54b3f92 | aurel32 | /* Extract the immediate field from a bb instruction. */
|
1860 | f54b3f92 | aurel32 | |
1861 | f54b3f92 | aurel32 | static unsigned |
1862 | f54b3f92 | aurel32 | extract_5Q_store (unsigned word)
|
1863 | f54b3f92 | aurel32 | { |
1864 | f54b3f92 | aurel32 | return (word >> 21 & MASK_5); |
1865 | f54b3f92 | aurel32 | } |
1866 | f54b3f92 | aurel32 | |
1867 | f54b3f92 | aurel32 | /* Extract an 11 bit immediate field. */
|
1868 | f54b3f92 | aurel32 | |
1869 | f54b3f92 | aurel32 | static int |
1870 | f54b3f92 | aurel32 | extract_11 (unsigned word)
|
1871 | f54b3f92 | aurel32 | { |
1872 | f54b3f92 | aurel32 | return low_sign_extend (word & MASK_11, 11); |
1873 | f54b3f92 | aurel32 | } |
1874 | f54b3f92 | aurel32 | |
1875 | f54b3f92 | aurel32 | /* Extract a 14 bit immediate field. */
|
1876 | f54b3f92 | aurel32 | |
1877 | f54b3f92 | aurel32 | static int |
1878 | f54b3f92 | aurel32 | extract_14 (unsigned word)
|
1879 | f54b3f92 | aurel32 | { |
1880 | f54b3f92 | aurel32 | return low_sign_extend (word & MASK_14, 14); |
1881 | f54b3f92 | aurel32 | } |
1882 | f54b3f92 | aurel32 | |
1883 | f54b3f92 | aurel32 | /* Extract a 16 bit immediate field (PA2.0 wide only). */
|
1884 | f54b3f92 | aurel32 | |
1885 | f54b3f92 | aurel32 | static int |
1886 | f54b3f92 | aurel32 | extract_16 (unsigned word)
|
1887 | f54b3f92 | aurel32 | { |
1888 | f54b3f92 | aurel32 | int m15, m0, m1;
|
1889 | f54b3f92 | aurel32 | |
1890 | f54b3f92 | aurel32 | m0 = GET_BIT (word, 16);
|
1891 | f54b3f92 | aurel32 | m1 = GET_BIT (word, 17);
|
1892 | f54b3f92 | aurel32 | m15 = GET_BIT (word, 31);
|
1893 | f54b3f92 | aurel32 | word = (word >> 1) & 0x1fff; |
1894 | f54b3f92 | aurel32 | word = word | (m15 << 15) | ((m15 ^ m0) << 14) | ((m15 ^ m1) << 13); |
1895 | f54b3f92 | aurel32 | return sign_extend (word, 16); |
1896 | f54b3f92 | aurel32 | } |
1897 | f54b3f92 | aurel32 | |
1898 | f54b3f92 | aurel32 | /* Extract a 21 bit constant. */
|
1899 | f54b3f92 | aurel32 | |
1900 | f54b3f92 | aurel32 | static int |
1901 | f54b3f92 | aurel32 | extract_21 (unsigned word)
|
1902 | f54b3f92 | aurel32 | { |
1903 | f54b3f92 | aurel32 | int val;
|
1904 | f54b3f92 | aurel32 | |
1905 | f54b3f92 | aurel32 | word &= MASK_21; |
1906 | f54b3f92 | aurel32 | word <<= 11;
|
1907 | f54b3f92 | aurel32 | val = GET_FIELD (word, 20, 20); |
1908 | f54b3f92 | aurel32 | val <<= 11;
|
1909 | f54b3f92 | aurel32 | val |= GET_FIELD (word, 9, 19); |
1910 | f54b3f92 | aurel32 | val <<= 2;
|
1911 | f54b3f92 | aurel32 | val |= GET_FIELD (word, 5, 6); |
1912 | f54b3f92 | aurel32 | val <<= 5;
|
1913 | f54b3f92 | aurel32 | val |= GET_FIELD (word, 0, 4); |
1914 | f54b3f92 | aurel32 | val <<= 2;
|
1915 | f54b3f92 | aurel32 | val |= GET_FIELD (word, 7, 8); |
1916 | f54b3f92 | aurel32 | return sign_extend (val, 21) << 11; |
1917 | f54b3f92 | aurel32 | } |
1918 | f54b3f92 | aurel32 | |
1919 | f54b3f92 | aurel32 | /* Extract a 12 bit constant from branch instructions. */
|
1920 | f54b3f92 | aurel32 | |
1921 | f54b3f92 | aurel32 | static int |
1922 | f54b3f92 | aurel32 | extract_12 (unsigned word)
|
1923 | f54b3f92 | aurel32 | { |
1924 | f54b3f92 | aurel32 | return sign_extend (GET_FIELD (word, 19, 28) |
1925 | f54b3f92 | aurel32 | | GET_FIELD (word, 29, 29) << 10 |
1926 | f54b3f92 | aurel32 | | (word & 0x1) << 11, 12) << 2; |
1927 | f54b3f92 | aurel32 | } |
1928 | f54b3f92 | aurel32 | |
1929 | f54b3f92 | aurel32 | /* Extract a 17 bit constant from branch instructions, returning the
|
1930 | f54b3f92 | aurel32 | 19 bit signed value. */
|
1931 | f54b3f92 | aurel32 | |
1932 | f54b3f92 | aurel32 | static int |
1933 | f54b3f92 | aurel32 | extract_17 (unsigned word)
|
1934 | f54b3f92 | aurel32 | { |
1935 | f54b3f92 | aurel32 | return sign_extend (GET_FIELD (word, 19, 28) |
1936 | f54b3f92 | aurel32 | | GET_FIELD (word, 29, 29) << 10 |
1937 | f54b3f92 | aurel32 | | GET_FIELD (word, 11, 15) << 11 |
1938 | f54b3f92 | aurel32 | | (word & 0x1) << 16, 17) << 2; |
1939 | f54b3f92 | aurel32 | } |
1940 | f54b3f92 | aurel32 | |
1941 | f54b3f92 | aurel32 | static int |
1942 | f54b3f92 | aurel32 | extract_22 (unsigned word)
|
1943 | f54b3f92 | aurel32 | { |
1944 | f54b3f92 | aurel32 | return sign_extend (GET_FIELD (word, 19, 28) |
1945 | f54b3f92 | aurel32 | | GET_FIELD (word, 29, 29) << 10 |
1946 | f54b3f92 | aurel32 | | GET_FIELD (word, 11, 15) << 11 |
1947 | f54b3f92 | aurel32 | | GET_FIELD (word, 6, 10) << 16 |
1948 | f54b3f92 | aurel32 | | (word & 0x1) << 21, 22) << 2; |
1949 | f54b3f92 | aurel32 | } |
1950 | f54b3f92 | aurel32 | |
1951 | f54b3f92 | aurel32 | /* Print one instruction. */
|
1952 | f54b3f92 | aurel32 | |
1953 | f54b3f92 | aurel32 | int
|
1954 | f54b3f92 | aurel32 | print_insn_hppa (bfd_vma memaddr, disassemble_info *info) |
1955 | f54b3f92 | aurel32 | { |
1956 | f54b3f92 | aurel32 | bfd_byte buffer[4];
|
1957 | f54b3f92 | aurel32 | unsigned int insn, i; |
1958 | f54b3f92 | aurel32 | |
1959 | f54b3f92 | aurel32 | { |
1960 | f54b3f92 | aurel32 | int status =
|
1961 | f54b3f92 | aurel32 | (*info->read_memory_func) (memaddr, buffer, sizeof (buffer), info);
|
1962 | f54b3f92 | aurel32 | if (status != 0) |
1963 | f54b3f92 | aurel32 | { |
1964 | f54b3f92 | aurel32 | (*info->memory_error_func) (status, memaddr, info); |
1965 | f54b3f92 | aurel32 | return -1; |
1966 | f54b3f92 | aurel32 | } |
1967 | f54b3f92 | aurel32 | } |
1968 | f54b3f92 | aurel32 | |
1969 | f54b3f92 | aurel32 | insn = bfd_getb32 (buffer); |
1970 | f54b3f92 | aurel32 | |
1971 | f54b3f92 | aurel32 | for (i = 0; i < NUMOPCODES; ++i) |
1972 | f54b3f92 | aurel32 | { |
1973 | f54b3f92 | aurel32 | const struct pa_opcode *opcode = &pa_opcodes[i]; |
1974 | f54b3f92 | aurel32 | |
1975 | f54b3f92 | aurel32 | if ((insn & opcode->mask) == opcode->match)
|
1976 | f54b3f92 | aurel32 | { |
1977 | f54b3f92 | aurel32 | const char *s; |
1978 | f54b3f92 | aurel32 | #ifndef BFD64
|
1979 | f54b3f92 | aurel32 | if (opcode->arch == pa20w)
|
1980 | f54b3f92 | aurel32 | continue;
|
1981 | f54b3f92 | aurel32 | #endif
|
1982 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%s", opcode->name);
|
1983 | f54b3f92 | aurel32 | |
1984 | f54b3f92 | aurel32 | if (!strchr ("cfCY?-+nHNZFIuv{", opcode->args[0])) |
1985 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
1986 | f54b3f92 | aurel32 | for (s = opcode->args; *s != '\0'; ++s) |
1987 | f54b3f92 | aurel32 | { |
1988 | f54b3f92 | aurel32 | switch (*s)
|
1989 | f54b3f92 | aurel32 | { |
1990 | f54b3f92 | aurel32 | case 'x': |
1991 | f54b3f92 | aurel32 | fput_reg (GET_FIELD (insn, 11, 15), info); |
1992 | f54b3f92 | aurel32 | break;
|
1993 | f54b3f92 | aurel32 | case 'a': |
1994 | f54b3f92 | aurel32 | case 'b': |
1995 | f54b3f92 | aurel32 | fput_reg (GET_FIELD (insn, 6, 10), info); |
1996 | f54b3f92 | aurel32 | break;
|
1997 | f54b3f92 | aurel32 | case '^': |
1998 | f54b3f92 | aurel32 | fput_creg (GET_FIELD (insn, 6, 10), info); |
1999 | f54b3f92 | aurel32 | break;
|
2000 | f54b3f92 | aurel32 | case 't': |
2001 | f54b3f92 | aurel32 | fput_reg (GET_FIELD (insn, 27, 31), info); |
2002 | f54b3f92 | aurel32 | break;
|
2003 | f54b3f92 | aurel32 | |
2004 | f54b3f92 | aurel32 | /* Handle floating point registers. */
|
2005 | f54b3f92 | aurel32 | case 'f': |
2006 | f54b3f92 | aurel32 | switch (*++s)
|
2007 | f54b3f92 | aurel32 | { |
2008 | f54b3f92 | aurel32 | case 't': |
2009 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 27, 31), info); |
2010 | f54b3f92 | aurel32 | break;
|
2011 | f54b3f92 | aurel32 | case 'T': |
2012 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 25, 25)) |
2013 | f54b3f92 | aurel32 | fput_fp_reg_r (GET_FIELD (insn, 27, 31), info); |
2014 | f54b3f92 | aurel32 | else
|
2015 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 27, 31), info); |
2016 | f54b3f92 | aurel32 | break;
|
2017 | f54b3f92 | aurel32 | case 'a': |
2018 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 25, 25)) |
2019 | f54b3f92 | aurel32 | fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); |
2020 | f54b3f92 | aurel32 | else
|
2021 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 6, 10), info); |
2022 | f54b3f92 | aurel32 | break;
|
2023 | f54b3f92 | aurel32 | |
2024 | f54b3f92 | aurel32 | /* 'fA' will not generate a space before the regsiter
|
2025 | f54b3f92 | aurel32 | name. Normally that is fine. Except that it
|
2026 | f54b3f92 | aurel32 | causes problems with xmpyu which has no FP format
|
2027 | f54b3f92 | aurel32 | completer. */
|
2028 | f54b3f92 | aurel32 | case 'X': |
2029 | f54b3f92 | aurel32 | fputs_filtered (" ", info);
|
2030 | f54b3f92 | aurel32 | /* FALLTHRU */
|
2031 | f54b3f92 | aurel32 | |
2032 | f54b3f92 | aurel32 | case 'A': |
2033 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 24, 24)) |
2034 | f54b3f92 | aurel32 | fput_fp_reg_r (GET_FIELD (insn, 6, 10), info); |
2035 | f54b3f92 | aurel32 | else
|
2036 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 6, 10), info); |
2037 | f54b3f92 | aurel32 | break;
|
2038 | f54b3f92 | aurel32 | case 'b': |
2039 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 25, 25)) |
2040 | f54b3f92 | aurel32 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); |
2041 | f54b3f92 | aurel32 | else
|
2042 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); |
2043 | f54b3f92 | aurel32 | break;
|
2044 | f54b3f92 | aurel32 | case 'B': |
2045 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 19, 19)) |
2046 | f54b3f92 | aurel32 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); |
2047 | f54b3f92 | aurel32 | else
|
2048 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); |
2049 | f54b3f92 | aurel32 | break;
|
2050 | f54b3f92 | aurel32 | case 'C': |
2051 | f54b3f92 | aurel32 | { |
2052 | f54b3f92 | aurel32 | int reg = GET_FIELD (insn, 21, 22); |
2053 | f54b3f92 | aurel32 | reg |= GET_FIELD (insn, 16, 18) << 2; |
2054 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 23, 23) != 0) |
2055 | f54b3f92 | aurel32 | fput_fp_reg_r (reg, info); |
2056 | f54b3f92 | aurel32 | else
|
2057 | f54b3f92 | aurel32 | fput_fp_reg (reg, info); |
2058 | f54b3f92 | aurel32 | break;
|
2059 | f54b3f92 | aurel32 | } |
2060 | f54b3f92 | aurel32 | case 'i': |
2061 | f54b3f92 | aurel32 | { |
2062 | f54b3f92 | aurel32 | int reg = GET_FIELD (insn, 6, 10); |
2063 | f54b3f92 | aurel32 | |
2064 | f54b3f92 | aurel32 | reg |= (GET_FIELD (insn, 26, 26) << 4); |
2065 | f54b3f92 | aurel32 | fput_fp_reg (reg, info); |
2066 | f54b3f92 | aurel32 | break;
|
2067 | f54b3f92 | aurel32 | } |
2068 | f54b3f92 | aurel32 | case 'j': |
2069 | f54b3f92 | aurel32 | { |
2070 | f54b3f92 | aurel32 | int reg = GET_FIELD (insn, 11, 15); |
2071 | f54b3f92 | aurel32 | |
2072 | f54b3f92 | aurel32 | reg |= (GET_FIELD (insn, 26, 26) << 4); |
2073 | f54b3f92 | aurel32 | fput_fp_reg (reg, info); |
2074 | f54b3f92 | aurel32 | break;
|
2075 | f54b3f92 | aurel32 | } |
2076 | f54b3f92 | aurel32 | case 'k': |
2077 | f54b3f92 | aurel32 | { |
2078 | f54b3f92 | aurel32 | int reg = GET_FIELD (insn, 27, 31); |
2079 | f54b3f92 | aurel32 | |
2080 | f54b3f92 | aurel32 | reg |= (GET_FIELD (insn, 26, 26) << 4); |
2081 | f54b3f92 | aurel32 | fput_fp_reg (reg, info); |
2082 | f54b3f92 | aurel32 | break;
|
2083 | f54b3f92 | aurel32 | } |
2084 | f54b3f92 | aurel32 | case 'l': |
2085 | f54b3f92 | aurel32 | { |
2086 | f54b3f92 | aurel32 | int reg = GET_FIELD (insn, 21, 25); |
2087 | f54b3f92 | aurel32 | |
2088 | f54b3f92 | aurel32 | reg |= (GET_FIELD (insn, 26, 26) << 4); |
2089 | f54b3f92 | aurel32 | fput_fp_reg (reg, info); |
2090 | f54b3f92 | aurel32 | break;
|
2091 | f54b3f92 | aurel32 | } |
2092 | f54b3f92 | aurel32 | case 'm': |
2093 | f54b3f92 | aurel32 | { |
2094 | f54b3f92 | aurel32 | int reg = GET_FIELD (insn, 16, 20); |
2095 | f54b3f92 | aurel32 | |
2096 | f54b3f92 | aurel32 | reg |= (GET_FIELD (insn, 26, 26) << 4); |
2097 | f54b3f92 | aurel32 | fput_fp_reg (reg, info); |
2098 | f54b3f92 | aurel32 | break;
|
2099 | f54b3f92 | aurel32 | } |
2100 | f54b3f92 | aurel32 | |
2101 | f54b3f92 | aurel32 | /* 'fe' will not generate a space before the register
|
2102 | f54b3f92 | aurel32 | name. Normally that is fine. Except that it
|
2103 | f54b3f92 | aurel32 | causes problems with fstw fe,y(b) which has no FP
|
2104 | f54b3f92 | aurel32 | format completer. */
|
2105 | f54b3f92 | aurel32 | case 'E': |
2106 | f54b3f92 | aurel32 | fputs_filtered (" ", info);
|
2107 | f54b3f92 | aurel32 | /* FALLTHRU */
|
2108 | f54b3f92 | aurel32 | |
2109 | f54b3f92 | aurel32 | case 'e': |
2110 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 30, 30)) |
2111 | f54b3f92 | aurel32 | fput_fp_reg_r (GET_FIELD (insn, 11, 15), info); |
2112 | f54b3f92 | aurel32 | else
|
2113 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); |
2114 | f54b3f92 | aurel32 | break;
|
2115 | f54b3f92 | aurel32 | case 'x': |
2116 | f54b3f92 | aurel32 | fput_fp_reg (GET_FIELD (insn, 11, 15), info); |
2117 | f54b3f92 | aurel32 | break;
|
2118 | f54b3f92 | aurel32 | } |
2119 | f54b3f92 | aurel32 | break;
|
2120 | f54b3f92 | aurel32 | |
2121 | f54b3f92 | aurel32 | case '5': |
2122 | f54b3f92 | aurel32 | fput_const (extract_5_load (insn), info); |
2123 | f54b3f92 | aurel32 | break;
|
2124 | f54b3f92 | aurel32 | case 's': |
2125 | f54b3f92 | aurel32 | { |
2126 | f54b3f92 | aurel32 | int space = GET_FIELD (insn, 16, 17); |
2127 | f54b3f92 | aurel32 | /* Zero means implicit addressing, not use of sr0. */
|
2128 | f54b3f92 | aurel32 | if (space != 0) |
2129 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "sr%d", space);
|
2130 | f54b3f92 | aurel32 | } |
2131 | f54b3f92 | aurel32 | break;
|
2132 | f54b3f92 | aurel32 | |
2133 | f54b3f92 | aurel32 | case 'S': |
2134 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "sr%d",
|
2135 | f54b3f92 | aurel32 | extract_3 (insn)); |
2136 | f54b3f92 | aurel32 | break;
|
2137 | f54b3f92 | aurel32 | |
2138 | f54b3f92 | aurel32 | /* Handle completers. */
|
2139 | f54b3f92 | aurel32 | case 'c': |
2140 | f54b3f92 | aurel32 | switch (*++s)
|
2141 | f54b3f92 | aurel32 | { |
2142 | f54b3f92 | aurel32 | case 'x': |
2143 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2144 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2145 | f54b3f92 | aurel32 | index_compl_names[GET_COMPL (insn)]); |
2146 | f54b3f92 | aurel32 | break;
|
2147 | f54b3f92 | aurel32 | case 'X': |
2148 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2149 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2150 | f54b3f92 | aurel32 | index_compl_names[GET_COMPL (insn)]); |
2151 | f54b3f92 | aurel32 | break;
|
2152 | f54b3f92 | aurel32 | case 'm': |
2153 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2154 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2155 | f54b3f92 | aurel32 | short_ldst_compl_names[GET_COMPL (insn)]); |
2156 | f54b3f92 | aurel32 | break;
|
2157 | f54b3f92 | aurel32 | case 'M': |
2158 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2159 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2160 | f54b3f92 | aurel32 | short_ldst_compl_names[GET_COMPL (insn)]); |
2161 | f54b3f92 | aurel32 | break;
|
2162 | f54b3f92 | aurel32 | case 'A': |
2163 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2164 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2165 | f54b3f92 | aurel32 | short_bytes_compl_names[GET_COMPL (insn)]); |
2166 | f54b3f92 | aurel32 | break;
|
2167 | f54b3f92 | aurel32 | case 's': |
2168 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2169 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2170 | f54b3f92 | aurel32 | short_bytes_compl_names[GET_COMPL (insn)]); |
2171 | f54b3f92 | aurel32 | break;
|
2172 | f54b3f92 | aurel32 | case 'c': |
2173 | f54b3f92 | aurel32 | case 'C': |
2174 | f54b3f92 | aurel32 | switch (GET_FIELD (insn, 20, 21)) |
2175 | f54b3f92 | aurel32 | { |
2176 | f54b3f92 | aurel32 | case 1: |
2177 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",bc ");
|
2178 | f54b3f92 | aurel32 | break;
|
2179 | f54b3f92 | aurel32 | case 2: |
2180 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",sl ");
|
2181 | f54b3f92 | aurel32 | break;
|
2182 | f54b3f92 | aurel32 | default:
|
2183 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2184 | f54b3f92 | aurel32 | } |
2185 | f54b3f92 | aurel32 | break;
|
2186 | f54b3f92 | aurel32 | case 'd': |
2187 | f54b3f92 | aurel32 | switch (GET_FIELD (insn, 20, 21)) |
2188 | f54b3f92 | aurel32 | { |
2189 | f54b3f92 | aurel32 | case 1: |
2190 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",co ");
|
2191 | f54b3f92 | aurel32 | break;
|
2192 | f54b3f92 | aurel32 | default:
|
2193 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2194 | f54b3f92 | aurel32 | } |
2195 | f54b3f92 | aurel32 | break;
|
2196 | f54b3f92 | aurel32 | case 'o': |
2197 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",o");
|
2198 | f54b3f92 | aurel32 | break;
|
2199 | f54b3f92 | aurel32 | case 'g': |
2200 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",gate");
|
2201 | f54b3f92 | aurel32 | break;
|
2202 | f54b3f92 | aurel32 | case 'p': |
2203 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",l,push");
|
2204 | f54b3f92 | aurel32 | break;
|
2205 | f54b3f92 | aurel32 | case 'P': |
2206 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",pop");
|
2207 | f54b3f92 | aurel32 | break;
|
2208 | f54b3f92 | aurel32 | case 'l': |
2209 | f54b3f92 | aurel32 | case 'L': |
2210 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",l");
|
2211 | f54b3f92 | aurel32 | break;
|
2212 | f54b3f92 | aurel32 | case 'w': |
2213 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2214 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2215 | f54b3f92 | aurel32 | read_write_names[GET_FIELD (insn, 25, 25)]); |
2216 | f54b3f92 | aurel32 | break;
|
2217 | f54b3f92 | aurel32 | case 'W': |
2218 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",w ");
|
2219 | f54b3f92 | aurel32 | break;
|
2220 | f54b3f92 | aurel32 | case 'r': |
2221 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 23, 26) == 5) |
2222 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",r");
|
2223 | f54b3f92 | aurel32 | break;
|
2224 | f54b3f92 | aurel32 | case 'Z': |
2225 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 26, 26)) |
2226 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",m ");
|
2227 | f54b3f92 | aurel32 | else
|
2228 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2229 | f54b3f92 | aurel32 | break;
|
2230 | f54b3f92 | aurel32 | case 'i': |
2231 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 25, 25)) |
2232 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",i");
|
2233 | f54b3f92 | aurel32 | break;
|
2234 | f54b3f92 | aurel32 | case 'z': |
2235 | f54b3f92 | aurel32 | if (!GET_FIELD (insn, 21, 21)) |
2236 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",z");
|
2237 | f54b3f92 | aurel32 | break;
|
2238 | f54b3f92 | aurel32 | case 'a': |
2239 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2240 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2241 | f54b3f92 | aurel32 | add_compl_names[GET_FIELD (insn, 20, 21)]); |
2242 | f54b3f92 | aurel32 | break;
|
2243 | f54b3f92 | aurel32 | case 'Y': |
2244 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2245 | f54b3f92 | aurel32 | (info->stream, ",dc%s",
|
2246 | f54b3f92 | aurel32 | add_compl_names[GET_FIELD (insn, 20, 21)]); |
2247 | f54b3f92 | aurel32 | break;
|
2248 | f54b3f92 | aurel32 | case 'y': |
2249 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2250 | f54b3f92 | aurel32 | (info->stream, ",c%s",
|
2251 | f54b3f92 | aurel32 | add_compl_names[GET_FIELD (insn, 20, 21)]); |
2252 | f54b3f92 | aurel32 | break;
|
2253 | f54b3f92 | aurel32 | case 'v': |
2254 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 20, 20)) |
2255 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",tsv");
|
2256 | f54b3f92 | aurel32 | break;
|
2257 | f54b3f92 | aurel32 | case 't': |
2258 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",tc");
|
2259 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 20, 20)) |
2260 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",tsv");
|
2261 | f54b3f92 | aurel32 | break;
|
2262 | f54b3f92 | aurel32 | case 'B': |
2263 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",db");
|
2264 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 20, 20)) |
2265 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",tsv");
|
2266 | f54b3f92 | aurel32 | break;
|
2267 | f54b3f92 | aurel32 | case 'b': |
2268 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",b");
|
2269 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 20, 20)) |
2270 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",tsv");
|
2271 | f54b3f92 | aurel32 | break;
|
2272 | f54b3f92 | aurel32 | case 'T': |
2273 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 25, 25)) |
2274 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",tc");
|
2275 | f54b3f92 | aurel32 | break;
|
2276 | f54b3f92 | aurel32 | case 'S': |
2277 | f54b3f92 | aurel32 | /* EXTRD/W has a following condition. */
|
2278 | f54b3f92 | aurel32 | if (*(s + 1) == '?') |
2279 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2280 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2281 | f54b3f92 | aurel32 | signed_unsigned_names[GET_FIELD (insn, 21, 21)]); |
2282 | f54b3f92 | aurel32 | else
|
2283 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2284 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2285 | f54b3f92 | aurel32 | signed_unsigned_names[GET_FIELD (insn, 21, 21)]); |
2286 | f54b3f92 | aurel32 | break;
|
2287 | f54b3f92 | aurel32 | case 'h': |
2288 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2289 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2290 | f54b3f92 | aurel32 | mix_half_names[GET_FIELD (insn, 17, 17)]); |
2291 | f54b3f92 | aurel32 | break;
|
2292 | f54b3f92 | aurel32 | case 'H': |
2293 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2294 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2295 | f54b3f92 | aurel32 | saturation_names[GET_FIELD (insn, 24, 25)]); |
2296 | f54b3f92 | aurel32 | break;
|
2297 | f54b3f92 | aurel32 | case '*': |
2298 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2299 | f54b3f92 | aurel32 | (info->stream, ",%d%d%d%d ",
|
2300 | f54b3f92 | aurel32 | GET_FIELD (insn, 17, 18), GET_FIELD (insn, 20, 21), |
2301 | f54b3f92 | aurel32 | GET_FIELD (insn, 22, 23), GET_FIELD (insn, 24, 25)); |
2302 | f54b3f92 | aurel32 | break;
|
2303 | f54b3f92 | aurel32 | |
2304 | f54b3f92 | aurel32 | case 'q': |
2305 | f54b3f92 | aurel32 | { |
2306 | f54b3f92 | aurel32 | int m, a;
|
2307 | f54b3f92 | aurel32 | |
2308 | f54b3f92 | aurel32 | m = GET_FIELD (insn, 28, 28); |
2309 | f54b3f92 | aurel32 | a = GET_FIELD (insn, 29, 29); |
2310 | f54b3f92 | aurel32 | |
2311 | f54b3f92 | aurel32 | if (m && !a)
|
2312 | f54b3f92 | aurel32 | fputs_filtered (",ma ", info);
|
2313 | f54b3f92 | aurel32 | else if (m && a) |
2314 | f54b3f92 | aurel32 | fputs_filtered (",mb ", info);
|
2315 | f54b3f92 | aurel32 | else
|
2316 | f54b3f92 | aurel32 | fputs_filtered (" ", info);
|
2317 | f54b3f92 | aurel32 | break;
|
2318 | f54b3f92 | aurel32 | } |
2319 | f54b3f92 | aurel32 | |
2320 | f54b3f92 | aurel32 | case 'J': |
2321 | f54b3f92 | aurel32 | { |
2322 | f54b3f92 | aurel32 | int opc = GET_FIELD (insn, 0, 5); |
2323 | f54b3f92 | aurel32 | |
2324 | f54b3f92 | aurel32 | if (opc == 0x16 || opc == 0x1e) |
2325 | f54b3f92 | aurel32 | { |
2326 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 29, 29) == 0) |
2327 | f54b3f92 | aurel32 | fputs_filtered (",ma ", info);
|
2328 | f54b3f92 | aurel32 | else
|
2329 | f54b3f92 | aurel32 | fputs_filtered (",mb ", info);
|
2330 | f54b3f92 | aurel32 | } |
2331 | f54b3f92 | aurel32 | else
|
2332 | f54b3f92 | aurel32 | fputs_filtered (" ", info);
|
2333 | f54b3f92 | aurel32 | break;
|
2334 | f54b3f92 | aurel32 | } |
2335 | f54b3f92 | aurel32 | |
2336 | f54b3f92 | aurel32 | case 'e': |
2337 | f54b3f92 | aurel32 | { |
2338 | f54b3f92 | aurel32 | int opc = GET_FIELD (insn, 0, 5); |
2339 | f54b3f92 | aurel32 | |
2340 | f54b3f92 | aurel32 | if (opc == 0x13 || opc == 0x1b) |
2341 | f54b3f92 | aurel32 | { |
2342 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 18, 18) == 1) |
2343 | f54b3f92 | aurel32 | fputs_filtered (",mb ", info);
|
2344 | f54b3f92 | aurel32 | else
|
2345 | f54b3f92 | aurel32 | fputs_filtered (",ma ", info);
|
2346 | f54b3f92 | aurel32 | } |
2347 | f54b3f92 | aurel32 | else if (opc == 0x17 || opc == 0x1f) |
2348 | f54b3f92 | aurel32 | { |
2349 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 31, 31) == 1) |
2350 | f54b3f92 | aurel32 | fputs_filtered (",ma ", info);
|
2351 | f54b3f92 | aurel32 | else
|
2352 | f54b3f92 | aurel32 | fputs_filtered (",mb ", info);
|
2353 | f54b3f92 | aurel32 | } |
2354 | f54b3f92 | aurel32 | else
|
2355 | f54b3f92 | aurel32 | fputs_filtered (" ", info);
|
2356 | f54b3f92 | aurel32 | |
2357 | f54b3f92 | aurel32 | break;
|
2358 | f54b3f92 | aurel32 | } |
2359 | f54b3f92 | aurel32 | } |
2360 | f54b3f92 | aurel32 | break;
|
2361 | f54b3f92 | aurel32 | |
2362 | f54b3f92 | aurel32 | /* Handle conditions. */
|
2363 | f54b3f92 | aurel32 | case '?': |
2364 | f54b3f92 | aurel32 | { |
2365 | f54b3f92 | aurel32 | s++; |
2366 | f54b3f92 | aurel32 | switch (*s)
|
2367 | f54b3f92 | aurel32 | { |
2368 | f54b3f92 | aurel32 | case 'f': |
2369 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2370 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2371 | f54b3f92 | aurel32 | float_comp_names[GET_FIELD (insn, 27, 31)]); |
2372 | f54b3f92 | aurel32 | break;
|
2373 | f54b3f92 | aurel32 | |
2374 | f54b3f92 | aurel32 | /* These four conditions are for the set of instructions
|
2375 | f54b3f92 | aurel32 | which distinguish true/false conditions by opcode
|
2376 | f54b3f92 | aurel32 | rather than by the 'f' bit (sigh): comb, comib,
|
2377 | f54b3f92 | aurel32 | addb, addib. */
|
2378 | f54b3f92 | aurel32 | case 't': |
2379 | f54b3f92 | aurel32 | fputs_filtered |
2380 | f54b3f92 | aurel32 | (compare_cond_names[GET_FIELD (insn, 16, 18)], info); |
2381 | f54b3f92 | aurel32 | break;
|
2382 | f54b3f92 | aurel32 | case 'n': |
2383 | f54b3f92 | aurel32 | fputs_filtered |
2384 | f54b3f92 | aurel32 | (compare_cond_names[GET_FIELD (insn, 16, 18) |
2385 | f54b3f92 | aurel32 | + GET_FIELD (insn, 4, 4) * 8], |
2386 | f54b3f92 | aurel32 | info); |
2387 | f54b3f92 | aurel32 | break;
|
2388 | f54b3f92 | aurel32 | case 'N': |
2389 | f54b3f92 | aurel32 | fputs_filtered |
2390 | f54b3f92 | aurel32 | (compare_cond_64_names[GET_FIELD (insn, 16, 18) |
2391 | f54b3f92 | aurel32 | + GET_FIELD (insn, 2, 2) * 8], |
2392 | f54b3f92 | aurel32 | info); |
2393 | f54b3f92 | aurel32 | break;
|
2394 | f54b3f92 | aurel32 | case 'Q': |
2395 | f54b3f92 | aurel32 | fputs_filtered |
2396 | f54b3f92 | aurel32 | (cmpib_cond_64_names[GET_FIELD (insn, 16, 18)], |
2397 | f54b3f92 | aurel32 | info); |
2398 | f54b3f92 | aurel32 | break;
|
2399 | f54b3f92 | aurel32 | case '@': |
2400 | f54b3f92 | aurel32 | fputs_filtered |
2401 | f54b3f92 | aurel32 | (add_cond_names[GET_FIELD (insn, 16, 18) |
2402 | f54b3f92 | aurel32 | + GET_FIELD (insn, 4, 4) * 8], |
2403 | f54b3f92 | aurel32 | info); |
2404 | f54b3f92 | aurel32 | break;
|
2405 | f54b3f92 | aurel32 | case 's': |
2406 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2407 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2408 | f54b3f92 | aurel32 | compare_cond_names[GET_COND (insn)]); |
2409 | f54b3f92 | aurel32 | break;
|
2410 | f54b3f92 | aurel32 | case 'S': |
2411 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2412 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2413 | f54b3f92 | aurel32 | compare_cond_64_names[GET_COND (insn)]); |
2414 | f54b3f92 | aurel32 | break;
|
2415 | f54b3f92 | aurel32 | case 'a': |
2416 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2417 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2418 | f54b3f92 | aurel32 | add_cond_names[GET_COND (insn)]); |
2419 | f54b3f92 | aurel32 | break;
|
2420 | f54b3f92 | aurel32 | case 'A': |
2421 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2422 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2423 | f54b3f92 | aurel32 | add_cond_64_names[GET_COND (insn)]); |
2424 | f54b3f92 | aurel32 | break;
|
2425 | f54b3f92 | aurel32 | case 'd': |
2426 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2427 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2428 | f54b3f92 | aurel32 | add_cond_names[GET_FIELD (insn, 16, 18)]); |
2429 | f54b3f92 | aurel32 | break;
|
2430 | f54b3f92 | aurel32 | |
2431 | f54b3f92 | aurel32 | case 'W': |
2432 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2433 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2434 | f54b3f92 | aurel32 | wide_add_cond_names[GET_FIELD (insn, 16, 18) + |
2435 | f54b3f92 | aurel32 | GET_FIELD (insn, 4, 4) * 8]); |
2436 | f54b3f92 | aurel32 | break;
|
2437 | f54b3f92 | aurel32 | |
2438 | f54b3f92 | aurel32 | case 'l': |
2439 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2440 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2441 | f54b3f92 | aurel32 | logical_cond_names[GET_COND (insn)]); |
2442 | f54b3f92 | aurel32 | break;
|
2443 | f54b3f92 | aurel32 | case 'L': |
2444 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2445 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2446 | f54b3f92 | aurel32 | logical_cond_64_names[GET_COND (insn)]); |
2447 | f54b3f92 | aurel32 | break;
|
2448 | f54b3f92 | aurel32 | case 'u': |
2449 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2450 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2451 | f54b3f92 | aurel32 | unit_cond_names[GET_COND (insn)]); |
2452 | f54b3f92 | aurel32 | break;
|
2453 | f54b3f92 | aurel32 | case 'U': |
2454 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2455 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2456 | f54b3f92 | aurel32 | unit_cond_64_names[GET_COND (insn)]); |
2457 | f54b3f92 | aurel32 | break;
|
2458 | f54b3f92 | aurel32 | case 'y': |
2459 | f54b3f92 | aurel32 | case 'x': |
2460 | f54b3f92 | aurel32 | case 'b': |
2461 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2462 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2463 | f54b3f92 | aurel32 | shift_cond_names[GET_FIELD (insn, 16, 18)]); |
2464 | f54b3f92 | aurel32 | |
2465 | f54b3f92 | aurel32 | /* If the next character in args is 'n', it will handle
|
2466 | f54b3f92 | aurel32 | putting out the space. */
|
2467 | f54b3f92 | aurel32 | if (s[1] != 'n') |
2468 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2469 | f54b3f92 | aurel32 | break;
|
2470 | f54b3f92 | aurel32 | case 'X': |
2471 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2472 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2473 | f54b3f92 | aurel32 | shift_cond_64_names[GET_FIELD (insn, 16, 18)]); |
2474 | f54b3f92 | aurel32 | break;
|
2475 | f54b3f92 | aurel32 | case 'B': |
2476 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2477 | f54b3f92 | aurel32 | (info->stream, "%s",
|
2478 | f54b3f92 | aurel32 | bb_cond_64_names[GET_FIELD (insn, 16, 16)]); |
2479 | f54b3f92 | aurel32 | |
2480 | f54b3f92 | aurel32 | /* If the next character in args is 'n', it will handle
|
2481 | f54b3f92 | aurel32 | putting out the space. */
|
2482 | f54b3f92 | aurel32 | if (s[1] != 'n') |
2483 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2484 | f54b3f92 | aurel32 | break;
|
2485 | f54b3f92 | aurel32 | } |
2486 | f54b3f92 | aurel32 | break;
|
2487 | f54b3f92 | aurel32 | } |
2488 | f54b3f92 | aurel32 | |
2489 | f54b3f92 | aurel32 | case 'V': |
2490 | f54b3f92 | aurel32 | fput_const (extract_5_store (insn), info); |
2491 | f54b3f92 | aurel32 | break;
|
2492 | f54b3f92 | aurel32 | case 'r': |
2493 | f54b3f92 | aurel32 | fput_const (extract_5r_store (insn), info); |
2494 | f54b3f92 | aurel32 | break;
|
2495 | f54b3f92 | aurel32 | case 'R': |
2496 | f54b3f92 | aurel32 | fput_const (extract_5R_store (insn), info); |
2497 | f54b3f92 | aurel32 | break;
|
2498 | f54b3f92 | aurel32 | case 'U': |
2499 | f54b3f92 | aurel32 | fput_const (extract_10U_store (insn), info); |
2500 | f54b3f92 | aurel32 | break;
|
2501 | f54b3f92 | aurel32 | case 'B': |
2502 | f54b3f92 | aurel32 | case 'Q': |
2503 | f54b3f92 | aurel32 | fput_const (extract_5Q_store (insn), info); |
2504 | f54b3f92 | aurel32 | break;
|
2505 | f54b3f92 | aurel32 | case 'i': |
2506 | f54b3f92 | aurel32 | fput_const (extract_11 (insn), info); |
2507 | f54b3f92 | aurel32 | break;
|
2508 | f54b3f92 | aurel32 | case 'j': |
2509 | f54b3f92 | aurel32 | fput_const (extract_14 (insn), info); |
2510 | f54b3f92 | aurel32 | break;
|
2511 | f54b3f92 | aurel32 | case 'k': |
2512 | f54b3f92 | aurel32 | fputs_filtered ("L%", info);
|
2513 | f54b3f92 | aurel32 | fput_const (extract_21 (insn), info); |
2514 | f54b3f92 | aurel32 | break;
|
2515 | f54b3f92 | aurel32 | case '<': |
2516 | f54b3f92 | aurel32 | case 'l': |
2517 | f54b3f92 | aurel32 | /* 16-bit long disp., PA2.0 wide only. */
|
2518 | f54b3f92 | aurel32 | fput_const (extract_16 (insn), info); |
2519 | f54b3f92 | aurel32 | break;
|
2520 | f54b3f92 | aurel32 | case 'n': |
2521 | f54b3f92 | aurel32 | if (insn & 0x2) |
2522 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",n ");
|
2523 | f54b3f92 | aurel32 | else
|
2524 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2525 | f54b3f92 | aurel32 | break;
|
2526 | f54b3f92 | aurel32 | case 'N': |
2527 | f54b3f92 | aurel32 | if ((insn & 0x20) && s[1]) |
2528 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",n ");
|
2529 | f54b3f92 | aurel32 | else if (insn & 0x20) |
2530 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",n");
|
2531 | f54b3f92 | aurel32 | else if (s[1]) |
2532 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, " ");
|
2533 | f54b3f92 | aurel32 | break;
|
2534 | f54b3f92 | aurel32 | case 'w': |
2535 | f54b3f92 | aurel32 | (*info->print_address_func) |
2536 | f54b3f92 | aurel32 | (memaddr + 8 + extract_12 (insn), info);
|
2537 | f54b3f92 | aurel32 | break;
|
2538 | f54b3f92 | aurel32 | case 'W': |
2539 | f54b3f92 | aurel32 | /* 17 bit PC-relative branch. */
|
2540 | f54b3f92 | aurel32 | (*info->print_address_func) |
2541 | f54b3f92 | aurel32 | ((memaddr + 8 + extract_17 (insn)), info);
|
2542 | f54b3f92 | aurel32 | break;
|
2543 | f54b3f92 | aurel32 | case 'z': |
2544 | f54b3f92 | aurel32 | /* 17 bit displacement. This is an offset from a register
|
2545 | f54b3f92 | aurel32 | so it gets disasssembled as just a number, not any sort
|
2546 | f54b3f92 | aurel32 | of address. */
|
2547 | f54b3f92 | aurel32 | fput_const (extract_17 (insn), info); |
2548 | f54b3f92 | aurel32 | break;
|
2549 | f54b3f92 | aurel32 | |
2550 | f54b3f92 | aurel32 | case 'Z': |
2551 | f54b3f92 | aurel32 | /* addil %r1 implicit output. */
|
2552 | f54b3f92 | aurel32 | fputs_filtered ("r1", info);
|
2553 | f54b3f92 | aurel32 | break;
|
2554 | f54b3f92 | aurel32 | |
2555 | f54b3f92 | aurel32 | case 'Y': |
2556 | f54b3f92 | aurel32 | /* be,l %sr0,%r31 implicit output. */
|
2557 | f54b3f92 | aurel32 | fputs_filtered ("sr0,r31", info);
|
2558 | f54b3f92 | aurel32 | break;
|
2559 | f54b3f92 | aurel32 | |
2560 | f54b3f92 | aurel32 | case '@': |
2561 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "0");
|
2562 | f54b3f92 | aurel32 | break;
|
2563 | f54b3f92 | aurel32 | |
2564 | f54b3f92 | aurel32 | case '.': |
2565 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d",
|
2566 | f54b3f92 | aurel32 | GET_FIELD (insn, 24, 25)); |
2567 | f54b3f92 | aurel32 | break;
|
2568 | f54b3f92 | aurel32 | case '*': |
2569 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d",
|
2570 | f54b3f92 | aurel32 | GET_FIELD (insn, 22, 25)); |
2571 | f54b3f92 | aurel32 | break;
|
2572 | f54b3f92 | aurel32 | case '!': |
2573 | f54b3f92 | aurel32 | fputs_filtered ("sar", info);
|
2574 | f54b3f92 | aurel32 | break;
|
2575 | f54b3f92 | aurel32 | case 'p': |
2576 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d",
|
2577 | f54b3f92 | aurel32 | 31 - GET_FIELD (insn, 22, 26)); |
2578 | f54b3f92 | aurel32 | break;
|
2579 | f54b3f92 | aurel32 | case '~': |
2580 | f54b3f92 | aurel32 | { |
2581 | f54b3f92 | aurel32 | int num;
|
2582 | f54b3f92 | aurel32 | num = GET_FIELD (insn, 20, 20) << 5; |
2583 | f54b3f92 | aurel32 | num |= GET_FIELD (insn, 22, 26); |
2584 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d", 63 - num); |
2585 | f54b3f92 | aurel32 | break;
|
2586 | f54b3f92 | aurel32 | } |
2587 | f54b3f92 | aurel32 | case 'P': |
2588 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d",
|
2589 | f54b3f92 | aurel32 | GET_FIELD (insn, 22, 26)); |
2590 | f54b3f92 | aurel32 | break;
|
2591 | f54b3f92 | aurel32 | case 'q': |
2592 | f54b3f92 | aurel32 | { |
2593 | f54b3f92 | aurel32 | int num;
|
2594 | f54b3f92 | aurel32 | num = GET_FIELD (insn, 20, 20) << 5; |
2595 | f54b3f92 | aurel32 | num |= GET_FIELD (insn, 22, 26); |
2596 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d", num);
|
2597 | f54b3f92 | aurel32 | break;
|
2598 | f54b3f92 | aurel32 | } |
2599 | f54b3f92 | aurel32 | case 'T': |
2600 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d",
|
2601 | f54b3f92 | aurel32 | 32 - GET_FIELD (insn, 27, 31)); |
2602 | f54b3f92 | aurel32 | break;
|
2603 | f54b3f92 | aurel32 | case '%': |
2604 | f54b3f92 | aurel32 | { |
2605 | f54b3f92 | aurel32 | int num;
|
2606 | f54b3f92 | aurel32 | num = (GET_FIELD (insn, 23, 23) + 1) * 32; |
2607 | f54b3f92 | aurel32 | num -= GET_FIELD (insn, 27, 31); |
2608 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d", num);
|
2609 | f54b3f92 | aurel32 | break;
|
2610 | f54b3f92 | aurel32 | } |
2611 | f54b3f92 | aurel32 | case '|': |
2612 | f54b3f92 | aurel32 | { |
2613 | f54b3f92 | aurel32 | int num;
|
2614 | f54b3f92 | aurel32 | num = (GET_FIELD (insn, 19, 19) + 1) * 32; |
2615 | f54b3f92 | aurel32 | num -= GET_FIELD (insn, 27, 31); |
2616 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%d", num);
|
2617 | f54b3f92 | aurel32 | break;
|
2618 | f54b3f92 | aurel32 | } |
2619 | f54b3f92 | aurel32 | case '$': |
2620 | f54b3f92 | aurel32 | fput_const (GET_FIELD (insn, 20, 28), info); |
2621 | f54b3f92 | aurel32 | break;
|
2622 | f54b3f92 | aurel32 | case 'A': |
2623 | f54b3f92 | aurel32 | fput_const (GET_FIELD (insn, 6, 18), info); |
2624 | f54b3f92 | aurel32 | break;
|
2625 | f54b3f92 | aurel32 | case 'D': |
2626 | f54b3f92 | aurel32 | fput_const (GET_FIELD (insn, 6, 31), info); |
2627 | f54b3f92 | aurel32 | break;
|
2628 | f54b3f92 | aurel32 | case 'v': |
2629 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",%d",
|
2630 | f54b3f92 | aurel32 | GET_FIELD (insn, 23, 25)); |
2631 | f54b3f92 | aurel32 | break;
|
2632 | f54b3f92 | aurel32 | case 'O': |
2633 | f54b3f92 | aurel32 | fput_const ((GET_FIELD (insn, 6,20) << 5 | |
2634 | f54b3f92 | aurel32 | GET_FIELD (insn, 27, 31)), info); |
2635 | f54b3f92 | aurel32 | break;
|
2636 | f54b3f92 | aurel32 | case 'o': |
2637 | f54b3f92 | aurel32 | fput_const (GET_FIELD (insn, 6, 20), info); |
2638 | f54b3f92 | aurel32 | break;
|
2639 | f54b3f92 | aurel32 | case '2': |
2640 | f54b3f92 | aurel32 | fput_const ((GET_FIELD (insn, 6, 22) << 5 | |
2641 | f54b3f92 | aurel32 | GET_FIELD (insn, 27, 31)), info); |
2642 | f54b3f92 | aurel32 | break;
|
2643 | f54b3f92 | aurel32 | case '1': |
2644 | f54b3f92 | aurel32 | fput_const ((GET_FIELD (insn, 11, 20) << 5 | |
2645 | f54b3f92 | aurel32 | GET_FIELD (insn, 27, 31)), info); |
2646 | f54b3f92 | aurel32 | break;
|
2647 | f54b3f92 | aurel32 | case '0': |
2648 | f54b3f92 | aurel32 | fput_const ((GET_FIELD (insn, 16, 20) << 5 | |
2649 | f54b3f92 | aurel32 | GET_FIELD (insn, 27, 31)), info); |
2650 | f54b3f92 | aurel32 | break;
|
2651 | f54b3f92 | aurel32 | case 'u': |
2652 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",%d",
|
2653 | f54b3f92 | aurel32 | GET_FIELD (insn, 23, 25)); |
2654 | f54b3f92 | aurel32 | break;
|
2655 | f54b3f92 | aurel32 | case 'F': |
2656 | f54b3f92 | aurel32 | /* If no destination completer and not before a completer
|
2657 | f54b3f92 | aurel32 | for fcmp, need a space here. */
|
2658 | f54b3f92 | aurel32 | if (s[1] == 'G' || s[1] == '?') |
2659 | f54b3f92 | aurel32 | fputs_filtered |
2660 | f54b3f92 | aurel32 | (float_format_names[GET_FIELD (insn, 19, 20)], info); |
2661 | f54b3f92 | aurel32 | else
|
2662 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2663 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2664 | f54b3f92 | aurel32 | float_format_names[GET_FIELD (insn, 19, 20)]); |
2665 | f54b3f92 | aurel32 | break;
|
2666 | f54b3f92 | aurel32 | case 'G': |
2667 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2668 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2669 | f54b3f92 | aurel32 | float_format_names[GET_FIELD (insn, 17, 18)]); |
2670 | f54b3f92 | aurel32 | break;
|
2671 | f54b3f92 | aurel32 | case 'H': |
2672 | f54b3f92 | aurel32 | if (GET_FIELD (insn, 26, 26) == 1) |
2673 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%s ",
|
2674 | f54b3f92 | aurel32 | float_format_names[0]);
|
2675 | f54b3f92 | aurel32 | else
|
2676 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%s ",
|
2677 | f54b3f92 | aurel32 | float_format_names[1]);
|
2678 | f54b3f92 | aurel32 | break;
|
2679 | f54b3f92 | aurel32 | case 'I': |
2680 | f54b3f92 | aurel32 | /* If no destination completer and not before a completer
|
2681 | f54b3f92 | aurel32 | for fcmp, need a space here. */
|
2682 | f54b3f92 | aurel32 | if (s[1] == '?') |
2683 | f54b3f92 | aurel32 | fputs_filtered |
2684 | f54b3f92 | aurel32 | (float_format_names[GET_FIELD (insn, 20, 20)], info); |
2685 | f54b3f92 | aurel32 | else
|
2686 | f54b3f92 | aurel32 | (*info->fprintf_func) |
2687 | f54b3f92 | aurel32 | (info->stream, "%s ",
|
2688 | f54b3f92 | aurel32 | float_format_names[GET_FIELD (insn, 20, 20)]); |
2689 | f54b3f92 | aurel32 | break;
|
2690 | f54b3f92 | aurel32 | |
2691 | f54b3f92 | aurel32 | case 'J': |
2692 | f54b3f92 | aurel32 | fput_const (extract_14 (insn), info); |
2693 | f54b3f92 | aurel32 | break;
|
2694 | f54b3f92 | aurel32 | |
2695 | f54b3f92 | aurel32 | case '#': |
2696 | f54b3f92 | aurel32 | { |
2697 | f54b3f92 | aurel32 | int sign = GET_FIELD (insn, 31, 31); |
2698 | f54b3f92 | aurel32 | int imm10 = GET_FIELD (insn, 18, 27); |
2699 | f54b3f92 | aurel32 | int disp;
|
2700 | f54b3f92 | aurel32 | |
2701 | f54b3f92 | aurel32 | if (sign)
|
2702 | f54b3f92 | aurel32 | disp = (-1 << 10) | imm10; |
2703 | f54b3f92 | aurel32 | else
|
2704 | f54b3f92 | aurel32 | disp = imm10; |
2705 | f54b3f92 | aurel32 | |
2706 | f54b3f92 | aurel32 | disp <<= 3;
|
2707 | f54b3f92 | aurel32 | fput_const (disp, info); |
2708 | f54b3f92 | aurel32 | break;
|
2709 | f54b3f92 | aurel32 | } |
2710 | f54b3f92 | aurel32 | case 'K': |
2711 | f54b3f92 | aurel32 | case 'd': |
2712 | f54b3f92 | aurel32 | { |
2713 | f54b3f92 | aurel32 | int sign = GET_FIELD (insn, 31, 31); |
2714 | f54b3f92 | aurel32 | int imm11 = GET_FIELD (insn, 18, 28); |
2715 | f54b3f92 | aurel32 | int disp;
|
2716 | f54b3f92 | aurel32 | |
2717 | f54b3f92 | aurel32 | if (sign)
|
2718 | f54b3f92 | aurel32 | disp = (-1 << 11) | imm11; |
2719 | f54b3f92 | aurel32 | else
|
2720 | f54b3f92 | aurel32 | disp = imm11; |
2721 | f54b3f92 | aurel32 | |
2722 | f54b3f92 | aurel32 | disp <<= 2;
|
2723 | f54b3f92 | aurel32 | fput_const (disp, info); |
2724 | f54b3f92 | aurel32 | break;
|
2725 | f54b3f92 | aurel32 | } |
2726 | f54b3f92 | aurel32 | |
2727 | f54b3f92 | aurel32 | case '>': |
2728 | f54b3f92 | aurel32 | case 'y': |
2729 | f54b3f92 | aurel32 | { |
2730 | f54b3f92 | aurel32 | /* 16-bit long disp., PA2.0 wide only. */
|
2731 | f54b3f92 | aurel32 | int disp = extract_16 (insn);
|
2732 | f54b3f92 | aurel32 | disp &= ~3;
|
2733 | f54b3f92 | aurel32 | fput_const (disp, info); |
2734 | f54b3f92 | aurel32 | break;
|
2735 | f54b3f92 | aurel32 | } |
2736 | f54b3f92 | aurel32 | |
2737 | f54b3f92 | aurel32 | case '&': |
2738 | f54b3f92 | aurel32 | { |
2739 | f54b3f92 | aurel32 | /* 16-bit long disp., PA2.0 wide only. */
|
2740 | f54b3f92 | aurel32 | int disp = extract_16 (insn);
|
2741 | f54b3f92 | aurel32 | disp &= ~7;
|
2742 | f54b3f92 | aurel32 | fput_const (disp, info); |
2743 | f54b3f92 | aurel32 | break;
|
2744 | f54b3f92 | aurel32 | } |
2745 | f54b3f92 | aurel32 | |
2746 | f54b3f92 | aurel32 | case '_': |
2747 | f54b3f92 | aurel32 | break; /* Dealt with by '{' */ |
2748 | f54b3f92 | aurel32 | |
2749 | f54b3f92 | aurel32 | case '{': |
2750 | f54b3f92 | aurel32 | { |
2751 | f54b3f92 | aurel32 | int sub = GET_FIELD (insn, 14, 16); |
2752 | f54b3f92 | aurel32 | int df = GET_FIELD (insn, 17, 18); |
2753 | f54b3f92 | aurel32 | int sf = GET_FIELD (insn, 19, 20); |
2754 | f54b3f92 | aurel32 | const char * const * source = float_format_names; |
2755 | f54b3f92 | aurel32 | const char * const * dest = float_format_names; |
2756 | f54b3f92 | aurel32 | char *t = ""; |
2757 | f54b3f92 | aurel32 | |
2758 | f54b3f92 | aurel32 | if (sub == 4) |
2759 | f54b3f92 | aurel32 | { |
2760 | f54b3f92 | aurel32 | fputs_filtered (",UND ", info);
|
2761 | f54b3f92 | aurel32 | break;
|
2762 | f54b3f92 | aurel32 | } |
2763 | f54b3f92 | aurel32 | if ((sub & 3) == 3) |
2764 | f54b3f92 | aurel32 | t = ",t";
|
2765 | f54b3f92 | aurel32 | if ((sub & 3) == 1) |
2766 | f54b3f92 | aurel32 | source = sub & 4 ? fcnv_ufixed_names : fcnv_fixed_names;
|
2767 | f54b3f92 | aurel32 | if (sub & 2) |
2768 | f54b3f92 | aurel32 | dest = sub & 4 ? fcnv_ufixed_names : fcnv_fixed_names;
|
2769 | f54b3f92 | aurel32 | |
2770 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%s%s%s ",
|
2771 | f54b3f92 | aurel32 | t, source[sf], dest[df]); |
2772 | f54b3f92 | aurel32 | break;
|
2773 | f54b3f92 | aurel32 | } |
2774 | f54b3f92 | aurel32 | |
2775 | f54b3f92 | aurel32 | case 'm': |
2776 | f54b3f92 | aurel32 | { |
2777 | f54b3f92 | aurel32 | int y = GET_FIELD (insn, 16, 18); |
2778 | f54b3f92 | aurel32 | |
2779 | f54b3f92 | aurel32 | if (y != 1) |
2780 | f54b3f92 | aurel32 | fput_const ((y ^ 1) - 1, info); |
2781 | f54b3f92 | aurel32 | } |
2782 | f54b3f92 | aurel32 | break;
|
2783 | f54b3f92 | aurel32 | |
2784 | f54b3f92 | aurel32 | case 'h': |
2785 | f54b3f92 | aurel32 | { |
2786 | f54b3f92 | aurel32 | int cbit;
|
2787 | f54b3f92 | aurel32 | |
2788 | f54b3f92 | aurel32 | cbit = GET_FIELD (insn, 16, 18); |
2789 | f54b3f92 | aurel32 | |
2790 | f54b3f92 | aurel32 | if (cbit > 0) |
2791 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, ",%d", cbit - 1); |
2792 | f54b3f92 | aurel32 | break;
|
2793 | f54b3f92 | aurel32 | } |
2794 | f54b3f92 | aurel32 | |
2795 | f54b3f92 | aurel32 | case '=': |
2796 | f54b3f92 | aurel32 | { |
2797 | f54b3f92 | aurel32 | int cond = GET_FIELD (insn, 27, 31); |
2798 | f54b3f92 | aurel32 | |
2799 | f54b3f92 | aurel32 | switch (cond)
|
2800 | f54b3f92 | aurel32 | { |
2801 | f54b3f92 | aurel32 | case 0: fputs_filtered (" ", info); break; |
2802 | f54b3f92 | aurel32 | case 1: fputs_filtered ("acc ", info); break; |
2803 | f54b3f92 | aurel32 | case 2: fputs_filtered ("rej ", info); break; |
2804 | f54b3f92 | aurel32 | case 5: fputs_filtered ("acc8 ", info); break; |
2805 | f54b3f92 | aurel32 | case 6: fputs_filtered ("rej8 ", info); break; |
2806 | f54b3f92 | aurel32 | case 9: fputs_filtered ("acc6 ", info); break; |
2807 | f54b3f92 | aurel32 | case 13: fputs_filtered ("acc4 ", info); break; |
2808 | f54b3f92 | aurel32 | case 17: fputs_filtered ("acc2 ", info); break; |
2809 | f54b3f92 | aurel32 | default: break; |
2810 | f54b3f92 | aurel32 | } |
2811 | f54b3f92 | aurel32 | break;
|
2812 | f54b3f92 | aurel32 | } |
2813 | f54b3f92 | aurel32 | |
2814 | f54b3f92 | aurel32 | case 'X': |
2815 | f54b3f92 | aurel32 | (*info->print_address_func) |
2816 | f54b3f92 | aurel32 | (memaddr + 8 + extract_22 (insn), info);
|
2817 | f54b3f92 | aurel32 | break;
|
2818 | f54b3f92 | aurel32 | case 'L': |
2819 | f54b3f92 | aurel32 | fputs_filtered (",rp", info);
|
2820 | f54b3f92 | aurel32 | break;
|
2821 | f54b3f92 | aurel32 | default:
|
2822 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "%c", *s);
|
2823 | f54b3f92 | aurel32 | break;
|
2824 | f54b3f92 | aurel32 | } |
2825 | f54b3f92 | aurel32 | } |
2826 | f54b3f92 | aurel32 | return sizeof (insn); |
2827 | f54b3f92 | aurel32 | } |
2828 | f54b3f92 | aurel32 | } |
2829 | f54b3f92 | aurel32 | (*info->fprintf_func) (info->stream, "#%8x", insn);
|
2830 | f54b3f92 | aurel32 | return sizeof (insn); |
2831 | f54b3f92 | aurel32 | } |