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1 | d19893da | bellard | /*
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2 | d19893da | bellard | * Host code generation
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3 | 5fafdf24 | ths | *
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4 | d19893da | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | d19893da | bellard | *
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6 | d19893da | bellard | * This library is free software; you can redistribute it and/or
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7 | d19893da | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | d19893da | bellard | * License as published by the Free Software Foundation; either
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9 | d19893da | bellard | * version 2 of the License, or (at your option) any later version.
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10 | d19893da | bellard | *
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11 | d19893da | bellard | * This library is distributed in the hope that it will be useful,
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12 | d19893da | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | d19893da | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | d19893da | bellard | * Lesser General Public License for more details.
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15 | d19893da | bellard | *
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16 | d19893da | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | d19893da | bellard | */
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19 | d19893da | bellard | #include <stdarg.h> |
20 | d19893da | bellard | #include <stdlib.h> |
21 | d19893da | bellard | #include <stdio.h> |
22 | d19893da | bellard | #include <string.h> |
23 | d19893da | bellard | #include <inttypes.h> |
24 | d19893da | bellard | |
25 | d19893da | bellard | #include "config.h" |
26 | 2054396a | bellard | |
27 | af5ad107 | bellard | #define NO_CPU_IO_DEFS
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28 | d3eead2e | bellard | #include "cpu.h" |
29 | d3eead2e | bellard | #include "exec-all.h" |
30 | d19893da | bellard | #include "disas.h" |
31 | 57fec1fe | bellard | #include "tcg.h" |
32 | d19893da | bellard | |
33 | 57fec1fe | bellard | /* code generation context */
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34 | 57fec1fe | bellard | TCGContext tcg_ctx; |
35 | d19893da | bellard | |
36 | d19893da | bellard | uint16_t gen_opc_buf[OPC_BUF_SIZE]; |
37 | 57fec1fe | bellard | TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE]; |
38 | c4687878 | bellard | |
39 | c4687878 | bellard | target_ulong gen_opc_pc[OPC_BUF_SIZE]; |
40 | 2e70f6ef | pbrook | uint16_t gen_opc_icount[OPC_BUF_SIZE]; |
41 | d19893da | bellard | uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
42 | f76af4b3 | bellard | #if defined(TARGET_I386)
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43 | f76af4b3 | bellard | uint8_t gen_opc_cc_op[OPC_BUF_SIZE]; |
44 | e95c8d51 | bellard | #elif defined(TARGET_SPARC)
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45 | c4687878 | bellard | target_ulong gen_opc_npc[OPC_BUF_SIZE]; |
46 | c3278b7b | bellard | target_ulong gen_opc_jump_pc[2];
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47 | 823029f9 | ths | #elif defined(TARGET_MIPS) || defined(TARGET_SH4)
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48 | 30d6cb84 | bellard | uint32_t gen_opc_hflags[OPC_BUF_SIZE]; |
49 | f76af4b3 | bellard | #endif
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50 | d19893da | bellard | |
51 | 57fec1fe | bellard | /* XXX: suppress that */
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52 | d07bde88 | blueswir1 | unsigned long code_gen_max_block_size(void) |
53 | d07bde88 | blueswir1 | { |
54 | d07bde88 | blueswir1 | static unsigned long max; |
55 | d07bde88 | blueswir1 | |
56 | d07bde88 | blueswir1 | if (max == 0) { |
57 | a208e54a | pbrook | max = TCG_MAX_OP_SIZE; |
58 | d07bde88 | blueswir1 | #define DEF(s, n, copy_size) max = copy_size > max? copy_size : max;
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59 | 57fec1fe | bellard | #include "tcg-opc.h" |
60 | d07bde88 | blueswir1 | #undef DEF
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61 | d07bde88 | blueswir1 | max *= OPC_MAX_SIZE; |
62 | d07bde88 | blueswir1 | } |
63 | d07bde88 | blueswir1 | |
64 | d07bde88 | blueswir1 | return max;
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65 | d07bde88 | blueswir1 | } |
66 | d07bde88 | blueswir1 | |
67 | 57fec1fe | bellard | void cpu_gen_init(void) |
68 | 57fec1fe | bellard | { |
69 | 57fec1fe | bellard | tcg_context_init(&tcg_ctx); |
70 | 57fec1fe | bellard | tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf), |
71 | a20e31dc | blueswir1 | CPU_TEMP_BUF_NLONGS * sizeof(long)); |
72 | 57fec1fe | bellard | } |
73 | 57fec1fe | bellard | |
74 | d19893da | bellard | /* return non zero if the very first instruction is invalid so that
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75 | 5fafdf24 | ths | the virtual CPU can trigger an exception.
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76 | d19893da | bellard | |
77 | d19893da | bellard | '*gen_code_size_ptr' contains the size of the generated code (host
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78 | d19893da | bellard | code).
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79 | d19893da | bellard | */
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80 | d07bde88 | blueswir1 | int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr) |
81 | d19893da | bellard | { |
82 | 57fec1fe | bellard | TCGContext *s = &tcg_ctx; |
83 | d19893da | bellard | uint8_t *gen_code_buf; |
84 | d19893da | bellard | int gen_code_size;
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85 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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86 | 57fec1fe | bellard | int64_t ti; |
87 | 57fec1fe | bellard | #endif
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88 | 57fec1fe | bellard | |
89 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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90 | b67d9a52 | bellard | s->tb_count1++; /* includes aborted translations because of
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91 | b67d9a52 | bellard | exceptions */
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92 | 57fec1fe | bellard | ti = profile_getclock(); |
93 | 57fec1fe | bellard | #endif
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94 | 57fec1fe | bellard | tcg_func_start(s); |
95 | d19893da | bellard | |
96 | 2cfc5f17 | ths | gen_intermediate_code(env, tb); |
97 | 2cfc5f17 | ths | |
98 | ec6338ba | bellard | /* generate machine code */
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99 | 57fec1fe | bellard | gen_code_buf = tb->tc_ptr; |
100 | ec6338ba | bellard | tb->tb_next_offset[0] = 0xffff; |
101 | ec6338ba | bellard | tb->tb_next_offset[1] = 0xffff; |
102 | 57fec1fe | bellard | s->tb_next_offset = tb->tb_next_offset; |
103 | 4cbb86e1 | bellard | #ifdef USE_DIRECT_JUMP
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104 | 57fec1fe | bellard | s->tb_jmp_offset = tb->tb_jmp_offset; |
105 | 57fec1fe | bellard | s->tb_next = NULL;
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106 | ec6338ba | bellard | /* the following two entries are optional (only used for string ops) */
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107 | 57fec1fe | bellard | /* XXX: not used ? */
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108 | ec6338ba | bellard | tb->tb_jmp_offset[2] = 0xffff; |
109 | ec6338ba | bellard | tb->tb_jmp_offset[3] = 0xffff; |
110 | d19893da | bellard | #else
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111 | 57fec1fe | bellard | s->tb_jmp_offset = NULL;
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112 | 57fec1fe | bellard | s->tb_next = tb->tb_next; |
113 | d19893da | bellard | #endif
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114 | 57fec1fe | bellard | |
115 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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116 | b67d9a52 | bellard | s->tb_count++; |
117 | b67d9a52 | bellard | s->interm_time += profile_getclock() - ti; |
118 | b67d9a52 | bellard | s->code_time -= profile_getclock(); |
119 | 57fec1fe | bellard | #endif
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120 | 54604f74 | aurel32 | gen_code_size = tcg_gen_code(s, gen_code_buf); |
121 | d19893da | bellard | *gen_code_size_ptr = gen_code_size; |
122 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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123 | b67d9a52 | bellard | s->code_time += profile_getclock(); |
124 | b67d9a52 | bellard | s->code_in_len += tb->size; |
125 | b67d9a52 | bellard | s->code_out_len += gen_code_size; |
126 | 57fec1fe | bellard | #endif
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127 | 57fec1fe | bellard | |
128 | d19893da | bellard | #ifdef DEBUG_DISAS
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129 | 8fec2b8c | aliguori | if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
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130 | 93fcfe39 | aliguori | qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
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131 | 93fcfe39 | aliguori | log_disas(tb->tc_ptr, *gen_code_size_ptr); |
132 | 93fcfe39 | aliguori | qemu_log("\n");
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133 | 31b1a7b4 | aliguori | qemu_log_flush(); |
134 | d19893da | bellard | } |
135 | d19893da | bellard | #endif
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136 | d19893da | bellard | return 0; |
137 | d19893da | bellard | } |
138 | d19893da | bellard | |
139 | 5fafdf24 | ths | /* The cpu state corresponding to 'searched_pc' is restored.
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140 | d19893da | bellard | */
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141 | 5fafdf24 | ths | int cpu_restore_state(TranslationBlock *tb,
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142 | 58fe2f10 | bellard | CPUState *env, unsigned long searched_pc, |
143 | 58fe2f10 | bellard | void *puc)
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144 | d19893da | bellard | { |
145 | 57fec1fe | bellard | TCGContext *s = &tcg_ctx; |
146 | 57fec1fe | bellard | int j;
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147 | d19893da | bellard | unsigned long tc_ptr; |
148 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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149 | 57fec1fe | bellard | int64_t ti; |
150 | 57fec1fe | bellard | #endif
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151 | 57fec1fe | bellard | |
152 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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153 | 57fec1fe | bellard | ti = profile_getclock(); |
154 | 57fec1fe | bellard | #endif
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155 | 57fec1fe | bellard | tcg_func_start(s); |
156 | d19893da | bellard | |
157 | 2cfc5f17 | ths | gen_intermediate_code_pc(env, tb); |
158 | 3b46e624 | ths | |
159 | 2e70f6ef | pbrook | if (use_icount) {
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160 | 2e70f6ef | pbrook | /* Reset the cycle counter to the start of the block. */
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161 | 2e70f6ef | pbrook | env->icount_decr.u16.low += tb->icount; |
162 | 2e70f6ef | pbrook | /* Clear the IO flag. */
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163 | 2e70f6ef | pbrook | env->can_do_io = 0;
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164 | 2e70f6ef | pbrook | } |
165 | 2e70f6ef | pbrook | |
166 | d19893da | bellard | /* find opc index corresponding to search_pc */
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167 | d19893da | bellard | tc_ptr = (unsigned long)tb->tc_ptr; |
168 | d19893da | bellard | if (searched_pc < tc_ptr)
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169 | d19893da | bellard | return -1; |
170 | 57fec1fe | bellard | |
171 | 57fec1fe | bellard | s->tb_next_offset = tb->tb_next_offset; |
172 | 57fec1fe | bellard | #ifdef USE_DIRECT_JUMP
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173 | 57fec1fe | bellard | s->tb_jmp_offset = tb->tb_jmp_offset; |
174 | 57fec1fe | bellard | s->tb_next = NULL;
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175 | 57fec1fe | bellard | #else
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176 | 57fec1fe | bellard | s->tb_jmp_offset = NULL;
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177 | 57fec1fe | bellard | s->tb_next = tb->tb_next; |
178 | 57fec1fe | bellard | #endif
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179 | 54604f74 | aurel32 | j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr); |
180 | 57fec1fe | bellard | if (j < 0) |
181 | 57fec1fe | bellard | return -1; |
182 | d19893da | bellard | /* now find start of instruction before */
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183 | d19893da | bellard | while (gen_opc_instr_start[j] == 0) |
184 | d19893da | bellard | j--; |
185 | 2e70f6ef | pbrook | env->icount_decr.u16.low -= gen_opc_icount[j]; |
186 | 3b46e624 | ths | |
187 | d2856f1a | aurel32 | gen_pc_load(env, tb, searched_pc, j, puc); |
188 | 57fec1fe | bellard | |
189 | 57fec1fe | bellard | #ifdef CONFIG_PROFILER
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190 | b67d9a52 | bellard | s->restore_time += profile_getclock() - ti; |
191 | b67d9a52 | bellard | s->restore_count++; |
192 | 57fec1fe | bellard | #endif
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193 | d19893da | bellard | return 0; |
194 | d19893da | bellard | } |