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1 | ad96090a | Blue Swirl | /*
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2 | ad96090a | Blue Swirl | * QEMU System Emulator
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3 | ad96090a | Blue Swirl | *
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4 | ad96090a | Blue Swirl | * Copyright (c) 2003-2008 Fabrice Bellard
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5 | ad96090a | Blue Swirl | *
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6 | ad96090a | Blue Swirl | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | ad96090a | Blue Swirl | * of this software and associated documentation files (the "Software"), to deal
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8 | ad96090a | Blue Swirl | * in the Software without restriction, including without limitation the rights
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9 | ad96090a | Blue Swirl | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | ad96090a | Blue Swirl | * copies of the Software, and to permit persons to whom the Software is
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11 | ad96090a | Blue Swirl | * furnished to do so, subject to the following conditions:
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12 | ad96090a | Blue Swirl | *
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13 | ad96090a | Blue Swirl | * The above copyright notice and this permission notice shall be included in
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14 | ad96090a | Blue Swirl | * all copies or substantial portions of the Software.
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15 | ad96090a | Blue Swirl | *
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16 | ad96090a | Blue Swirl | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | ad96090a | Blue Swirl | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | ad96090a | Blue Swirl | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | ad96090a | Blue Swirl | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | ad96090a | Blue Swirl | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | ad96090a | Blue Swirl | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | ad96090a | Blue Swirl | * THE SOFTWARE.
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23 | ad96090a | Blue Swirl | */
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24 | ad96090a | Blue Swirl | #include <stdint.h> |
25 | ad96090a | Blue Swirl | #include <stdarg.h> |
26 | b2e0a138 | Michael S. Tsirkin | #include <stdlib.h> |
27 | ad96090a | Blue Swirl | #ifndef _WIN32
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28 | 1c47cb16 | Blue Swirl | #include <sys/types.h> |
29 | ad96090a | Blue Swirl | #include <sys/mman.h> |
30 | ad96090a | Blue Swirl | #endif
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31 | ad96090a | Blue Swirl | #include "config.h" |
32 | ad96090a | Blue Swirl | #include "monitor.h" |
33 | ad96090a | Blue Swirl | #include "sysemu.h" |
34 | ad96090a | Blue Swirl | #include "arch_init.h" |
35 | ad96090a | Blue Swirl | #include "audio/audio.h" |
36 | ad96090a | Blue Swirl | #include "hw/pc.h" |
37 | ad96090a | Blue Swirl | #include "hw/pci.h" |
38 | ad96090a | Blue Swirl | #include "hw/audiodev.h" |
39 | ad96090a | Blue Swirl | #include "kvm.h" |
40 | ad96090a | Blue Swirl | #include "migration.h" |
41 | ad96090a | Blue Swirl | #include "net.h" |
42 | ad96090a | Blue Swirl | #include "gdbstub.h" |
43 | ad96090a | Blue Swirl | #include "hw/smbios.h" |
44 | 86e775c6 | Avi Kivity | #include "exec-memory.h" |
45 | 302fe51b | Jan Kiszka | #include "hw/pcspk.h" |
46 | ad96090a | Blue Swirl | |
47 | 3a697f69 | Orit Wasserman | #ifdef DEBUG_ARCH_INIT
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48 | 3a697f69 | Orit Wasserman | #define DPRINTF(fmt, ...) \
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49 | 3a697f69 | Orit Wasserman | do { fprintf(stdout, "arch_init: " fmt, ## __VA_ARGS__); } while (0) |
50 | 3a697f69 | Orit Wasserman | #else
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51 | 3a697f69 | Orit Wasserman | #define DPRINTF(fmt, ...) \
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52 | 3a697f69 | Orit Wasserman | do { } while (0) |
53 | 3a697f69 | Orit Wasserman | #endif
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54 | 3a697f69 | Orit Wasserman | |
55 | ad96090a | Blue Swirl | #ifdef TARGET_SPARC
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56 | ad96090a | Blue Swirl | int graphic_width = 1024; |
57 | ad96090a | Blue Swirl | int graphic_height = 768; |
58 | ad96090a | Blue Swirl | int graphic_depth = 8; |
59 | ad96090a | Blue Swirl | #else
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60 | ad96090a | Blue Swirl | int graphic_width = 800; |
61 | ad96090a | Blue Swirl | int graphic_height = 600; |
62 | ad96090a | Blue Swirl | int graphic_depth = 15; |
63 | ad96090a | Blue Swirl | #endif
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64 | ad96090a | Blue Swirl | |
65 | ad96090a | Blue Swirl | |
66 | ad96090a | Blue Swirl | #if defined(TARGET_ALPHA)
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67 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ALPHA
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68 | ad96090a | Blue Swirl | #elif defined(TARGET_ARM)
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69 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_ARM
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70 | ad96090a | Blue Swirl | #elif defined(TARGET_CRIS)
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71 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_CRIS
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72 | ad96090a | Blue Swirl | #elif defined(TARGET_I386)
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73 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_I386
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74 | ad96090a | Blue Swirl | #elif defined(TARGET_M68K)
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75 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_M68K
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76 | 81ea0e13 | Michael Walle | #elif defined(TARGET_LM32)
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77 | 81ea0e13 | Michael Walle | #define QEMU_ARCH QEMU_ARCH_LM32
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78 | ad96090a | Blue Swirl | #elif defined(TARGET_MICROBLAZE)
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79 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MICROBLAZE
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80 | ad96090a | Blue Swirl | #elif defined(TARGET_MIPS)
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81 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_MIPS
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82 | ad96090a | Blue Swirl | #elif defined(TARGET_PPC)
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83 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_PPC
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84 | ad96090a | Blue Swirl | #elif defined(TARGET_S390X)
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85 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_S390X
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86 | ad96090a | Blue Swirl | #elif defined(TARGET_SH4)
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87 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SH4
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88 | ad96090a | Blue Swirl | #elif defined(TARGET_SPARC)
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89 | ad96090a | Blue Swirl | #define QEMU_ARCH QEMU_ARCH_SPARC
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90 | 2328826b | Max Filippov | #elif defined(TARGET_XTENSA)
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91 | 2328826b | Max Filippov | #define QEMU_ARCH QEMU_ARCH_XTENSA
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92 | ad96090a | Blue Swirl | #endif
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93 | ad96090a | Blue Swirl | |
94 | ad96090a | Blue Swirl | const uint32_t arch_type = QEMU_ARCH;
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95 | ad96090a | Blue Swirl | |
96 | ad96090a | Blue Swirl | /***********************************************************/
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97 | ad96090a | Blue Swirl | /* ram save/restore */
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98 | ad96090a | Blue Swirl | |
99 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_FULL 0x01 /* Obsolete, not used anymore */ |
100 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_COMPRESS 0x02 |
101 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_MEM_SIZE 0x04 |
102 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_PAGE 0x08 |
103 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_EOS 0x10 |
104 | d20878d2 | Yoshiaki Tamura | #define RAM_SAVE_FLAG_CONTINUE 0x20 |
105 | ad96090a | Blue Swirl | |
106 | 86003615 | Paolo Bonzini | #ifdef __ALTIVEC__
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107 | 86003615 | Paolo Bonzini | #include <altivec.h> |
108 | 86003615 | Paolo Bonzini | #define VECTYPE vector unsigned char |
109 | 86003615 | Paolo Bonzini | #define SPLAT(p) vec_splat(vec_ld(0, p), 0) |
110 | 86003615 | Paolo Bonzini | #define ALL_EQ(v1, v2) vec_all_eq(v1, v2)
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111 | f283edc4 | Andreas Färber | /* altivec.h may redefine the bool macro as vector type.
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112 | f283edc4 | Andreas Färber | * Reset it to POSIX semantics. */
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113 | f283edc4 | Andreas Färber | #undef bool |
114 | f283edc4 | Andreas Färber | #define bool _Bool |
115 | 86003615 | Paolo Bonzini | #elif defined __SSE2__
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116 | 86003615 | Paolo Bonzini | #include <emmintrin.h> |
117 | 86003615 | Paolo Bonzini | #define VECTYPE __m128i
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118 | 86003615 | Paolo Bonzini | #define SPLAT(p) _mm_set1_epi8(*(p))
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119 | 86003615 | Paolo Bonzini | #define ALL_EQ(v1, v2) (_mm_movemask_epi8(_mm_cmpeq_epi8(v1, v2)) == 0xFFFF) |
120 | 86003615 | Paolo Bonzini | #else
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121 | 86003615 | Paolo Bonzini | #define VECTYPE unsigned long |
122 | 86003615 | Paolo Bonzini | #define SPLAT(p) (*(p) * (~0UL / 255)) |
123 | 86003615 | Paolo Bonzini | #define ALL_EQ(v1, v2) ((v1) == (v2))
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124 | 86003615 | Paolo Bonzini | #endif
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125 | 86003615 | Paolo Bonzini | |
126 | b5a8fe5e | Eduardo Habkost | |
127 | 756557de | Eduardo Habkost | static struct defconfig_file { |
128 | 756557de | Eduardo Habkost | const char *filename; |
129 | f29a5614 | Eduardo Habkost | /* Indicates it is an user config file (disabled by -no-user-config) */
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130 | f29a5614 | Eduardo Habkost | bool userconfig;
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131 | 756557de | Eduardo Habkost | } default_config_files[] = { |
132 | e2d87bff | Eduardo Habkost | { CONFIG_QEMU_DATADIR "/cpus-" TARGET_ARCH ".conf", false }, |
133 | f29a5614 | Eduardo Habkost | { CONFIG_QEMU_CONFDIR "/qemu.conf", true }, |
134 | f29a5614 | Eduardo Habkost | { CONFIG_QEMU_CONFDIR "/target-" TARGET_ARCH ".conf", true }, |
135 | 756557de | Eduardo Habkost | { NULL }, /* end of list */ |
136 | 756557de | Eduardo Habkost | }; |
137 | 756557de | Eduardo Habkost | |
138 | 756557de | Eduardo Habkost | |
139 | f29a5614 | Eduardo Habkost | int qemu_read_default_config_files(bool userconfig) |
140 | b5a8fe5e | Eduardo Habkost | { |
141 | b5a8fe5e | Eduardo Habkost | int ret;
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142 | 756557de | Eduardo Habkost | struct defconfig_file *f;
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143 | b5a8fe5e | Eduardo Habkost | |
144 | 756557de | Eduardo Habkost | for (f = default_config_files; f->filename; f++) {
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145 | f29a5614 | Eduardo Habkost | if (!userconfig && f->userconfig) {
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146 | f29a5614 | Eduardo Habkost | continue;
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147 | f29a5614 | Eduardo Habkost | } |
148 | 756557de | Eduardo Habkost | ret = qemu_read_config_file(f->filename); |
149 | 756557de | Eduardo Habkost | if (ret < 0 && ret != -ENOENT) { |
150 | 756557de | Eduardo Habkost | return ret;
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151 | 756557de | Eduardo Habkost | } |
152 | b5a8fe5e | Eduardo Habkost | } |
153 | 756557de | Eduardo Habkost | |
154 | b5a8fe5e | Eduardo Habkost | return 0; |
155 | b5a8fe5e | Eduardo Habkost | } |
156 | b5a8fe5e | Eduardo Habkost | |
157 | 86003615 | Paolo Bonzini | static int is_dup_page(uint8_t *page) |
158 | ad96090a | Blue Swirl | { |
159 | 86003615 | Paolo Bonzini | VECTYPE *p = (VECTYPE *)page; |
160 | 86003615 | Paolo Bonzini | VECTYPE val = SPLAT(page); |
161 | ad96090a | Blue Swirl | int i;
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162 | ad96090a | Blue Swirl | |
163 | 86003615 | Paolo Bonzini | for (i = 0; i < TARGET_PAGE_SIZE / sizeof(VECTYPE); i++) { |
164 | 86003615 | Paolo Bonzini | if (!ALL_EQ(val, p[i])) {
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165 | ad96090a | Blue Swirl | return 0; |
166 | ad96090a | Blue Swirl | } |
167 | ad96090a | Blue Swirl | } |
168 | ad96090a | Blue Swirl | |
169 | ad96090a | Blue Swirl | return 1; |
170 | ad96090a | Blue Swirl | } |
171 | ad96090a | Blue Swirl | |
172 | 0c51f43d | Orit Wasserman | static void save_block_hdr(QEMUFile *f, RAMBlock *block, ram_addr_t offset, |
173 | 0c51f43d | Orit Wasserman | int cont, int flag) |
174 | 0c51f43d | Orit Wasserman | { |
175 | 0c51f43d | Orit Wasserman | qemu_put_be64(f, offset | cont | flag); |
176 | 0c51f43d | Orit Wasserman | if (!cont) {
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177 | 0c51f43d | Orit Wasserman | qemu_put_byte(f, strlen(block->idstr)); |
178 | 0c51f43d | Orit Wasserman | qemu_put_buffer(f, (uint8_t *)block->idstr, |
179 | 0c51f43d | Orit Wasserman | strlen(block->idstr)); |
180 | 0c51f43d | Orit Wasserman | } |
181 | 0c51f43d | Orit Wasserman | |
182 | 0c51f43d | Orit Wasserman | } |
183 | 0c51f43d | Orit Wasserman | |
184 | 760e77ea | Alex Williamson | static RAMBlock *last_block;
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185 | 760e77ea | Alex Williamson | static ram_addr_t last_offset;
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186 | 760e77ea | Alex Williamson | |
187 | ad96090a | Blue Swirl | static int ram_save_block(QEMUFile *f) |
188 | ad96090a | Blue Swirl | { |
189 | e44359c3 | Alex Williamson | RAMBlock *block = last_block; |
190 | e44359c3 | Alex Williamson | ram_addr_t offset = last_offset; |
191 | 3fc250b4 | Pierre Riteau | int bytes_sent = 0; |
192 | 71c510e2 | Avi Kivity | MemoryRegion *mr; |
193 | ad96090a | Blue Swirl | |
194 | e44359c3 | Alex Williamson | if (!block)
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195 | e44359c3 | Alex Williamson | block = QLIST_FIRST(&ram_list.blocks); |
196 | e44359c3 | Alex Williamson | |
197 | e44359c3 | Alex Williamson | do {
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198 | 71c510e2 | Avi Kivity | mr = block->mr; |
199 | cd7a45c9 | Blue Swirl | if (memory_region_get_dirty(mr, offset, TARGET_PAGE_SIZE,
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200 | cd7a45c9 | Blue Swirl | DIRTY_MEMORY_MIGRATION)) { |
201 | ad96090a | Blue Swirl | uint8_t *p; |
202 | a55bbe31 | Alex Williamson | int cont = (block == last_block) ? RAM_SAVE_FLAG_CONTINUE : 0; |
203 | ad96090a | Blue Swirl | |
204 | 71c510e2 | Avi Kivity | memory_region_reset_dirty(mr, offset, TARGET_PAGE_SIZE, |
205 | 71c510e2 | Avi Kivity | DIRTY_MEMORY_MIGRATION); |
206 | ad96090a | Blue Swirl | |
207 | 71c510e2 | Avi Kivity | p = memory_region_get_ram_ptr(mr) + offset; |
208 | ad96090a | Blue Swirl | |
209 | 86003615 | Paolo Bonzini | if (is_dup_page(p)) {
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210 | 0c51f43d | Orit Wasserman | save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_COMPRESS); |
211 | ad96090a | Blue Swirl | qemu_put_byte(f, *p); |
212 | 3fc250b4 | Pierre Riteau | bytes_sent = 1;
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213 | ad96090a | Blue Swirl | } else {
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214 | 0c51f43d | Orit Wasserman | save_block_hdr(f, block, offset, cont, RAM_SAVE_FLAG_PAGE); |
215 | ad96090a | Blue Swirl | qemu_put_buffer(f, p, TARGET_PAGE_SIZE); |
216 | 3fc250b4 | Pierre Riteau | bytes_sent = TARGET_PAGE_SIZE; |
217 | ad96090a | Blue Swirl | } |
218 | ad96090a | Blue Swirl | |
219 | ad96090a | Blue Swirl | break;
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220 | ad96090a | Blue Swirl | } |
221 | e44359c3 | Alex Williamson | |
222 | e44359c3 | Alex Williamson | offset += TARGET_PAGE_SIZE; |
223 | e44359c3 | Alex Williamson | if (offset >= block->length) {
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224 | e44359c3 | Alex Williamson | offset = 0;
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225 | e44359c3 | Alex Williamson | block = QLIST_NEXT(block, next); |
226 | e44359c3 | Alex Williamson | if (!block)
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227 | e44359c3 | Alex Williamson | block = QLIST_FIRST(&ram_list.blocks); |
228 | e44359c3 | Alex Williamson | } |
229 | 71c510e2 | Avi Kivity | } while (block != last_block || offset != last_offset);
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230 | e44359c3 | Alex Williamson | |
231 | e44359c3 | Alex Williamson | last_block = block; |
232 | e44359c3 | Alex Williamson | last_offset = offset; |
233 | ad96090a | Blue Swirl | |
234 | 3fc250b4 | Pierre Riteau | return bytes_sent;
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235 | ad96090a | Blue Swirl | } |
236 | ad96090a | Blue Swirl | |
237 | ad96090a | Blue Swirl | static uint64_t bytes_transferred;
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238 | ad96090a | Blue Swirl | |
239 | ad96090a | Blue Swirl | static ram_addr_t ram_save_remaining(void) |
240 | ad96090a | Blue Swirl | { |
241 | e44359c3 | Alex Williamson | RAMBlock *block; |
242 | ad96090a | Blue Swirl | ram_addr_t count = 0;
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243 | ad96090a | Blue Swirl | |
244 | e44359c3 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
245 | e44359c3 | Alex Williamson | ram_addr_t addr; |
246 | 71c510e2 | Avi Kivity | for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) { |
247 | cd7a45c9 | Blue Swirl | if (memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE,
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248 | 71c510e2 | Avi Kivity | DIRTY_MEMORY_MIGRATION)) { |
249 | e44359c3 | Alex Williamson | count++; |
250 | e44359c3 | Alex Williamson | } |
251 | ad96090a | Blue Swirl | } |
252 | ad96090a | Blue Swirl | } |
253 | ad96090a | Blue Swirl | |
254 | ad96090a | Blue Swirl | return count;
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255 | ad96090a | Blue Swirl | } |
256 | ad96090a | Blue Swirl | |
257 | ad96090a | Blue Swirl | uint64_t ram_bytes_remaining(void)
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258 | ad96090a | Blue Swirl | { |
259 | ad96090a | Blue Swirl | return ram_save_remaining() * TARGET_PAGE_SIZE;
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260 | ad96090a | Blue Swirl | } |
261 | ad96090a | Blue Swirl | |
262 | ad96090a | Blue Swirl | uint64_t ram_bytes_transferred(void)
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263 | ad96090a | Blue Swirl | { |
264 | ad96090a | Blue Swirl | return bytes_transferred;
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265 | ad96090a | Blue Swirl | } |
266 | ad96090a | Blue Swirl | |
267 | ad96090a | Blue Swirl | uint64_t ram_bytes_total(void)
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268 | ad96090a | Blue Swirl | { |
269 | d17b5288 | Alex Williamson | RAMBlock *block; |
270 | d17b5288 | Alex Williamson | uint64_t total = 0;
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271 | d17b5288 | Alex Williamson | |
272 | d17b5288 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) |
273 | d17b5288 | Alex Williamson | total += block->length; |
274 | d17b5288 | Alex Williamson | |
275 | d17b5288 | Alex Williamson | return total;
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276 | ad96090a | Blue Swirl | } |
277 | ad96090a | Blue Swirl | |
278 | b2e0a138 | Michael S. Tsirkin | static int block_compar(const void *a, const void *b) |
279 | b2e0a138 | Michael S. Tsirkin | { |
280 | b2e0a138 | Michael S. Tsirkin | RAMBlock * const *ablock = a;
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281 | b2e0a138 | Michael S. Tsirkin | RAMBlock * const *bblock = b;
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282 | 8fec98b4 | Avi Kivity | |
283 | 8fec98b4 | Avi Kivity | return strcmp((*ablock)->idstr, (*bblock)->idstr);
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284 | b2e0a138 | Michael S. Tsirkin | } |
285 | b2e0a138 | Michael S. Tsirkin | |
286 | b2e0a138 | Michael S. Tsirkin | static void sort_ram_list(void) |
287 | b2e0a138 | Michael S. Tsirkin | { |
288 | b2e0a138 | Michael S. Tsirkin | RAMBlock *block, *nblock, **blocks; |
289 | b2e0a138 | Michael S. Tsirkin | int n;
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290 | b2e0a138 | Michael S. Tsirkin | n = 0;
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291 | b2e0a138 | Michael S. Tsirkin | QLIST_FOREACH(block, &ram_list.blocks, next) { |
292 | b2e0a138 | Michael S. Tsirkin | ++n; |
293 | b2e0a138 | Michael S. Tsirkin | } |
294 | 7267c094 | Anthony Liguori | blocks = g_malloc(n * sizeof *blocks);
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295 | b2e0a138 | Michael S. Tsirkin | n = 0;
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296 | b2e0a138 | Michael S. Tsirkin | QLIST_FOREACH_SAFE(block, &ram_list.blocks, next, nblock) { |
297 | b2e0a138 | Michael S. Tsirkin | blocks[n++] = block; |
298 | b2e0a138 | Michael S. Tsirkin | QLIST_REMOVE(block, next); |
299 | b2e0a138 | Michael S. Tsirkin | } |
300 | b2e0a138 | Michael S. Tsirkin | qsort(blocks, n, sizeof *blocks, block_compar);
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301 | b2e0a138 | Michael S. Tsirkin | while (--n >= 0) { |
302 | b2e0a138 | Michael S. Tsirkin | QLIST_INSERT_HEAD(&ram_list.blocks, blocks[n], next); |
303 | b2e0a138 | Michael S. Tsirkin | } |
304 | 7267c094 | Anthony Liguori | g_free(blocks); |
305 | b2e0a138 | Michael S. Tsirkin | } |
306 | b2e0a138 | Michael S. Tsirkin | |
307 | 8e21cd32 | Orit Wasserman | static void migration_end(void) |
308 | 8e21cd32 | Orit Wasserman | { |
309 | 8e21cd32 | Orit Wasserman | memory_global_dirty_log_stop(); |
310 | 8e21cd32 | Orit Wasserman | } |
311 | 8e21cd32 | Orit Wasserman | |
312 | 4508bd9e | Juan Quintela | #define MAX_WAIT 50 /* ms, half buffered_file limit */ |
313 | 4508bd9e | Juan Quintela | |
314 | 539de124 | Luiz Capitulino | int ram_save_live(QEMUFile *f, int stage, void *opaque) |
315 | ad96090a | Blue Swirl | { |
316 | ad96090a | Blue Swirl | ram_addr_t addr; |
317 | ad96090a | Blue Swirl | uint64_t bytes_transferred_last; |
318 | ad96090a | Blue Swirl | double bwidth = 0; |
319 | 2975725f | Juan Quintela | int ret;
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320 | 4508bd9e | Juan Quintela | int i;
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321 | ad96090a | Blue Swirl | |
322 | ad96090a | Blue Swirl | if (stage < 0) { |
323 | 8e21cd32 | Orit Wasserman | migration_end(); |
324 | ad96090a | Blue Swirl | return 0; |
325 | ad96090a | Blue Swirl | } |
326 | ad96090a | Blue Swirl | |
327 | 86e775c6 | Avi Kivity | memory_global_sync_dirty_bitmap(get_system_memory()); |
328 | ad96090a | Blue Swirl | |
329 | ad96090a | Blue Swirl | if (stage == 1) { |
330 | 97ab12d4 | Alex Williamson | RAMBlock *block; |
331 | ad96090a | Blue Swirl | bytes_transferred = 0;
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332 | 760e77ea | Alex Williamson | last_block = NULL;
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333 | 760e77ea | Alex Williamson | last_offset = 0;
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334 | b2e0a138 | Michael S. Tsirkin | sort_ram_list(); |
335 | ad96090a | Blue Swirl | |
336 | ad96090a | Blue Swirl | /* Make sure all dirty bits are set */
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337 | e44359c3 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
338 | 71c510e2 | Avi Kivity | for (addr = 0; addr < block->length; addr += TARGET_PAGE_SIZE) { |
339 | cd7a45c9 | Blue Swirl | if (!memory_region_get_dirty(block->mr, addr, TARGET_PAGE_SIZE,
|
340 | 71c510e2 | Avi Kivity | DIRTY_MEMORY_MIGRATION)) { |
341 | fd4aa979 | Blue Swirl | memory_region_set_dirty(block->mr, addr, TARGET_PAGE_SIZE); |
342 | e44359c3 | Alex Williamson | } |
343 | ad96090a | Blue Swirl | } |
344 | ad96090a | Blue Swirl | } |
345 | ad96090a | Blue Swirl | |
346 | 8f77558f | Avi Kivity | memory_global_dirty_log_start(); |
347 | ad96090a | Blue Swirl | |
348 | e44359c3 | Alex Williamson | qemu_put_be64(f, ram_bytes_total() | RAM_SAVE_FLAG_MEM_SIZE); |
349 | 97ab12d4 | Alex Williamson | |
350 | 97ab12d4 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
351 | 97ab12d4 | Alex Williamson | qemu_put_byte(f, strlen(block->idstr)); |
352 | 97ab12d4 | Alex Williamson | qemu_put_buffer(f, (uint8_t *)block->idstr, strlen(block->idstr)); |
353 | 97ab12d4 | Alex Williamson | qemu_put_be64(f, block->length); |
354 | 97ab12d4 | Alex Williamson | } |
355 | ad96090a | Blue Swirl | } |
356 | ad96090a | Blue Swirl | |
357 | ad96090a | Blue Swirl | bytes_transferred_last = bytes_transferred; |
358 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock); |
359 | ad96090a | Blue Swirl | |
360 | 4508bd9e | Juan Quintela | i = 0;
|
361 | 2975725f | Juan Quintela | while ((ret = qemu_file_rate_limit(f)) == 0) { |
362 | 3fc250b4 | Pierre Riteau | int bytes_sent;
|
363 | ad96090a | Blue Swirl | |
364 | 3fc250b4 | Pierre Riteau | bytes_sent = ram_save_block(f); |
365 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
366 | 3fc250b4 | Pierre Riteau | if (bytes_sent == 0) { /* no more blocks */ |
367 | ad96090a | Blue Swirl | break;
|
368 | ad96090a | Blue Swirl | } |
369 | 4508bd9e | Juan Quintela | /* we want to check in the 1st loop, just in case it was the 1st time
|
370 | 4508bd9e | Juan Quintela | and we had to sync the dirty bitmap.
|
371 | 4508bd9e | Juan Quintela | qemu_get_clock_ns() is a bit expensive, so we only check each some
|
372 | 4508bd9e | Juan Quintela | iterations
|
373 | 4508bd9e | Juan Quintela | */
|
374 | 4508bd9e | Juan Quintela | if ((i & 63) == 0) { |
375 | 4508bd9e | Juan Quintela | uint64_t t1 = (qemu_get_clock_ns(rt_clock) - bwidth) / 1000000;
|
376 | 4508bd9e | Juan Quintela | if (t1 > MAX_WAIT) {
|
377 | 4508bd9e | Juan Quintela | DPRINTF("big wait: " PRIu64 " milliseconds, %d iterations\n", |
378 | 4508bd9e | Juan Quintela | t1, i); |
379 | 4508bd9e | Juan Quintela | break;
|
380 | 4508bd9e | Juan Quintela | } |
381 | 4508bd9e | Juan Quintela | } |
382 | 4508bd9e | Juan Quintela | i++; |
383 | ad96090a | Blue Swirl | } |
384 | ad96090a | Blue Swirl | |
385 | 2975725f | Juan Quintela | if (ret < 0) { |
386 | 2975725f | Juan Quintela | return ret;
|
387 | 2975725f | Juan Quintela | } |
388 | 2975725f | Juan Quintela | |
389 | ad96090a | Blue Swirl | bwidth = qemu_get_clock_ns(rt_clock) - bwidth; |
390 | ad96090a | Blue Swirl | bwidth = (bytes_transferred - bytes_transferred_last) / bwidth; |
391 | ad96090a | Blue Swirl | |
392 | ad96090a | Blue Swirl | /* if we haven't transferred anything this round, force expected_time to a
|
393 | ad96090a | Blue Swirl | * a very high value, but without crashing */
|
394 | ad96090a | Blue Swirl | if (bwidth == 0) { |
395 | ad96090a | Blue Swirl | bwidth = 0.000001; |
396 | ad96090a | Blue Swirl | } |
397 | ad96090a | Blue Swirl | |
398 | ad96090a | Blue Swirl | /* try transferring iterative blocks of memory */
|
399 | ad96090a | Blue Swirl | if (stage == 3) { |
400 | 3fc250b4 | Pierre Riteau | int bytes_sent;
|
401 | 3fc250b4 | Pierre Riteau | |
402 | ad96090a | Blue Swirl | /* flush all remaining blocks regardless of rate limiting */
|
403 | 3fc250b4 | Pierre Riteau | while ((bytes_sent = ram_save_block(f)) != 0) { |
404 | 3fc250b4 | Pierre Riteau | bytes_transferred += bytes_sent; |
405 | ad96090a | Blue Swirl | } |
406 | 8f77558f | Avi Kivity | memory_global_dirty_log_stop(); |
407 | ad96090a | Blue Swirl | } |
408 | ad96090a | Blue Swirl | |
409 | ad96090a | Blue Swirl | qemu_put_be64(f, RAM_SAVE_FLAG_EOS); |
410 | ad96090a | Blue Swirl | |
411 | 5b3c9638 | Juan Quintela | if (stage == 2) { |
412 | 5b3c9638 | Juan Quintela | uint64_t expected_time; |
413 | 5b3c9638 | Juan Quintela | expected_time = ram_save_remaining() * TARGET_PAGE_SIZE / bwidth; |
414 | ad96090a | Blue Swirl | |
415 | 5b3c9638 | Juan Quintela | DPRINTF("ram_save_live: expected(" PRIu64 ") <= max(" PRIu64 ")?\n", |
416 | 5b3c9638 | Juan Quintela | expected_time, migrate_max_downtime()); |
417 | 3a697f69 | Orit Wasserman | |
418 | 5b3c9638 | Juan Quintela | return expected_time <= migrate_max_downtime();
|
419 | 5b3c9638 | Juan Quintela | } |
420 | 5b3c9638 | Juan Quintela | return 0; |
421 | ad96090a | Blue Swirl | } |
422 | ad96090a | Blue Swirl | |
423 | a55bbe31 | Alex Williamson | static inline void *host_from_stream_offset(QEMUFile *f, |
424 | a55bbe31 | Alex Williamson | ram_addr_t offset, |
425 | a55bbe31 | Alex Williamson | int flags)
|
426 | a55bbe31 | Alex Williamson | { |
427 | a55bbe31 | Alex Williamson | static RAMBlock *block = NULL; |
428 | a55bbe31 | Alex Williamson | char id[256]; |
429 | a55bbe31 | Alex Williamson | uint8_t len; |
430 | a55bbe31 | Alex Williamson | |
431 | a55bbe31 | Alex Williamson | if (flags & RAM_SAVE_FLAG_CONTINUE) {
|
432 | a55bbe31 | Alex Williamson | if (!block) {
|
433 | a55bbe31 | Alex Williamson | fprintf(stderr, "Ack, bad migration stream!\n");
|
434 | a55bbe31 | Alex Williamson | return NULL; |
435 | a55bbe31 | Alex Williamson | } |
436 | a55bbe31 | Alex Williamson | |
437 | dc94a7ed | Avi Kivity | return memory_region_get_ram_ptr(block->mr) + offset;
|
438 | a55bbe31 | Alex Williamson | } |
439 | a55bbe31 | Alex Williamson | |
440 | a55bbe31 | Alex Williamson | len = qemu_get_byte(f); |
441 | a55bbe31 | Alex Williamson | qemu_get_buffer(f, (uint8_t *)id, len); |
442 | a55bbe31 | Alex Williamson | id[len] = 0;
|
443 | a55bbe31 | Alex Williamson | |
444 | a55bbe31 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
445 | a55bbe31 | Alex Williamson | if (!strncmp(id, block->idstr, sizeof(id))) |
446 | dc94a7ed | Avi Kivity | return memory_region_get_ram_ptr(block->mr) + offset;
|
447 | a55bbe31 | Alex Williamson | } |
448 | a55bbe31 | Alex Williamson | |
449 | a55bbe31 | Alex Williamson | fprintf(stderr, "Can't find block %s!\n", id);
|
450 | a55bbe31 | Alex Williamson | return NULL; |
451 | a55bbe31 | Alex Williamson | } |
452 | a55bbe31 | Alex Williamson | |
453 | ad96090a | Blue Swirl | int ram_load(QEMUFile *f, void *opaque, int version_id) |
454 | ad96090a | Blue Swirl | { |
455 | ad96090a | Blue Swirl | ram_addr_t addr; |
456 | 3a697f69 | Orit Wasserman | int flags, ret = 0; |
457 | 42802d47 | Juan Quintela | int error;
|
458 | 3a697f69 | Orit Wasserman | static uint64_t seq_iter;
|
459 | 3a697f69 | Orit Wasserman | |
460 | 3a697f69 | Orit Wasserman | seq_iter++; |
461 | ad96090a | Blue Swirl | |
462 | f09f2189 | Avi Kivity | if (version_id < 4 || version_id > 4) { |
463 | ad96090a | Blue Swirl | return -EINVAL;
|
464 | ad96090a | Blue Swirl | } |
465 | ad96090a | Blue Swirl | |
466 | ad96090a | Blue Swirl | do {
|
467 | ad96090a | Blue Swirl | addr = qemu_get_be64(f); |
468 | ad96090a | Blue Swirl | |
469 | ad96090a | Blue Swirl | flags = addr & ~TARGET_PAGE_MASK; |
470 | ad96090a | Blue Swirl | addr &= TARGET_PAGE_MASK; |
471 | ad96090a | Blue Swirl | |
472 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_MEM_SIZE) {
|
473 | f09f2189 | Avi Kivity | if (version_id == 4) { |
474 | 97ab12d4 | Alex Williamson | /* Synchronize RAM block list */
|
475 | 97ab12d4 | Alex Williamson | char id[256]; |
476 | 97ab12d4 | Alex Williamson | ram_addr_t length; |
477 | 97ab12d4 | Alex Williamson | ram_addr_t total_ram_bytes = addr; |
478 | 97ab12d4 | Alex Williamson | |
479 | 97ab12d4 | Alex Williamson | while (total_ram_bytes) {
|
480 | 97ab12d4 | Alex Williamson | RAMBlock *block; |
481 | 97ab12d4 | Alex Williamson | uint8_t len; |
482 | 97ab12d4 | Alex Williamson | |
483 | 97ab12d4 | Alex Williamson | len = qemu_get_byte(f); |
484 | 97ab12d4 | Alex Williamson | qemu_get_buffer(f, (uint8_t *)id, len); |
485 | 97ab12d4 | Alex Williamson | id[len] = 0;
|
486 | 97ab12d4 | Alex Williamson | length = qemu_get_be64(f); |
487 | 97ab12d4 | Alex Williamson | |
488 | 97ab12d4 | Alex Williamson | QLIST_FOREACH(block, &ram_list.blocks, next) { |
489 | 97ab12d4 | Alex Williamson | if (!strncmp(id, block->idstr, sizeof(id))) { |
490 | 3a697f69 | Orit Wasserman | if (block->length != length) {
|
491 | 3a697f69 | Orit Wasserman | ret = -EINVAL; |
492 | 3a697f69 | Orit Wasserman | goto done;
|
493 | 3a697f69 | Orit Wasserman | } |
494 | 97ab12d4 | Alex Williamson | break;
|
495 | 97ab12d4 | Alex Williamson | } |
496 | 97ab12d4 | Alex Williamson | } |
497 | 97ab12d4 | Alex Williamson | |
498 | 97ab12d4 | Alex Williamson | if (!block) {
|
499 | fb787f81 | Alex Williamson | fprintf(stderr, "Unknown ramblock \"%s\", cannot "
|
500 | fb787f81 | Alex Williamson | "accept migration\n", id);
|
501 | 3a697f69 | Orit Wasserman | ret = -EINVAL; |
502 | 3a697f69 | Orit Wasserman | goto done;
|
503 | 97ab12d4 | Alex Williamson | } |
504 | 97ab12d4 | Alex Williamson | |
505 | 97ab12d4 | Alex Williamson | total_ram_bytes -= length; |
506 | 97ab12d4 | Alex Williamson | } |
507 | ad96090a | Blue Swirl | } |
508 | ad96090a | Blue Swirl | } |
509 | ad96090a | Blue Swirl | |
510 | ad96090a | Blue Swirl | if (flags & RAM_SAVE_FLAG_COMPRESS) {
|
511 | 97ab12d4 | Alex Williamson | void *host;
|
512 | 97ab12d4 | Alex Williamson | uint8_t ch; |
513 | 97ab12d4 | Alex Williamson | |
514 | f09f2189 | Avi Kivity | host = host_from_stream_offset(f, addr, flags); |
515 | 492fb99c | Michael S. Tsirkin | if (!host) {
|
516 | 492fb99c | Michael S. Tsirkin | return -EINVAL;
|
517 | 492fb99c | Michael S. Tsirkin | } |
518 | 97ab12d4 | Alex Williamson | |
519 | 97ab12d4 | Alex Williamson | ch = qemu_get_byte(f); |
520 | 97ab12d4 | Alex Williamson | memset(host, ch, TARGET_PAGE_SIZE); |
521 | ad96090a | Blue Swirl | #ifndef _WIN32
|
522 | ad96090a | Blue Swirl | if (ch == 0 && |
523 | ad96090a | Blue Swirl | (!kvm_enabled() || kvm_has_sync_mmu())) { |
524 | e78815a5 | Andreas Färber | qemu_madvise(host, TARGET_PAGE_SIZE, QEMU_MADV_DONTNEED); |
525 | ad96090a | Blue Swirl | } |
526 | ad96090a | Blue Swirl | #endif
|
527 | ad96090a | Blue Swirl | } else if (flags & RAM_SAVE_FLAG_PAGE) { |
528 | 97ab12d4 | Alex Williamson | void *host;
|
529 | 97ab12d4 | Alex Williamson | |
530 | f09f2189 | Avi Kivity | host = host_from_stream_offset(f, addr, flags); |
531 | 0ff1f9f5 | Orit Wasserman | if (!host) {
|
532 | 0ff1f9f5 | Orit Wasserman | return -EINVAL;
|
533 | 0ff1f9f5 | Orit Wasserman | } |
534 | 97ab12d4 | Alex Williamson | |
535 | 97ab12d4 | Alex Williamson | qemu_get_buffer(f, host, TARGET_PAGE_SIZE); |
536 | ad96090a | Blue Swirl | } |
537 | 42802d47 | Juan Quintela | error = qemu_file_get_error(f); |
538 | 42802d47 | Juan Quintela | if (error) {
|
539 | 3a697f69 | Orit Wasserman | ret = error; |
540 | 3a697f69 | Orit Wasserman | goto done;
|
541 | ad96090a | Blue Swirl | } |
542 | ad96090a | Blue Swirl | } while (!(flags & RAM_SAVE_FLAG_EOS));
|
543 | ad96090a | Blue Swirl | |
544 | 3a697f69 | Orit Wasserman | done:
|
545 | 3a697f69 | Orit Wasserman | DPRINTF("Completed load of VM with exit code %d seq iteration " PRIu64 "\n", |
546 | 3a697f69 | Orit Wasserman | ret, seq_iter); |
547 | 3a697f69 | Orit Wasserman | return ret;
|
548 | ad96090a | Blue Swirl | } |
549 | ad96090a | Blue Swirl | |
550 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
|
551 | 0dfa5ef9 | Isaku Yamahata | struct soundhw {
|
552 | 0dfa5ef9 | Isaku Yamahata | const char *name; |
553 | 0dfa5ef9 | Isaku Yamahata | const char *descr; |
554 | 0dfa5ef9 | Isaku Yamahata | int enabled;
|
555 | 0dfa5ef9 | Isaku Yamahata | int isa;
|
556 | 0dfa5ef9 | Isaku Yamahata | union {
|
557 | 4a0f031d | Hervé Poussineau | int (*init_isa) (ISABus *bus);
|
558 | 0dfa5ef9 | Isaku Yamahata | int (*init_pci) (PCIBus *bus);
|
559 | 0dfa5ef9 | Isaku Yamahata | } init; |
560 | 0dfa5ef9 | Isaku Yamahata | }; |
561 | 0dfa5ef9 | Isaku Yamahata | |
562 | 0dfa5ef9 | Isaku Yamahata | static struct soundhw soundhw[] = { |
563 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO_CHOICE
|
564 | da12872a | Hervé Poussineau | #ifdef CONFIG_PCSPK
|
565 | ad96090a | Blue Swirl | { |
566 | ad96090a | Blue Swirl | "pcspk",
|
567 | ad96090a | Blue Swirl | "PC speaker",
|
568 | ad96090a | Blue Swirl | 0,
|
569 | ad96090a | Blue Swirl | 1,
|
570 | ad96090a | Blue Swirl | { .init_isa = pcspk_audio_init } |
571 | ad96090a | Blue Swirl | }, |
572 | ad96090a | Blue Swirl | #endif
|
573 | ad96090a | Blue Swirl | |
574 | ad96090a | Blue Swirl | #ifdef CONFIG_SB16
|
575 | ad96090a | Blue Swirl | { |
576 | ad96090a | Blue Swirl | "sb16",
|
577 | ad96090a | Blue Swirl | "Creative Sound Blaster 16",
|
578 | ad96090a | Blue Swirl | 0,
|
579 | ad96090a | Blue Swirl | 1,
|
580 | ad96090a | Blue Swirl | { .init_isa = SB16_init } |
581 | ad96090a | Blue Swirl | }, |
582 | ad96090a | Blue Swirl | #endif
|
583 | ad96090a | Blue Swirl | |
584 | ad96090a | Blue Swirl | #ifdef CONFIG_CS4231A
|
585 | ad96090a | Blue Swirl | { |
586 | ad96090a | Blue Swirl | "cs4231a",
|
587 | ad96090a | Blue Swirl | "CS4231A",
|
588 | ad96090a | Blue Swirl | 0,
|
589 | ad96090a | Blue Swirl | 1,
|
590 | ad96090a | Blue Swirl | { .init_isa = cs4231a_init } |
591 | ad96090a | Blue Swirl | }, |
592 | ad96090a | Blue Swirl | #endif
|
593 | ad96090a | Blue Swirl | |
594 | ad96090a | Blue Swirl | #ifdef CONFIG_ADLIB
|
595 | ad96090a | Blue Swirl | { |
596 | ad96090a | Blue Swirl | "adlib",
|
597 | ad96090a | Blue Swirl | #ifdef HAS_YMF262
|
598 | ad96090a | Blue Swirl | "Yamaha YMF262 (OPL3)",
|
599 | ad96090a | Blue Swirl | #else
|
600 | ad96090a | Blue Swirl | "Yamaha YM3812 (OPL2)",
|
601 | ad96090a | Blue Swirl | #endif
|
602 | ad96090a | Blue Swirl | 0,
|
603 | ad96090a | Blue Swirl | 1,
|
604 | ad96090a | Blue Swirl | { .init_isa = Adlib_init } |
605 | ad96090a | Blue Swirl | }, |
606 | ad96090a | Blue Swirl | #endif
|
607 | ad96090a | Blue Swirl | |
608 | ad96090a | Blue Swirl | #ifdef CONFIG_GUS
|
609 | ad96090a | Blue Swirl | { |
610 | ad96090a | Blue Swirl | "gus",
|
611 | ad96090a | Blue Swirl | "Gravis Ultrasound GF1",
|
612 | ad96090a | Blue Swirl | 0,
|
613 | ad96090a | Blue Swirl | 1,
|
614 | ad96090a | Blue Swirl | { .init_isa = GUS_init } |
615 | ad96090a | Blue Swirl | }, |
616 | ad96090a | Blue Swirl | #endif
|
617 | ad96090a | Blue Swirl | |
618 | ad96090a | Blue Swirl | #ifdef CONFIG_AC97
|
619 | ad96090a | Blue Swirl | { |
620 | ad96090a | Blue Swirl | "ac97",
|
621 | ad96090a | Blue Swirl | "Intel 82801AA AC97 Audio",
|
622 | ad96090a | Blue Swirl | 0,
|
623 | ad96090a | Blue Swirl | 0,
|
624 | ad96090a | Blue Swirl | { .init_pci = ac97_init } |
625 | ad96090a | Blue Swirl | }, |
626 | ad96090a | Blue Swirl | #endif
|
627 | ad96090a | Blue Swirl | |
628 | ad96090a | Blue Swirl | #ifdef CONFIG_ES1370
|
629 | ad96090a | Blue Swirl | { |
630 | ad96090a | Blue Swirl | "es1370",
|
631 | ad96090a | Blue Swirl | "ENSONIQ AudioPCI ES1370",
|
632 | ad96090a | Blue Swirl | 0,
|
633 | ad96090a | Blue Swirl | 0,
|
634 | ad96090a | Blue Swirl | { .init_pci = es1370_init } |
635 | ad96090a | Blue Swirl | }, |
636 | ad96090a | Blue Swirl | #endif
|
637 | ad96090a | Blue Swirl | |
638 | d61a4ce8 | Gerd Hoffmann | #ifdef CONFIG_HDA
|
639 | d61a4ce8 | Gerd Hoffmann | { |
640 | d61a4ce8 | Gerd Hoffmann | "hda",
|
641 | d61a4ce8 | Gerd Hoffmann | "Intel HD Audio",
|
642 | d61a4ce8 | Gerd Hoffmann | 0,
|
643 | d61a4ce8 | Gerd Hoffmann | 0,
|
644 | d61a4ce8 | Gerd Hoffmann | { .init_pci = intel_hda_and_codec_init } |
645 | d61a4ce8 | Gerd Hoffmann | }, |
646 | d61a4ce8 | Gerd Hoffmann | #endif
|
647 | d61a4ce8 | Gerd Hoffmann | |
648 | ad96090a | Blue Swirl | #endif /* HAS_AUDIO_CHOICE */ |
649 | ad96090a | Blue Swirl | |
650 | ad96090a | Blue Swirl | { NULL, NULL, 0, 0, { NULL } } |
651 | ad96090a | Blue Swirl | }; |
652 | ad96090a | Blue Swirl | |
653 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
654 | ad96090a | Blue Swirl | { |
655 | ad96090a | Blue Swirl | struct soundhw *c;
|
656 | ad96090a | Blue Swirl | |
657 | ad96090a | Blue Swirl | if (*optarg == '?') { |
658 | ad96090a | Blue Swirl | show_valid_cards:
|
659 | ad96090a | Blue Swirl | |
660 | ad96090a | Blue Swirl | printf("Valid sound card names (comma separated):\n");
|
661 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
662 | ad96090a | Blue Swirl | printf ("%-11s %s\n", c->name, c->descr);
|
663 | ad96090a | Blue Swirl | } |
664 | ad96090a | Blue Swirl | printf("\n-soundhw all will enable all of the above\n");
|
665 | ad96090a | Blue Swirl | exit(*optarg != '?');
|
666 | ad96090a | Blue Swirl | } |
667 | ad96090a | Blue Swirl | else {
|
668 | ad96090a | Blue Swirl | size_t l; |
669 | ad96090a | Blue Swirl | const char *p; |
670 | ad96090a | Blue Swirl | char *e;
|
671 | ad96090a | Blue Swirl | int bad_card = 0; |
672 | ad96090a | Blue Swirl | |
673 | ad96090a | Blue Swirl | if (!strcmp(optarg, "all")) { |
674 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
675 | ad96090a | Blue Swirl | c->enabled = 1;
|
676 | ad96090a | Blue Swirl | } |
677 | ad96090a | Blue Swirl | return;
|
678 | ad96090a | Blue Swirl | } |
679 | ad96090a | Blue Swirl | |
680 | ad96090a | Blue Swirl | p = optarg; |
681 | ad96090a | Blue Swirl | while (*p) {
|
682 | ad96090a | Blue Swirl | e = strchr(p, ',');
|
683 | ad96090a | Blue Swirl | l = !e ? strlen(p) : (size_t) (e - p); |
684 | ad96090a | Blue Swirl | |
685 | ad96090a | Blue Swirl | for (c = soundhw; c->name; ++c) {
|
686 | ad96090a | Blue Swirl | if (!strncmp(c->name, p, l) && !c->name[l]) {
|
687 | ad96090a | Blue Swirl | c->enabled = 1;
|
688 | ad96090a | Blue Swirl | break;
|
689 | ad96090a | Blue Swirl | } |
690 | ad96090a | Blue Swirl | } |
691 | ad96090a | Blue Swirl | |
692 | ad96090a | Blue Swirl | if (!c->name) {
|
693 | ad96090a | Blue Swirl | if (l > 80) { |
694 | ad96090a | Blue Swirl | fprintf(stderr, |
695 | ad96090a | Blue Swirl | "Unknown sound card name (too big to show)\n");
|
696 | ad96090a | Blue Swirl | } |
697 | ad96090a | Blue Swirl | else {
|
698 | ad96090a | Blue Swirl | fprintf(stderr, "Unknown sound card name `%.*s'\n",
|
699 | ad96090a | Blue Swirl | (int) l, p);
|
700 | ad96090a | Blue Swirl | } |
701 | ad96090a | Blue Swirl | bad_card = 1;
|
702 | ad96090a | Blue Swirl | } |
703 | ad96090a | Blue Swirl | p += l + (e != NULL);
|
704 | ad96090a | Blue Swirl | } |
705 | ad96090a | Blue Swirl | |
706 | ad96090a | Blue Swirl | if (bad_card) {
|
707 | ad96090a | Blue Swirl | goto show_valid_cards;
|
708 | ad96090a | Blue Swirl | } |
709 | ad96090a | Blue Swirl | } |
710 | ad96090a | Blue Swirl | } |
711 | 0dfa5ef9 | Isaku Yamahata | |
712 | 4a0f031d | Hervé Poussineau | void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
|
713 | 0dfa5ef9 | Isaku Yamahata | { |
714 | 0dfa5ef9 | Isaku Yamahata | struct soundhw *c;
|
715 | 0dfa5ef9 | Isaku Yamahata | |
716 | 0dfa5ef9 | Isaku Yamahata | for (c = soundhw; c->name; ++c) {
|
717 | 0dfa5ef9 | Isaku Yamahata | if (c->enabled) {
|
718 | 0dfa5ef9 | Isaku Yamahata | if (c->isa) {
|
719 | 4a0f031d | Hervé Poussineau | if (isa_bus) {
|
720 | 4a0f031d | Hervé Poussineau | c->init.init_isa(isa_bus); |
721 | 0dfa5ef9 | Isaku Yamahata | } |
722 | 0dfa5ef9 | Isaku Yamahata | } else {
|
723 | 0dfa5ef9 | Isaku Yamahata | if (pci_bus) {
|
724 | 0dfa5ef9 | Isaku Yamahata | c->init.init_pci(pci_bus); |
725 | 0dfa5ef9 | Isaku Yamahata | } |
726 | 0dfa5ef9 | Isaku Yamahata | } |
727 | 0dfa5ef9 | Isaku Yamahata | } |
728 | 0dfa5ef9 | Isaku Yamahata | } |
729 | 0dfa5ef9 | Isaku Yamahata | } |
730 | ad96090a | Blue Swirl | #else
|
731 | ad96090a | Blue Swirl | void select_soundhw(const char *optarg) |
732 | ad96090a | Blue Swirl | { |
733 | ad96090a | Blue Swirl | } |
734 | 4a0f031d | Hervé Poussineau | void audio_init(ISABus *isa_bus, PCIBus *pci_bus)
|
735 | 0dfa5ef9 | Isaku Yamahata | { |
736 | 0dfa5ef9 | Isaku Yamahata | } |
737 | ad96090a | Blue Swirl | #endif
|
738 | ad96090a | Blue Swirl | |
739 | ad96090a | Blue Swirl | int qemu_uuid_parse(const char *str, uint8_t *uuid) |
740 | ad96090a | Blue Swirl | { |
741 | ad96090a | Blue Swirl | int ret;
|
742 | ad96090a | Blue Swirl | |
743 | ad96090a | Blue Swirl | if (strlen(str) != 36) { |
744 | ad96090a | Blue Swirl | return -1; |
745 | ad96090a | Blue Swirl | } |
746 | ad96090a | Blue Swirl | |
747 | ad96090a | Blue Swirl | ret = sscanf(str, UUID_FMT, &uuid[0], &uuid[1], &uuid[2], &uuid[3], |
748 | ad96090a | Blue Swirl | &uuid[4], &uuid[5], &uuid[6], &uuid[7], &uuid[8], &uuid[9], |
749 | ad96090a | Blue Swirl | &uuid[10], &uuid[11], &uuid[12], &uuid[13], &uuid[14], |
750 | ad96090a | Blue Swirl | &uuid[15]);
|
751 | ad96090a | Blue Swirl | |
752 | ad96090a | Blue Swirl | if (ret != 16) { |
753 | ad96090a | Blue Swirl | return -1; |
754 | ad96090a | Blue Swirl | } |
755 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
756 | ad96090a | Blue Swirl | smbios_add_field(1, offsetof(struct smbios_type_1, uuid), 16, uuid); |
757 | ad96090a | Blue Swirl | #endif
|
758 | ad96090a | Blue Swirl | return 0; |
759 | ad96090a | Blue Swirl | } |
760 | ad96090a | Blue Swirl | |
761 | ad96090a | Blue Swirl | void do_acpitable_option(const char *optarg) |
762 | ad96090a | Blue Swirl | { |
763 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
764 | ad96090a | Blue Swirl | if (acpi_table_add(optarg) < 0) { |
765 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong acpi table provided\n");
|
766 | ad96090a | Blue Swirl | exit(1);
|
767 | ad96090a | Blue Swirl | } |
768 | ad96090a | Blue Swirl | #endif
|
769 | ad96090a | Blue Swirl | } |
770 | ad96090a | Blue Swirl | |
771 | ad96090a | Blue Swirl | void do_smbios_option(const char *optarg) |
772 | ad96090a | Blue Swirl | { |
773 | ad96090a | Blue Swirl | #ifdef TARGET_I386
|
774 | ad96090a | Blue Swirl | if (smbios_entry_add(optarg) < 0) { |
775 | ad96090a | Blue Swirl | fprintf(stderr, "Wrong smbios provided\n");
|
776 | ad96090a | Blue Swirl | exit(1);
|
777 | ad96090a | Blue Swirl | } |
778 | ad96090a | Blue Swirl | #endif
|
779 | ad96090a | Blue Swirl | } |
780 | ad96090a | Blue Swirl | |
781 | ad96090a | Blue Swirl | void cpudef_init(void) |
782 | ad96090a | Blue Swirl | { |
783 | ad96090a | Blue Swirl | #if defined(cpudef_setup)
|
784 | ad96090a | Blue Swirl | cpudef_setup(); /* parse cpu definitions in target config file */
|
785 | ad96090a | Blue Swirl | #endif
|
786 | ad96090a | Blue Swirl | } |
787 | ad96090a | Blue Swirl | |
788 | ad96090a | Blue Swirl | int audio_available(void) |
789 | ad96090a | Blue Swirl | { |
790 | ad96090a | Blue Swirl | #ifdef HAS_AUDIO
|
791 | ad96090a | Blue Swirl | return 1; |
792 | ad96090a | Blue Swirl | #else
|
793 | ad96090a | Blue Swirl | return 0; |
794 | ad96090a | Blue Swirl | #endif
|
795 | ad96090a | Blue Swirl | } |
796 | ad96090a | Blue Swirl | |
797 | 303d4e86 | Anthony PERARD | int tcg_available(void) |
798 | 303d4e86 | Anthony PERARD | { |
799 | 303d4e86 | Anthony PERARD | return 1; |
800 | 303d4e86 | Anthony PERARD | } |
801 | 303d4e86 | Anthony PERARD | |
802 | ad96090a | Blue Swirl | int kvm_available(void) |
803 | ad96090a | Blue Swirl | { |
804 | ad96090a | Blue Swirl | #ifdef CONFIG_KVM
|
805 | ad96090a | Blue Swirl | return 1; |
806 | ad96090a | Blue Swirl | #else
|
807 | ad96090a | Blue Swirl | return 0; |
808 | ad96090a | Blue Swirl | #endif
|
809 | ad96090a | Blue Swirl | } |
810 | ad96090a | Blue Swirl | |
811 | ad96090a | Blue Swirl | int xen_available(void) |
812 | ad96090a | Blue Swirl | { |
813 | ad96090a | Blue Swirl | #ifdef CONFIG_XEN
|
814 | ad96090a | Blue Swirl | return 1; |
815 | ad96090a | Blue Swirl | #else
|
816 | ad96090a | Blue Swirl | return 0; |
817 | ad96090a | Blue Swirl | #endif
|
818 | ad96090a | Blue Swirl | } |