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root / target-openrisc @ 45724d6d

# Date Author Comment
d962783e 07/28/2012 12:13 am Jia Liu

target-or32: Add linux user support

Add QEMU OpenRISC linux user support.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
4dd044c6 07/28/2012 12:13 am Jia Liu

target-or32: Add system instructions

Add OpenRISC system instructions.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
99f575ed 07/28/2012 12:13 am Jia Liu

target-or32: Add timer support

Add OpenRISC timer support.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
dd29c7fb 07/28/2012 12:13 am Jia Liu

target-or32: Add PIC support

Add OpenRISC Programmable Interrupt Controller support.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
5b569507 07/28/2012 12:13 am Jia Liu

target-or32: Add float instruction helpers

Add OpenRISC float instruction helpers.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
bbe418f2 07/28/2012 12:13 am Jia Liu

target-or32: Add instruction translation

Add OpenRISC instruction tanslation routines.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
e54a5aff 07/28/2012 12:12 am Jia Liu

target-or32: Add int instruction helpers

Add OpenRISC int instruction helpers.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
1d7d4034 07/28/2012 12:12 am Jia Liu

target-or32: Add exception support

Add OpenRISC exception support.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
b6a71ef7 07/28/2012 12:12 am Jia Liu

target-or32: Add interrupt support

Add OpenRISC interrupt support.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
726fe045 07/28/2012 12:12 am Jia Liu

target-or32: Add MMU support

Add OpenRISC MMU support.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>
e67db06e 07/28/2012 12:12 am Jia Liu

target-or32: Add target stubs and QOM cpu

Add OpenRISC target stubs, QOM cpu and basic machine.

Signed-off-by: Jia Liu <>
Signed-off-by: Blue Swirl <>