Revision 459505a2

b/hw/mainstone.c
14 14
#include "net.h"
15 15
#include "devices.h"
16 16
#include "boards.h"
17
#include "mainstone.h"
18 17
#include "sysemu.h"
19 18
#include "flash.h"
20 19
#include "blockdev.h"
21 20
#include "sysbus.h"
22 21

  
22
/* Device addresses */
23
#define MST_FPGA_PHYS	0x08000000
24
#define MST_ETH_PHYS	0x10000300
25
#define MST_FLASH_0		0x00000000
26
#define MST_FLASH_1		0x04000000
27

  
28
/* IRQ definitions */
29
#define MMC_IRQ       0
30
#define USIM_IRQ      1
31
#define USBC_IRQ      2
32
#define ETHERNET_IRQ  3
33
#define AC97_IRQ      4
34
#define PEN_IRQ       5
35
#define MSINS_IRQ     6
36
#define EXBRD_IRQ     7
37
#define S0_CD_IRQ     9
38
#define S0_STSCHG_IRQ 10
39
#define S0_IRQ        11
40
#define S1_CD_IRQ     13
41
#define S1_STSCHG_IRQ 14
42
#define S1_IRQ        15
43

  
23 44
static struct keymap map[0xE0] = {
24 45
    [0 ... 0xDF] = { -1, -1 },
25 46
    [0x1e] = {0,0}, /* a */
/dev/null
1
/*
2
 * PXA270-based Intel Mainstone platforms.
3
 *
4
 * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or
5
 *                                    <akuster@mvista.com>
6
 *
7
 * This code is licensed under the GNU GPL v2.
8
 */
9

  
10
#ifndef __MAINSTONE_H__
11
#define __MAINSTONE_H__
12

  
13
/* Device addresses */
14
#define MST_FPGA_PHYS	0x08000000
15
#define MST_ETH_PHYS	0x10000300
16
#define MST_FLASH_0		0x00000000
17
#define MST_FLASH_1		0x04000000
18

  
19
/* IRQ definitions */
20
#define MMC_IRQ       0
21
#define USIM_IRQ      1
22
#define USBC_IRQ      2
23
#define ETHERNET_IRQ  3
24
#define AC97_IRQ      4
25
#define PEN_IRQ       5
26
#define MSINS_IRQ     6
27
#define EXBRD_IRQ     7
28
#define S0_CD_IRQ     9
29
#define S0_STSCHG_IRQ 10
30
#define S0_IRQ        11
31
#define S1_CD_IRQ     13
32
#define S1_STSCHG_IRQ 14
33
#define S1_IRQ        15
34

  
35
#endif /* __MAINSTONE_H__ */

Also available in: Unified diff