root / hw / pl061.c @ 46c305ef
History | View | Annotate | Download (8.3 kB)
1 | 9ee6e8bb | pbrook | /*
|
---|---|---|---|
2 | 9ee6e8bb | pbrook | * Arm PrimeCell PL061 General Purpose IO with additional
|
3 | 9ee6e8bb | pbrook | * Luminary Micro Stellaris bits.
|
4 | 9ee6e8bb | pbrook | *
|
5 | 9ee6e8bb | pbrook | * Copyright (c) 2007 CodeSourcery.
|
6 | 9ee6e8bb | pbrook | * Written by Paul Brook
|
7 | 9ee6e8bb | pbrook | *
|
8 | 8e31bf38 | Matthew Fernandez | * This code is licensed under the GPL.
|
9 | 9ee6e8bb | pbrook | */
|
10 | 9ee6e8bb | pbrook | |
11 | 40905a6a | Paul Brook | #include "sysbus.h" |
12 | 9ee6e8bb | pbrook | |
13 | 9ee6e8bb | pbrook | //#define DEBUG_PL061 1
|
14 | 9ee6e8bb | pbrook | |
15 | 9ee6e8bb | pbrook | #ifdef DEBUG_PL061
|
16 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) \
|
17 | 001faf32 | Blue Swirl | do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0) |
18 | 001faf32 | Blue Swirl | #define BADF(fmt, ...) \
|
19 | 001faf32 | Blue Swirl | do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0) |
20 | 9ee6e8bb | pbrook | #else
|
21 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) do {} while(0) |
22 | 001faf32 | Blue Swirl | #define BADF(fmt, ...) \
|
23 | 001faf32 | Blue Swirl | do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0) |
24 | 9ee6e8bb | pbrook | #endif
|
25 | 9ee6e8bb | pbrook | |
26 | 9ee6e8bb | pbrook | static const uint8_t pl061_id[12] = |
27 | 7063f49f | Peter Maydell | { 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; |
28 | 7063f49f | Peter Maydell | static const uint8_t pl061_id_luminary[12] = |
29 | 9ee6e8bb | pbrook | { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 }; |
30 | 9ee6e8bb | pbrook | |
31 | 9ee6e8bb | pbrook | typedef struct { |
32 | 40905a6a | Paul Brook | SysBusDevice busdev; |
33 | a35faa94 | Peter Maydell | uint32_t locked; |
34 | a35faa94 | Peter Maydell | uint32_t data; |
35 | a35faa94 | Peter Maydell | uint32_t old_data; |
36 | a35faa94 | Peter Maydell | uint32_t dir; |
37 | a35faa94 | Peter Maydell | uint32_t isense; |
38 | a35faa94 | Peter Maydell | uint32_t ibe; |
39 | a35faa94 | Peter Maydell | uint32_t iev; |
40 | a35faa94 | Peter Maydell | uint32_t im; |
41 | a35faa94 | Peter Maydell | uint32_t istate; |
42 | a35faa94 | Peter Maydell | uint32_t afsel; |
43 | a35faa94 | Peter Maydell | uint32_t dr2r; |
44 | a35faa94 | Peter Maydell | uint32_t dr4r; |
45 | a35faa94 | Peter Maydell | uint32_t dr8r; |
46 | a35faa94 | Peter Maydell | uint32_t odr; |
47 | a35faa94 | Peter Maydell | uint32_t pur; |
48 | a35faa94 | Peter Maydell | uint32_t pdr; |
49 | a35faa94 | Peter Maydell | uint32_t slr; |
50 | a35faa94 | Peter Maydell | uint32_t den; |
51 | a35faa94 | Peter Maydell | uint32_t cr; |
52 | a35faa94 | Peter Maydell | uint32_t float_high; |
53 | b3aaff11 | Peter Maydell | uint32_t amsel; |
54 | 9ee6e8bb | pbrook | qemu_irq irq; |
55 | 9ee6e8bb | pbrook | qemu_irq out[8];
|
56 | 7063f49f | Peter Maydell | const unsigned char *id; |
57 | 9ee6e8bb | pbrook | } pl061_state; |
58 | 9ee6e8bb | pbrook | |
59 | a35faa94 | Peter Maydell | static const VMStateDescription vmstate_pl061 = { |
60 | a35faa94 | Peter Maydell | .name = "pl061",
|
61 | b3aaff11 | Peter Maydell | .version_id = 2,
|
62 | a35faa94 | Peter Maydell | .minimum_version_id = 1,
|
63 | a35faa94 | Peter Maydell | .fields = (VMStateField[]) { |
64 | a35faa94 | Peter Maydell | VMSTATE_UINT32(locked, pl061_state), |
65 | a35faa94 | Peter Maydell | VMSTATE_UINT32(data, pl061_state), |
66 | a35faa94 | Peter Maydell | VMSTATE_UINT32(old_data, pl061_state), |
67 | a35faa94 | Peter Maydell | VMSTATE_UINT32(dir, pl061_state), |
68 | a35faa94 | Peter Maydell | VMSTATE_UINT32(isense, pl061_state), |
69 | a35faa94 | Peter Maydell | VMSTATE_UINT32(ibe, pl061_state), |
70 | a35faa94 | Peter Maydell | VMSTATE_UINT32(iev, pl061_state), |
71 | a35faa94 | Peter Maydell | VMSTATE_UINT32(im, pl061_state), |
72 | a35faa94 | Peter Maydell | VMSTATE_UINT32(istate, pl061_state), |
73 | a35faa94 | Peter Maydell | VMSTATE_UINT32(afsel, pl061_state), |
74 | a35faa94 | Peter Maydell | VMSTATE_UINT32(dr2r, pl061_state), |
75 | a35faa94 | Peter Maydell | VMSTATE_UINT32(dr4r, pl061_state), |
76 | a35faa94 | Peter Maydell | VMSTATE_UINT32(dr8r, pl061_state), |
77 | a35faa94 | Peter Maydell | VMSTATE_UINT32(odr, pl061_state), |
78 | a35faa94 | Peter Maydell | VMSTATE_UINT32(pur, pl061_state), |
79 | a35faa94 | Peter Maydell | VMSTATE_UINT32(pdr, pl061_state), |
80 | a35faa94 | Peter Maydell | VMSTATE_UINT32(slr, pl061_state), |
81 | a35faa94 | Peter Maydell | VMSTATE_UINT32(den, pl061_state), |
82 | a35faa94 | Peter Maydell | VMSTATE_UINT32(cr, pl061_state), |
83 | a35faa94 | Peter Maydell | VMSTATE_UINT32(float_high, pl061_state), |
84 | b3aaff11 | Peter Maydell | VMSTATE_UINT32_V(amsel, pl061_state, 2),
|
85 | a35faa94 | Peter Maydell | VMSTATE_END_OF_LIST() |
86 | a35faa94 | Peter Maydell | } |
87 | a35faa94 | Peter Maydell | }; |
88 | a35faa94 | Peter Maydell | |
89 | 9ee6e8bb | pbrook | static void pl061_update(pl061_state *s) |
90 | 9ee6e8bb | pbrook | { |
91 | 9ee6e8bb | pbrook | uint8_t changed; |
92 | 9ee6e8bb | pbrook | uint8_t mask; |
93 | 775616c3 | pbrook | uint8_t out; |
94 | 9ee6e8bb | pbrook | int i;
|
95 | 9ee6e8bb | pbrook | |
96 | 775616c3 | pbrook | /* Outputs float high. */
|
97 | 775616c3 | pbrook | /* FIXME: This is board dependent. */
|
98 | 775616c3 | pbrook | out = (s->data & s->dir) | ~s->dir; |
99 | 775616c3 | pbrook | changed = s->old_data ^ out; |
100 | 9ee6e8bb | pbrook | if (!changed)
|
101 | 9ee6e8bb | pbrook | return;
|
102 | 9ee6e8bb | pbrook | |
103 | 775616c3 | pbrook | s->old_data = out; |
104 | 9ee6e8bb | pbrook | for (i = 0; i < 8; i++) { |
105 | 9ee6e8bb | pbrook | mask = 1 << i;
|
106 | 775616c3 | pbrook | if ((changed & mask) && s->out) {
|
107 | 775616c3 | pbrook | DPRINTF("Set output %d = %d\n", i, (out & mask) != 0); |
108 | 775616c3 | pbrook | qemu_set_irq(s->out[i], (out & mask) != 0);
|
109 | 9ee6e8bb | pbrook | } |
110 | 9ee6e8bb | pbrook | } |
111 | 9ee6e8bb | pbrook | |
112 | 9ee6e8bb | pbrook | /* FIXME: Implement input interrupts. */
|
113 | 9ee6e8bb | pbrook | } |
114 | 9ee6e8bb | pbrook | |
115 | c227f099 | Anthony Liguori | static uint32_t pl061_read(void *opaque, target_phys_addr_t offset) |
116 | 9ee6e8bb | pbrook | { |
117 | 9ee6e8bb | pbrook | pl061_state *s = (pl061_state *)opaque; |
118 | 9ee6e8bb | pbrook | |
119 | 9ee6e8bb | pbrook | if (offset >= 0xfd0 && offset < 0x1000) { |
120 | 7063f49f | Peter Maydell | return s->id[(offset - 0xfd0) >> 2]; |
121 | 9ee6e8bb | pbrook | } |
122 | 9ee6e8bb | pbrook | if (offset < 0x400) { |
123 | 9ee6e8bb | pbrook | return s->data & (offset >> 2); |
124 | 9ee6e8bb | pbrook | } |
125 | 9ee6e8bb | pbrook | switch (offset) {
|
126 | 9ee6e8bb | pbrook | case 0x400: /* Direction */ |
127 | 9ee6e8bb | pbrook | return s->dir;
|
128 | 9ee6e8bb | pbrook | case 0x404: /* Interrupt sense */ |
129 | 9ee6e8bb | pbrook | return s->isense;
|
130 | 9ee6e8bb | pbrook | case 0x408: /* Interrupt both edges */ |
131 | 9ee6e8bb | pbrook | return s->ibe;
|
132 | ff2712ba | Stefan Weil | case 0x40c: /* Interrupt event */ |
133 | 9ee6e8bb | pbrook | return s->iev;
|
134 | 9ee6e8bb | pbrook | case 0x410: /* Interrupt mask */ |
135 | 9ee6e8bb | pbrook | return s->im;
|
136 | 9ee6e8bb | pbrook | case 0x414: /* Raw interrupt status */ |
137 | 9ee6e8bb | pbrook | return s->istate;
|
138 | 9ee6e8bb | pbrook | case 0x418: /* Masked interrupt status */ |
139 | 9ee6e8bb | pbrook | return s->istate | s->im;
|
140 | 9ee6e8bb | pbrook | case 0x420: /* Alternate function select */ |
141 | 9ee6e8bb | pbrook | return s->afsel;
|
142 | 9ee6e8bb | pbrook | case 0x500: /* 2mA drive */ |
143 | 9ee6e8bb | pbrook | return s->dr2r;
|
144 | 9ee6e8bb | pbrook | case 0x504: /* 4mA drive */ |
145 | 9ee6e8bb | pbrook | return s->dr4r;
|
146 | 9ee6e8bb | pbrook | case 0x508: /* 8mA drive */ |
147 | 9ee6e8bb | pbrook | return s->dr8r;
|
148 | 9ee6e8bb | pbrook | case 0x50c: /* Open drain */ |
149 | 9ee6e8bb | pbrook | return s->odr;
|
150 | 9ee6e8bb | pbrook | case 0x510: /* Pull-up */ |
151 | 9ee6e8bb | pbrook | return s->pur;
|
152 | 9ee6e8bb | pbrook | case 0x514: /* Pull-down */ |
153 | 9ee6e8bb | pbrook | return s->pdr;
|
154 | 9ee6e8bb | pbrook | case 0x518: /* Slew rate control */ |
155 | 9ee6e8bb | pbrook | return s->slr;
|
156 | 9ee6e8bb | pbrook | case 0x51c: /* Digital enable */ |
157 | 9ee6e8bb | pbrook | return s->den;
|
158 | 9ee6e8bb | pbrook | case 0x520: /* Lock */ |
159 | 9ee6e8bb | pbrook | return s->locked;
|
160 | 9ee6e8bb | pbrook | case 0x524: /* Commit */ |
161 | 9ee6e8bb | pbrook | return s->cr;
|
162 | b3aaff11 | Peter Maydell | case 0x528: /* Analog mode select */ |
163 | b3aaff11 | Peter Maydell | return s->amsel;
|
164 | 9ee6e8bb | pbrook | default:
|
165 | 2ac71179 | Paul Brook | hw_error("pl061_read: Bad offset %x\n", (int)offset); |
166 | 9ee6e8bb | pbrook | return 0; |
167 | 9ee6e8bb | pbrook | } |
168 | 9ee6e8bb | pbrook | } |
169 | 9ee6e8bb | pbrook | |
170 | c227f099 | Anthony Liguori | static void pl061_write(void *opaque, target_phys_addr_t offset, |
171 | 9ee6e8bb | pbrook | uint32_t value) |
172 | 9ee6e8bb | pbrook | { |
173 | 9ee6e8bb | pbrook | pl061_state *s = (pl061_state *)opaque; |
174 | 9ee6e8bb | pbrook | uint8_t mask; |
175 | 9ee6e8bb | pbrook | |
176 | 9ee6e8bb | pbrook | if (offset < 0x400) { |
177 | 9ee6e8bb | pbrook | mask = (offset >> 2) & s->dir;
|
178 | 9ee6e8bb | pbrook | s->data = (s->data & ~mask) | (value & mask); |
179 | 9ee6e8bb | pbrook | pl061_update(s); |
180 | 9ee6e8bb | pbrook | return;
|
181 | 9ee6e8bb | pbrook | } |
182 | 9ee6e8bb | pbrook | switch (offset) {
|
183 | 9ee6e8bb | pbrook | case 0x400: /* Direction */ |
184 | a35faa94 | Peter Maydell | s->dir = value & 0xff;
|
185 | 9ee6e8bb | pbrook | break;
|
186 | 9ee6e8bb | pbrook | case 0x404: /* Interrupt sense */ |
187 | a35faa94 | Peter Maydell | s->isense = value & 0xff;
|
188 | 9ee6e8bb | pbrook | break;
|
189 | 9ee6e8bb | pbrook | case 0x408: /* Interrupt both edges */ |
190 | a35faa94 | Peter Maydell | s->ibe = value & 0xff;
|
191 | 9ee6e8bb | pbrook | break;
|
192 | ff2712ba | Stefan Weil | case 0x40c: /* Interrupt event */ |
193 | a35faa94 | Peter Maydell | s->iev = value & 0xff;
|
194 | 9ee6e8bb | pbrook | break;
|
195 | 9ee6e8bb | pbrook | case 0x410: /* Interrupt mask */ |
196 | a35faa94 | Peter Maydell | s->im = value & 0xff;
|
197 | 9ee6e8bb | pbrook | break;
|
198 | 9ee6e8bb | pbrook | case 0x41c: /* Interrupt clear */ |
199 | 9ee6e8bb | pbrook | s->istate &= ~value; |
200 | 9ee6e8bb | pbrook | break;
|
201 | 9ee6e8bb | pbrook | case 0x420: /* Alternate function select */ |
202 | 9ee6e8bb | pbrook | mask = s->cr; |
203 | 9ee6e8bb | pbrook | s->afsel = (s->afsel & ~mask) | (value & mask); |
204 | 9ee6e8bb | pbrook | break;
|
205 | 9ee6e8bb | pbrook | case 0x500: /* 2mA drive */ |
206 | a35faa94 | Peter Maydell | s->dr2r = value & 0xff;
|
207 | 9ee6e8bb | pbrook | break;
|
208 | 9ee6e8bb | pbrook | case 0x504: /* 4mA drive */ |
209 | a35faa94 | Peter Maydell | s->dr4r = value & 0xff;
|
210 | 9ee6e8bb | pbrook | break;
|
211 | 9ee6e8bb | pbrook | case 0x508: /* 8mA drive */ |
212 | a35faa94 | Peter Maydell | s->dr8r = value & 0xff;
|
213 | 9ee6e8bb | pbrook | break;
|
214 | 9ee6e8bb | pbrook | case 0x50c: /* Open drain */ |
215 | a35faa94 | Peter Maydell | s->odr = value & 0xff;
|
216 | 9ee6e8bb | pbrook | break;
|
217 | 9ee6e8bb | pbrook | case 0x510: /* Pull-up */ |
218 | a35faa94 | Peter Maydell | s->pur = value & 0xff;
|
219 | 9ee6e8bb | pbrook | break;
|
220 | 9ee6e8bb | pbrook | case 0x514: /* Pull-down */ |
221 | a35faa94 | Peter Maydell | s->pdr = value & 0xff;
|
222 | 9ee6e8bb | pbrook | break;
|
223 | 9ee6e8bb | pbrook | case 0x518: /* Slew rate control */ |
224 | a35faa94 | Peter Maydell | s->slr = value & 0xff;
|
225 | 9ee6e8bb | pbrook | break;
|
226 | 9ee6e8bb | pbrook | case 0x51c: /* Digital enable */ |
227 | a35faa94 | Peter Maydell | s->den = value & 0xff;
|
228 | 9ee6e8bb | pbrook | break;
|
229 | 9ee6e8bb | pbrook | case 0x520: /* Lock */ |
230 | 9ee6e8bb | pbrook | s->locked = (value != 0xacce551);
|
231 | 9ee6e8bb | pbrook | break;
|
232 | 9ee6e8bb | pbrook | case 0x524: /* Commit */ |
233 | 9ee6e8bb | pbrook | if (!s->locked)
|
234 | a35faa94 | Peter Maydell | s->cr = value & 0xff;
|
235 | 9ee6e8bb | pbrook | break;
|
236 | b3aaff11 | Peter Maydell | case 0x528: |
237 | b3aaff11 | Peter Maydell | s->amsel = value & 0xff;
|
238 | b3aaff11 | Peter Maydell | break;
|
239 | 9ee6e8bb | pbrook | default:
|
240 | 2ac71179 | Paul Brook | hw_error("pl061_write: Bad offset %x\n", (int)offset); |
241 | 9ee6e8bb | pbrook | } |
242 | 9ee6e8bb | pbrook | pl061_update(s); |
243 | 9ee6e8bb | pbrook | } |
244 | 9ee6e8bb | pbrook | |
245 | 9ee6e8bb | pbrook | static void pl061_reset(pl061_state *s) |
246 | 9ee6e8bb | pbrook | { |
247 | 9ee6e8bb | pbrook | s->locked = 1;
|
248 | 9ee6e8bb | pbrook | s->cr = 0xff;
|
249 | 9ee6e8bb | pbrook | } |
250 | 9ee6e8bb | pbrook | |
251 | 9596ebb7 | pbrook | static void pl061_set_irq(void * opaque, int irq, int level) |
252 | 9ee6e8bb | pbrook | { |
253 | 9ee6e8bb | pbrook | pl061_state *s = (pl061_state *)opaque; |
254 | 9ee6e8bb | pbrook | uint8_t mask; |
255 | 9ee6e8bb | pbrook | |
256 | 9ee6e8bb | pbrook | mask = 1 << irq;
|
257 | 9ee6e8bb | pbrook | if ((s->dir & mask) == 0) { |
258 | 9ee6e8bb | pbrook | s->data &= ~mask; |
259 | 9ee6e8bb | pbrook | if (level)
|
260 | 9ee6e8bb | pbrook | s->data |= mask; |
261 | 9ee6e8bb | pbrook | pl061_update(s); |
262 | 9ee6e8bb | pbrook | } |
263 | 9ee6e8bb | pbrook | } |
264 | 9ee6e8bb | pbrook | |
265 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const pl061_readfn[] = { |
266 | 9ee6e8bb | pbrook | pl061_read, |
267 | 9ee6e8bb | pbrook | pl061_read, |
268 | 9ee6e8bb | pbrook | pl061_read |
269 | 9ee6e8bb | pbrook | }; |
270 | 9ee6e8bb | pbrook | |
271 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const pl061_writefn[] = { |
272 | 9ee6e8bb | pbrook | pl061_write, |
273 | 9ee6e8bb | pbrook | pl061_write, |
274 | 9ee6e8bb | pbrook | pl061_write |
275 | 9ee6e8bb | pbrook | }; |
276 | 9ee6e8bb | pbrook | |
277 | 7063f49f | Peter Maydell | static int pl061_init(SysBusDevice *dev, const unsigned char *id) |
278 | 9ee6e8bb | pbrook | { |
279 | 9ee6e8bb | pbrook | int iomemtype;
|
280 | 40905a6a | Paul Brook | pl061_state *s = FROM_SYSBUS(pl061_state, dev); |
281 | 7063f49f | Peter Maydell | s->id = id; |
282 | 1eed09cb | Avi Kivity | iomemtype = cpu_register_io_memory(pl061_readfn, |
283 | 2507c12a | Alexander Graf | pl061_writefn, s, |
284 | 2507c12a | Alexander Graf | DEVICE_NATIVE_ENDIAN); |
285 | 40905a6a | Paul Brook | sysbus_init_mmio(dev, 0x1000, iomemtype);
|
286 | 40905a6a | Paul Brook | sysbus_init_irq(dev, &s->irq); |
287 | 40905a6a | Paul Brook | qdev_init_gpio_in(&dev->qdev, pl061_set_irq, 8);
|
288 | 40905a6a | Paul Brook | qdev_init_gpio_out(&dev->qdev, s->out, 8);
|
289 | 9ee6e8bb | pbrook | pl061_reset(s); |
290 | 81a322d4 | Gerd Hoffmann | return 0; |
291 | 9ee6e8bb | pbrook | } |
292 | 40905a6a | Paul Brook | |
293 | 7063f49f | Peter Maydell | static int pl061_init_luminary(SysBusDevice *dev) |
294 | 7063f49f | Peter Maydell | { |
295 | 7063f49f | Peter Maydell | return pl061_init(dev, pl061_id_luminary);
|
296 | 7063f49f | Peter Maydell | } |
297 | 7063f49f | Peter Maydell | |
298 | 7063f49f | Peter Maydell | static int pl061_init_arm(SysBusDevice *dev) |
299 | 7063f49f | Peter Maydell | { |
300 | 7063f49f | Peter Maydell | return pl061_init(dev, pl061_id);
|
301 | 7063f49f | Peter Maydell | } |
302 | 7063f49f | Peter Maydell | |
303 | a35faa94 | Peter Maydell | static SysBusDeviceInfo pl061_info = {
|
304 | a35faa94 | Peter Maydell | .init = pl061_init_arm, |
305 | a35faa94 | Peter Maydell | .qdev.name = "pl061",
|
306 | a35faa94 | Peter Maydell | .qdev.size = sizeof(pl061_state),
|
307 | a35faa94 | Peter Maydell | .qdev.vmsd = &vmstate_pl061, |
308 | a35faa94 | Peter Maydell | }; |
309 | a35faa94 | Peter Maydell | |
310 | a35faa94 | Peter Maydell | static SysBusDeviceInfo pl061_luminary_info = {
|
311 | a35faa94 | Peter Maydell | .init = pl061_init_luminary, |
312 | a35faa94 | Peter Maydell | .qdev.name = "pl061_luminary",
|
313 | a35faa94 | Peter Maydell | .qdev.size = sizeof(pl061_state),
|
314 | a35faa94 | Peter Maydell | .qdev.vmsd = &vmstate_pl061, |
315 | a35faa94 | Peter Maydell | }; |
316 | a35faa94 | Peter Maydell | |
317 | 40905a6a | Paul Brook | static void pl061_register_devices(void) |
318 | 40905a6a | Paul Brook | { |
319 | a35faa94 | Peter Maydell | sysbus_register_withprop(&pl061_info); |
320 | a35faa94 | Peter Maydell | sysbus_register_withprop(&pl061_luminary_info); |
321 | 40905a6a | Paul Brook | } |
322 | 40905a6a | Paul Brook | |
323 | 40905a6a | Paul Brook | device_init(pl061_register_devices) |