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1
/*
2
 * QEMU PC System Emulator
3
 * 
4
 * Copyright (c) 2003-2004 Fabrice Bellard
5
 * 
6
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7
 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10
 * copies of the Software, and to permit persons to whom the Software is
11
 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
23
 */
24
#include "vl.h"
25

    
26
/* output Bochs bios info messages */
27
//#define DEBUG_BIOS
28

    
29
#define BIOS_FILENAME "bios.bin"
30
#define VGABIOS_FILENAME "vgabios.bin"
31
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
32
#define LINUX_BOOT_FILENAME "linux_boot.bin"
33

    
34
#define KERNEL_LOAD_ADDR     0x00100000
35
#define INITRD_LOAD_ADDR     0x00400000
36
#define KERNEL_PARAMS_ADDR   0x00090000
37
#define KERNEL_CMDLINE_ADDR  0x00099000
38

    
39
int speaker_data_on;
40
int dummy_refresh_clock;
41
static fdctrl_t *floppy_controller;
42
static RTCState *rtc_state;
43
static PITState *pit;
44

    
45
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
46
{
47
}
48

    
49
/* MSDOS compatibility mode FPU exception support */
50
/* XXX: add IGNNE support */
51
void cpu_set_ferr(CPUX86State *s)
52
{
53
    pic_set_irq(13, 1);
54
}
55

    
56
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
57
{
58
    pic_set_irq(13, 0);
59
}
60

    
61
/* TSC handling */
62

    
63
uint64_t cpu_get_tsc(CPUX86State *env)
64
{
65
    return qemu_get_clock(vm_clock);
66
}
67

    
68
/* PC cmos mappings */
69

    
70
#define REG_EQUIPMENT_BYTE          0x14
71
#define REG_IBM_CENTURY_BYTE        0x32
72
#define REG_IBM_PS2_CENTURY_BYTE    0x37
73

    
74

    
75
static inline int to_bcd(RTCState *s, int a)
76
{
77
    return ((a / 10) << 4) | (a % 10);
78
}
79

    
80
static int cmos_get_fd_drive_type(int fd0)
81
{
82
    int val;
83

    
84
    switch (fd0) {
85
    case 0:
86
        /* 1.44 Mb 3"5 drive */
87
        val = 4;
88
        break;
89
    case 1:
90
        /* 2.88 Mb 3"5 drive */
91
        val = 5;
92
        break;
93
    case 2:
94
        /* 1.2 Mb 5"5 drive */
95
        val = 2;
96
        break;
97
    default:
98
        val = 0;
99
        break;
100
    }
101
    return val;
102
}
103

    
104
static void cmos_init(int ram_size, int boot_device)
105
{
106
    RTCState *s = rtc_state;
107
    int val;
108
    int fd0, fd1, nb;
109
    time_t ti;
110
    struct tm *tm;
111

    
112
    /* set the CMOS date */
113
    time(&ti);
114
    if (rtc_utc)
115
        tm = gmtime(&ti);
116
    else
117
        tm = localtime(&ti);
118
    rtc_set_date(s, tm);
119

    
120
    val = to_bcd(s, (tm->tm_year / 100) + 19);
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    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
122
    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
123

    
124
    /* various important CMOS locations needed by PC/Bochs bios */
125

    
126
    /* memory size */
127
    val = 640; /* base memory in K */
128
    rtc_set_memory(s, 0x15, val);
129
    rtc_set_memory(s, 0x16, val >> 8);
130

    
131
    val = (ram_size / 1024) - 1024;
132
    if (val > 65535)
133
        val = 65535;
134
    rtc_set_memory(s, 0x17, val);
135
    rtc_set_memory(s, 0x18, val >> 8);
136
    rtc_set_memory(s, 0x30, val);
137
    rtc_set_memory(s, 0x31, val >> 8);
138

    
139
    val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
140
    if (val > 65535)
141
        val = 65535;
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    rtc_set_memory(s, 0x34, val);
143
    rtc_set_memory(s, 0x35, val >> 8);
144
    
145
    switch(boot_device) {
146
    case 'a':
147
    case 'b':
148
        rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
149
        break;
150
    default:
151
    case 'c':
152
        rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
153
        break;
154
    case 'd':
155
        rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
156
        break;
157
    }
158

    
159
    /* floppy type */
160

    
161
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
162
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
163

    
164
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
165
    rtc_set_memory(s, 0x10, val);
166
    
167
    val = 0;
168
    nb = 0;
169
    if (fd0 < 3)
170
        nb++;
171
    if (fd1 < 3)
172
        nb++;
173
    switch (nb) {
174
    case 0:
175
        break;
176
    case 1:
177
        val |= 0x01; /* 1 drive, ready for boot */
178
        break;
179
    case 2:
180
        val |= 0x41; /* 2 drives, ready for boot */
181
        break;
182
    }
183
    val |= 0x02; /* FPU is there */
184
    val |= 0x04; /* PS/2 mouse installed */
185
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
186

    
187
}
188

    
189
static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
190
{
191
    speaker_data_on = (val >> 1) & 1;
192
    pit_set_gate(pit, 2, val & 1);
193
}
194

    
195
static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
196
{
197
    int out;
198
    out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
199
    dummy_refresh_clock ^= 1;
200
    return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
201
      (dummy_refresh_clock << 4);
202
}
203

    
204
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
205
{
206
    cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
207
    /* XXX: bit 0 is fast reset */
208
}
209

    
210
static uint32_t ioport92_read(void *opaque, uint32_t addr)
211
{
212
    return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
213
}
214

    
215
/***********************************************************/
216
/* Bochs BIOS debug ports */
217

    
218
void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
219
{
220
    static const char shutdown_str[8] = "Shutdown";
221
    static int shutdown_index = 0;
222
    
223
    switch(addr) {
224
        /* Bochs BIOS messages */
225
    case 0x400:
226
    case 0x401:
227
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
228
        exit(1);
229
    case 0x402:
230
    case 0x403:
231
#ifdef DEBUG_BIOS
232
        fprintf(stderr, "%c", val);
233
#endif
234
        break;
235
    case 0x8900:
236
        /* same as Bochs power off */
237
        if (val == shutdown_str[shutdown_index]) {
238
            shutdown_index++;
239
            if (shutdown_index == 8) {
240
                shutdown_index = 0;
241
                qemu_system_shutdown_request();
242
            }
243
        } else {
244
            shutdown_index = 0;
245
        }
246
        break;
247

    
248
        /* LGPL'ed VGA BIOS messages */
249
    case 0x501:
250
    case 0x502:
251
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
252
        exit(1);
253
    case 0x500:
254
    case 0x503:
255
#ifdef DEBUG_BIOS
256
        fprintf(stderr, "%c", val);
257
#endif
258
        break;
259
    }
260
}
261

    
262
void bochs_bios_init(void)
263
{
264
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
265
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
266
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
267
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
268
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
269

    
270
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
271
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
272
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
273
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
274
}
275

    
276

    
277
int load_kernel(const char *filename, uint8_t *addr, 
278
                uint8_t *real_addr)
279
{
280
    int fd, size;
281
    int setup_sects;
282

    
283
    fd = open(filename, O_RDONLY);
284
    if (fd < 0)
285
        return -1;
286

    
287
    /* load 16 bit code */
288
    if (read(fd, real_addr, 512) != 512)
289
        goto fail;
290
    setup_sects = real_addr[0x1F1];
291
    if (!setup_sects)
292
        setup_sects = 4;
293
    if (read(fd, real_addr + 512, setup_sects * 512) != 
294
        setup_sects * 512)
295
        goto fail;
296
    
297
    /* load 32 bit code */
298
    size = read(fd, addr, 16 * 1024 * 1024);
299
    if (size < 0)
300
        goto fail;
301
    close(fd);
302
    return size;
303
 fail:
304
    close(fd);
305
    return -1;
306
}
307

    
308
static const int ide_iobase[2] = { 0x1f0, 0x170 };
309
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
310
static const int ide_irq[2] = { 14, 15 };
311

    
312
#define NE2000_NB_MAX 6
313

    
314
static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
315
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
316

    
317
/* PC hardware initialisation */
318
void pc_init(int ram_size, int vga_ram_size, int boot_device,
319
             DisplayState *ds, const char **fd_filename, int snapshot,
320
             const char *kernel_filename, const char *kernel_cmdline,
321
             const char *initrd_filename)
322
{
323
    char buf[1024];
324
    int ret, linux_boot, initrd_size, i, nb_nics1, fd;
325
    unsigned long bios_offset, vga_bios_offset;
326
    int bios_size, isa_bios_size;
327
    PCIBus *pci_bus;
328
    
329
    linux_boot = (kernel_filename != NULL);
330

    
331
    /* allocate RAM */
332
    cpu_register_physical_memory(0, ram_size, 0);
333

    
334
    /* BIOS load */
335
    bios_offset = ram_size + vga_ram_size;
336
    vga_bios_offset = bios_offset + 256 * 1024;
337

    
338
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
339
    bios_size = get_image_size(buf);
340
    if (bios_size <= 0 || 
341
        (bios_size % 65536) != 0 ||
342
        bios_size > (256 * 1024)) {
343
        goto bios_error;
344
    }
345
    ret = load_image(buf, phys_ram_base + bios_offset);
346
    if (ret != bios_size) {
347
    bios_error:
348
        fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
349
        exit(1);
350
    }
351

    
352
    /* VGA BIOS load */
353
    if (cirrus_vga_enabled) {
354
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
355
    } else {
356
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
357
    }
358
    ret = load_image(buf, phys_ram_base + vga_bios_offset);
359
    
360
    /* setup basic memory access */
361
    cpu_register_physical_memory(0xc0000, 0x10000, 
362
                                 vga_bios_offset | IO_MEM_ROM);
363

    
364
    /* map the last 128KB of the BIOS in ISA space */
365
    isa_bios_size = bios_size;
366
    if (isa_bios_size > (128 * 1024))
367
        isa_bios_size = 128 * 1024;
368
    cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, 
369
                                 IO_MEM_UNASSIGNED);
370
    cpu_register_physical_memory(0x100000 - isa_bios_size, 
371
                                 isa_bios_size, 
372
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
373
    /* map all the bios at the top of memory */
374
    cpu_register_physical_memory((uint32_t)(-bios_size), 
375
                                 bios_size, bios_offset | IO_MEM_ROM);
376
    
377
    bochs_bios_init();
378

    
379
    if (linux_boot) {
380
        uint8_t bootsect[512];
381
        uint8_t old_bootsect[512];
382

    
383
        if (bs_table[0] == NULL) {
384
            fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
385
            exit(1);
386
        }
387
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
388
        ret = load_image(buf, bootsect);
389
        if (ret != sizeof(bootsect)) {
390
            fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
391
                    buf);
392
            exit(1);
393
        }
394

    
395
        if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
396
            /* copy the MSDOS partition table */
397
            memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
398
        }
399

    
400
        bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
401

    
402
        /* now we can load the kernel */
403
        ret = load_kernel(kernel_filename, 
404
                          phys_ram_base + KERNEL_LOAD_ADDR,
405
                          phys_ram_base + KERNEL_PARAMS_ADDR);
406
        if (ret < 0) {
407
            fprintf(stderr, "qemu: could not load kernel '%s'\n", 
408
                    kernel_filename);
409
            exit(1);
410
        }
411
        
412
        /* load initrd */
413
        initrd_size = 0;
414
        if (initrd_filename) {
415
            initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
416
            if (initrd_size < 0) {
417
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 
418
                        initrd_filename);
419
                exit(1);
420
            }
421
        }
422
        if (initrd_size > 0) {
423
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
424
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
425
        }
426
        pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
427
                kernel_cmdline);
428
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
429
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
430
                KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
431
        /* loader type */
432
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
433
    }
434

    
435
    if (pci_enabled) {
436
        pci_bus = i440fx_init();
437
        piix3_init(pci_bus);
438
    } else {
439
        pci_bus = NULL;
440
    }
441

    
442
    /* init basic PC hardware */
443
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
444

    
445
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
446

    
447
    if (cirrus_vga_enabled) {
448
        if (pci_enabled) {
449
            pci_cirrus_vga_init(pci_bus, 
450
                                ds, phys_ram_base + ram_size, ram_size, 
451
                                vga_ram_size);
452
        } else {
453
            isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size, 
454
                                vga_ram_size);
455
        }
456
    } else {
457
        vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size, 
458
                       vga_ram_size);
459
    }
460

    
461
    rtc_state = rtc_init(0x70, 8);
462
    register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
463
    register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
464

    
465
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
466
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
467

    
468
    pic_init();
469
    pit = pit_init(0x40, 0);
470

    
471
    fd = serial_open_device();
472
    serial_init(0x3f8, 4, fd);
473

    
474
    if (pci_enabled) {
475
        for(i = 0; i < nb_nics; i++) {
476
            pci_ne2000_init(pci_bus, &nd_table[i]);
477
        }
478
        pci_piix3_ide_init(pci_bus, bs_table);
479
    } else {
480
        nb_nics1 = nb_nics;
481
        if (nb_nics1 > NE2000_NB_MAX)
482
            nb_nics1 = NE2000_NB_MAX;
483
        for(i = 0; i < nb_nics1; i++) {
484
            isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
485
        }
486

    
487
        for(i = 0; i < 2; i++) {
488
            isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
489
                         bs_table[2 * i], bs_table[2 * i + 1]);
490
        }
491
    }
492

    
493
    kbd_init();
494
    DMA_init(0);
495

    
496
#ifndef _WIN32
497
    if (audio_enabled) {
498
        /* no audio supported yet for win32 */
499
        AUD_init();
500
        SB16_init();
501
    }
502
#endif
503

    
504
    floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
505

    
506
    cmos_init(ram_size, boot_device);
507

    
508
    /* must be done after all PCI devices are instanciated */
509
    /* XXX: should be done in the Bochs BIOS */
510
    if (pci_enabled) {
511
        pci_bios_init();
512
    }
513
}