virtio-serial: Don't copy over guest buffer to host
When the guest writes something to a host, we copied over the entirebuffer first into the host and then processed it. Do away with that, itcould result in a malicious guest causing a DoS on the host....
virtio-serial: move out discard logic in a separate function
Instead of combining flush logic into the discard case and not discardcase, have one function doing discard case. This will help later whenadding flow control logic to the do_flush_queued_data() function....
virtio-console: Factor out common init between console and generic ports
The initialisation for generic ports and console ports is similar.Factor out the parts that are the same in a different function that canbe called from each of the initfns.
Signed-off-by: Amit Shah <amit.shah@redhat.com>
virtio-console: Remove unnecessary braces
Remove unnecessary braces around a case statement.
sparc: fix NaN handling
Fix several bugs in NaN handling: * e in fcmpe* only changes qNaN handling * FCC is unchanged if an exception is raised * clear previous FTT before setting it
Reported-by: Mateusz Loskot <mateusz@loskot.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-arm: Log instruction start in TCG code
Add support for logging the start of instructions in TCGcode debug dumps for ARM targets.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
mips: Break TBs after mfc0_count
Break the TB after reading the count register. This makes itpossible to take timer interrupts immediately after a read ofa possibly expired timer.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
mips: Expire late timers when reading cp0_count
When reading cp0_count from a timer with a late trigger that shouldalready have expired, expire it and raise the timer irq.
This makes it possible for guest code (e.g, Linux) that first readcp0_count, then compare it with cp0_compare and check for raised...
mips: Break out cpu_mips_timer_expire
Reorganize for future patches, no functional change.
Acked-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Replace 'extern inline' with 'static inline'
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
bsd-user: Fix possible memory leaks and wrong realloc call
These errors were reported by cppcheck:
[bsd-user/elfload.c:1108]: (error) Common realloc mistake: "syms" nulled but not freed upon failure[bsd-user/elfload.c:1076]: (error) Memory leak: s[bsd-user/elfload.c:1079]: (error) Memory leak: syms...
sm501: add 2D engine copyrect support
Linux kernel started to use the SM501 2D engine for the console, andespecially the copyrect operation.
Implement this operation so that recent kernels can be used with QEMU.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Merge remote branch 'mst/for_anthony' into staging
m48t59: Fix a wrong opaque passed to nvram read and write routines
This fixes boot on PPC prep.
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
gdbstub: Close connection in gdb_exit
On Windows, this is required to flush the remaining data in the IO stream,otherwise Gdb do not receive the last packet.
Version 2: Fix linux-user build error.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>...
USB keyboard emulation key mapping error
The USB keyboard emulation's translation table in hw/usb-hid.c doesn'tmatch the codes actually sent for the Logo (a.k.a. "Windows") or Menukeys. This results in the guest OS not being able to receive these keysat all when the USB keyboard emulation is being used....
target-sh4: use rotl/rotr when possible
target-sh4: implement negc using TCG
Using setcond it's now possible to generate a relatively short negcinstruction in TCG.
tcg/sparc64: fix segfault
With current OpenBSD, code_gen_buffer was mapped 8GB away fromtext segment. Then any helpers were beyond the 2GB range of callinstruction genereated by TCG and so the calls would go nowhere,leading to a segfault.
Fix by specifying an address for the code_gen_buffer,...
target-sh4: correct use of ! and &
Fix wrong usage of ! and & in MMU related functions. Thanks to BlueSwirl for reporting the issue.
Reported-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
monitor: fix a typo
Fix usage of wrong variable, spotted by clang:/src/qemu/monitor.c:2278:36: warning: The left operand of '&' is a garbage value prot = pde & (PG_USER_MASK | PG_RW_MASK |
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
make_device_config: Fix non-fatal error message with dash and other shells
ORS=" " adds a blank to the name of the include file.Some shells (e.g. dash) don't accept input redirection(tr -d '\r' < $f) when $f ends with a blank, so theyprint an error message instead of reading pci.mak....
target-arm: Translate with VFP-enabled from TB flags, not CPUState
When translating code, whether the VFP unit is enabled for this TBis stored in a bit in the TB flags. Use this rather than incorrectlyreading the FPEXC from the CPUState passed to translation....
target-arm: Translate with VFP len/stride from TB flags, not CPUState
When translating, the VFP vector length and stride for this TB are encodedin the TB flags; the CPUState copies may be different and must not be used.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
target-arm: Translate with Thumb state from TB flags, not CPUState
The Thumb/ARM state for the TB being translated should come fromthe TB flags, not the CPUState.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>...
target-arm: Translate with condexec bits from TB flags, not CPUState
When translating, the condexec bits for the TB are in the TB flags;the CPUState condexec bits may be different.
This patch fixes https://bugs.launchpad.net/bugs/604872 where we mightsegfault if we took an exception in the middle of a TB with an IT...
target-arm: Set privileged bit in TB flags correctly for M profile
M profile ARM cores don't have a CPSR mode field. Set the bit in theTB flags that indicates non-user mode correctly for these cores.
target-arm: Translate with user-state from TB flags, not CPUState
When translating, get the user/priv state from the TB flags, notthe CPUState.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-arm: Remove redundant setting of IT bits before Thumb SWI
Remove a redundant call to gen_set_condexec() in the translation of Thumbmode SWI. (SWI and WFI generate "exceptions" which happen after theexecution of the instruction, ie when PC and IT bits have updated....
target-arm: Refactor translation of exception generating instructions
Create a new function which does the common sequence of gen_set_condexec,gen_set_pc_im, gen_exception, set is_jmp to DISAS_JUMP.
linux-user: ARM: clear the IT bits when invoking a signal handler
When invoking a signal handler for an ARM target, make sure the ITbits in the CPSR are cleared. (This would otherwise cause incorrectexecution if the IT state was non-zero when an exception occured....
target-arm: Restore IT bits when resuming after an exception
We were not correctly restoring the IT bits when resuming executionafter taking an unexpected exception in the middle of an IT block.Fix this by tracking them along with PC changes and restoring in...
MAINTAINERS: fix typos
MAINTAINERS: Change MIPS and SH4 maintainers
Since nobody else seems interested in maintaining MIPS and SH4 targets,and as I have done most of the recent code changes, let officializethat.
MAINTAINERS: add entries for TCG
The MAINTAINERS file was lacking entries concerning the TCG code, addthem based on the git history.
For the common TCG code, is probably better to keep qemu-devel@non-gnu.orgas this code can break easily, so it's better to get it reviewed by a few...
target-sh4: define FPSCR constants
Define FPSCR constants for all field and use them instead of hardcodedvalues.
target-sh4: implement flush-to-zero
When the FPSCR.DN bit is set, the SH4 FPU treat denormalized numbers aszero. Enable the corresponding softfloat option when this bit is set.
target-sh4: implement FPU exceptions
FPU exception support where not implemented on SH4. Implement them byclearing the softfloat exceptions flags before an FP instruction (theSH4 FPU also clear them before an instruction), and calling a functionto update the FPSCR register after an FP instruction. This function...
target-sh4: add fipr instruction
Add the fipr FVm,FVn instruction, which computes the inner products ofa 4-dimensional single precision floating-point vector.
target-sh4: add ftrv instruction
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-columnmatrix XMTRX by the 4-dimensional vector FVn.
target-sh4: optimize exceptions
As exception is not the normal path, don't bother saving PC, beforeraising one, instead rely on code retranslation to get the CPU state.
target-sh4: fix reset on r2d
target-sh4: simplify comparisons after a 'and' op
When a TCG variable is anded with a value and the compared with the samevalue, we can simply invert the comparison and compare it with 0. Thegenerated code is smaller.
target-sh4: log instructions start in TCG code
target-sh4: use setcond when possible
mips/malta: fix board id
Board id can't be written with stl_phys() as it's read-only part ofmemory. Use stl_p() on the memory buffer instead.
lsi53c895a: fix endianness issues
lsi_ram_read*() and lsi_ram_write*() are not consistent, one usesleXX_to_cpu() the other uses nothing. As the comment above the RAMdeclaration says: "Script ram is stored as 32-bit words in hostbyteorder.", remove the leXX_to_cpu() calls....
softfloat: Add float32_is_zero_or_denormal() function
Add a utility function to softfloat to test whether a float32is zero or denormal.
target-arm: Fix implementation of VRSQRTS
The implementation of the ARM VRSQRTS instruction (which calculates(3 - op1 * op2) / 2) was missing the division operation. It alsodid not handle the special cases of (0,inf) and (inf,0).
target-arm: Add support for 'Standard FPSCR Value' as used by Neon
Add support to the ARM helper routines for a second fp_status valuewhich should be used for operations which the ARM ARM indicates use"ARM standard floating-point arithmetic" rather than being controlled...
target-arm: Use the standard FPSCR value for VRSQRTS
VSQRTS always uses the standard FPSCR value as it is a Neon instruction.
target-arm: Don't generate code specific to current CPU mode for SRS
When translating the SRS instruction, handle the "store registersto stack of current mode" case in the helper function rather thaninline. This means the generated code does not make assumptions...
target-arm: Add symbolic constants for bitfields in TB flags
Add symbolic constants for the bitfields we use in the TB flags.
target-sh4: switch sh4 to softfloat
We need to be able to catch exceptions correctly and thus enable softfloaton SH4.
As all machines except i386 and x86_64 are using softfloat, make it thedefault and change the case to detect i386 and x86_64. Note that CRIS...
softfloat: SH4 has the sNaN bit set
softfloat: fix default-NaN mode
When the default-NaN mode is enabled, it should return the default NaNvalue, but it should anyway raise the invalid operation flag if one ofthe operand is an sNaN.
I have checked that this behavior matches the ARM and SH4 manuals, as...
target-sh4: use default-NaN mode
SH4 FPU doesn't propagate NaN, and instead always regenerate new ones.Enable the default-NaN mode by default.
configure: fix broken test
Since commit d1807a4f836c27f6dc7061e53a834dd27f78e46a ./configure triesto test files and directories with "test -f", which only test for regularfiles. Test with "test -e", which looks for any kind of files.
This unbreak the configure script when not using a separate object...
do not default to non-prefixed pkg-config when cross compiling
This can still be requested with PKG_CONFIG=/path/to/pkg-config.Just do not use it as a default, and print a warning.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
reorganize sdl-config tests
This also allows overriding it with SDL_CONFIG, and warning in suspiciouscross-compilation scenarios.
move "ln -sf" emulation to a function
"ln -sf" does not really do anything more than "ln -s" on Solaris.
remove source_path_used
Not necessary since we use mkdir -p and from this patch test -f.
Also, dirname returns "." if a path has no directory component,as is the case for "sh configure".
[PATCH v3 14/15] remove HOST_CC mention from roms/{sea, vga}bios/config.mak
Not used in the submodules.
move --srcdir detection earlier
This will help getting config.guess and config.sub from the srcdir.
make trace options use autoconfy names
These are not in any release, so I am just renaming them.
test cc with the complete set of chosen flags
The "test the C compiler works ok" comes before a bunch of flagsare added for --cpu or just depending on the host. It helpsdebugging if the test is done after these flags are (unconditionally)added.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
do not pass bogus $(SRC_PATH) include paths to cc during configure
Non-existent -I paths are dropped silently by the compiler, but stillit is not polite to pass bogus options. Configure-time tests do notneed any include files from the source path, so only include -I flags...
provide portable HOST_LONG_BITS test
Do not hardcode the list of 64-bit CPUs. Use sizeof(void *) tocompute it. Renaming it to HOST_LONG_BITS to HOST_POINTER_BITSis left for later.
fix spelling of $pkg_config, move default together with other cross tools
default compilation tools to environment variables
default make and install to environment variables
move feature variables to the top
fix sparse support (?)
I didn't test with sparse, but the old code using += before a variablewas set was wrong. Sparse support should probably be ripped out orredone, but this at least keeps some sanity.
microblaze: Improve unconditional direct branching
Avoid emitting conditional tcg operations for uncoditionaldirect branches.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
cris: Set btaken when storing direct jumps
When storing a direct jmp from translation state intoruntime state we should set the btaken flag.
Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
slirp: Use strcasecmp() to check tftp mode, tsize
According to RFC 1350 (TFTP Revision 2) the mode field can contain anycombination of upper and lower case; also RFC 2349 propagates that thetransfer size option ("tsize") is case in-sensitive too.
Current implementation of embedded TFTP server missed that what does...
ppc405_uc: fix a buffer overflow
Fix a buffer overflow, reported by cppcheck:[/src/qemu/hw/ppc405_uc.c:72]: (error) Buffer access out-of-bounds: bd.bi_s_version
The use of field bi_s_version seems to be a typo, it should bebi_r_version.
lan9118: fix a buffer overflow
Fix a buffer overflow, reported by cppcheck:[/src/qemu/hw/lan9118.c:849]: (error) Buffer access out-of-bounds: s.eeprom
All eeprom handling code assumes that the size of eeprom is 128,except lan9118_eeprom_cmd. Fix this by restricting the address passed....
vpc: fix a file descriptor leak
Fix a file descriptor leak, reported by cppcheck:[/src/qemu/block/vpc.c:524]: (error) Resource leak: fd
qemu-io: fix a memory leak
Fix a memory leak, reported by cppcheck:[/src/qemu/qemu-io.c:1135]: (error) Memory leak: ctx
vvfat: fix a file descriptor leak
Fix a file descriptor leak, reported by cppcheck:[/src/qemu/block/vvfat.c:759]: (error) Resource leak: dir
loader: fix a file descriptor leak
Fix a file descriptor leak, reported by cppcheck:[/src/qemu/hw/loader.c:311]: (error) Resource leak: fd
vnc-auth-sasl: fix a memory leak
Fix a memory leak reported by cppcheck:[/src/qemu/ui/vnc-auth-sasl.c:448]: (error) Memory leak: mechname
audio: split sample conversion and volume mixing
Refactor the volume mixing, so it can be reused for capturing devices.Additionally, it removes superfluous multiplications with the nominalvolume within the hardware voice code path.
Signed-off-by: Michael Walle <michael@walle.cc>...
disas: remove opcode printing on ARM hosts
Following commit 5d48e9174e3bfa8655e1dc8f80887acd9040b427, it's possibleto remove the hack that used to display the opcodes on ARM hosts only.
arm-dis: Include opcode hex when doing disassembly
Enhance the ARM disassembler used for debugging so that it includesthe hex dump of the opcode as well as the symbolic disassembly.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg arm/mips/ia64: add a comment about retranslation and caches
Add a comment about cache coherency and retranslation, so that peopledevelopping new targets based on existing ones are warned of the issue.
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>...
ARM: add neon helpers for VQSHLU
Add neon helper functions to implement VQSHLU, which is asigned-to-unsigned version of VQSHL available only as animmediate form.
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>...
ARM: Fix decoding of VQSHL/VQSHLU immediate forms
Fix errors in the decoding of ARM VQSHL/VQSHLU immediate forms,including using the new VQSHLU helper functions where appropriate.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
linux-user: Add configure check for linux/fiemap.h and IOC_FS_FIEMAP
Add a configure check for the existence of linux/fiemap.h and theIOC_FS_FIEMAP ioctl. This fixes a compilation failure on Linuxsystems which don't have that header file.
target-sh4: fix fpu disabled/illegal exception
Illegal instructions in a slot delay should generate a slot illegalinstruction exception instead of an illegal instruction exception.
The current PC should be saved before generating such an exception,but should not be corrected if in a delay slot, given it's already...
ioeventfd: error handling cleanup
- Don't return status from start/stop functions where it's ignored- report errors to make debugging easier- assert on unexpected failures- don't disable notifiers on error so that we'll retry when guest driver restarts...
cris: Remove unused orig_flags
Based on a patch by Blue Swirl <blauwirbel@gmail.com>.
cris: Allow more TB chaining for crisv10
cris: Support disassembly of crisv10
kvm: test for ioeventfd support on old kernels
There used to be a limit of 6 KVM io bus devices in the kernel.On such a kernel, we can't use many ioeventfds for host notificationsince the limit is reached too easily.
Add an API to test for this condition....
virtio-pci: Use ioeventfd for virtqueue notify
Virtqueue notify is currently handled synchronously in userspace virtio. Thisprevents the vcpu from executing guest code while hardware emulation codehandles the notify.
On systems that support KVM, the ioeventfd mechanism can be used to make...
docs: Document virtio PCI -device ioeventfd=on|off
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
virtio: move vmstate change tracking to core
Move tracking vmstate change from virtio-net to virtio.cas it is going to be used by virito-blk and virtio-pcifor the ioeventfd support.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>