Revision 47f08d7a
| b/trace-events | ||
|---|---|---|
| 26 | 26 |
# The <format-string> should be a sprintf()-compatible format string. |
| 27 | 27 |
|
| 28 | 28 |
# qemu-malloc.c |
| 29 |
disable qemu_malloc(size_t size, void *ptr) "size %zu ptr %p"
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|
| 30 |
disable qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p"
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| 31 |
disable qemu_free(void *ptr) "ptr %p"
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|
| 29 |
qemu_malloc(size_t size, void *ptr) "size %zu ptr %p" |
|
| 30 |
qemu_realloc(void *ptr, size_t size, void *newptr) "ptr %p size %zu newptr %p" |
|
| 31 |
qemu_free(void *ptr) "ptr %p" |
|
| 32 | 32 |
|
| 33 | 33 |
# osdep.c |
| 34 |
disable qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p"
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|
| 35 |
disable qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p"
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| 36 |
disable qemu_vfree(void *ptr) "ptr %p"
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| 34 |
qemu_memalign(size_t alignment, size_t size, void *ptr) "alignment %zu size %zu ptr %p" |
|
| 35 |
qemu_vmalloc(size_t size, void *ptr) "size %zu ptr %p" |
|
| 36 |
qemu_vfree(void *ptr) "ptr %p" |
|
| 37 | 37 |
|
| 38 | 38 |
# hw/virtio.c |
| 39 |
disable virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u"
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|
| 40 |
disable virtqueue_flush(void *vq, unsigned int count) "vq %p count %u"
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| 41 |
disable virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u"
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| 42 |
disable virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p"
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| 43 |
disable virtio_irq(void *vq) "vq %p"
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| 44 |
disable virtio_notify(void *vdev, void *vq) "vdev %p vq %p"
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| 39 |
virtqueue_fill(void *vq, const void *elem, unsigned int len, unsigned int idx) "vq %p elem %p len %u idx %u" |
|
| 40 |
virtqueue_flush(void *vq, unsigned int count) "vq %p count %u" |
|
| 41 |
virtqueue_pop(void *vq, void *elem, unsigned int in_num, unsigned int out_num) "vq %p elem %p in_num %u out_num %u" |
|
| 42 |
virtio_queue_notify(void *vdev, int n, void *vq) "vdev %p n %d vq %p" |
|
| 43 |
virtio_irq(void *vq) "vq %p" |
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| 44 |
virtio_notify(void *vdev, void *vq) "vdev %p vq %p" |
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| 45 | 45 |
|
| 46 | 46 |
# hw/virtio-serial-bus.c |
| 47 |
disable virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u"
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| 48 |
disable virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d"
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| 49 |
disable virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u"
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| 50 |
disable virtio_serial_handle_control_message_port(unsigned int port) "port %u"
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| 47 |
virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" |
|
| 48 |
virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" |
|
| 49 |
virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" |
|
| 50 |
virtio_serial_handle_control_message_port(unsigned int port) "port %u" |
|
| 51 | 51 |
|
| 52 | 52 |
# hw/virtio-console.c |
| 53 |
disable virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd"
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| 54 |
disable virtio_console_chr_read(unsigned int port, int size) "port %u, size %d"
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| 55 |
disable virtio_console_chr_event(unsigned int port, int event) "port %u, event %d"
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| 53 |
virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" |
|
| 54 |
virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" |
|
| 55 |
virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" |
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| 56 | 56 |
|
| 57 | 57 |
# block.c |
| 58 |
disable multiwrite_cb(void *mcb, int ret) "mcb %p ret %d"
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|
| 59 |
disable bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d"
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| 60 |
disable bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p"
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| 61 |
disable bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d"
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| 62 |
disable bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p"
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| 63 |
disable bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
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| 64 |
disable bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p"
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| 65 |
disable bdrv_set_locked(void *bs, int locked) "bs %p locked %d"
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| 66 |
disable bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
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| 67 |
disable bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d"
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| 68 |
disable bdrv_co_io(int is_write, void *acb) "is_write %d acb %p"
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| 58 |
multiwrite_cb(void *mcb, int ret) "mcb %p ret %d" |
|
| 59 |
bdrv_aio_multiwrite(void *mcb, int num_callbacks, int num_reqs) "mcb %p num_callbacks %d num_reqs %d" |
|
| 60 |
bdrv_aio_multiwrite_earlyfail(void *mcb) "mcb %p" |
|
| 61 |
bdrv_aio_multiwrite_latefail(void *mcb, int i) "mcb %p i %d" |
|
| 62 |
bdrv_aio_flush(void *bs, void *opaque) "bs %p opaque %p" |
|
| 63 |
bdrv_aio_readv(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
|
| 64 |
bdrv_aio_writev(void *bs, int64_t sector_num, int nb_sectors, void *opaque) "bs %p sector_num %"PRId64" nb_sectors %d opaque %p" |
|
| 65 |
bdrv_set_locked(void *bs, int locked) "bs %p locked %d" |
|
| 66 |
bdrv_co_readv(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
|
| 67 |
bdrv_co_writev(void *bs, int64_t sector_num, int nb_sector) "bs %p sector_num %"PRId64" nb_sectors %d" |
|
| 68 |
bdrv_co_io(int is_write, void *acb) "is_write %d acb %p" |
|
| 69 | 69 |
|
| 70 | 70 |
# hw/virtio-blk.c |
| 71 |
disable virtio_blk_req_complete(void *req, int status) "req %p status %d"
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|
| 72 |
disable virtio_blk_rw_complete(void *req, int ret) "req %p ret %d"
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| 73 |
disable virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu"
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| 71 |
virtio_blk_req_complete(void *req, int status) "req %p status %d" |
|
| 72 |
virtio_blk_rw_complete(void *req, int ret) "req %p ret %d" |
|
| 73 |
virtio_blk_handle_write(void *req, uint64_t sector, size_t nsectors) "req %p sector %"PRIu64" nsectors %zu" |
|
| 74 | 74 |
|
| 75 | 75 |
# posix-aio-compat.c |
| 76 |
disable paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d"
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| 77 |
disable paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d"
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| 78 |
disable paio_cancel(void *acb, void *opaque) "acb %p opaque %p"
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| 76 |
paio_submit(void *acb, void *opaque, int64_t sector_num, int nb_sectors, int type) "acb %p opaque %p sector_num %"PRId64" nb_sectors %d type %d" |
|
| 77 |
paio_complete(void *acb, void *opaque, int ret) "acb %p opaque %p ret %d" |
|
| 78 |
paio_cancel(void *acb, void *opaque) "acb %p opaque %p" |
|
| 79 | 79 |
|
| 80 | 80 |
# ioport.c |
| 81 |
disable cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u"
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| 82 |
disable cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u"
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| 81 |
cpu_in(unsigned int addr, unsigned int val) "addr %#x value %u" |
|
| 82 |
cpu_out(unsigned int addr, unsigned int val) "addr %#x value %u" |
|
| 83 | 83 |
|
| 84 | 84 |
# balloon.c |
| 85 | 85 |
# Since requests are raised via monitor, not many tracepoints are needed. |
| 86 |
disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu"
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| 86 |
balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" |
|
| 87 | 87 |
|
| 88 | 88 |
# hw/apic.c |
| 89 |
disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d"
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| 90 |
disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d"
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| 91 |
disable cpu_set_apic_base(uint64_t val) "%016"PRIx64""
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| 92 |
disable cpu_get_apic_base(uint64_t val) "%016"PRIx64""
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| 93 |
disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
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| 94 |
disable apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
|
|
| 89 |
apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" |
|
| 90 |
apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" |
|
| 91 |
cpu_set_apic_base(uint64_t val) "%016"PRIx64"" |
|
| 92 |
cpu_get_apic_base(uint64_t val) "%016"PRIx64"" |
|
| 93 |
apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
|
| 94 |
apic_mem_writel(uint64_t addr, uint32_t val) "%"PRIx64" = %08x" |
|
| 95 | 95 |
# coalescing |
| 96 |
disable apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d"
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| 97 |
disable apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d"
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| 98 |
disable apic_set_irq(int apic_irq_delivered) "coalescing %d"
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| 96 |
apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" |
|
| 97 |
apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" |
|
| 98 |
apic_set_irq(int apic_irq_delivered) "coalescing %d" |
|
| 99 | 99 |
|
| 100 | 100 |
# hw/cs4231.c |
| 101 |
disable cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x"
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| 102 |
disable cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x"
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| 103 |
disable cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x"
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| 104 |
disable cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x"
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| 101 |
cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" |
|
| 102 |
cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" |
|
| 103 |
cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" |
|
| 104 |
cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" |
|
| 105 | 105 |
|
| 106 | 106 |
# hw/ds1225y.c |
| 107 |
disable nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x"
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| 108 |
disable nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x"
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| 107 |
nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" |
|
| 108 |
nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" |
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| 109 | 109 |
|
| 110 | 110 |
# hw/eccmemctl.c |
| 111 |
disable ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x"
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| 112 |
disable ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x"
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| 113 |
disable ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x"
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| 114 |
disable ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x"
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| 115 |
disable ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x"
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| 116 |
disable ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x"
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| 117 |
disable ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x"
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| 118 |
disable ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x"
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| 119 |
disable ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x"
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| 120 |
disable ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x"
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| 121 |
disable ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x"
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| 122 |
disable ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x"
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| 123 |
disable ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x"
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| 124 |
disable ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x"
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| 125 |
disable ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x"
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| 126 |
disable ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x"
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| 127 |
disable ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x"
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| 128 |
disable ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x"
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| 111 |
ecc_mem_writel_mer(uint32_t val) "Write memory enable %08x" |
|
| 112 |
ecc_mem_writel_mdr(uint32_t val) "Write memory delay %08x" |
|
| 113 |
ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status %08x" |
|
| 114 |
ecc_mem_writel_vcr(uint32_t val) "Write slot configuration %08x" |
|
| 115 |
ecc_mem_writel_dr(uint32_t val) "Write diagnostic %08x" |
|
| 116 |
ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 %08x" |
|
| 117 |
ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 %08x" |
|
| 118 |
ecc_mem_readl_mer(uint32_t ret) "Read memory enable %08x" |
|
| 119 |
ecc_mem_readl_mdr(uint32_t ret) "Read memory delay %08x" |
|
| 120 |
ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status %08x" |
|
| 121 |
ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration %08x" |
|
| 122 |
ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 %08x" |
|
| 123 |
ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 %08x" |
|
| 124 |
ecc_mem_readl_dr(uint32_t ret) "Read diagnostic %08x" |
|
| 125 |
ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 %08x" |
|
| 126 |
ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 %08x" |
|
| 127 |
ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = %02x" |
|
| 128 |
ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= %02x" |
|
| 129 | 129 |
|
| 130 | 130 |
# hw/lance.c |
| 131 |
disable lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x"
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|
| 132 |
disable lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x"
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|
| 131 |
lance_mem_readw(uint64_t addr, uint32_t ret) "addr=%"PRIx64"val=0x%04x" |
|
| 132 |
lance_mem_writew(uint64_t addr, uint32_t val) "addr=%"PRIx64"val=0x%04x" |
|
| 133 | 133 |
|
| 134 | 134 |
# hw/slavio_intctl.c |
| 135 |
disable slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x"
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| 136 |
disable slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x"
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| 137 |
disable slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x"
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| 138 |
disable slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x"
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| 139 |
disable slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x"
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| 140 |
disable slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x"
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| 141 |
disable slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x"
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| 142 |
disable slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x"
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| 143 |
disable slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d"
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| 144 |
disable slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x"
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| 145 |
disable slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d"
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| 146 |
disable slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d"
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| 135 |
slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = %x" |
|
| 136 |
slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = %x" |
|
| 137 |
slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask %x, curmask %x" |
|
| 138 |
slavio_intctl_mem_writel_set(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Set cpu %d irq mask %x, curmask %x" |
|
| 139 |
slavio_intctlm_mem_readl(uint64_t addr, uint32_t ret) "read system reg 0x%"PRIx64" = %x" |
|
| 140 |
slavio_intctlm_mem_writel(uint64_t addr, uint32_t val) "write system reg 0x%"PRIx64" = %x" |
|
| 141 |
slavio_intctlm_mem_writel_enable(uint32_t val, uint32_t intregm_disabled) "Enabled master irq mask %x, curmask %x" |
|
| 142 |
slavio_intctlm_mem_writel_disable(uint32_t val, uint32_t intregm_disabled) "Disabled master irq mask %x, curmask %x" |
|
| 143 |
slavio_intctlm_mem_writel_target(uint32_t cpu) "Set master irq cpu %d" |
|
| 144 |
slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending %x disabled %x" |
|
| 145 |
slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" |
|
| 146 |
slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" |
|
| 147 | 147 |
|
| 148 | 148 |
# hw/slavio_misc.c |
| 149 |
disable slavio_misc_update_irq_raise(void) "Raise IRQ"
|
|
| 150 |
disable slavio_misc_update_irq_lower(void) "Lower IRQ"
|
|
| 151 |
disable slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d"
|
|
| 152 |
disable slavio_cfg_mem_writeb(uint32_t val) "Write config %02x"
|
|
| 153 |
disable slavio_cfg_mem_readb(uint32_t ret) "Read config %02x"
|
|
| 154 |
disable slavio_diag_mem_writeb(uint32_t val) "Write diag %02x"
|
|
| 155 |
disable slavio_diag_mem_readb(uint32_t ret) "Read diag %02x"
|
|
| 156 |
disable slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x"
|
|
| 157 |
disable slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x"
|
|
| 158 |
disable slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x"
|
|
| 159 |
disable slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x"
|
|
| 160 |
disable slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x"
|
|
| 161 |
disable slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x"
|
|
| 162 |
disable apc_mem_writeb(uint32_t val) "Write power management %02x"
|
|
| 163 |
disable apc_mem_readb(uint32_t ret) "Read power management %02x"
|
|
| 164 |
disable slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x"
|
|
| 165 |
disable slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x"
|
|
| 166 |
disable slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x"
|
|
| 167 |
disable slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x"
|
|
| 149 |
slavio_misc_update_irq_raise(void) "Raise IRQ" |
|
| 150 |
slavio_misc_update_irq_lower(void) "Lower IRQ" |
|
| 151 |
slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" |
|
| 152 |
slavio_cfg_mem_writeb(uint32_t val) "Write config %02x" |
|
| 153 |
slavio_cfg_mem_readb(uint32_t ret) "Read config %02x" |
|
| 154 |
slavio_diag_mem_writeb(uint32_t val) "Write diag %02x" |
|
| 155 |
slavio_diag_mem_readb(uint32_t ret) "Read diag %02x" |
|
| 156 |
slavio_mdm_mem_writeb(uint32_t val) "Write modem control %02x" |
|
| 157 |
slavio_mdm_mem_readb(uint32_t ret) "Read modem control %02x" |
|
| 158 |
slavio_aux1_mem_writeb(uint32_t val) "Write aux1 %02x" |
|
| 159 |
slavio_aux1_mem_readb(uint32_t ret) "Read aux1 %02x" |
|
| 160 |
slavio_aux2_mem_writeb(uint32_t val) "Write aux2 %02x" |
|
| 161 |
slavio_aux2_mem_readb(uint32_t ret) "Read aux2 %02x" |
|
| 162 |
apc_mem_writeb(uint32_t val) "Write power management %02x" |
|
| 163 |
apc_mem_readb(uint32_t ret) "Read power management %02x" |
|
| 164 |
slavio_sysctrl_mem_writel(uint32_t val) "Write system control %08x" |
|
| 165 |
slavio_sysctrl_mem_readl(uint32_t ret) "Read system control %08x" |
|
| 166 |
slavio_led_mem_writew(uint32_t val) "Write diagnostic LED %04x" |
|
| 167 |
slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED %04x" |
|
| 168 | 168 |
|
| 169 | 169 |
# hw/slavio_timer.c |
| 170 |
disable slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x"
|
|
| 171 |
disable slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x"
|
|
| 172 |
disable slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64""
|
|
| 173 |
disable slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x"
|
|
| 174 |
disable slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x"
|
|
| 175 |
disable slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64""
|
|
| 176 |
disable slavio_timer_mem_writel_counter_invalid(void) "not user timer"
|
|
| 177 |
disable slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started"
|
|
| 178 |
disable slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped"
|
|
| 179 |
disable slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer"
|
|
| 180 |
disable slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter"
|
|
| 181 |
disable slavio_timer_mem_writel_mode_invalid(void) "not system timer"
|
|
| 182 |
disable slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64""
|
|
| 170 |
slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit %"PRIx64" count %x%08x" |
|
| 171 |
slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count %x%08x" |
|
| 172 |
slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address %"PRIx64"" |
|
| 173 |
slavio_timer_mem_readl(uint64_t addr, uint32_t ret) "read %"PRIx64" = %08x" |
|
| 174 |
slavio_timer_mem_writel(uint64_t addr, uint32_t val) "write %"PRIx64" = %08x" |
|
| 175 |
slavio_timer_mem_writel_limit(unsigned int timer_index, uint64_t count) "processor %d user timer set to %016"PRIx64"" |
|
| 176 |
slavio_timer_mem_writel_counter_invalid(void) "not user timer" |
|
| 177 |
slavio_timer_mem_writel_status_start(unsigned int timer_index) "processor %d user timer started" |
|
| 178 |
slavio_timer_mem_writel_status_stop(unsigned int timer_index) "processor %d user timer stopped" |
|
| 179 |
slavio_timer_mem_writel_mode_user(unsigned int timer_index) "processor %d changed from counter to user timer" |
|
| 180 |
slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d changed from user timer to counter" |
|
| 181 |
slavio_timer_mem_writel_mode_invalid(void) "not system timer" |
|
| 182 |
slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address %"PRIx64"" |
|
| 183 | 183 |
|
| 184 | 184 |
# hw/sparc32_dma.c |
| 185 |
disable ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64""
|
|
| 186 |
disable ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64""
|
|
| 187 |
disable sparc32_dma_set_irq_raise(void) "Raise IRQ"
|
|
| 188 |
disable sparc32_dma_set_irq_lower(void) "Lower IRQ"
|
|
| 189 |
disable espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x"
|
|
| 190 |
disable espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x"
|
|
| 191 |
disable sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x"
|
|
| 192 |
disable sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x"
|
|
| 193 |
disable sparc32_dma_enable_raise(void) "Raise DMA enable"
|
|
| 194 |
disable sparc32_dma_enable_lower(void) "Lower DMA enable"
|
|
| 185 |
ledma_memory_read(uint64_t addr) "DMA read addr 0x%"PRIx64"" |
|
| 186 |
ledma_memory_write(uint64_t addr) "DMA write addr 0x%"PRIx64"" |
|
| 187 |
sparc32_dma_set_irq_raise(void) "Raise IRQ" |
|
| 188 |
sparc32_dma_set_irq_lower(void) "Lower IRQ" |
|
| 189 |
espdma_memory_read(uint32_t addr) "DMA read addr 0x%08x" |
|
| 190 |
espdma_memory_write(uint32_t addr) "DMA write addr 0x%08x" |
|
| 191 |
sparc32_dma_mem_readl(uint64_t addr, uint32_t ret) "read dmareg %"PRIx64": 0x%08x" |
|
| 192 |
sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg %"PRIx64": 0x%08x -> 0x%08x" |
|
| 193 |
sparc32_dma_enable_raise(void) "Raise DMA enable" |
|
| 194 |
sparc32_dma_enable_lower(void) "Lower DMA enable" |
|
| 195 | 195 |
|
| 196 | 196 |
# hw/sun4m.c |
| 197 |
disable sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d"
|
|
| 198 |
disable sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d"
|
|
| 199 |
disable sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d"
|
|
| 200 |
disable sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d"
|
|
| 197 |
sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" |
|
| 198 |
sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" |
|
| 199 |
sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" |
|
| 200 |
sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" |
|
| 201 | 201 |
|
| 202 | 202 |
# hw/sun4m_iommu.c |
| 203 |
disable sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x"
|
|
| 204 |
disable sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x"
|
|
| 205 |
disable sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64""
|
|
| 206 |
disable sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x"
|
|
| 207 |
disable sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x"
|
|
| 208 |
disable sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x"
|
|
| 209 |
disable sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x"
|
|
| 210 |
disable sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64""
|
|
| 203 |
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[%"PRIx64"] = %x" |
|
| 204 |
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[%"PRIx64"] = %x" |
|
| 205 |
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = %"PRIx64"" |
|
| 206 |
sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush %x" |
|
| 207 |
sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush %x" |
|
| 208 |
sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr %"PRIx64" => pte %"PRIx64", *pte = %x" |
|
| 209 |
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" |
|
| 210 |
sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" |
|
| 211 | 211 |
|
| 212 | 212 |
# hw/usb-ehci.c |
| 213 |
disable usb_ehci_reset(void) "=== RESET ==="
|
|
| 214 |
disable usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x"
|
|
| 215 |
disable usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x"
|
|
| 216 |
disable usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)"
|
|
| 217 |
disable usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d"
|
|
| 218 |
disable usb_ehci_state(const char *schedule, const char *state) "%s schedule %s"
|
|
| 219 |
disable usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x"
|
|
| 220 |
disable usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d"
|
|
| 221 |
disable usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d"
|
|
| 222 |
disable usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x"
|
|
| 223 |
disable usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d"
|
|
| 224 |
disable usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d"
|
|
| 225 |
disable usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d"
|
|
| 226 |
disable usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s"
|
|
| 227 |
disable usb_ehci_port_detach(uint32_t port) "detach port #%d"
|
|
| 228 |
disable usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d"
|
|
| 229 |
disable usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d"
|
|
| 230 |
disable usb_ehci_queue_action(void *q, const char *action) "q %p: %s"
|
|
| 213 |
usb_ehci_reset(void) "=== RESET ===" |
|
| 214 |
usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" |
|
| 215 |
usb_ehci_mmio_writel(uint32_t addr, const char *str, uint32_t val) "wr mmio %04x [%s] = %x" |
|
| 216 |
usb_ehci_mmio_change(uint32_t addr, const char *str, uint32_t new, uint32_t old) "ch mmio %04x [%s] = %x (old: %x)" |
|
| 217 |
usb_ehci_usbsts(const char *sts, int state) "usbsts %s %d" |
|
| 218 |
usb_ehci_state(const char *schedule, const char *state) "%s schedule %s" |
|
| 219 |
usb_ehci_qh_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t c_qtd, uint32_t n_qtd, uint32_t a_qtd) "q %p - QH @ %08x: next %08x qtds %08x,%08x,%08x" |
|
| 220 |
usb_ehci_qh_fields(uint32_t addr, int rl, int mplen, int eps, int ep, int devaddr) "QH @ %08x - rl %d, mplen %d, eps %d, ep %d, dev %d" |
|
| 221 |
usb_ehci_qh_bits(uint32_t addr, int c, int h, int dtc, int i) "QH @ %08x - c %d, h %d, dtc %d, i %d" |
|
| 222 |
usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p - QTD @ %08x: next %08x altnext %08x" |
|
| 223 |
usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" |
|
| 224 |
usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" |
|
| 225 |
usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" |
|
| 226 |
usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s" |
|
| 227 |
usb_ehci_port_detach(uint32_t port) "detach port #%d" |
|
| 228 |
usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" |
|
| 229 |
usb_ehci_data(int rw, uint32_t cpage, uint32_t offset, uint32_t addr, uint32_t len, uint32_t bufpos) "write %d, cpage %d, offset 0x%03x, addr 0x%08x, len %d, bufpos %d" |
|
| 230 |
usb_ehci_queue_action(void *q, const char *action) "q %p: %s" |
|
| 231 | 231 |
|
| 232 | 232 |
# hw/usb-desc.c |
| 233 |
disable usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d"
|
|
| 234 |
disable usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d"
|
|
| 235 |
disable usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
|
|
| 236 |
disable usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d"
|
|
| 237 |
disable usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d"
|
|
| 238 |
disable usb_set_addr(int addr) "dev %d"
|
|
| 239 |
disable usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d"
|
|
| 240 |
disable usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
|
|
| 241 |
disable usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d"
|
|
| 233 |
usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" |
|
| 234 |
usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" |
|
| 235 |
usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
|
| 236 |
usb_desc_other_speed_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" |
|
| 237 |
usb_desc_string(int addr, int index, int len, int ret) "dev %d query string %d, len %d, ret %d" |
|
| 238 |
usb_set_addr(int addr) "dev %d" |
|
| 239 |
usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" |
|
| 240 |
usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
|
| 241 |
usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" |
|
| 242 | 242 |
|
| 243 | 243 |
# hw/scsi-bus.c |
| 244 |
disable scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
| 245 |
disable scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d"
|
|
| 246 |
disable scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
| 247 |
disable scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
| 248 |
disable scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d"
|
|
| 249 |
disable scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64""
|
|
| 250 |
disable scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d"
|
|
| 251 |
disable scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x"
|
|
| 252 |
disable scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
| 253 |
disable scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x"
|
|
| 254 |
disable scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
| 255 |
disable scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d"
|
|
| 244 |
scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" |
|
| 245 |
scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" |
|
| 246 |
scsi_req_dequeue(int target, int lun, int tag) "target %d lun %d tag %d" |
|
| 247 |
scsi_req_continue(int target, int lun, int tag) "target %d lun %d tag %d" |
|
| 248 |
scsi_req_parsed(int target, int lun, int tag, int cmd, int mode, int xfer) "target %d lun %d tag %d command %d dir %d length %d" |
|
| 249 |
scsi_req_parsed_lba(int target, int lun, int tag, int cmd, uint64_t lba) "target %d lun %d tag %d command %d lba %"PRIu64"" |
|
| 250 |
scsi_req_parse_bad(int target, int lun, int tag, int cmd) "target %d lun %d tag %d command %d" |
|
| 251 |
scsi_req_build_sense(int target, int lun, int tag, int key, int asc, int ascq) "target %d lun %d tag %d key %#02x asc %#02x ascq %#02x" |
|
| 252 |
scsi_report_luns(int target, int lun, int tag) "target %d lun %d tag %d" |
|
| 253 |
scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d tag %d page %#02x/%#02x" |
|
| 254 |
scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" |
|
| 255 |
scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" |
|
| 256 | 256 |
|
| 257 | 257 |
# vl.c |
| 258 |
disable vm_state_notify(int running, int reason) "running %d reason %d"
|
|
| 258 |
vm_state_notify(int running, int reason) "running %d reason %d" |
|
| 259 | 259 |
|
| 260 | 260 |
# block/qed-l2-cache.c |
| 261 |
disable qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p"
|
|
| 262 |
disable qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d"
|
|
| 263 |
disable qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d"
|
|
| 261 |
qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" |
|
| 262 |
qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" |
|
| 263 |
qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" |
|
| 264 | 264 |
|
| 265 | 265 |
# block/qed-table.c |
| 266 |
disable qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p"
|
|
| 267 |
disable qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d"
|
|
| 268 |
disable qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u"
|
|
| 269 |
disable qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d"
|
|
| 266 |
qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" |
|
| 267 |
qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" |
|
| 268 |
qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" |
|
| 269 |
qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" |
|
| 270 | 270 |
|
| 271 | 271 |
# block/qed.c |
| 272 |
disable qed_need_check_timer_cb(void *s) "s %p"
|
|
| 273 |
disable qed_start_need_check_timer(void *s) "s %p"
|
|
| 274 |
disable qed_cancel_need_check_timer(void *s) "s %p"
|
|
| 275 |
disable qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d"
|
|
| 276 |
disable qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d"
|
|
| 277 |
disable qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64""
|
|
| 278 |
disable qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
|
|
| 279 |
disable qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
|
|
| 280 |
disable qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
|
|
| 281 |
disable qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64""
|
|
| 282 |
disable qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu"
|
|
| 272 |
qed_need_check_timer_cb(void *s) "s %p" |
|
| 273 |
qed_start_need_check_timer(void *s) "s %p" |
|
| 274 |
qed_cancel_need_check_timer(void *s) "s %p" |
|
| 275 |
qed_aio_complete(void *s, void *acb, int ret) "s %p acb %p ret %d" |
|
| 276 |
qed_aio_setup(void *s, void *acb, int64_t sector_num, int nb_sectors, void *opaque, int is_write) "s %p acb %p sector_num %"PRId64" nb_sectors %d opaque %p is_write %d" |
|
| 277 |
qed_aio_next_io(void *s, void *acb, int ret, uint64_t cur_pos) "s %p acb %p ret %d cur_pos %"PRIu64"" |
|
| 278 |
qed_aio_read_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
|
| 279 |
qed_aio_write_data(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
|
| 280 |
qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" |
|
| 281 |
qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64"" |
|
| 282 |
qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" |
|
| 283 | 283 |
|
| 284 | 284 |
# hw/g364fb.c |
| 285 |
disable g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
|
|
| 286 |
disable g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
|
|
| 285 |
g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" |
|
| 286 |
g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" |
|
| 287 | 287 |
|
| 288 | 288 |
# hw/grlib_gptimer.c |
| 289 |
disable grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run"
|
|
| 290 |
disable grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x"
|
|
| 291 |
disable grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x"
|
|
| 292 |
disable grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x"
|
|
| 293 |
disable grlib_gptimer_hit(int id) "timer:%d HIT"
|
|
| 294 |
disable grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
|
|
| 295 |
disable grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x"
|
|
| 289 |
grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" |
|
| 290 |
grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" |
|
| 291 |
grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" |
|
| 292 |
grlib_gptimer_set_scaler(uint32_t scaler, uint32_t freq) "scaler:0x%x freq: 0x%x" |
|
| 293 |
grlib_gptimer_hit(int id) "timer:%d HIT" |
|
| 294 |
grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" |
|
| 295 |
grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" |
|
| 296 | 296 |
|
| 297 | 297 |
# hw/grlib_irqmp.c |
| 298 |
disable grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n"
|
|
| 299 |
disable grlib_irqmp_ack(int intno) "interrupt:%d"
|
|
| 300 |
disable grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d"
|
|
| 301 |
disable grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64""
|
|
| 302 |
disable grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
|
|
| 298 |
grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x\n" |
|
| 299 |
grlib_irqmp_ack(int intno) "interrupt:%d" |
|
| 300 |
grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" |
|
| 301 |
grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64"" |
|
| 302 |
grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
|
| 303 | 303 |
|
| 304 | 304 |
# hw/grlib_apbuart.c |
| 305 |
disable grlib_apbuart_event(int event) "event:%d"
|
|
| 306 |
disable grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x"
|
|
| 305 |
grlib_apbuart_event(int event) "event:%d" |
|
| 306 |
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" |
|
| 307 | 307 |
|
| 308 | 308 |
# hw/leon3.c |
| 309 |
disable leon3_set_irq(int intno) "Set CPU IRQ %d"
|
|
| 310 |
disable leon3_reset_irq(int intno) "Reset CPU IRQ %d"
|
|
| 309 |
leon3_set_irq(int intno) "Set CPU IRQ %d" |
|
| 310 |
leon3_reset_irq(int intno) "Reset CPU IRQ %d" |
|
| 311 | 311 |
|
| 312 | 312 |
# spice-qemu-char.c |
| 313 |
disable spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d"
|
|
| 314 |
disable spice_vmc_read(int bytes, int len) "spice read %d of requested %d"
|
|
| 315 |
disable spice_vmc_register_interface(void *scd) "spice vmc registered interface %p"
|
|
| 316 |
disable spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p"
|
|
| 313 |
spice_vmc_write(ssize_t out, int len) "spice wrottn %zd of requested %d" |
|
| 314 |
spice_vmc_read(int bytes, int len) "spice read %d of requested %d" |
|
| 315 |
spice_vmc_register_interface(void *scd) "spice vmc registered interface %p" |
|
| 316 |
spice_vmc_unregister_interface(void *scd) "spice vmc unregistered interface %p" |
|
| 317 | 317 |
|
| 318 | 318 |
# hw/lm32_pic.c |
| 319 |
disable lm32_pic_raise_irq(void) "Raise CPU interrupt"
|
|
| 320 |
disable lm32_pic_lower_irq(void) "Lower CPU interrupt"
|
|
| 321 |
disable lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d"
|
|
| 322 |
disable lm32_pic_set_im(uint32_t im) "im 0x%08x"
|
|
| 323 |
disable lm32_pic_set_ip(uint32_t ip) "ip 0x%08x"
|
|
| 324 |
disable lm32_pic_get_im(uint32_t im) "im 0x%08x"
|
|
| 325 |
disable lm32_pic_get_ip(uint32_t ip) "ip 0x%08x"
|
|
| 319 |
lm32_pic_raise_irq(void) "Raise CPU interrupt" |
|
| 320 |
lm32_pic_lower_irq(void) "Lower CPU interrupt" |
|
| 321 |
lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" |
|
| 322 |
lm32_pic_set_im(uint32_t im) "im 0x%08x" |
|
| 323 |
lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" |
|
| 324 |
lm32_pic_get_im(uint32_t im) "im 0x%08x" |
|
| 325 |
lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" |
|
| 326 | 326 |
|
| 327 | 327 |
# hw/lm32_juart.c |
| 328 |
disable lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x"
|
|
| 329 |
disable lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x"
|
|
| 330 |
disable lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x"
|
|
| 331 |
disable lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x"
|
|
| 328 |
lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" |
|
| 329 |
lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" |
|
| 330 |
lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" |
|
| 331 |
lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" |
|
| 332 | 332 |
|
| 333 | 333 |
# hw/lm32_timer.c |
| 334 |
disable lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
| 335 |
disable lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
| 336 |
disable lm32_timer_hit(void) "timer hit"
|
|
| 337 |
disable lm32_timer_irq_state(int level) "irq state %d"
|
|
| 334 |
lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
|
| 335 |
lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
|
| 336 |
lm32_timer_hit(void) "timer hit" |
|
| 337 |
lm32_timer_irq_state(int level) "irq state %d" |
|
| 338 | 338 |
|
| 339 | 339 |
# hw/lm32_uart.c |
| 340 |
disable lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
| 341 |
disable lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
| 342 |
disable lm32_uart_irq_state(int level) "irq state %d"
|
|
| 340 |
lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
|
| 341 |
lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
|
| 342 |
lm32_uart_irq_state(int level) "irq state %d" |
|
| 343 | 343 |
|
| 344 | 344 |
# hw/lm32_sys.c |
| 345 |
disable lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x"
|
|
| 345 |
lm32_sys_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
|
| 346 | 346 |
|
| 347 | 347 |
# hw/milkymist-ac97.c |
| 348 |
disable milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 349 |
disable milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 350 |
disable milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request"
|
|
| 351 |
disable milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply"
|
|
| 352 |
disable milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write"
|
|
| 353 |
disable milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read"
|
|
| 354 |
disable milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u"
|
|
| 355 |
disable milkymist_ac97_in_cb_transferred(int transferred) "transferred %d"
|
|
| 356 |
disable milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u"
|
|
| 357 |
disable milkymist_ac97_out_cb_transferred(int transferred) "transferred %d"
|
|
| 348 |
milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 349 |
milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 350 |
milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" |
|
| 351 |
milkymist_ac97_pulse_irq_crreply(void) "Pulse IRQ CR reply" |
|
| 352 |
milkymist_ac97_pulse_irq_dmaw(void) "Pulse IRQ DMA write" |
|
| 353 |
milkymist_ac97_pulse_irq_dmar(void) "Pulse IRQ DMA read" |
|
| 354 |
milkymist_ac97_in_cb(int avail, uint32_t remaining) "avail %d remaining %u" |
|
| 355 |
milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" |
|
| 356 |
milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" |
|
| 357 |
milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" |
|
| 358 | 358 |
|
| 359 | 359 |
# hw/milkymist-hpdmc.c |
| 360 |
disable milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
|
|
| 361 |
disable milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x"
|
|
| 360 |
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
|
| 361 |
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=%08x value=%08x" |
|
| 362 | 362 |
|
| 363 | 363 |
# hw/milkymist-memcard.c |
| 364 |
disable milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 365 |
disable milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 364 |
milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 365 |
milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 366 | 366 |
|
| 367 | 367 |
# hw/milkymist-minimac2.c |
| 368 |
disable milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 369 |
disable milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 370 |
disable milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
|
|
| 371 |
disable milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x"
|
|
| 372 |
disable milkymist_minimac2_tx_frame(uint32_t length) "length %u"
|
|
| 373 |
disable milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u"
|
|
| 374 |
disable milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p"
|
|
| 375 |
disable milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d"
|
|
| 376 |
disable milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX"
|
|
| 377 |
disable milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX"
|
|
| 378 |
disable milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX"
|
|
| 368 |
milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 369 |
milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 370 |
milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" |
|
| 371 |
milkymist_minimac2_mdio_read(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr %02x addr %02x value %04x" |
|
| 372 |
milkymist_minimac2_tx_frame(uint32_t length) "length %u" |
|
| 373 |
milkymist_minimac2_rx_frame(const void *buf, uint32_t length) "buf %p length %u" |
|
| 374 |
milkymist_minimac2_drop_rx_frame(const void *buf) "buf %p" |
|
| 375 |
milkymist_minimac2_rx_transfer(const void *buf, uint32_t length) "buf %p length %d" |
|
| 376 |
milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" |
|
| 377 |
milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" |
|
| 378 |
milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" |
|
| 379 | 379 |
|
| 380 | 380 |
# hw/milkymist-pfpu.c |
| 381 |
disable milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 382 |
disable milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 383 |
disable milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x"
|
|
| 384 |
disable milkymist_pfpu_pulse_irq(void) "Pulse IRQ"
|
|
| 381 |
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 382 |
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 383 |
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a %08x b %08x dma_ptr %08x" |
|
| 384 |
milkymist_pfpu_pulse_irq(void) "Pulse IRQ" |
|
| 385 | 385 |
|
| 386 | 386 |
# hw/milkymist-softusb.c |
| 387 |
disable milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 388 |
disable milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 389 |
disable milkymist_softusb_mevt(uint8_t m) "m %d"
|
|
| 390 |
disable milkymist_softusb_kevt(uint8_t m) "m %d"
|
|
| 391 |
disable milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x"
|
|
| 392 |
disable milkymist_softusb_pulse_irq(void) "Pulse IRQ"
|
|
| 387 |
milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 388 |
milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 389 |
milkymist_softusb_mevt(uint8_t m) "m %d" |
|
| 390 |
milkymist_softusb_kevt(uint8_t m) "m %d" |
|
| 391 |
milkymist_softusb_mouse_event(int dx, int dy, int dz, int bs) "dx %d dy %d dz %d bs %02x" |
|
| 392 |
milkymist_softusb_pulse_irq(void) "Pulse IRQ" |
|
| 393 | 393 |
|
| 394 | 394 |
# hw/milkymist-sysctl.c |
| 395 |
disable milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 396 |
disable milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 397 |
disable milkymist_sysctl_icap_write(uint32_t value) "value %08x"
|
|
| 398 |
disable milkymist_sysctl_start_timer0(void) "Start timer0"
|
|
| 399 |
disable milkymist_sysctl_stop_timer0(void) "Stop timer0"
|
|
| 400 |
disable milkymist_sysctl_start_timer1(void) "Start timer1"
|
|
| 401 |
disable milkymist_sysctl_stop_timer1(void) "Stop timer1"
|
|
| 402 |
disable milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0"
|
|
| 403 |
disable milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1"
|
|
| 395 |
milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 396 |
milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 397 |
milkymist_sysctl_icap_write(uint32_t value) "value %08x" |
|
| 398 |
milkymist_sysctl_start_timer0(void) "Start timer0" |
|
| 399 |
milkymist_sysctl_stop_timer0(void) "Stop timer0" |
|
| 400 |
milkymist_sysctl_start_timer1(void) "Start timer1" |
|
| 401 |
milkymist_sysctl_stop_timer1(void) "Stop timer1" |
|
| 402 |
milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" |
|
| 403 |
milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" |
|
| 404 | 404 |
|
| 405 | 405 |
# hw/milkymist-tmu2.c |
| 406 |
disable milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 407 |
disable milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 408 |
disable milkymist_tmu2_start(void) "Start TMU"
|
|
| 409 |
disable milkymist_tmu2_pulse_irq(void) "Pulse IRQ"
|
|
| 406 |
milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 407 |
milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 408 |
milkymist_tmu2_start(void) "Start TMU" |
|
| 409 |
milkymist_tmu2_pulse_irq(void) "Pulse IRQ" |
|
| 410 | 410 |
|
| 411 | 411 |
# hw/milkymist-uart.c |
| 412 |
disable milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 413 |
disable milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 414 |
disable milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX"
|
|
| 415 |
disable milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX"
|
|
| 412 |
milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 413 |
milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 414 |
milkymist_uart_pulse_irq_rx(void) "Pulse IRQ RX" |
|
| 415 |
milkymist_uart_pulse_irq_tx(void) "Pulse IRQ TX" |
|
| 416 | 416 |
|
| 417 | 417 |
# hw/milkymist-vgafb.c |
| 418 |
disable milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 419 |
disable milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x"
|
|
| 418 |
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 419 |
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr %08x value %08x" |
|
| 420 | 420 |
|
| 421 | 421 |
# xen-all.c |
| 422 |
disable xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx"
|
|
| 423 |
disable xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i"
|
|
| 422 |
xen_ram_alloc(unsigned long ram_addr, unsigned long size) "requested: %#lx, size %#lx" |
|
| 423 |
xen_client_set_memory(uint64_t start_addr, unsigned long size, unsigned long phys_offset, bool log_dirty) "%#"PRIx64" size %#lx, offset %#lx, log_dirty %i" |
|
| 424 | 424 |
|
| 425 | 425 |
# xen-mapcache.c |
| 426 |
disable xen_map_cache(uint64_t phys_addr) "want %#"PRIx64""
|
|
| 427 |
disable xen_remap_bucket(uint64_t index) "index %#"PRIx64""
|
|
| 428 |
disable xen_map_cache_return(void* ptr) "%p"
|
|
| 429 |
disable xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64""
|
|
| 430 |
disable xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx"
|
|
| 426 |
xen_map_cache(uint64_t phys_addr) "want %#"PRIx64"" |
|
| 427 |
xen_remap_bucket(uint64_t index) "index %#"PRIx64"" |
|
| 428 |
xen_map_cache_return(void* ptr) "%p" |
|
| 429 |
xen_map_block(uint64_t phys_addr, uint64_t size) "%#"PRIx64", size %#"PRIx64"" |
|
| 430 |
xen_unmap_block(void* addr, unsigned long size) "%p, size %#lx" |
|
| 431 | 431 |
|
| 432 | 432 |
# exec.c |
| 433 |
disable qemu_put_ram_ptr(void* addr) "%p"
|
|
| 433 |
qemu_put_ram_ptr(void* addr) "%p" |
|
| 434 | 434 |
|
| 435 | 435 |
# hw/xen_platform.c |
| 436 |
disable xen_platform_log(char *s) "xen platform: %s"
|
|
| 436 |
xen_platform_log(char *s) "xen platform: %s" |
|
| 437 | 437 |
|
| 438 | 438 |
# qemu-coroutine.c |
| 439 |
disable qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p"
|
|
| 440 |
disable qemu_coroutine_yield(void *from, void *to) "from %p to %p"
|
|
| 441 |
disable qemu_coroutine_terminate(void *co) "self %p"
|
|
| 439 |
qemu_coroutine_enter(void *from, void *to, void *opaque) "from %p to %p opaque %p" |
|
| 440 |
qemu_coroutine_yield(void *from, void *to) "from %p to %p" |
|
| 441 |
qemu_coroutine_terminate(void *co) "self %p" |
|
| 442 | 442 |
|
| 443 | 443 |
# qemu-coroutine-lock.c |
| 444 |
disable qemu_co_queue_next_bh(void) ""
|
|
| 445 |
disable qemu_co_queue_next(void *next) "next %p"
|
|
| 446 |
disable qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p"
|
|
| 447 |
disable qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p"
|
|
| 448 |
disable qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p"
|
|
| 449 |
disable qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p"
|
|
| 444 |
qemu_co_queue_next_bh(void) "" |
|
| 445 |
qemu_co_queue_next(void *next) "next %p" |
|
| 446 |
qemu_co_mutex_lock_entry(void *mutex, void *self) "mutex %p self %p" |
|
| 447 |
qemu_co_mutex_lock_return(void *mutex, void *self) "mutex %p self %p" |
|
| 448 |
qemu_co_mutex_unlock_entry(void *mutex, void *self) "mutex %p self %p" |
|
| 449 |
qemu_co_mutex_unlock_return(void *mutex, void *self) "mutex %p self %p" |
|
| 450 | 450 |
|
| 451 | 451 |
# hw/escc.c |
| 452 |
disable escc_put_queue(char channel, int b) "channel %c put: 0x%02x" |
|
| 453 |
disable escc_get_queue(char channel, int val) "channel %c get 0x%02x" |
|
| 454 |
disable escc_update_irq(int irq) "IRQ = %d" |
|
| 455 |
disable escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" |
|
| 456 |
disable escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" |
|
| 457 |
disable escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" |
|
| 458 |
disable escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" |
|
| 459 |
disable escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" |
|
| 460 |
disable escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" |
|
| 461 |
disable escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" |
|
| 462 |
disable escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" |
|
| 463 |
disable escc_kbd_command(int val) "Command %d" |
|
| 464 |
disable escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" |
|
| 452 |
escc_put_queue(char channel, int b) "channel %c put: 0x%02x" |
|
| 453 |
escc_get_queue(char channel, int val) "channel %c get 0x%02x" |
|
| 454 |
escc_update_irq(int irq) "IRQ = %d" |
|
| 455 |
escc_update_parameters(char channel, int speed, int parity, int data_bits, int stop_bits) "channel %c: speed=%d parity=%c data=%d stop=%d" |
|
| 456 |
escc_mem_writeb_ctrl(char channel, uint32_t reg, uint32_t val) "Write channel %c, reg[%d] = %2.2x" |
|
| 457 |
escc_mem_writeb_data(char channel, uint32_t val) "Write channel %c, ch %d" |
|
| 458 |
escc_mem_readb_ctrl(char channel, uint32_t reg, uint8_t val) "Read channel %c, reg[%d] = %2.2x" |
|
| 459 |
escc_mem_readb_data(char channel, uint32_t ret) "Read channel %c, ch %d" |
|
| 460 |
escc_serial_receive_byte(char channel, int ch) "channel %c put ch %d" |
|
| 461 |
escc_sunkbd_event_in(int ch) "Untranslated keycode %2.2x" |
|
| 462 |
escc_sunkbd_event_out(int ch) "Translated keycode %2.2x" |
|
| 463 |
escc_kbd_command(int val) "Command %d" |
|
| 464 |
escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=%01x" |
|
Also available in: Unified diff