Revision 4856fcff
| b/hw/pcnet.c | ||
|---|---|---|
| 2068 | 2068 |
|
| 2069 | 2069 |
static void parent_lance_reset(void *opaque, int irq, int level) |
| 2070 | 2070 |
{
|
| 2071 |
SysBusPCNetState *d = opaque; |
|
| 2071 | 2072 |
if (level) |
| 2072 |
pcnet_h_reset(opaque);
|
|
| 2073 |
pcnet_h_reset(&d->state);
|
|
| 2073 | 2074 |
} |
| 2074 | 2075 |
|
| 2075 | 2076 |
static void lance_mem_writew(void *opaque, target_phys_addr_t addr, |
| 2076 | 2077 |
uint32_t val) |
| 2077 | 2078 |
{
|
| 2079 |
SysBusPCNetState *d = opaque; |
|
| 2078 | 2080 |
#ifdef PCNET_DEBUG_IO |
| 2079 | 2081 |
printf("lance_mem_writew addr=" TARGET_FMT_plx " val=0x%04x\n", addr,
|
| 2080 | 2082 |
val & 0xffff); |
| 2081 | 2083 |
#endif |
| 2082 |
pcnet_ioport_writew(opaque, addr, val & 0xffff);
|
|
| 2084 |
pcnet_ioport_writew(&d->state, addr, val & 0xffff);
|
|
| 2083 | 2085 |
} |
| 2084 | 2086 |
|
| 2085 | 2087 |
static uint32_t lance_mem_readw(void *opaque, target_phys_addr_t addr) |
| 2086 | 2088 |
{
|
| 2089 |
SysBusPCNetState *d = opaque; |
|
| 2087 | 2090 |
uint32_t val; |
| 2088 | 2091 |
|
| 2089 |
val = pcnet_ioport_readw(opaque, addr);
|
|
| 2092 |
val = pcnet_ioport_readw(&d->state, addr);
|
|
| 2090 | 2093 |
#ifdef PCNET_DEBUG_IO |
| 2091 | 2094 |
printf("lance_mem_readw addr=" TARGET_FMT_plx " val = 0x%04x\n", addr,
|
| 2092 | 2095 |
val & 0xffff); |
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