root / tests / cris / check_clrjmp1.s @ 489251fa
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1 | dd43edf4 | ths | # mach: crisv3 crisv8 crisv10 crisv32 |
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2 | dd43edf4 | ths | # output: ffffff00\n |
3 | dd43edf4 | ths | |
4 | dd43edf4 | ths | ; A bug resulting in a non-effectual clear.b discovered running the GCC |
5 | dd43edf4 | ths | ; testsuite; jump actually wrote to p0. |
6 | dd43edf4 | ths | |
7 | dd43edf4 | ths | .include "testutils.inc" |
8 | dd43edf4 | ths | |
9 | dd43edf4 | ths | start |
10 | dd43edf4 | ths | jump 1f |
11 | dd43edf4 | ths | nop |
12 | dd43edf4 | ths | .p2align 8 |
13 | dd43edf4 | ths | 1: |
14 | dd43edf4 | ths | move.d y,r4 |
15 | dd43edf4 | ths | |
16 | dd43edf4 | ths | .if 0 ;0 == ..asm.arch.cris.v32 |
17 | dd43edf4 | ths | ; There was a bug causing this insn to set special register p0 |
18 | dd43edf4 | ths | ; (byte-clear) to 8 (low 8 bits of location after insn). |
19 | dd43edf4 | ths | jump [r4+] |
20 | dd43edf4 | ths | .endif |
21 | dd43edf4 | ths | |
22 | dd43edf4 | ths | 1: |
23 | dd43edf4 | ths | move.d 0f,r4 |
24 | dd43edf4 | ths | |
25 | dd43edf4 | ths | ; The corresponding bug would cause this insn too, to set p0. |
26 | dd43edf4 | ths | jump r4 |
27 | dd43edf4 | ths | nop |
28 | dd43edf4 | ths | quit |
29 | dd43edf4 | ths | 0: |
30 | dd43edf4 | ths | moveq -1,r3 |
31 | dd43edf4 | ths | clear.b r3 |
32 | dd43edf4 | ths | checkr3 ffffff00 |
33 | dd43edf4 | ths | quit |
34 | dd43edf4 | ths | |
35 | dd43edf4 | ths | y: |
36 | dd43edf4 | ths | .dword 1b |