Revision 4a2ba232 target-sparc/translate.c

b/target-sparc/translate.c
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                case 0x10 ... 0x1f: /* implementation-dependent in the
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                                       SPARCv8 manual, rdy on the
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                                       microSPARC II */
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                    /* Read Asr17 */
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                    if (rs1 == 0x11 && dc->def->features & CPU_FEATURE_ASR17) {
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                        TCGv r_const;
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                        /* Read Asr17 for a Leon3 monoprocessor */
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                        r_const = tcg_const_tl((1 << 8)
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                                               | (dc->def->nwindows - 1));
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                        gen_movl_TN_reg(rd, r_const);
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                        tcg_temp_free(r_const);
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                        break;
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                    }
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#endif
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                    gen_movl_TN_reg(rd, cpu_y);
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                    break;

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