Revision 4a643563 hw/ide/mmio.c
| b/hw/ide/mmio.c | ||
|---|---|---|
| 41 | 41 |
int shift; |
| 42 | 42 |
} MMIOState; |
| 43 | 43 |
|
| 44 |
static void mmio_ide_reset(void *opaque) |
|
| 45 |
{
|
|
| 46 |
MMIOState *s = opaque; |
|
| 47 |
|
|
| 48 |
ide_bus_reset(&s->bus); |
|
| 49 |
} |
|
| 50 |
|
|
| 44 | 51 |
static uint32_t mmio_ide_read (void *opaque, target_phys_addr_t addr) |
| 45 | 52 |
{
|
| 46 | 53 |
MMIOState *s = opaque; |
| ... | ... | |
| 127 | 134 |
cpu_register_physical_memory(membase, 16 << shift, mem1); |
| 128 | 135 |
cpu_register_physical_memory(membase2, 2 << shift, mem2); |
| 129 | 136 |
vmstate_register(0, &vmstate_ide_mmio, s); |
| 137 |
qemu_register_reset(mmio_ide_reset, s); |
|
| 130 | 138 |
} |
| 131 | 139 |
|
Also available in: Unified diff