Revision 4b16eb9d hw/cirrus_vga.c
| b/hw/cirrus_vga.c | ||
|---|---|---|
| 2618 | 2618 |
|
| 2619 | 2619 |
static void map_linear_vram(CirrusVGAState *s) |
| 2620 | 2620 |
{
|
| 2621 |
vga_dirty_log_stop((VGAState *)s); |
|
| 2622 |
|
|
| 2623 | 2621 |
if (!s->map_addr && s->lfb_addr && s->lfb_end) {
|
| 2624 | 2622 |
s->map_addr = s->lfb_addr; |
| 2625 | 2623 |
s->map_end = s->lfb_end; |
| ... | ... | |
| 2631 | 2629 |
|
| 2632 | 2630 |
s->lfb_vram_mapped = 0; |
| 2633 | 2631 |
|
| 2634 |
cpu_register_physical_memory(isa_mem_base + 0xa0000, 0x8000, |
|
| 2635 |
(s->vram_offset + s->cirrus_bank_base[0]) | IO_MEM_UNASSIGNED); |
|
| 2636 |
cpu_register_physical_memory(isa_mem_base + 0xa8000, 0x8000, |
|
| 2637 |
(s->vram_offset + s->cirrus_bank_base[1]) | IO_MEM_UNASSIGNED); |
|
| 2638 | 2632 |
if (!(s->cirrus_srcptr != s->cirrus_srcptr_end) |
| 2639 | 2633 |
&& !((s->sr[0x07] & 0x01) == 0) |
| 2640 | 2634 |
&& !((s->gr[0x0B] & 0x14) == 0x14) |
| 2641 | 2635 |
&& !(s->gr[0x0B] & 0x02)) {
|
| 2642 | 2636 |
|
| 2643 |
vga_dirty_log_stop((VGAState *)s); |
|
| 2644 | 2637 |
cpu_register_physical_memory(isa_mem_base + 0xa0000, 0x8000, |
| 2645 | 2638 |
(s->vram_offset + s->cirrus_bank_base[0]) | IO_MEM_RAM); |
| 2646 | 2639 |
cpu_register_physical_memory(isa_mem_base + 0xa8000, 0x8000, |
| ... | ... | |
| 2658 | 2651 |
|
| 2659 | 2652 |
static void unmap_linear_vram(CirrusVGAState *s) |
| 2660 | 2653 |
{
|
| 2661 |
vga_dirty_log_stop((VGAState *)s); |
|
| 2662 |
|
|
| 2663 | 2654 |
if (s->map_addr && s->lfb_addr && s->lfb_end) |
| 2664 | 2655 |
s->map_addr = s->map_end = 0; |
| 2665 | 2656 |
|
| 2666 | 2657 |
cpu_register_physical_memory(isa_mem_base + 0xa0000, 0x20000, |
| 2667 | 2658 |
s->vga_io_memory); |
| 2668 |
|
|
| 2669 |
vga_dirty_log_start((VGAState *)s); |
|
| 2670 | 2659 |
} |
| 2671 | 2660 |
|
| 2672 | 2661 |
/* Compute the memory access functions */ |
| ... | ... | |
| 3313 | 3302 |
{
|
| 3314 | 3303 |
CirrusVGAState *s = &((PCICirrusVGAState *)d)->cirrus_vga; |
| 3315 | 3304 |
|
| 3316 |
vga_dirty_log_stop((VGAState *)s); |
|
| 3317 |
|
|
| 3318 | 3305 |
/* XXX: add byte swapping apertures */ |
| 3319 | 3306 |
cpu_register_physical_memory(addr, s->vram_size, |
| 3320 | 3307 |
s->cirrus_linear_io_addr); |
| ... | ... | |
| 3346 | 3333 |
PCICirrusVGAState *pvs = container_of(d, PCICirrusVGAState, dev); |
| 3347 | 3334 |
CirrusVGAState *s = &pvs->cirrus_vga; |
| 3348 | 3335 |
|
| 3349 |
vga_dirty_log_stop((VGAState *)s); |
|
| 3350 |
|
|
| 3351 | 3336 |
pci_default_write_config(d, address, val, len); |
| 3352 | 3337 |
if (s->map_addr && pvs->dev.io_regions[0].addr == -1) |
| 3353 | 3338 |
s->map_addr = 0; |
| 3354 | 3339 |
cirrus_update_memory_access(s); |
| 3355 |
|
|
| 3356 |
vga_dirty_log_start((VGAState *)s); |
|
| 3357 | 3340 |
} |
| 3358 | 3341 |
|
| 3359 | 3342 |
void pci_cirrus_vga_init(PCIBus *bus, int vga_ram_size) |
Also available in: Unified diff