root / hw / pckbd.c @ 4b816985
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1 | 80cabfad | bellard | /*
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2 | 80cabfad | bellard | * QEMU PC keyboard emulation
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3 | 5fafdf24 | ths | *
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4 | 80cabfad | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 80cabfad | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 80cabfad | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 80cabfad | bellard | * in the Software without restriction, including without limitation the rights
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9 | 80cabfad | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 80cabfad | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 80cabfad | bellard | * furnished to do so, subject to the following conditions:
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12 | 80cabfad | bellard | *
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13 | 80cabfad | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 80cabfad | bellard | * all copies or substantial portions of the Software.
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15 | 80cabfad | bellard | *
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16 | 80cabfad | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 80cabfad | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 80cabfad | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 80cabfad | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 80cabfad | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 80cabfad | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 80cabfad | bellard | * THE SOFTWARE.
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23 | 80cabfad | bellard | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "isa.h" |
26 | 87ecb68b | pbrook | #include "pc.h" |
27 | 87ecb68b | pbrook | #include "ps2.h" |
28 | 87ecb68b | pbrook | #include "sysemu.h" |
29 | 80cabfad | bellard | |
30 | 80cabfad | bellard | /* debug PC keyboard */
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31 | 80cabfad | bellard | //#define DEBUG_KBD
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32 | 80cabfad | bellard | |
33 | 80cabfad | bellard | /* Keyboard Controller Commands */
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34 | 80cabfad | bellard | #define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */ |
35 | 80cabfad | bellard | #define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */ |
36 | 80cabfad | bellard | #define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */ |
37 | 80cabfad | bellard | #define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */ |
38 | 80cabfad | bellard | #define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */ |
39 | 80cabfad | bellard | #define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */ |
40 | 80cabfad | bellard | #define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */ |
41 | 80cabfad | bellard | #define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */ |
42 | 80cabfad | bellard | #define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */ |
43 | 80cabfad | bellard | #define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */ |
44 | 80cabfad | bellard | #define KBD_CCMD_READ_INPORT 0xC0 /* read input port */ |
45 | 80cabfad | bellard | #define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */ |
46 | 80cabfad | bellard | #define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */ |
47 | 80cabfad | bellard | #define KBD_CCMD_WRITE_OBUF 0xD2 |
48 | 80cabfad | bellard | #define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if |
49 | 80cabfad | bellard | initiated by the auxiliary device */
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50 | 80cabfad | bellard | #define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */ |
51 | 80cabfad | bellard | #define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */ |
52 | 80cabfad | bellard | #define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */ |
53 | 80cabfad | bellard | #define KBD_CCMD_RESET 0xFE |
54 | 80cabfad | bellard | |
55 | 80cabfad | bellard | /* Keyboard Commands */
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56 | 80cabfad | bellard | #define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */ |
57 | 80cabfad | bellard | #define KBD_CMD_ECHO 0xEE |
58 | 80cabfad | bellard | #define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */ |
59 | 80cabfad | bellard | #define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */ |
60 | 80cabfad | bellard | #define KBD_CMD_ENABLE 0xF4 /* Enable scanning */ |
61 | 80cabfad | bellard | #define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */ |
62 | 80cabfad | bellard | #define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */ |
63 | 80cabfad | bellard | #define KBD_CMD_RESET 0xFF /* Reset */ |
64 | 80cabfad | bellard | |
65 | 80cabfad | bellard | /* Keyboard Replies */
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66 | 80cabfad | bellard | #define KBD_REPLY_POR 0xAA /* Power on reset */ |
67 | 80cabfad | bellard | #define KBD_REPLY_ACK 0xFA /* Command ACK */ |
68 | 80cabfad | bellard | #define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */ |
69 | 80cabfad | bellard | |
70 | 80cabfad | bellard | /* Status Register Bits */
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71 | 80cabfad | bellard | #define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */ |
72 | 80cabfad | bellard | #define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */ |
73 | 80cabfad | bellard | #define KBD_STAT_SELFTEST 0x04 /* Self test successful */ |
74 | 80cabfad | bellard | #define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */ |
75 | 80cabfad | bellard | #define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */ |
76 | 80cabfad | bellard | #define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */ |
77 | 80cabfad | bellard | #define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */ |
78 | 80cabfad | bellard | #define KBD_STAT_PERR 0x80 /* Parity error */ |
79 | 80cabfad | bellard | |
80 | 80cabfad | bellard | /* Controller Mode Register Bits */
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81 | 80cabfad | bellard | #define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */ |
82 | 80cabfad | bellard | #define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */ |
83 | 80cabfad | bellard | #define KBD_MODE_SYS 0x04 /* The system flag (?) */ |
84 | 80cabfad | bellard | #define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */ |
85 | 80cabfad | bellard | #define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */ |
86 | 80cabfad | bellard | #define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */ |
87 | 80cabfad | bellard | #define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */ |
88 | 80cabfad | bellard | #define KBD_MODE_RFU 0x80 |
89 | 80cabfad | bellard | |
90 | 80cabfad | bellard | /* Mouse Commands */
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91 | 80cabfad | bellard | #define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */ |
92 | 80cabfad | bellard | #define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */ |
93 | 80cabfad | bellard | #define AUX_SET_RES 0xE8 /* Set resolution */ |
94 | 80cabfad | bellard | #define AUX_GET_SCALE 0xE9 /* Get scaling factor */ |
95 | 80cabfad | bellard | #define AUX_SET_STREAM 0xEA /* Set stream mode */ |
96 | 80cabfad | bellard | #define AUX_POLL 0xEB /* Poll */ |
97 | 80cabfad | bellard | #define AUX_RESET_WRAP 0xEC /* Reset wrap mode */ |
98 | 80cabfad | bellard | #define AUX_SET_WRAP 0xEE /* Set wrap mode */ |
99 | 80cabfad | bellard | #define AUX_SET_REMOTE 0xF0 /* Set remote mode */ |
100 | 80cabfad | bellard | #define AUX_GET_TYPE 0xF2 /* Get type */ |
101 | 80cabfad | bellard | #define AUX_SET_SAMPLE 0xF3 /* Set sample rate */ |
102 | 80cabfad | bellard | #define AUX_ENABLE_DEV 0xF4 /* Enable aux device */ |
103 | 80cabfad | bellard | #define AUX_DISABLE_DEV 0xF5 /* Disable aux device */ |
104 | 80cabfad | bellard | #define AUX_SET_DEFAULT 0xF6 |
105 | 80cabfad | bellard | #define AUX_RESET 0xFF /* Reset aux device */ |
106 | 80cabfad | bellard | #define AUX_ACK 0xFA /* Command byte ACK. */ |
107 | 80cabfad | bellard | |
108 | 80cabfad | bellard | #define MOUSE_STATUS_REMOTE 0x40 |
109 | 80cabfad | bellard | #define MOUSE_STATUS_ENABLED 0x20 |
110 | 80cabfad | bellard | #define MOUSE_STATUS_SCALE21 0x10 |
111 | 80cabfad | bellard | |
112 | daa57963 | bellard | #define KBD_PENDING_KBD 1 |
113 | daa57963 | bellard | #define KBD_PENDING_AUX 2 |
114 | 80cabfad | bellard | |
115 | 80cabfad | bellard | typedef struct KBDState { |
116 | 80cabfad | bellard | uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
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117 | 80cabfad | bellard | uint8_t status; |
118 | 80cabfad | bellard | uint8_t mode; |
119 | daa57963 | bellard | /* Bitmask of devices with data available. */
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120 | 7783e9f0 | pbrook | uint8_t pending; |
121 | daa57963 | bellard | void *kbd;
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122 | daa57963 | bellard | void *mouse;
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123 | b7678d96 | ths | |
124 | d537cf6c | pbrook | qemu_irq irq_kbd; |
125 | d537cf6c | pbrook | qemu_irq irq_mouse; |
126 | 4efbe58f | aurel32 | target_phys_addr_t mask; |
127 | 80cabfad | bellard | } KBDState; |
128 | 80cabfad | bellard | |
129 | b1d8e52e | blueswir1 | static KBDState kbd_state;
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130 | 80cabfad | bellard | |
131 | 80cabfad | bellard | /* update irq and KBD_STAT_[MOUSE_]OBF */
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132 | 80cabfad | bellard | /* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
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133 | 80cabfad | bellard | incorrect, but it avoids having to simulate exact delays */
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134 | 80cabfad | bellard | static void kbd_update_irq(KBDState *s) |
135 | 80cabfad | bellard | { |
136 | b7678d96 | ths | int irq_kbd_level, irq_mouse_level;
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137 | 80cabfad | bellard | |
138 | b7678d96 | ths | irq_kbd_level = 0;
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139 | b7678d96 | ths | irq_mouse_level = 0;
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140 | 80cabfad | bellard | s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF); |
141 | daa57963 | bellard | if (s->pending) {
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142 | 80cabfad | bellard | s->status |= KBD_STAT_OBF; |
143 | b92bb99b | ths | /* kbd data takes priority over aux data. */
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144 | daa57963 | bellard | if (s->pending == KBD_PENDING_AUX) {
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145 | 80cabfad | bellard | s->status |= KBD_STAT_MOUSE_OBF; |
146 | 80cabfad | bellard | if (s->mode & KBD_MODE_MOUSE_INT)
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147 | b7678d96 | ths | irq_mouse_level = 1;
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148 | 80cabfad | bellard | } else {
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149 | 5fafdf24 | ths | if ((s->mode & KBD_MODE_KBD_INT) &&
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150 | 80cabfad | bellard | !(s->mode & KBD_MODE_DISABLE_KBD)) |
151 | b7678d96 | ths | irq_kbd_level = 1;
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152 | 80cabfad | bellard | } |
153 | 80cabfad | bellard | } |
154 | d537cf6c | pbrook | qemu_set_irq(s->irq_kbd, irq_kbd_level); |
155 | d537cf6c | pbrook | qemu_set_irq(s->irq_mouse, irq_mouse_level); |
156 | 80cabfad | bellard | } |
157 | 80cabfad | bellard | |
158 | daa57963 | bellard | static void kbd_update_kbd_irq(void *opaque, int level) |
159 | 80cabfad | bellard | { |
160 | daa57963 | bellard | KBDState *s = (KBDState *)opaque; |
161 | 80cabfad | bellard | |
162 | daa57963 | bellard | if (level)
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163 | daa57963 | bellard | s->pending |= KBD_PENDING_KBD; |
164 | 80cabfad | bellard | else
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165 | daa57963 | bellard | s->pending &= ~KBD_PENDING_KBD; |
166 | 80cabfad | bellard | kbd_update_irq(s); |
167 | 80cabfad | bellard | } |
168 | 80cabfad | bellard | |
169 | daa57963 | bellard | static void kbd_update_aux_irq(void *opaque, int level) |
170 | 80cabfad | bellard | { |
171 | daa57963 | bellard | KBDState *s = (KBDState *)opaque; |
172 | daa57963 | bellard | |
173 | daa57963 | bellard | if (level)
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174 | daa57963 | bellard | s->pending |= KBD_PENDING_AUX; |
175 | daa57963 | bellard | else
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176 | daa57963 | bellard | s->pending &= ~KBD_PENDING_AUX; |
177 | daa57963 | bellard | kbd_update_irq(s); |
178 | 80cabfad | bellard | } |
179 | 80cabfad | bellard | |
180 | b41a2cd1 | bellard | static uint32_t kbd_read_status(void *opaque, uint32_t addr) |
181 | 80cabfad | bellard | { |
182 | b41a2cd1 | bellard | KBDState *s = opaque; |
183 | 80cabfad | bellard | int val;
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184 | 80cabfad | bellard | val = s->status; |
185 | 80cabfad | bellard | #if defined(DEBUG_KBD)
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186 | 80cabfad | bellard | printf("kbd: read status=0x%02x\n", val);
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187 | 80cabfad | bellard | #endif
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188 | 80cabfad | bellard | return val;
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189 | 80cabfad | bellard | } |
190 | 80cabfad | bellard | |
191 | daa57963 | bellard | static void kbd_queue(KBDState *s, int b, int aux) |
192 | daa57963 | bellard | { |
193 | daa57963 | bellard | if (aux)
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194 | daa57963 | bellard | ps2_queue(s->mouse, b); |
195 | daa57963 | bellard | else
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196 | daa57963 | bellard | ps2_queue(s->kbd, b); |
197 | daa57963 | bellard | } |
198 | daa57963 | bellard | |
199 | b41a2cd1 | bellard | static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) |
200 | 80cabfad | bellard | { |
201 | b41a2cd1 | bellard | KBDState *s = opaque; |
202 | 80cabfad | bellard | |
203 | 80cabfad | bellard | #ifdef DEBUG_KBD
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204 | 80cabfad | bellard | printf("kbd: write cmd=0x%02x\n", val);
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205 | 80cabfad | bellard | #endif
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206 | 80cabfad | bellard | switch(val) {
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207 | 80cabfad | bellard | case KBD_CCMD_READ_MODE:
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208 | 889bec69 | balrog | kbd_queue(s, s->mode, 0);
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209 | 80cabfad | bellard | break;
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210 | 80cabfad | bellard | case KBD_CCMD_WRITE_MODE:
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211 | 80cabfad | bellard | case KBD_CCMD_WRITE_OBUF:
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212 | 80cabfad | bellard | case KBD_CCMD_WRITE_AUX_OBUF:
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213 | 80cabfad | bellard | case KBD_CCMD_WRITE_MOUSE:
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214 | 80cabfad | bellard | case KBD_CCMD_WRITE_OUTPORT:
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215 | 80cabfad | bellard | s->write_cmd = val; |
216 | 80cabfad | bellard | break;
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217 | 80cabfad | bellard | case KBD_CCMD_MOUSE_DISABLE:
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218 | 80cabfad | bellard | s->mode |= KBD_MODE_DISABLE_MOUSE; |
219 | 80cabfad | bellard | break;
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220 | 80cabfad | bellard | case KBD_CCMD_MOUSE_ENABLE:
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221 | 80cabfad | bellard | s->mode &= ~KBD_MODE_DISABLE_MOUSE; |
222 | 80cabfad | bellard | break;
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223 | 80cabfad | bellard | case KBD_CCMD_TEST_MOUSE:
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224 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
225 | 80cabfad | bellard | break;
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226 | 80cabfad | bellard | case KBD_CCMD_SELF_TEST:
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227 | 80cabfad | bellard | s->status |= KBD_STAT_SELFTEST; |
228 | 80cabfad | bellard | kbd_queue(s, 0x55, 0); |
229 | 80cabfad | bellard | break;
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230 | 80cabfad | bellard | case KBD_CCMD_KBD_TEST:
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231 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
232 | 80cabfad | bellard | break;
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233 | 80cabfad | bellard | case KBD_CCMD_KBD_DISABLE:
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234 | 80cabfad | bellard | s->mode |= KBD_MODE_DISABLE_KBD; |
235 | 80cabfad | bellard | kbd_update_irq(s); |
236 | 80cabfad | bellard | break;
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237 | 80cabfad | bellard | case KBD_CCMD_KBD_ENABLE:
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238 | 80cabfad | bellard | s->mode &= ~KBD_MODE_DISABLE_KBD; |
239 | 80cabfad | bellard | kbd_update_irq(s); |
240 | 80cabfad | bellard | break;
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241 | 80cabfad | bellard | case KBD_CCMD_READ_INPORT:
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242 | 80cabfad | bellard | kbd_queue(s, 0x00, 0); |
243 | 80cabfad | bellard | break;
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244 | 80cabfad | bellard | case KBD_CCMD_READ_OUTPORT:
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245 | 80cabfad | bellard | /* XXX: check that */
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246 | 80cabfad | bellard | #ifdef TARGET_I386
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247 | c68ea704 | bellard | val = 0x01 | (ioport_get_a20() << 1); |
248 | 80cabfad | bellard | #else
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249 | 80cabfad | bellard | val = 0x01;
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250 | 80cabfad | bellard | #endif
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251 | 80cabfad | bellard | if (s->status & KBD_STAT_OBF)
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252 | 80cabfad | bellard | val |= 0x10;
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253 | 80cabfad | bellard | if (s->status & KBD_STAT_MOUSE_OBF)
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254 | 80cabfad | bellard | val |= 0x20;
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255 | 80cabfad | bellard | kbd_queue(s, val, 0);
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256 | 80cabfad | bellard | break;
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257 | 80cabfad | bellard | #ifdef TARGET_I386
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258 | 80cabfad | bellard | case KBD_CCMD_ENABLE_A20:
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259 | c68ea704 | bellard | ioport_set_a20(1);
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260 | 80cabfad | bellard | break;
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261 | 80cabfad | bellard | case KBD_CCMD_DISABLE_A20:
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262 | c68ea704 | bellard | ioport_set_a20(0);
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263 | 80cabfad | bellard | break;
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264 | 80cabfad | bellard | #endif
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265 | 80cabfad | bellard | case KBD_CCMD_RESET:
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266 | d7d02e3c | bellard | qemu_system_reset_request(); |
267 | 80cabfad | bellard | break;
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268 | 80cabfad | bellard | case 0xff: |
269 | 80cabfad | bellard | /* ignore that - I don't know what is its use */
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270 | 80cabfad | bellard | break;
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271 | 80cabfad | bellard | default:
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272 | 80cabfad | bellard | fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
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273 | 80cabfad | bellard | break;
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274 | 80cabfad | bellard | } |
275 | 80cabfad | bellard | } |
276 | 80cabfad | bellard | |
277 | b41a2cd1 | bellard | static uint32_t kbd_read_data(void *opaque, uint32_t addr) |
278 | 80cabfad | bellard | { |
279 | b41a2cd1 | bellard | KBDState *s = opaque; |
280 | e41c0f26 | balrog | uint32_t val; |
281 | 80cabfad | bellard | |
282 | daa57963 | bellard | if (s->pending == KBD_PENDING_AUX)
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283 | e41c0f26 | balrog | val = ps2_read_data(s->mouse); |
284 | e41c0f26 | balrog | else
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285 | e41c0f26 | balrog | val = ps2_read_data(s->kbd); |
286 | 80cabfad | bellard | |
287 | e41c0f26 | balrog | #if defined(DEBUG_KBD)
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288 | e41c0f26 | balrog | printf("kbd: read data=0x%02x\n", val);
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289 | e41c0f26 | balrog | #endif
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290 | e41c0f26 | balrog | return val;
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291 | 80cabfad | bellard | } |
292 | 80cabfad | bellard | |
293 | 9596ebb7 | pbrook | static void kbd_write_data(void *opaque, uint32_t addr, uint32_t val) |
294 | 80cabfad | bellard | { |
295 | b41a2cd1 | bellard | KBDState *s = opaque; |
296 | 80cabfad | bellard | |
297 | 80cabfad | bellard | #ifdef DEBUG_KBD
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298 | 80cabfad | bellard | printf("kbd: write data=0x%02x\n", val);
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299 | 80cabfad | bellard | #endif
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300 | 80cabfad | bellard | |
301 | 80cabfad | bellard | switch(s->write_cmd) {
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302 | 80cabfad | bellard | case 0: |
303 | daa57963 | bellard | ps2_write_keyboard(s->kbd, val); |
304 | 80cabfad | bellard | break;
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305 | 80cabfad | bellard | case KBD_CCMD_WRITE_MODE:
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306 | 80cabfad | bellard | s->mode = val; |
307 | f94f5d71 | pbrook | ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
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308 | daa57963 | bellard | /* ??? */
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309 | 80cabfad | bellard | kbd_update_irq(s); |
310 | 80cabfad | bellard | break;
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311 | 80cabfad | bellard | case KBD_CCMD_WRITE_OBUF:
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312 | 80cabfad | bellard | kbd_queue(s, val, 0);
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313 | 80cabfad | bellard | break;
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314 | 80cabfad | bellard | case KBD_CCMD_WRITE_AUX_OBUF:
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315 | 80cabfad | bellard | kbd_queue(s, val, 1);
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316 | 80cabfad | bellard | break;
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317 | 80cabfad | bellard | case KBD_CCMD_WRITE_OUTPORT:
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318 | 80cabfad | bellard | #ifdef TARGET_I386
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319 | c68ea704 | bellard | ioport_set_a20((val >> 1) & 1); |
320 | 80cabfad | bellard | #endif
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321 | 80cabfad | bellard | if (!(val & 1)) { |
322 | d7d02e3c | bellard | qemu_system_reset_request(); |
323 | 80cabfad | bellard | } |
324 | 80cabfad | bellard | break;
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325 | 80cabfad | bellard | case KBD_CCMD_WRITE_MOUSE:
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326 | daa57963 | bellard | ps2_write_mouse(s->mouse, val); |
327 | 80cabfad | bellard | break;
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328 | 80cabfad | bellard | default:
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329 | 80cabfad | bellard | break;
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330 | 80cabfad | bellard | } |
331 | 80cabfad | bellard | s->write_cmd = 0;
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332 | 80cabfad | bellard | } |
333 | 80cabfad | bellard | |
334 | d7d02e3c | bellard | static void kbd_reset(void *opaque) |
335 | 80cabfad | bellard | { |
336 | d7d02e3c | bellard | KBDState *s = opaque; |
337 | 80cabfad | bellard | |
338 | 80cabfad | bellard | s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT; |
339 | 80cabfad | bellard | s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED; |
340 | 80cabfad | bellard | } |
341 | 80cabfad | bellard | |
342 | 675376f2 | bellard | static void kbd_save(QEMUFile* f, void* opaque) |
343 | 675376f2 | bellard | { |
344 | 675376f2 | bellard | KBDState *s = (KBDState*)opaque; |
345 | 3b46e624 | ths | |
346 | 675376f2 | bellard | qemu_put_8s(f, &s->write_cmd); |
347 | 675376f2 | bellard | qemu_put_8s(f, &s->status); |
348 | 675376f2 | bellard | qemu_put_8s(f, &s->mode); |
349 | 7783e9f0 | pbrook | qemu_put_8s(f, &s->pending); |
350 | 675376f2 | bellard | } |
351 | 675376f2 | bellard | |
352 | 675376f2 | bellard | static int kbd_load(QEMUFile* f, void* opaque, int version_id) |
353 | 675376f2 | bellard | { |
354 | 675376f2 | bellard | KBDState *s = (KBDState*)opaque; |
355 | 3b46e624 | ths | |
356 | 7783e9f0 | pbrook | if (version_id != 3) |
357 | 675376f2 | bellard | return -EINVAL;
|
358 | 675376f2 | bellard | qemu_get_8s(f, &s->write_cmd); |
359 | 675376f2 | bellard | qemu_get_8s(f, &s->status); |
360 | 675376f2 | bellard | qemu_get_8s(f, &s->mode); |
361 | 7783e9f0 | pbrook | qemu_get_8s(f, &s->pending); |
362 | 675376f2 | bellard | return 0; |
363 | 675376f2 | bellard | } |
364 | 675376f2 | bellard | |
365 | d537cf6c | pbrook | void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
|
366 | 80cabfad | bellard | { |
367 | b41a2cd1 | bellard | KBDState *s = &kbd_state; |
368 | b7678d96 | ths | |
369 | d537cf6c | pbrook | s->irq_kbd = kbd_irq; |
370 | d537cf6c | pbrook | s->irq_mouse = mouse_irq; |
371 | b92bb99b | ths | |
372 | b41a2cd1 | bellard | kbd_reset(s); |
373 | 7783e9f0 | pbrook | register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s); |
374 | b7678d96 | ths | register_ioport_read(io_base, 1, 1, kbd_read_data, s); |
375 | b7678d96 | ths | register_ioport_write(io_base, 1, 1, kbd_write_data, s); |
376 | b7678d96 | ths | register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s); |
377 | b7678d96 | ths | register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s); |
378 | 63066f4f | bellard | |
379 | daa57963 | bellard | s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
380 | daa57963 | bellard | s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
381 | 548df2ac | ths | #ifdef TARGET_I386
|
382 | 548df2ac | ths | vmmouse_init(s->mouse); |
383 | 548df2ac | ths | #endif
|
384 | d7d02e3c | bellard | qemu_register_reset(kbd_reset, s); |
385 | 80cabfad | bellard | } |
386 | b92bb99b | ths | |
387 | b92bb99b | ths | /* Memory mapped interface */
|
388 | 9596ebb7 | pbrook | static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr) |
389 | b92bb99b | ths | { |
390 | b92bb99b | ths | KBDState *s = opaque; |
391 | b92bb99b | ths | |
392 | 4efbe58f | aurel32 | if (addr & s->mask)
|
393 | 80355292 | ths | return kbd_read_status(s, 0) & 0xff; |
394 | 4efbe58f | aurel32 | else
|
395 | 4efbe58f | aurel32 | return kbd_read_data(s, 0) & 0xff; |
396 | b92bb99b | ths | } |
397 | b92bb99b | ths | |
398 | 9596ebb7 | pbrook | static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) |
399 | b92bb99b | ths | { |
400 | b92bb99b | ths | KBDState *s = opaque; |
401 | b92bb99b | ths | |
402 | 4efbe58f | aurel32 | if (addr & s->mask)
|
403 | 80355292 | ths | kbd_write_command(s, 0, value & 0xff); |
404 | 4efbe58f | aurel32 | else
|
405 | 4efbe58f | aurel32 | kbd_write_data(s, 0, value & 0xff); |
406 | b92bb99b | ths | } |
407 | b92bb99b | ths | |
408 | b92bb99b | ths | static CPUReadMemoryFunc *kbd_mm_read[] = {
|
409 | b92bb99b | ths | &kbd_mm_readb, |
410 | b92bb99b | ths | &kbd_mm_readb, |
411 | b92bb99b | ths | &kbd_mm_readb, |
412 | b92bb99b | ths | }; |
413 | b92bb99b | ths | |
414 | b92bb99b | ths | static CPUWriteMemoryFunc *kbd_mm_write[] = {
|
415 | b92bb99b | ths | &kbd_mm_writeb, |
416 | b92bb99b | ths | &kbd_mm_writeb, |
417 | b92bb99b | ths | &kbd_mm_writeb, |
418 | b92bb99b | ths | }; |
419 | b92bb99b | ths | |
420 | 71db710f | blueswir1 | void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
|
421 | 4efbe58f | aurel32 | target_phys_addr_t base, ram_addr_t size, |
422 | 4efbe58f | aurel32 | target_phys_addr_t mask) |
423 | b92bb99b | ths | { |
424 | b92bb99b | ths | KBDState *s = &kbd_state; |
425 | b92bb99b | ths | int s_io_memory;
|
426 | b92bb99b | ths | |
427 | b92bb99b | ths | s->irq_kbd = kbd_irq; |
428 | b92bb99b | ths | s->irq_mouse = mouse_irq; |
429 | 4efbe58f | aurel32 | s->mask = mask; |
430 | b92bb99b | ths | |
431 | b92bb99b | ths | kbd_reset(s); |
432 | b92bb99b | ths | register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s); |
433 | b92bb99b | ths | s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
|
434 | 4efbe58f | aurel32 | cpu_register_physical_memory(base, size, s_io_memory); |
435 | b92bb99b | ths | |
436 | b92bb99b | ths | s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s); |
437 | b92bb99b | ths | s->mouse = ps2_mouse_init(kbd_update_aux_irq, s); |
438 | b92bb99b | ths | #ifdef TARGET_I386
|
439 | b92bb99b | ths | vmmouse_init(s->mouse); |
440 | b92bb99b | ths | #endif
|
441 | b92bb99b | ths | qemu_register_reset(kbd_reset, s); |
442 | b92bb99b | ths | } |