Revision 4c9e975d
| b/hw/lm32_boards.c | ||
|---|---|---|
| 28 | 28 |
#include "elf.h" |
| 29 | 29 |
#include "lm32_hwsetup.h" |
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#include "lm32.h" |
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#include "exec-memory.h" |
|
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|
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typedef struct {
|
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CPUState *env; |
| ... | ... | |
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{
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CPUState *env; |
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DriveInfo *dinfo; |
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ram_addr_t phys_ram; |
|
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MemoryRegion *address_space_mem = get_system_memory(); |
|
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MemoryRegion *phys_ram = g_new(MemoryRegion, 1); |
|
| 80 | 82 |
MemoryRegion *phys_flash = g_new(MemoryRegion, 1); |
| 81 | 83 |
qemu_irq *cpu_irq, irq[32]; |
| 82 | 84 |
ResetInfo *reset_info; |
| ... | ... | |
| 105 | 107 |
|
| 106 | 108 |
reset_info->flash_base = flash_base; |
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|
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phys_ram = qemu_ram_alloc(NULL, "lm32_evr.sdram", ram_size);
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|
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cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
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memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size);
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memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
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|
| 110 | 112 |
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memory_region_init_rom_device(phys_flash, &pflash_cfi02_ops_be, |
| 112 | 114 |
NULL, "lm32_evr.flash", flash_size); |
| ... | ... | |
| 165 | 167 |
{
|
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CPUState *env; |
| 167 | 169 |
DriveInfo *dinfo; |
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ram_addr_t phys_ram; |
|
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MemoryRegion *address_space_mem = get_system_memory(); |
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MemoryRegion *phys_ram = g_new(MemoryRegion, 1); |
|
| 169 | 172 |
MemoryRegion *phys_flash = g_new(MemoryRegion, 1); |
| 170 | 173 |
qemu_irq *cpu_irq, irq[32]; |
| 171 | 174 |
HWSetup *hw; |
| ... | ... | |
| 201 | 204 |
|
| 202 | 205 |
reset_info->flash_base = flash_base; |
| 203 | 206 |
|
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phys_ram = qemu_ram_alloc(NULL, "lm32_uclinux.sdram", ram_size);
|
|
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cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM);
|
|
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memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size);
|
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memory_region_add_subregion(address_space_mem, ram_base, phys_ram);
|
|
| 206 | 209 |
|
| 207 | 210 |
memory_region_init_rom_device(phys_flash, &pflash_cfi01_ops_be, |
| 208 | 211 |
NULL, "lm32_uclinux.flash", flash_size); |
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