x86: Implement SMEP and SMAP
This patch implements Supervisor Mode Execution Prevention (SMEP) andSupervisor Mode Access Prevention (SMAP) for x86. The purpose of thepatch, obviously, is to help kernel developers debug the support forthose features....
i386: -cpu help: remove reference to specific CPUID leaves/registers
The -cpu configuration interface is based on a list of feature names orproperties, on a single namespace, so there's no need to mention onwhich CPUID leaf/register each flag is located....
i386: cpu: eliminate duplicate feature names
Instead of having duplicate feature names on the ext2_feature array forthe AMD feature bit aliases, we keep the feature names only on thefeature_name[] array, and copy the corresponding bits tocpuid_ext2_features in case the CPU vendor is AMD....
i386: cpu: replace EXT2_FEATURE_MASK with CPUID_EXT2_AMD_ALIASES
Both constants have the same value, but CPUID_EXT2_AMD_ALIASES isdefined without using magic numbers.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Don Slutz <Don@CloudSwitch.com>...
i386: kvm: use a #define for the set of alias feature bits
Instea of using a hardcoded hex constant, define CPUID_EXT2_AMD_ALIASESas the set of CPUID[8000_0001].EDX bits that on AMD are the same as thebits of CPUID1.EDX.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>...
i386: kvm: bit 10 of CPUID[8000_0001].EDX is reserved
Bit 10 of CPUID[8000_0001].EDX is not defined as an alias ofCPUID1.EDX10, so do not duplicate it onkvm_arch_get_supported_cpuid().
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-By: Igor Mammedov <imammedo@redhat.com>...
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
For all targets that currently call tcg_gen_debug_insn_start,add CPU_LOG_TB_OP_OPT to the condition that gates it.
This is useful for comparing optimization dumps, when thepre-optimization dump is merely noise....
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
target-i386: Allow tsc-frequency to be larger then 2.147G
The check using INT_MAX (2147483647) is wrong in this case.
Signed-off-by: Fred Oliveira <foliveira@cloudswitch.com>Signed-off-by: Don Slutz <Don@CloudSwitch.com>Signed-off-by: Stefan Hajnoczi <stefanha@gmail.com>
target-i386: Drop unused setscalar() macro
It was only used by now removed setfeatures() function.
Suggested-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Fold -cpu ?cpuid, ?model output into -cpu help, drop ?dump
Commit c8057f95 (accidentally) disabled the ability to passoption strings starting with '?' to the target-specificcpu_list function, so the target-i386 specific "-cpu ?dump","-cpu ?cpuid" and "-cpu ?model" stopped working....
Drop cpu_list_id macro
Since the only user of the extended cpu_list_id() formatwas the x86 ?model/?dump/?cpuid output, we can drop itcompletely.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>...
target-i386: Add missing CPUID_* constants
Those constants will be used by new CPU model definitions.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Move CPU models from cpus-x86_64.conf to C
Those models are maintained by QEMU and may require compatibility codeto be added when making some changes. Keeping the data in the C sourcecode should make it simpler to handle those details.
target-i386: x86_cpudef_setup() coding style change
Make source code lines shorter.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Don Slutz <Don@CloudSwitch.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Kill cpudef config section support
It's nice to have a flexible system to maintain CPU models as data, butthis is holding us from making improvements in the CPU code because it'snot using the common infra-structure, and because the machine-type data...
kvm: i386: Add services required for PCI device assignment
These helpers abstract the interaction of upcoming pci-assign with theKVM kernel services. Put them under i386 only as other archs willimplement device pass-through via VFIO and not this classic interface....
w32: Fix broken build
Commit ef8621b1a3b199c348606c0a11a77d8e8bf135f1 added an includefile which is not available for MinGW compilations.
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
kvm: get/set PV EOI MSR
Support get/set of new PV EOI MSR, for migration.Add an optional section for MSR value - send itout in case MSR was changed from the default value (0).
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-i386: disable pv eoi to fix migration across QEMU versions
We have a problem with how we handle migration with KVM paravirt features.We unconditionally enable paravirt features regardless of whether we know howto migrate them.
We also don't tie paravirt features to specific machine types so an old QEMU on...
target-i386/translate.c: mov to/from crN/drN: ignore mod bits
This instruction is always treated as a register-to-register (MOD = 11)instruction, regardless of the encoding of the MOD field in the MODR/Mbyte.
Also, Microport UNIX System V/386 v 2.1 (ca 1987) runs fine on...
win32: provide separate macros for weak decls and definitions
mingw32 seems to want the declaration to also carry the weak attribute.Strangely, gcc on Linux absolutely does not want the declaration to be markedas weak. This may not be the right fix, but it seems to do the trick....
x86: avoid AREG0 for misc helpers
Add an explicit CPUX86State parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
x86: avoid AREG0 in segmentation helpers
Rename remains of op_helper.c to seg_helper.c.
x86: switch to AREG0 free mode
Remove temporary wrappers and switch to AREG0 free mode.
x86: avoid AREG0 for FPU helpers
Make FPU helpers take a parameter for CPUState insteadof relying on global env.
Introduce temporary wrappers for FPU load and store ops. Removewrappers for non-AREG0 code. Don't call unconverted helpersdirectly.
x86: avoid AREG0 for condition code helpers
x86: avoid AREG0 for integer helpers
x86: avoid AREG0 for SVM helpers
x86: avoid AREG0 for SMM helpers
x86: use wrappers for memory access helpers
Switch to wrapped versions of memory access functions.
Merge remote-tracking branch 'qmp/queue/qmp' into staging
target-i386: add implementation of query-cpu-definitions (v2)
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
Merge branch 'x86cpu_qom_tcg_v2' of git://github.com/imammedo/qemu
kvm: Decouple 'GSI routing' from 'kernel irqchip'
Don't assume having an in-kernel irqchip means that GSIrouting is enabled.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Avi Kivity <avi@redhat.com>
kvm: Decouple 'irqfds usable' from 'kernel irqchip'
Instead of assuming that we can use irqfds if and only ifkvm_irqchip_in_kernel(), add a bool to the KVMState whichindicates this, and is set only on x86 and only if theirqchip is in the kernel.
The kernel documentation implies that the only thing...
kvm: Decouple 'MSI routing via irqfds' from 'kernel irqchip'
Decouple another x86-specific assumption about what irqchips imply.
kvm: Move kvm_allows_irq0_override() to target-i386, fix return type
kvm_allows_irq0_override() is a totally x86 specific concept:move it to the target-specific source file where it belongs.This means we need a new header file for the prototype:kvm_i386.h, in line with the existing kvm_ppc.h....
target-i386: move cpu halted decision into x86_cpu_reset
MP initialization protocol differs between cpu families, and for P6 andonward models it is up to CPU to decide if it will be BSP using thisprotocol, so try to model this. However there is no point in implementing...
target-i386: move cpu_reset and reset callback to cpu.c
Moving reset callback into cpu object from board level andresetting cpu at the end of x86_cpu_realize() will allow properlycreate cpu object during run-time (hotplug) without calling reset externaly....
x86: Fixed incorrect segment base address addition in 64-bits mode
According to the Intel manual"Intel® 64 and IA-32 Architectures Software Developer’s ManualVolume 3", "3.4.4 Segment Loading Instructions in IA-32e Mode":
"When in compatibility mode, FS and GS overrides operate as defined by...
Recognize PCID feature
This patch makes Qemu recognize the PCID feature specified from configuration or command line options.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
apic: Defer interrupt updates to VCPU thread
KVM performs TPR raising asynchronously to QEMU, specifically outsideQEMU's global lock. When an interrupt is injected into the APIC and TPRis checked to decide if this can be delivered, a stale TPR value may be...
target-i386: make it clearer that op table accesses don't overrun
Rephrase some of the expressions used to select an entryin the SSE op table arrays so that it's clearer that theydon't overrun the op table array size.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
target-i386: Remove confusing X86_64_DEF macro
The X86_64_DEF macro is a confusing way of making some termsin a conditional only appear if TARGET_X86_64 is defined. Weonly use it in two places, and in both cases this is for makingthe same test, so abstract that check out into a function...
target-i386: Remove unused macros
Commit 11f8cdb removed all the uses of the X86_64_ONLYmacro. The BUGGY_64() macro has been unused for a long time:it originally marked some ops which couldn't be enabledbecause of issues with the pre-TCG code generation scheme....
target-i386: Fix compilation with --enable-debug
commit c4baa0503d9623f1ce891f525ccd140c598bc29a improved SSE tabletype safety which now raises compiler errors when latest QEMU wasconfigured with --enable-debug.
Fix this by splitting the SSE tables even further to separate...
kvm: expose tsc deadline timer feature to guest
This patch exposes tsc deadline timer feature to guest if1). in-kernel irqchip is used, and2). kvm has emulated tsc deadline timer, and3). user authorize the feature exposing via cpu or +/ tsc-deadline...
kvm_pv_eoi: add flag support
Support the new PV EOI flag in kvm - it recently got mergedinto kvm.git. Set by default with -cpu kvm.Set for -cpu qemu by adding +kvm_pv_eoi.Clear by adding -kvm_pv_eoi to -cpu option.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>...
x86: split off SVM helpers
Move SVM helpers to svm_helper.c.
x86: split off SMM helpers
Move SMM helpers to smm_helper.c.
x86: split off misc helpers
Move various functions to misc_helper.c.
x86: split off memory access helpers
Move memory access helpers to mem_helper.c.
x86: rename op_helper.c to seg_helper.c
Rename what is remaining of op_helper.c to seg_helper.c.
x86: prepare op_helper.c for splitting
Fix coding style and a few typos.
x86: avoid AREG0 for exceptions
Merge raise_exception_env() to raise_exception(), likewise withraise_exception_err_env() and raise_exception_err().
Introduce cpu_svm_check_intercept_param() and cpu_vmexit()...
x86: split off exception handlers
Move exception handlers from op_helper.c to excp_helper.c.
x86: avoid an extern declaration
After the previous patch, we can use the properdeclaration in a common header file.
x86: fix coding style in ops_sse.h
Fix coding style in ops_sse.h before next commit.
x86: split off FPU helpers
Move FPU and MMX/SSE helpers to fpu_helpers.c.
x86: improve SSE table type safety
SSE function tables could easily be corrupted because of useof void pointers.
Introduce function pointer types and helper variables in orderto improve type safety.
Split sse_op_table3 according to types used.
x86: fix coding style in helper_template.h
Fix coding style in helper_template.h before next commit.
x86: split condition code and shift templates
Move shift templates from helper_template.h toshift_helper_template.h and the condition code helpersto cc_helper_template.h.
x86: prepare eflags helpers for general use
Adjust function names and add an explicit CPUX86Stateparameter instead of relying on AREG0.
x86: split off condition code helpers
Move condition code helpers to cc_helper.c.
Move the shared inline functions lshift(), cpu_load_eflags() andcpu_cc_compute_all() to cpu.h.
x86: split off integer helpers
Move integer and bit field helpers to int_helper.c.
target-i386: move tcg initialization into x86_cpu_initfn()
In order to make cpu object not depended on external ad-hocinitialization routines, move tcg initialization from cpu_x86_initinside cpu object "x86_cpu_initfn()".
Signed-off-by: Igor Mammedov <imammedo@redhat.com>...
target-i386: drop usage of prev_debug_excp_handler
Chains of exception handlers are currently unused feature, drop itfor now so as not to expose prev_debug_excp_handler at globalscope when moving tcg initialization into target-i386/cpu.c
Later we probably could re-invent better interface for this....
target-i386: Use QEMU instead of Qemu
This new 'QEmu' was recently added.Replace it by the official all upper case 'QEMU'.
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Alexander Graf <agraf@suse.de>
Allow machines to configure the QEMU_VERSION that's exposed via hardware
QEMU exposes its version to the guest's hardware and in some cases that is wrong(e.g. Windows prints messages about driver updates when you switchthe QEMU version).There is a new field now on the struct QEmuMachine, hw_version, which may...
Fix some more license versions (GPL2+ instead of GPL2)
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
target-i386: Use uint32 visitor for [x]level properties
This simplifies the code and resolves TODOs.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
build: move other target-*/ objects to nested Makefile.objs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
dump: remove dumping stuff from cpu-all.h
This simplifies things, because they will only be included for softmmutargets and because the stubs are taken out-of-line in separate files,which in the future could even be compiled only once.
dump: change cpu_get_note_size to return ssize_t
So that it can use the same prototype in both cases.
build: move libobj-y variable to nested Makefile.objs
build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.
Kill off cpu_state_reset()
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()that would operate on QOM objects.
All callers have been updated except for one in target-mips, so drop all...
target-i386: Pass X86CPU to do_cpu_{init,sipi}()
Allows to use cpu_reset() in place of cpu_state_reset().
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
target-i386: Let cpu_x86_init() return X86CPU
Turn cpu_init macro into a static inline function returning CPUX86Statefor backwards compatibility.
target-i386: Add API to write elf notes to core file
The core file contains register's value. These APIs write registers tocore file, and them will be called in the following patch.
Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
target-i386: Add API to write cpu status to core file
The core file has register's value. But it does not include all registers value.Store the cpu status into QEMU note, and the user can get more informationfrom vmcore. If you change QEMUCPUState, please count up QEMUCPUSTATE_VERSION....
target-i386: add API to get dump info
Dump info contains: endian, class and architecture. The nextpatch will use these information to create vmcore. Note: onx86 box, the class is ELFCLASS64 if the memory is larger than 4G.
Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>...
target-i386: Add API to get note's size
We should know where the note and memory is stored before writingthem to vmcore. If we know this, we can avoid using lseek() whencreating vmcore.
implement cpu_get_memory_mapping()
Walk cpu's page table and collect all virtual address and physical address mapping.Then, add these mapping into memory mapping list. If the guest does not use paging,it will do nothing. Note: the I/O memory will be skipped....
Add API to check whether paging mode is enabled
This API will be used in the following patch.
Expose CPUID leaf 7 only for -cpu host
Changes v2 -> v3; - Check for kvm_enabled() before setting cpuid_7_0_ebx_features
Changes v1 -> v2: - Use kvm_arch_get_supported_cpuid() instead of host_cpuid() on cpu_x86_fill_host().
We should use GET_SUPPORTED_CPUID for all bits on "-cpu host"...
target-i386: Defer MCE init
Commit de024815e3b523addf58f1f79846b7fe74643678 (target-i386: QOM'ifyCPU init) moved mce_init() call from helper.c:cpu_x86_init() intoX86CPU's cpu.c:x86_cpu_initfn().mce_init() checks for a family >= 6 though, so we could end up with a...
target-i386: Introduce "xlevel" property for X86CPU
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>Reviewed-by: Igor Mammedov <imammedo@redhat.com>
target-i386: Prepare "vendor" property for X86CPU
Using it now would incur converting the three x86_def_t vendor wordsinto a string for object_property_set_str(), then back to three wordsin the "vendor" setter.The built-in CPU definitions use numeric preprocessor defines to...
target-i386: Introduce "tsc-frequency" property for X86CPU
Use Hz as unit.
target-i386: Add property getter for CPU family
target-i386: Add property getter for CPU model
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Igor Mammedov <imammedo@redhat.com>Reviewed-by: Michael Roth <mdroth@linux.vnet.ibm.com>
target-i386: Add property getter for CPU stepping
target-i386: Add property getter for CPU model-id
target-i386: Introduce "level" property for X86CPU