root / hw / pl041.h @ 4f588b15
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1 | d028d02d | Mathieu Sonet | /*
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2 | d028d02d | Mathieu Sonet | * Arm PrimeCell PL041 Advanced Audio Codec Interface
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3 | d028d02d | Mathieu Sonet | *
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4 | d028d02d | Mathieu Sonet | * Copyright (c) 2011
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5 | d028d02d | Mathieu Sonet | * Written by Mathieu Sonet - www.elasticsheep.com
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6 | d028d02d | Mathieu Sonet | *
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7 | 4d8db4e4 | Stefan Weil | * This code is licensed under the GPL.
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8 | d028d02d | Mathieu Sonet | *
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9 | d028d02d | Mathieu Sonet | * *****************************************************************
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10 | d028d02d | Mathieu Sonet | */
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11 | d028d02d | Mathieu Sonet | |
12 | d028d02d | Mathieu Sonet | #ifndef HW_PL041_H
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13 | d028d02d | Mathieu Sonet | #define HW_PL041_H
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14 | d028d02d | Mathieu Sonet | |
15 | d028d02d | Mathieu Sonet | /* Register file */
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16 | d028d02d | Mathieu Sonet | #define REGISTER(name, offset) uint32_t name;
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17 | d028d02d | Mathieu Sonet | typedef struct { |
18 | d028d02d | Mathieu Sonet | #include "pl041.hx" |
19 | d028d02d | Mathieu Sonet | } pl041_regfile; |
20 | d028d02d | Mathieu Sonet | #undef REGISTER
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21 | d028d02d | Mathieu Sonet | |
22 | d028d02d | Mathieu Sonet | /* Register addresses */
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23 | d028d02d | Mathieu Sonet | #define REGISTER(name, offset) PL041_##name = offset, |
24 | d028d02d | Mathieu Sonet | enum {
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25 | d028d02d | Mathieu Sonet | #include "pl041.hx" |
26 | d028d02d | Mathieu Sonet | |
27 | d028d02d | Mathieu Sonet | PL041_periphid0 = 0xFE0,
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28 | d028d02d | Mathieu Sonet | PL041_periphid1 = 0xFE4,
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29 | d028d02d | Mathieu Sonet | PL041_periphid2 = 0xFE8,
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30 | d028d02d | Mathieu Sonet | PL041_periphid3 = 0xFEC,
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31 | d028d02d | Mathieu Sonet | PL041_pcellid0 = 0xFF0,
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32 | d028d02d | Mathieu Sonet | PL041_pcellid1 = 0xFF4,
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33 | d028d02d | Mathieu Sonet | PL041_pcellid2 = 0xFF8,
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34 | d028d02d | Mathieu Sonet | PL041_pcellid3 = 0xFFC,
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35 | d028d02d | Mathieu Sonet | }; |
36 | d028d02d | Mathieu Sonet | #undef REGISTER
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37 | d028d02d | Mathieu Sonet | |
38 | d028d02d | Mathieu Sonet | /* Register bits */
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39 | d028d02d | Mathieu Sonet | |
40 | d028d02d | Mathieu Sonet | /* IEx */
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41 | d028d02d | Mathieu Sonet | #define TXCIE (1 << 0) |
42 | d028d02d | Mathieu Sonet | #define RXTIE (1 << 1) |
43 | d028d02d | Mathieu Sonet | #define TXIE (1 << 2) |
44 | d028d02d | Mathieu Sonet | #define RXIE (1 << 3) |
45 | d028d02d | Mathieu Sonet | #define RXOIE (1 << 4) |
46 | d028d02d | Mathieu Sonet | #define TXUIE (1 << 5) |
47 | d028d02d | Mathieu Sonet | #define RXTOIE (1 << 6) |
48 | d028d02d | Mathieu Sonet | |
49 | d028d02d | Mathieu Sonet | /* TXCRx */
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50 | d028d02d | Mathieu Sonet | #define TXEN (1 << 0) |
51 | d028d02d | Mathieu Sonet | #define TXSLOT1 (1 << 1) |
52 | d028d02d | Mathieu Sonet | #define TXSLOT2 (1 << 2) |
53 | d028d02d | Mathieu Sonet | #define TXSLOT3 (1 << 3) |
54 | d028d02d | Mathieu Sonet | #define TXSLOT4 (1 << 4) |
55 | d028d02d | Mathieu Sonet | #define TXCOMPACT (1 << 15) |
56 | d028d02d | Mathieu Sonet | #define TXFEN (1 << 16) |
57 | d028d02d | Mathieu Sonet | |
58 | d028d02d | Mathieu Sonet | #define TXSLOT_MASK_BIT (1) |
59 | d028d02d | Mathieu Sonet | #define TXSLOT_MASK (0xFFF << TXSLOT_MASK_BIT) |
60 | d028d02d | Mathieu Sonet | |
61 | d028d02d | Mathieu Sonet | #define TSIZE_MASK_BIT (13) |
62 | d028d02d | Mathieu Sonet | #define TSIZE_MASK (0x3 << TSIZE_MASK_BIT) |
63 | d028d02d | Mathieu Sonet | |
64 | d028d02d | Mathieu Sonet | #define TSIZE_16BITS (0x0 << TSIZE_MASK_BIT) |
65 | d028d02d | Mathieu Sonet | #define TSIZE_18BITS (0x1 << TSIZE_MASK_BIT) |
66 | d028d02d | Mathieu Sonet | #define TSIZE_20BITS (0x2 << TSIZE_MASK_BIT) |
67 | d028d02d | Mathieu Sonet | #define TSIZE_12BITS (0x3 << TSIZE_MASK_BIT) |
68 | d028d02d | Mathieu Sonet | |
69 | d028d02d | Mathieu Sonet | /* SRx */
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70 | d028d02d | Mathieu Sonet | #define RXFE (1 << 0) |
71 | d028d02d | Mathieu Sonet | #define TXFE (1 << 1) |
72 | d028d02d | Mathieu Sonet | #define RXHF (1 << 2) |
73 | d028d02d | Mathieu Sonet | #define TXHE (1 << 3) |
74 | d028d02d | Mathieu Sonet | #define RXFF (1 << 4) |
75 | d028d02d | Mathieu Sonet | #define TXFF (1 << 5) |
76 | d028d02d | Mathieu Sonet | #define RXBUSY (1 << 6) |
77 | d028d02d | Mathieu Sonet | #define TXBUSY (1 << 7) |
78 | d028d02d | Mathieu Sonet | #define RXOVERRUN (1 << 8) |
79 | d028d02d | Mathieu Sonet | #define TXUNDERRUN (1 << 9) |
80 | d028d02d | Mathieu Sonet | #define RXTIMEOUT (1 << 10) |
81 | d028d02d | Mathieu Sonet | #define RXTOFE (1 << 11) |
82 | d028d02d | Mathieu Sonet | |
83 | d028d02d | Mathieu Sonet | /* ISRx */
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84 | d028d02d | Mathieu Sonet | #define TXCINTR (1 << 0) |
85 | d028d02d | Mathieu Sonet | #define RXTOINTR (1 << 1) |
86 | d028d02d | Mathieu Sonet | #define TXINTR (1 << 2) |
87 | d028d02d | Mathieu Sonet | #define RXINTR (1 << 3) |
88 | d028d02d | Mathieu Sonet | #define ORINTR (1 << 4) |
89 | d028d02d | Mathieu Sonet | #define URINTR (1 << 5) |
90 | d028d02d | Mathieu Sonet | #define RXTOFEINTR (1 << 6) |
91 | d028d02d | Mathieu Sonet | |
92 | d028d02d | Mathieu Sonet | /* SLFR */
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93 | d028d02d | Mathieu Sonet | #define SL1RXBUSY (1 << 0) |
94 | d028d02d | Mathieu Sonet | #define SL1TXBUSY (1 << 1) |
95 | d028d02d | Mathieu Sonet | #define SL2RXBUSY (1 << 2) |
96 | d028d02d | Mathieu Sonet | #define SL2TXBUSY (1 << 3) |
97 | d028d02d | Mathieu Sonet | #define SL12RXBUSY (1 << 4) |
98 | d028d02d | Mathieu Sonet | #define SL12TXBUSY (1 << 5) |
99 | d028d02d | Mathieu Sonet | #define SL1RXVALID (1 << 6) |
100 | d028d02d | Mathieu Sonet | #define SL1TXEMPTY (1 << 7) |
101 | d028d02d | Mathieu Sonet | #define SL2RXVALID (1 << 8) |
102 | d028d02d | Mathieu Sonet | #define SL2TXEMPTY (1 << 9) |
103 | d028d02d | Mathieu Sonet | #define SL12RXVALID (1 << 10) |
104 | d028d02d | Mathieu Sonet | #define SL12TXEMPTY (1 << 11) |
105 | d028d02d | Mathieu Sonet | #define RAWGPIOINT (1 << 12) |
106 | d028d02d | Mathieu Sonet | #define RWIS (1 << 13) |
107 | d028d02d | Mathieu Sonet | |
108 | d028d02d | Mathieu Sonet | /* MAINCR */
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109 | d028d02d | Mathieu Sonet | #define AACIFE (1 << 0) |
110 | d028d02d | Mathieu Sonet | #define LOOPBACK (1 << 1) |
111 | d028d02d | Mathieu Sonet | #define LOWPOWER (1 << 2) |
112 | d028d02d | Mathieu Sonet | #define SL1RXEN (1 << 3) |
113 | d028d02d | Mathieu Sonet | #define SL1TXEN (1 << 4) |
114 | d028d02d | Mathieu Sonet | #define SL2RXEN (1 << 5) |
115 | d028d02d | Mathieu Sonet | #define SL2TXEN (1 << 6) |
116 | d028d02d | Mathieu Sonet | #define SL12RXEN (1 << 7) |
117 | d028d02d | Mathieu Sonet | #define SL12TXEN (1 << 8) |
118 | d028d02d | Mathieu Sonet | #define DMAENABLE (1 << 9) |
119 | d028d02d | Mathieu Sonet | |
120 | d028d02d | Mathieu Sonet | /* INTCLR */
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121 | d028d02d | Mathieu Sonet | #define WISC (1 << 0) |
122 | d028d02d | Mathieu Sonet | #define RXOEC1 (1 << 1) |
123 | d028d02d | Mathieu Sonet | #define RXOEC2 (1 << 2) |
124 | d028d02d | Mathieu Sonet | #define RXOEC3 (1 << 3) |
125 | d028d02d | Mathieu Sonet | #define RXOEC4 (1 << 4) |
126 | d028d02d | Mathieu Sonet | #define TXUEC1 (1 << 5) |
127 | d028d02d | Mathieu Sonet | #define TXUEC2 (1 << 6) |
128 | d028d02d | Mathieu Sonet | #define TXUEC3 (1 << 7) |
129 | d028d02d | Mathieu Sonet | #define TXUEC4 (1 << 8) |
130 | d028d02d | Mathieu Sonet | #define RXTOFEC1 (1 << 9) |
131 | d028d02d | Mathieu Sonet | #define RXTOFEC2 (1 << 10) |
132 | d028d02d | Mathieu Sonet | #define RXTOFEC3 (1 << 11) |
133 | d028d02d | Mathieu Sonet | #define RXTOFEC4 (1 << 12) |
134 | d028d02d | Mathieu Sonet | |
135 | d028d02d | Mathieu Sonet | #endif /* #ifndef HW_PL041_H */ |