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1	b4608c04	bellard	/*
2	b4608c04	bellard	* gdb server stub
3	5fafdf24	ths	*
4	3475187d	bellard	* Copyright (c) 2003-2005 Fabrice Bellard
5	b4608c04	bellard	*
6	b4608c04	bellard	* This library is free software; you can redistribute it and/or
7	b4608c04	bellard	* modify it under the terms of the GNU Lesser General Public
8	b4608c04	bellard	* License as published by the Free Software Foundation; either
9	b4608c04	bellard	* version 2 of the License, or (at your option) any later version.
10	b4608c04	bellard	*
11	b4608c04	bellard	* This library is distributed in the hope that it will be useful,
12	b4608c04	bellard	* but WITHOUT ANY WARRANTY; without even the implied warranty of
13	b4608c04	bellard	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14	b4608c04	bellard	* Lesser General Public License for more details.
15	b4608c04	bellard	*
16	b4608c04	bellard	* You should have received a copy of the GNU Lesser General Public
17	8167ee88	Blue Swirl	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
18	b4608c04	bellard	*/
19	978efd6a	pbrook	#include "config.h"
20	56aebc89	pbrook	#include "qemu-common.h"
21	1fddef4b	bellard	#ifdef CONFIG_USER_ONLY
22	1fddef4b	bellard	#include <stdlib.h>
23	1fddef4b	bellard	#include <stdio.h>
24	1fddef4b	bellard	#include <stdarg.h>
25	1fddef4b	bellard	#include <string.h>
26	1fddef4b	bellard	#include <errno.h>
27	1fddef4b	bellard	#include <unistd.h>
28	978efd6a	pbrook	#include <fcntl.h>
29	1fddef4b	bellard
30	1fddef4b	bellard	#include "qemu.h"
31	1fddef4b	bellard	#else
32	8a34a0fb	aliguori	#include "monitor.h"
33	87ecb68b	pbrook	#include "qemu-char.h"
34	87ecb68b	pbrook	#include "sysemu.h"
35	87ecb68b	pbrook	#include "gdbstub.h"
36	1fddef4b	bellard	#endif
37	67b915a5	bellard
38	56aebc89	pbrook	#define MAX_PACKET_LENGTH 4096
39	56aebc89	pbrook
40	8f447cc7	bellard	#include "qemu_socket.h"
41	e22a25c9	aliguori	#include "kvm.h"
42	ca587a8e	aurel32
43	ca587a8e	aurel32
44	ca587a8e	aurel32	enum {
45	ca587a8e	aurel32	GDB_SIGNAL_0 = 0,
46	ca587a8e	aurel32	GDB_SIGNAL_INT = 2,
47	ca587a8e	aurel32	GDB_SIGNAL_TRAP = 5,
48	ca587a8e	aurel32	GDB_SIGNAL_UNKNOWN = 143
49	ca587a8e	aurel32	};
50	ca587a8e	aurel32
51	ca587a8e	aurel32	#ifdef CONFIG_USER_ONLY
52	ca587a8e	aurel32
53	ca587a8e	aurel32	/* Map target signal numbers to GDB protocol signal numbers and vice
54	ca587a8e	aurel32	* versa. For user emulation's currently supported systems, we can
55	ca587a8e	aurel32	* assume most signals are defined.
56	ca587a8e	aurel32	*/
57	ca587a8e	aurel32
58	ca587a8e	aurel32	static int gdb_signal_table[] = {
59	ca587a8e	aurel32	0,
60	ca587a8e	aurel32	TARGET_SIGHUP,
61	ca587a8e	aurel32	TARGET_SIGINT,
62	ca587a8e	aurel32	TARGET_SIGQUIT,
63	ca587a8e	aurel32	TARGET_SIGILL,
64	ca587a8e	aurel32	TARGET_SIGTRAP,
65	ca587a8e	aurel32	TARGET_SIGABRT,
66	ca587a8e	aurel32	-1, /* SIGEMT */
67	ca587a8e	aurel32	TARGET_SIGFPE,
68	ca587a8e	aurel32	TARGET_SIGKILL,
69	ca587a8e	aurel32	TARGET_SIGBUS,
70	ca587a8e	aurel32	TARGET_SIGSEGV,
71	ca587a8e	aurel32	TARGET_SIGSYS,
72	ca587a8e	aurel32	TARGET_SIGPIPE,
73	ca587a8e	aurel32	TARGET_SIGALRM,
74	ca587a8e	aurel32	TARGET_SIGTERM,
75	ca587a8e	aurel32	TARGET_SIGURG,
76	ca587a8e	aurel32	TARGET_SIGSTOP,
77	ca587a8e	aurel32	TARGET_SIGTSTP,
78	ca587a8e	aurel32	TARGET_SIGCONT,
79	ca587a8e	aurel32	TARGET_SIGCHLD,
80	ca587a8e	aurel32	TARGET_SIGTTIN,
81	ca587a8e	aurel32	TARGET_SIGTTOU,
82	ca587a8e	aurel32	TARGET_SIGIO,
83	ca587a8e	aurel32	TARGET_SIGXCPU,
84	ca587a8e	aurel32	TARGET_SIGXFSZ,
85	ca587a8e	aurel32	TARGET_SIGVTALRM,
86	ca587a8e	aurel32	TARGET_SIGPROF,
87	ca587a8e	aurel32	TARGET_SIGWINCH,
88	ca587a8e	aurel32	-1, /* SIGLOST */
89	ca587a8e	aurel32	TARGET_SIGUSR1,
90	ca587a8e	aurel32	TARGET_SIGUSR2,
91	c72d5bf8	blueswir1	#ifdef TARGET_SIGPWR
92	ca587a8e	aurel32	TARGET_SIGPWR,
93	c72d5bf8	blueswir1	#else
94	c72d5bf8	blueswir1	-1,
95	c72d5bf8	blueswir1	#endif
96	ca587a8e	aurel32	-1, /* SIGPOLL */
97	ca587a8e	aurel32	-1,
98	ca587a8e	aurel32	-1,
99	ca587a8e	aurel32	-1,
100	ca587a8e	aurel32	-1,
101	ca587a8e	aurel32	-1,
102	ca587a8e	aurel32	-1,
103	ca587a8e	aurel32	-1,
104	ca587a8e	aurel32	-1,
105	ca587a8e	aurel32	-1,
106	ca587a8e	aurel32	-1,
107	ca587a8e	aurel32	-1,
108	c72d5bf8	blueswir1	#ifdef __SIGRTMIN
109	ca587a8e	aurel32	__SIGRTMIN + 1,
110	ca587a8e	aurel32	__SIGRTMIN + 2,
111	ca587a8e	aurel32	__SIGRTMIN + 3,
112	ca587a8e	aurel32	__SIGRTMIN + 4,
113	ca587a8e	aurel32	__SIGRTMIN + 5,
114	ca587a8e	aurel32	__SIGRTMIN + 6,
115	ca587a8e	aurel32	__SIGRTMIN + 7,
116	ca587a8e	aurel32	__SIGRTMIN + 8,
117	ca587a8e	aurel32	__SIGRTMIN + 9,
118	ca587a8e	aurel32	__SIGRTMIN + 10,
119	ca587a8e	aurel32	__SIGRTMIN + 11,
120	ca587a8e	aurel32	__SIGRTMIN + 12,
121	ca587a8e	aurel32	__SIGRTMIN + 13,
122	ca587a8e	aurel32	__SIGRTMIN + 14,
123	ca587a8e	aurel32	__SIGRTMIN + 15,
124	ca587a8e	aurel32	__SIGRTMIN + 16,
125	ca587a8e	aurel32	__SIGRTMIN + 17,
126	ca587a8e	aurel32	__SIGRTMIN + 18,
127	ca587a8e	aurel32	__SIGRTMIN + 19,
128	ca587a8e	aurel32	__SIGRTMIN + 20,
129	ca587a8e	aurel32	__SIGRTMIN + 21,
130	ca587a8e	aurel32	__SIGRTMIN + 22,
131	ca587a8e	aurel32	__SIGRTMIN + 23,
132	ca587a8e	aurel32	__SIGRTMIN + 24,
133	ca587a8e	aurel32	__SIGRTMIN + 25,
134	ca587a8e	aurel32	__SIGRTMIN + 26,
135	ca587a8e	aurel32	__SIGRTMIN + 27,
136	ca587a8e	aurel32	__SIGRTMIN + 28,
137	ca587a8e	aurel32	__SIGRTMIN + 29,
138	ca587a8e	aurel32	__SIGRTMIN + 30,
139	ca587a8e	aurel32	__SIGRTMIN + 31,
140	ca587a8e	aurel32	-1, /* SIGCANCEL */
141	ca587a8e	aurel32	__SIGRTMIN,
142	ca587a8e	aurel32	__SIGRTMIN + 32,
143	ca587a8e	aurel32	__SIGRTMIN + 33,
144	ca587a8e	aurel32	__SIGRTMIN + 34,
145	ca587a8e	aurel32	__SIGRTMIN + 35,
146	ca587a8e	aurel32	__SIGRTMIN + 36,
147	ca587a8e	aurel32	__SIGRTMIN + 37,
148	ca587a8e	aurel32	__SIGRTMIN + 38,
149	ca587a8e	aurel32	__SIGRTMIN + 39,
150	ca587a8e	aurel32	__SIGRTMIN + 40,
151	ca587a8e	aurel32	__SIGRTMIN + 41,
152	ca587a8e	aurel32	__SIGRTMIN + 42,
153	ca587a8e	aurel32	__SIGRTMIN + 43,
154	ca587a8e	aurel32	__SIGRTMIN + 44,
155	ca587a8e	aurel32	__SIGRTMIN + 45,
156	ca587a8e	aurel32	__SIGRTMIN + 46,
157	ca587a8e	aurel32	__SIGRTMIN + 47,
158	ca587a8e	aurel32	__SIGRTMIN + 48,
159	ca587a8e	aurel32	__SIGRTMIN + 49,
160	ca587a8e	aurel32	__SIGRTMIN + 50,
161	ca587a8e	aurel32	__SIGRTMIN + 51,
162	ca587a8e	aurel32	__SIGRTMIN + 52,
163	ca587a8e	aurel32	__SIGRTMIN + 53,
164	ca587a8e	aurel32	__SIGRTMIN + 54,
165	ca587a8e	aurel32	__SIGRTMIN + 55,
166	ca587a8e	aurel32	__SIGRTMIN + 56,
167	ca587a8e	aurel32	__SIGRTMIN + 57,
168	ca587a8e	aurel32	__SIGRTMIN + 58,
169	ca587a8e	aurel32	__SIGRTMIN + 59,
170	ca587a8e	aurel32	__SIGRTMIN + 60,
171	ca587a8e	aurel32	__SIGRTMIN + 61,
172	ca587a8e	aurel32	__SIGRTMIN + 62,
173	ca587a8e	aurel32	__SIGRTMIN + 63,
174	ca587a8e	aurel32	__SIGRTMIN + 64,
175	ca587a8e	aurel32	__SIGRTMIN + 65,
176	ca587a8e	aurel32	__SIGRTMIN + 66,
177	ca587a8e	aurel32	__SIGRTMIN + 67,
178	ca587a8e	aurel32	__SIGRTMIN + 68,
179	ca587a8e	aurel32	__SIGRTMIN + 69,
180	ca587a8e	aurel32	__SIGRTMIN + 70,
181	ca587a8e	aurel32	__SIGRTMIN + 71,
182	ca587a8e	aurel32	__SIGRTMIN + 72,
183	ca587a8e	aurel32	__SIGRTMIN + 73,
184	ca587a8e	aurel32	__SIGRTMIN + 74,
185	ca587a8e	aurel32	__SIGRTMIN + 75,
186	ca587a8e	aurel32	__SIGRTMIN + 76,
187	ca587a8e	aurel32	__SIGRTMIN + 77,
188	ca587a8e	aurel32	__SIGRTMIN + 78,
189	ca587a8e	aurel32	__SIGRTMIN + 79,
190	ca587a8e	aurel32	__SIGRTMIN + 80,
191	ca587a8e	aurel32	__SIGRTMIN + 81,
192	ca587a8e	aurel32	__SIGRTMIN + 82,
193	ca587a8e	aurel32	__SIGRTMIN + 83,
194	ca587a8e	aurel32	__SIGRTMIN + 84,
195	ca587a8e	aurel32	__SIGRTMIN + 85,
196	ca587a8e	aurel32	__SIGRTMIN + 86,
197	ca587a8e	aurel32	__SIGRTMIN + 87,
198	ca587a8e	aurel32	__SIGRTMIN + 88,
199	ca587a8e	aurel32	__SIGRTMIN + 89,
200	ca587a8e	aurel32	__SIGRTMIN + 90,
201	ca587a8e	aurel32	__SIGRTMIN + 91,
202	ca587a8e	aurel32	__SIGRTMIN + 92,
203	ca587a8e	aurel32	__SIGRTMIN + 93,
204	ca587a8e	aurel32	__SIGRTMIN + 94,
205	ca587a8e	aurel32	__SIGRTMIN + 95,
206	ca587a8e	aurel32	-1, /* SIGINFO */
207	ca587a8e	aurel32	-1, /* UNKNOWN */
208	ca587a8e	aurel32	-1, /* DEFAULT */
209	ca587a8e	aurel32	-1,
210	ca587a8e	aurel32	-1,
211	ca587a8e	aurel32	-1,
212	ca587a8e	aurel32	-1,
213	ca587a8e	aurel32	-1,
214	ca587a8e	aurel32	-1
215	c72d5bf8	blueswir1	#endif
216	ca587a8e	aurel32	};
217	8f447cc7	bellard	#else
218	ca587a8e	aurel32	/* In system mode we only need SIGINT and SIGTRAP; other signals
219	ca587a8e	aurel32	are not yet supported. */
220	ca587a8e	aurel32
221	ca587a8e	aurel32	enum {
222	ca587a8e	aurel32	TARGET_SIGINT = 2,
223	ca587a8e	aurel32	TARGET_SIGTRAP = 5
224	ca587a8e	aurel32	};
225	ca587a8e	aurel32
226	ca587a8e	aurel32	static int gdb_signal_table[] = {
227	ca587a8e	aurel32	-1,
228	ca587a8e	aurel32	-1,
229	ca587a8e	aurel32	TARGET_SIGINT,
230	ca587a8e	aurel32	-1,
231	ca587a8e	aurel32	-1,
232	ca587a8e	aurel32	TARGET_SIGTRAP
233	ca587a8e	aurel32	};
234	ca587a8e	aurel32	#endif
235	ca587a8e	aurel32
236	ca587a8e	aurel32	#ifdef CONFIG_USER_ONLY
237	ca587a8e	aurel32	static int target_signal_to_gdb (int sig)
238	ca587a8e	aurel32	{
239	ca587a8e	aurel32	int i;
240	ca587a8e	aurel32	for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
241	ca587a8e	aurel32	if (gdb_signal_table[i] == sig)
242	ca587a8e	aurel32	return i;
243	ca587a8e	aurel32	return GDB_SIGNAL_UNKNOWN;
244	ca587a8e	aurel32	}
245	8f447cc7	bellard	#endif
246	b4608c04	bellard
247	ca587a8e	aurel32	static int gdb_signal_to_target (int sig)
248	ca587a8e	aurel32	{
249	ca587a8e	aurel32	if (sig < ARRAY_SIZE (gdb_signal_table))
250	ca587a8e	aurel32	return gdb_signal_table[sig];
251	ca587a8e	aurel32	else
252	ca587a8e	aurel32	return -1;
253	ca587a8e	aurel32	}
254	ca587a8e	aurel32
255	4abe615b	bellard	//#define DEBUG_GDB
256	b4608c04	bellard
257	56aebc89	pbrook	typedef struct GDBRegisterState {
258	56aebc89	pbrook	int base_reg;
259	56aebc89	pbrook	int num_regs;
260	56aebc89	pbrook	gdb_reg_cb get_reg;
261	56aebc89	pbrook	gdb_reg_cb set_reg;
262	56aebc89	pbrook	const char *xml;
263	56aebc89	pbrook	struct GDBRegisterState *next;
264	56aebc89	pbrook	} GDBRegisterState;
265	56aebc89	pbrook
266	858693c6	bellard	enum RSState {
267	36556b20	aliguori	RS_INACTIVE,
268	858693c6	bellard	RS_IDLE,
269	858693c6	bellard	RS_GETLINE,
270	858693c6	bellard	RS_CHKSUM1,
271	858693c6	bellard	RS_CHKSUM2,
272	a2d1ebaf	pbrook	RS_SYSCALL,
273	858693c6	bellard	};
274	858693c6	bellard	typedef struct GDBState {
275	880a7578	aliguori	CPUState c_cpu; / current CPU for step/continue ops */
276	880a7578	aliguori	CPUState g_cpu; / current CPU for other ops */
277	880a7578	aliguori	CPUState query_cpu; / for q{f\|s}ThreadInfo */
278	41625033	bellard	enum RSState state; /* parsing state */
279	56aebc89	pbrook	char line_buf[MAX_PACKET_LENGTH];
280	858693c6	bellard	int line_buf_index;
281	858693c6	bellard	int line_csum;
282	56aebc89	pbrook	uint8_t last_packet[MAX_PACKET_LENGTH + 4];
283	4046d913	pbrook	int last_packet_len;
284	1f487ee9	edgar_igl	int signal;
285	41625033	bellard	#ifdef CONFIG_USER_ONLY
286	4046d913	pbrook	int fd;
287	41625033	bellard	int running_state;
288	4046d913	pbrook	#else
289	4046d913	pbrook	CharDriverState *chr;
290	8a34a0fb	aliguori	CharDriverState *mon_chr;
291	41625033	bellard	#endif
292	858693c6	bellard	} GDBState;
293	b4608c04	bellard
294	60897d36	edgar_igl	/* By default use no IRQs and no timers while single stepping so as to
295	60897d36	edgar_igl	* make single stepping like an ICE HW step.
296	60897d36	edgar_igl	*/
297	60897d36	edgar_igl	static int sstep_flags = SSTEP_ENABLE\|SSTEP_NOIRQ\|SSTEP_NOTIMER;
298	60897d36	edgar_igl
299	880a7578	aliguori	static GDBState *gdbserver_state;
300	880a7578	aliguori
301	56aebc89	pbrook	/* This is an ugly hack to cope with both new and old gdb.
302	56aebc89	pbrook	If gdb sends qXfer:features:read then assume we're talking to a newish
303	56aebc89	pbrook	gdb that understands target descriptions. */
304	56aebc89	pbrook	static int gdb_has_xml;
305	56aebc89	pbrook
306	1fddef4b	bellard	#ifdef CONFIG_USER_ONLY
307	4046d913	pbrook	/* XXX: This is not thread safe. Do we care? */
308	4046d913	pbrook	static int gdbserver_fd = -1;
309	4046d913	pbrook
310	858693c6	bellard	static int get_char(GDBState *s)
311	b4608c04	bellard	{
312	b4608c04	bellard	uint8_t ch;
313	b4608c04	bellard	int ret;
314	b4608c04	bellard
315	b4608c04	bellard	for(;;) {
316	8f447cc7	bellard	ret = recv(s->fd, &ch, 1, 0);
317	b4608c04	bellard	if (ret < 0) {
318	1f487ee9	edgar_igl	if (errno == ECONNRESET)
319	1f487ee9	edgar_igl	s->fd = -1;
320	b4608c04	bellard	if (errno != EINTR && errno != EAGAIN)
321	b4608c04	bellard	return -1;
322	b4608c04	bellard	} else if (ret == 0) {
323	1f487ee9	edgar_igl	close(s->fd);
324	1f487ee9	edgar_igl	s->fd = -1;
325	b4608c04	bellard	return -1;
326	b4608c04	bellard	} else {
327	b4608c04	bellard	break;
328	b4608c04	bellard	}
329	b4608c04	bellard	}
330	b4608c04	bellard	return ch;
331	b4608c04	bellard	}
332	4046d913	pbrook	#endif
333	b4608c04	bellard
334	a2d1ebaf	pbrook	static gdb_syscall_complete_cb gdb_current_syscall_cb;
335	a2d1ebaf	pbrook
336	654efcf3	blueswir1	static enum {
337	a2d1ebaf	pbrook	GDB_SYS_UNKNOWN,
338	a2d1ebaf	pbrook	GDB_SYS_ENABLED,
339	a2d1ebaf	pbrook	GDB_SYS_DISABLED,
340	a2d1ebaf	pbrook	} gdb_syscall_mode;
341	a2d1ebaf	pbrook
342	a2d1ebaf	pbrook	/* If gdb is connected when the first semihosting syscall occurs then use
343	a2d1ebaf	pbrook	remote gdb syscalls. Otherwise use native file IO. */
344	a2d1ebaf	pbrook	int use_gdb_syscalls(void)
345	a2d1ebaf	pbrook	{
346	a2d1ebaf	pbrook	if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
347	880a7578	aliguori	gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
348	880a7578	aliguori	: GDB_SYS_DISABLED);
349	a2d1ebaf	pbrook	}
350	a2d1ebaf	pbrook	return gdb_syscall_mode == GDB_SYS_ENABLED;
351	a2d1ebaf	pbrook	}
352	a2d1ebaf	pbrook
353	ba70a624	edgar_igl	/* Resume execution. */
354	ba70a624	edgar_igl	static inline void gdb_continue(GDBState *s)
355	ba70a624	edgar_igl	{
356	ba70a624	edgar_igl	#ifdef CONFIG_USER_ONLY
357	ba70a624	edgar_igl	s->running_state = 1;
358	ba70a624	edgar_igl	#else
359	ba70a624	edgar_igl	vm_start();
360	ba70a624	edgar_igl	#endif
361	ba70a624	edgar_igl	}
362	ba70a624	edgar_igl
363	858693c6	bellard	static void put_buffer(GDBState s, const uint8_t buf, int len)
364	b4608c04	bellard	{
365	4046d913	pbrook	#ifdef CONFIG_USER_ONLY
366	b4608c04	bellard	int ret;
367	b4608c04	bellard
368	b4608c04	bellard	while (len > 0) {
369	8f447cc7	bellard	ret = send(s->fd, buf, len, 0);
370	b4608c04	bellard	if (ret < 0) {
371	b4608c04	bellard	if (errno != EINTR && errno != EAGAIN)
372	b4608c04	bellard	return;
373	b4608c04	bellard	} else {
374	b4608c04	bellard	buf += ret;
375	b4608c04	bellard	len -= ret;
376	b4608c04	bellard	}
377	b4608c04	bellard	}
378	4046d913	pbrook	#else
379	4046d913	pbrook	qemu_chr_write(s->chr, buf, len);
380	4046d913	pbrook	#endif
381	b4608c04	bellard	}
382	b4608c04	bellard
383	b4608c04	bellard	static inline int fromhex(int v)
384	b4608c04	bellard	{
385	b4608c04	bellard	if (v >= '0' && v <= '9')
386	b4608c04	bellard	return v - '0';
387	b4608c04	bellard	else if (v >= 'A' && v <= 'F')
388	b4608c04	bellard	return v - 'A' + 10;
389	b4608c04	bellard	else if (v >= 'a' && v <= 'f')
390	b4608c04	bellard	return v - 'a' + 10;
391	b4608c04	bellard	else
392	b4608c04	bellard	return 0;
393	b4608c04	bellard	}
394	b4608c04	bellard
395	b4608c04	bellard	static inline int tohex(int v)
396	b4608c04	bellard	{
397	b4608c04	bellard	if (v < 10)
398	b4608c04	bellard	return v + '0';
399	b4608c04	bellard	else
400	b4608c04	bellard	return v - 10 + 'a';
401	b4608c04	bellard	}
402	b4608c04	bellard
403	b4608c04	bellard	static void memtohex(char buf, const uint8_t mem, int len)
404	b4608c04	bellard	{
405	b4608c04	bellard	int i, c;
406	b4608c04	bellard	char *q;
407	b4608c04	bellard	q = buf;
408	b4608c04	bellard	for(i = 0; i < len; i++) {
409	b4608c04	bellard	c = mem[i];
410	b4608c04	bellard	*q++ = tohex(c >> 4);
411	b4608c04	bellard	*q++ = tohex(c & 0xf);
412	b4608c04	bellard	}
413	b4608c04	bellard	*q = '\0';
414	b4608c04	bellard	}
415	b4608c04	bellard
416	b4608c04	bellard	static void hextomem(uint8_t mem, const char buf, int len)
417	b4608c04	bellard	{
418	b4608c04	bellard	int i;
419	b4608c04	bellard
420	b4608c04	bellard	for(i = 0; i < len; i++) {
421	b4608c04	bellard	mem[i] = (fromhex(buf[0]) << 4) \| fromhex(buf[1]);
422	b4608c04	bellard	buf += 2;
423	b4608c04	bellard	}
424	b4608c04	bellard	}
425	b4608c04	bellard
426	b4608c04	bellard	/* return -1 if error, 0 if OK */
427	56aebc89	pbrook	static int put_packet_binary(GDBState s, const char buf, int len)
428	b4608c04	bellard	{
429	56aebc89	pbrook	int csum, i;
430	60fe76f3	ths	uint8_t *p;
431	b4608c04	bellard
432	b4608c04	bellard	for(;;) {
433	4046d913	pbrook	p = s->last_packet;
434	4046d913	pbrook	*(p++) = '$';
435	4046d913	pbrook	memcpy(p, buf, len);
436	4046d913	pbrook	p += len;
437	b4608c04	bellard	csum = 0;
438	b4608c04	bellard	for(i = 0; i < len; i++) {
439	b4608c04	bellard	csum += buf[i];
440	b4608c04	bellard	}
441	4046d913	pbrook	*(p++) = '#';
442	4046d913	pbrook	*(p++) = tohex((csum >> 4) & 0xf);
443	4046d913	pbrook	*(p++) = tohex((csum) & 0xf);
444	b4608c04	bellard
445	4046d913	pbrook	s->last_packet_len = p - s->last_packet;
446	ffe8ab83	ths	put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
447	b4608c04	bellard
448	4046d913	pbrook	#ifdef CONFIG_USER_ONLY
449	4046d913	pbrook	i = get_char(s);
450	4046d913	pbrook	if (i < 0)
451	b4608c04	bellard	return -1;
452	4046d913	pbrook	if (i == '+')
453	b4608c04	bellard	break;
454	4046d913	pbrook	#else
455	4046d913	pbrook	break;
456	4046d913	pbrook	#endif
457	b4608c04	bellard	}
458	b4608c04	bellard	return 0;
459	b4608c04	bellard	}
460	b4608c04	bellard
461	56aebc89	pbrook	/* return -1 if error, 0 if OK */
462	56aebc89	pbrook	static int put_packet(GDBState s, const char buf)
463	56aebc89	pbrook	{
464	56aebc89	pbrook	#ifdef DEBUG_GDB
465	56aebc89	pbrook	printf("reply='%s'\n", buf);
466	56aebc89	pbrook	#endif
467	79808573	bellard
468	56aebc89	pbrook	return put_packet_binary(s, buf, strlen(buf));
469	56aebc89	pbrook	}
470	56aebc89	pbrook
471	56aebc89	pbrook	/* The GDB remote protocol transfers values in target byte order. This means
472	56aebc89	pbrook	we can use the raw memory access routines to access the value buffer.
473	56aebc89	pbrook	Conveniently, these also handle the case where the buffer is mis-aligned.
474	56aebc89	pbrook	*/
475	56aebc89	pbrook	#define GET_REG8(val) do { \
476	56aebc89	pbrook	stb_p(mem_buf, val); \
477	56aebc89	pbrook	return 1; \
478	56aebc89	pbrook	} while(0)
479	56aebc89	pbrook	#define GET_REG16(val) do { \
480	56aebc89	pbrook	stw_p(mem_buf, val); \
481	56aebc89	pbrook	return 2; \
482	56aebc89	pbrook	} while(0)
483	56aebc89	pbrook	#define GET_REG32(val) do { \
484	56aebc89	pbrook	stl_p(mem_buf, val); \
485	56aebc89	pbrook	return 4; \
486	56aebc89	pbrook	} while(0)
487	56aebc89	pbrook	#define GET_REG64(val) do { \
488	56aebc89	pbrook	stq_p(mem_buf, val); \
489	56aebc89	pbrook	return 8; \
490	56aebc89	pbrook	} while(0)
491	56aebc89	pbrook
492	56aebc89	pbrook	#if TARGET_LONG_BITS == 64
493	56aebc89	pbrook	#define GET_REGL(val) GET_REG64(val)
494	56aebc89	pbrook	#define ldtul_p(addr) ldq_p(addr)
495	56aebc89	pbrook	#else
496	56aebc89	pbrook	#define GET_REGL(val) GET_REG32(val)
497	56aebc89	pbrook	#define ldtul_p(addr) ldl_p(addr)
498	79808573	bellard	#endif
499	79808573	bellard
500	56aebc89	pbrook	#if defined(TARGET_I386)
501	5ad265ee	balrog
502	5ad265ee	balrog	#ifdef TARGET_X86_64
503	56aebc89	pbrook	static const int gpr_map[16] = {
504	56aebc89	pbrook	R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
505	56aebc89	pbrook	8, 9, 10, 11, 12, 13, 14, 15
506	56aebc89	pbrook	};
507	79808573	bellard	#else
508	5f30fa18	Jan Kiszka	#define gpr_map gpr_map32
509	79808573	bellard	#endif
510	5f30fa18	Jan Kiszka	static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
511	79808573	bellard
512	56aebc89	pbrook	#define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
513	56aebc89	pbrook
514	b1631e7a	Jan Kiszka	#define IDX_IP_REG CPU_NB_REGS
515	b1631e7a	Jan Kiszka	#define IDX_FLAGS_REG (IDX_IP_REG + 1)
516	b1631e7a	Jan Kiszka	#define IDX_SEG_REGS (IDX_FLAGS_REG + 1)
517	b1631e7a	Jan Kiszka	#define IDX_FP_REGS (IDX_SEG_REGS + 6)
518	b1631e7a	Jan Kiszka	#define IDX_XMM_REGS (IDX_FP_REGS + 16)
519	b1631e7a	Jan Kiszka	#define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS)
520	b1631e7a	Jan Kiszka
521	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
522	79808573	bellard	{
523	56aebc89	pbrook	if (n < CPU_NB_REGS) {
524	5f30fa18	Jan Kiszka	if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
525	5f30fa18	Jan Kiszka	GET_REG64(env->regs[gpr_map[n]]);
526	5f30fa18	Jan Kiszka	} else if (n < CPU_NB_REGS32) {
527	5f30fa18	Jan Kiszka	GET_REG32(env->regs[gpr_map32[n]]);
528	5f30fa18	Jan Kiszka	}
529	b1631e7a	Jan Kiszka	} else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
530	56aebc89	pbrook	#ifdef USE_X86LDOUBLE
531	b1631e7a	Jan Kiszka	/* FIXME: byteswap float values - after fixing fpregs layout. */
532	b1631e7a	Jan Kiszka	memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
533	79808573	bellard	#else
534	56aebc89	pbrook	memset(mem_buf, 0, 10);
535	79808573	bellard	#endif
536	56aebc89	pbrook	return 10;
537	b1631e7a	Jan Kiszka	} else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
538	b1631e7a	Jan Kiszka	n -= IDX_XMM_REGS;
539	5f30fa18	Jan Kiszka	if (n < CPU_NB_REGS32 \|\|
540	5f30fa18	Jan Kiszka	(TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
541	5f30fa18	Jan Kiszka	stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
542	5f30fa18	Jan Kiszka	stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
543	5f30fa18	Jan Kiszka	return 16;
544	5f30fa18	Jan Kiszka	}
545	56aebc89	pbrook	} else {
546	56aebc89	pbrook	switch (n) {
547	5f30fa18	Jan Kiszka	case IDX_IP_REG:
548	5f30fa18	Jan Kiszka	if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
549	5f30fa18	Jan Kiszka	GET_REG64(env->eip);
550	5f30fa18	Jan Kiszka	} else {
551	5f30fa18	Jan Kiszka	GET_REG32(env->eip);
552	5f30fa18	Jan Kiszka	}
553	b1631e7a	Jan Kiszka	case IDX_FLAGS_REG: GET_REG32(env->eflags);
554	b1631e7a	Jan Kiszka
555	b1631e7a	Jan Kiszka	case IDX_SEG_REGS: GET_REG32(env->segs[R_CS].selector);
556	b1631e7a	Jan Kiszka	case IDX_SEG_REGS + 1: GET_REG32(env->segs[R_SS].selector);
557	b1631e7a	Jan Kiszka	case IDX_SEG_REGS + 2: GET_REG32(env->segs[R_DS].selector);
558	b1631e7a	Jan Kiszka	case IDX_SEG_REGS + 3: GET_REG32(env->segs[R_ES].selector);
559	b1631e7a	Jan Kiszka	case IDX_SEG_REGS + 4: GET_REG32(env->segs[R_FS].selector);
560	b1631e7a	Jan Kiszka	case IDX_SEG_REGS + 5: GET_REG32(env->segs[R_GS].selector);
561	b1631e7a	Jan Kiszka
562	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 8: GET_REG32(env->fpuc);
563	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 9: GET_REG32((env->fpus & ~0x3800) \|
564	b1631e7a	Jan Kiszka	(env->fpstt & 0x7) << 11);
565	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 10: GET_REG32(0); /* ftag */
566	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 11: GET_REG32(0); /* fiseg */
567	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 12: GET_REG32(0); /* fioff */
568	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 13: GET_REG32(0); /* foseg */
569	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 14: GET_REG32(0); /* fooff */
570	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 15: GET_REG32(0); /* fop */
571	b1631e7a	Jan Kiszka
572	b1631e7a	Jan Kiszka	case IDX_MXCSR_REG: GET_REG32(env->mxcsr);
573	56aebc89	pbrook	}
574	79808573	bellard	}
575	56aebc89	pbrook	return 0;
576	6da41eaf	bellard	}
577	6da41eaf	bellard
578	84273177	Jan Kiszka	static int cpu_x86_gdb_load_seg(CPUState env, int sreg, uint8_t mem_buf)
579	84273177	Jan Kiszka	{
580	84273177	Jan Kiszka	uint16_t selector = ldl_p(mem_buf);
581	84273177	Jan Kiszka
582	84273177	Jan Kiszka	if (selector != env->segs[sreg].selector) {
583	84273177	Jan Kiszka	#if defined(CONFIG_USER_ONLY)
584	84273177	Jan Kiszka	cpu_x86_load_seg(env, sreg, selector);
585	84273177	Jan Kiszka	#else
586	84273177	Jan Kiszka	unsigned int limit, flags;
587	84273177	Jan Kiszka	target_ulong base;
588	84273177	Jan Kiszka
589	84273177	Jan Kiszka	if (!(env->cr[0] & CR0_PE_MASK) \|\| (env->eflags & VM_MASK)) {
590	84273177	Jan Kiszka	base = selector << 4;
591	84273177	Jan Kiszka	limit = 0xffff;
592	84273177	Jan Kiszka	flags = 0;
593	84273177	Jan Kiszka	} else {
594	84273177	Jan Kiszka	if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, &flags))
595	84273177	Jan Kiszka	return 4;
596	84273177	Jan Kiszka	}
597	84273177	Jan Kiszka	cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags);
598	84273177	Jan Kiszka	#endif
599	84273177	Jan Kiszka	}
600	84273177	Jan Kiszka	return 4;
601	84273177	Jan Kiszka	}
602	84273177	Jan Kiszka
603	b1631e7a	Jan Kiszka	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
604	6da41eaf	bellard	{
605	56aebc89	pbrook	uint32_t tmp;
606	6da41eaf	bellard
607	b1631e7a	Jan Kiszka	if (n < CPU_NB_REGS) {
608	5f30fa18	Jan Kiszka	if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
609	5f30fa18	Jan Kiszka	env->regs[gpr_map[n]] = ldtul_p(mem_buf);
610	5f30fa18	Jan Kiszka	return sizeof(target_ulong);
611	5f30fa18	Jan Kiszka	} else if (n < CPU_NB_REGS32) {
612	5f30fa18	Jan Kiszka	n = gpr_map32[n];
613	5f30fa18	Jan Kiszka	env->regs[n] &= ~0xffffffffUL;
614	5f30fa18	Jan Kiszka	env->regs[n] \|= (uint32_t)ldl_p(mem_buf);
615	5f30fa18	Jan Kiszka	return 4;
616	5f30fa18	Jan Kiszka	}
617	b1631e7a	Jan Kiszka	} else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
618	56aebc89	pbrook	#ifdef USE_X86LDOUBLE
619	b1631e7a	Jan Kiszka	/* FIXME: byteswap float values - after fixing fpregs layout. */
620	b1631e7a	Jan Kiszka	memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
621	79808573	bellard	#endif
622	56aebc89	pbrook	return 10;
623	b1631e7a	Jan Kiszka	} else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
624	b1631e7a	Jan Kiszka	n -= IDX_XMM_REGS;
625	5f30fa18	Jan Kiszka	if (n < CPU_NB_REGS32 \|\|
626	5f30fa18	Jan Kiszka	(TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
627	5f30fa18	Jan Kiszka	env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf);
628	5f30fa18	Jan Kiszka	env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8);
629	5f30fa18	Jan Kiszka	return 16;
630	5f30fa18	Jan Kiszka	}
631	56aebc89	pbrook	} else {
632	b1631e7a	Jan Kiszka	switch (n) {
633	b1631e7a	Jan Kiszka	case IDX_IP_REG:
634	5f30fa18	Jan Kiszka	if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) {
635	5f30fa18	Jan Kiszka	env->eip = ldq_p(mem_buf);
636	5f30fa18	Jan Kiszka	return 8;
637	5f30fa18	Jan Kiszka	} else {
638	5f30fa18	Jan Kiszka	env->eip &= ~0xffffffffUL;
639	5f30fa18	Jan Kiszka	env->eip \|= (uint32_t)ldl_p(mem_buf);
640	5f30fa18	Jan Kiszka	return 4;
641	5f30fa18	Jan Kiszka	}
642	b1631e7a	Jan Kiszka	case IDX_FLAGS_REG:
643	b1631e7a	Jan Kiszka	env->eflags = ldl_p(mem_buf);
644	b1631e7a	Jan Kiszka	return 4;
645	b1631e7a	Jan Kiszka
646	84273177	Jan Kiszka	case IDX_SEG_REGS: return cpu_x86_gdb_load_seg(env, R_CS, mem_buf);
647	84273177	Jan Kiszka	case IDX_SEG_REGS + 1: return cpu_x86_gdb_load_seg(env, R_SS, mem_buf);
648	84273177	Jan Kiszka	case IDX_SEG_REGS + 2: return cpu_x86_gdb_load_seg(env, R_DS, mem_buf);
649	84273177	Jan Kiszka	case IDX_SEG_REGS + 3: return cpu_x86_gdb_load_seg(env, R_ES, mem_buf);
650	84273177	Jan Kiszka	case IDX_SEG_REGS + 4: return cpu_x86_gdb_load_seg(env, R_FS, mem_buf);
651	84273177	Jan Kiszka	case IDX_SEG_REGS + 5: return cpu_x86_gdb_load_seg(env, R_GS, mem_buf);
652	b1631e7a	Jan Kiszka
653	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 8:
654	b1631e7a	Jan Kiszka	env->fpuc = ldl_p(mem_buf);
655	b1631e7a	Jan Kiszka	return 4;
656	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 9:
657	b1631e7a	Jan Kiszka	tmp = ldl_p(mem_buf);
658	b1631e7a	Jan Kiszka	env->fpstt = (tmp >> 11) & 7;
659	b1631e7a	Jan Kiszka	env->fpus = tmp & ~0x3800;
660	b1631e7a	Jan Kiszka	return 4;
661	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 10: /* ftag */ return 4;
662	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 11: /* fiseg */ return 4;
663	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 12: /* fioff */ return 4;
664	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 13: /* foseg */ return 4;
665	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 14: /* fooff */ return 4;
666	b1631e7a	Jan Kiszka	case IDX_FP_REGS + 15: /* fop */ return 4;
667	b1631e7a	Jan Kiszka
668	b1631e7a	Jan Kiszka	case IDX_MXCSR_REG:
669	b1631e7a	Jan Kiszka	env->mxcsr = ldl_p(mem_buf);
670	b1631e7a	Jan Kiszka	return 4;
671	79808573	bellard	}
672	79808573	bellard	}
673	56aebc89	pbrook	/* Unrecognised register. */
674	56aebc89	pbrook	return 0;
675	6da41eaf	bellard	}
676	6da41eaf	bellard
677	9e62fd7f	bellard	#elif defined (TARGET_PPC)
678	9e62fd7f	bellard
679	e571cb47	aurel32	/* Old gdb always expects FP registers. Newer (xml-aware) gdb only
680	e571cb47	aurel32	expects whatever the target description contains. Due to a
681	e571cb47	aurel32	historical mishap the FP registers appear in between core integer
682	e571cb47	aurel32	regs and PC, MSR, CR, and so forth. We hack round this by giving the
683	e571cb47	aurel32	FP regs zero size when talking to a newer gdb. */
684	56aebc89	pbrook	#define NUM_CORE_REGS 71
685	e571cb47	aurel32	#if defined (TARGET_PPC64)
686	e571cb47	aurel32	#define GDB_CORE_XML "power64-core.xml"
687	e571cb47	aurel32	#else
688	e571cb47	aurel32	#define GDB_CORE_XML "power-core.xml"
689	e571cb47	aurel32	#endif
690	9e62fd7f	bellard
691	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
692	9e62fd7f	bellard	{
693	56aebc89	pbrook	if (n < 32) {
694	56aebc89	pbrook	/* gprs */
695	56aebc89	pbrook	GET_REGL(env->gpr[n]);
696	56aebc89	pbrook	} else if (n < 64) {
697	56aebc89	pbrook	/* fprs */
698	e571cb47	aurel32	if (gdb_has_xml)
699	e571cb47	aurel32	return 0;
700	8d4acf9b	aurel32	stfq_p(mem_buf, env->fpr[n-32]);
701	56aebc89	pbrook	return 8;
702	56aebc89	pbrook	} else {
703	56aebc89	pbrook	switch (n) {
704	56aebc89	pbrook	case 64: GET_REGL(env->nip);
705	56aebc89	pbrook	case 65: GET_REGL(env->msr);
706	56aebc89	pbrook	case 66:
707	56aebc89	pbrook	{
708	56aebc89	pbrook	uint32_t cr = 0;
709	56aebc89	pbrook	int i;
710	56aebc89	pbrook	for (i = 0; i < 8; i++)
711	56aebc89	pbrook	cr \|= env->crf[i] << (32 - ((i + 1) * 4));
712	56aebc89	pbrook	GET_REG32(cr);
713	56aebc89	pbrook	}
714	56aebc89	pbrook	case 67: GET_REGL(env->lr);
715	56aebc89	pbrook	case 68: GET_REGL(env->ctr);
716	3d7b417e	aurel32	case 69: GET_REGL(env->xer);
717	e571cb47	aurel32	case 70:
718	e571cb47	aurel32	{
719	e571cb47	aurel32	if (gdb_has_xml)
720	e571cb47	aurel32	return 0;
721	e571cb47	aurel32	GET_REG32(0); /* fpscr */
722	e571cb47	aurel32	}
723	56aebc89	pbrook	}
724	56aebc89	pbrook	}
725	56aebc89	pbrook	return 0;
726	56aebc89	pbrook	}
727	9e62fd7f	bellard
728	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
729	56aebc89	pbrook	{
730	56aebc89	pbrook	if (n < 32) {
731	56aebc89	pbrook	/* gprs */
732	56aebc89	pbrook	env->gpr[n] = ldtul_p(mem_buf);
733	56aebc89	pbrook	return sizeof(target_ulong);
734	56aebc89	pbrook	} else if (n < 64) {
735	56aebc89	pbrook	/* fprs */
736	e571cb47	aurel32	if (gdb_has_xml)
737	e571cb47	aurel32	return 0;
738	8d4acf9b	aurel32	env->fpr[n-32] = ldfq_p(mem_buf);
739	56aebc89	pbrook	return 8;
740	56aebc89	pbrook	} else {
741	56aebc89	pbrook	switch (n) {
742	56aebc89	pbrook	case 64:
743	56aebc89	pbrook	env->nip = ldtul_p(mem_buf);
744	56aebc89	pbrook	return sizeof(target_ulong);
745	56aebc89	pbrook	case 65:
746	56aebc89	pbrook	ppc_store_msr(env, ldtul_p(mem_buf));
747	56aebc89	pbrook	return sizeof(target_ulong);
748	56aebc89	pbrook	case 66:
749	56aebc89	pbrook	{
750	56aebc89	pbrook	uint32_t cr = ldl_p(mem_buf);
751	56aebc89	pbrook	int i;
752	56aebc89	pbrook	for (i = 0; i < 8; i++)
753	56aebc89	pbrook	env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
754	56aebc89	pbrook	return 4;
755	56aebc89	pbrook	}
756	56aebc89	pbrook	case 67:
757	56aebc89	pbrook	env->lr = ldtul_p(mem_buf);
758	56aebc89	pbrook	return sizeof(target_ulong);
759	56aebc89	pbrook	case 68:
760	56aebc89	pbrook	env->ctr = ldtul_p(mem_buf);
761	56aebc89	pbrook	return sizeof(target_ulong);
762	56aebc89	pbrook	case 69:
763	3d7b417e	aurel32	env->xer = ldtul_p(mem_buf);
764	3d7b417e	aurel32	return sizeof(target_ulong);
765	56aebc89	pbrook	case 70:
766	56aebc89	pbrook	/* fpscr */
767	e571cb47	aurel32	if (gdb_has_xml)
768	e571cb47	aurel32	return 0;
769	56aebc89	pbrook	return 4;
770	56aebc89	pbrook	}
771	56aebc89	pbrook	}
772	56aebc89	pbrook	return 0;
773	e95c8d51	bellard	}
774	56aebc89	pbrook
775	e95c8d51	bellard	#elif defined (TARGET_SPARC)
776	56aebc89	pbrook
777	56aebc89	pbrook	#if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
778	56aebc89	pbrook	#define NUM_CORE_REGS 86
779	96d19126	blueswir1	#else
780	5a377912	blueswir1	#define NUM_CORE_REGS 72
781	96d19126	blueswir1	#endif
782	56aebc89	pbrook
783	96d19126	blueswir1	#ifdef TARGET_ABI32
784	56aebc89	pbrook	#define GET_REGA(val) GET_REG32(val)
785	96d19126	blueswir1	#else
786	56aebc89	pbrook	#define GET_REGA(val) GET_REGL(val)
787	96d19126	blueswir1	#endif
788	e95c8d51	bellard
789	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
790	56aebc89	pbrook	{
791	56aebc89	pbrook	if (n < 8) {
792	56aebc89	pbrook	/* g0..g7 */
793	56aebc89	pbrook	GET_REGA(env->gregs[n]);
794	e95c8d51	bellard	}
795	56aebc89	pbrook	if (n < 32) {
796	56aebc89	pbrook	/* register window */
797	56aebc89	pbrook	GET_REGA(env->regwptr[n - 8]);
798	e95c8d51	bellard	}
799	56aebc89	pbrook	#if defined(TARGET_ABI32) \|\| !defined(TARGET_SPARC64)
800	56aebc89	pbrook	if (n < 64) {
801	56aebc89	pbrook	/* fprs */
802	56aebc89	pbrook	GET_REG32(((uint32_t )&env->fpr[n - 32]));
803	e95c8d51	bellard	}
804	e95c8d51	bellard	/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
805	56aebc89	pbrook	switch (n) {
806	56aebc89	pbrook	case 64: GET_REGA(env->y);
807	56aebc89	pbrook	case 65: GET_REGA(GET_PSR(env));
808	56aebc89	pbrook	case 66: GET_REGA(env->wim);
809	56aebc89	pbrook	case 67: GET_REGA(env->tbr);
810	56aebc89	pbrook	case 68: GET_REGA(env->pc);
811	56aebc89	pbrook	case 69: GET_REGA(env->npc);
812	56aebc89	pbrook	case 70: GET_REGA(env->fsr);
813	56aebc89	pbrook	case 71: GET_REGA(0); /* csr */
814	5a377912	blueswir1	default: GET_REGA(0);
815	56aebc89	pbrook	}
816	3475187d	bellard	#else
817	56aebc89	pbrook	if (n < 64) {
818	56aebc89	pbrook	/* f0-f31 */
819	56aebc89	pbrook	GET_REG32(((uint32_t )&env->fpr[n - 32]));
820	56aebc89	pbrook	}
821	56aebc89	pbrook	if (n < 80) {
822	56aebc89	pbrook	/* f32-f62 (double width, even numbers only) */
823	56aebc89	pbrook	uint64_t val;
824	9d9754a3	bellard
825	56aebc89	pbrook	val = (uint64_t)((uint32_t )&env->fpr[(n - 64) * 2 + 32]) << 32;
826	56aebc89	pbrook	val \|= ((uint32_t )&env->fpr[(n - 64) * 2 + 33]);
827	56aebc89	pbrook	GET_REG64(val);
828	3475187d	bellard	}
829	56aebc89	pbrook	switch (n) {
830	56aebc89	pbrook	case 80: GET_REGL(env->pc);
831	56aebc89	pbrook	case 81: GET_REGL(env->npc);
832	56aebc89	pbrook	case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) \|
833	17d996e1	blueswir1	((env->asi & 0xff) << 24) \|
834	17d996e1	blueswir1	((env->pstate & 0xfff) << 8) \|
835	17d996e1	blueswir1	GET_CWP64(env));
836	56aebc89	pbrook	case 83: GET_REGL(env->fsr);
837	56aebc89	pbrook	case 84: GET_REGL(env->fprs);
838	56aebc89	pbrook	case 85: GET_REGL(env->y);
839	56aebc89	pbrook	}
840	3475187d	bellard	#endif
841	56aebc89	pbrook	return 0;
842	e95c8d51	bellard	}
843	e95c8d51	bellard
844	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
845	e95c8d51	bellard	{
846	56aebc89	pbrook	#if defined(TARGET_ABI32)
847	56aebc89	pbrook	abi_ulong tmp;
848	56aebc89	pbrook
849	56aebc89	pbrook	tmp = ldl_p(mem_buf);
850	96d19126	blueswir1	#else
851	56aebc89	pbrook	target_ulong tmp;
852	56aebc89	pbrook
853	56aebc89	pbrook	tmp = ldtul_p(mem_buf);
854	96d19126	blueswir1	#endif
855	e95c8d51	bellard
856	56aebc89	pbrook	if (n < 8) {
857	56aebc89	pbrook	/* g0..g7 */
858	56aebc89	pbrook	env->gregs[n] = tmp;
859	56aebc89	pbrook	} else if (n < 32) {
860	56aebc89	pbrook	/* register window */
861	56aebc89	pbrook	env->regwptr[n - 8] = tmp;
862	e95c8d51	bellard	}
863	56aebc89	pbrook	#if defined(TARGET_ABI32) \|\| !defined(TARGET_SPARC64)
864	56aebc89	pbrook	else if (n < 64) {
865	56aebc89	pbrook	/* fprs */
866	56aebc89	pbrook	((uint32_t )&env->fpr[n - 32]) = tmp;
867	56aebc89	pbrook	} else {
868	56aebc89	pbrook	/* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
869	56aebc89	pbrook	switch (n) {
870	56aebc89	pbrook	case 64: env->y = tmp; break;
871	56aebc89	pbrook	case 65: PUT_PSR(env, tmp); break;
872	56aebc89	pbrook	case 66: env->wim = tmp; break;
873	56aebc89	pbrook	case 67: env->tbr = tmp; break;
874	56aebc89	pbrook	case 68: env->pc = tmp; break;
875	56aebc89	pbrook	case 69: env->npc = tmp; break;
876	56aebc89	pbrook	case 70: env->fsr = tmp; break;
877	56aebc89	pbrook	default: return 0;
878	56aebc89	pbrook	}
879	e95c8d51	bellard	}
880	56aebc89	pbrook	return 4;
881	3475187d	bellard	#else
882	56aebc89	pbrook	else if (n < 64) {
883	56aebc89	pbrook	/* f0-f31 */
884	56aebc89	pbrook	env->fpr[n] = ldfl_p(mem_buf);
885	56aebc89	pbrook	return 4;
886	56aebc89	pbrook	} else if (n < 80) {
887	56aebc89	pbrook	/* f32-f62 (double width, even numbers only) */
888	56aebc89	pbrook	((uint32_t )&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
889	56aebc89	pbrook	((uint32_t )&env->fpr[(n - 64) * 2 + 33]) = tmp;
890	56aebc89	pbrook	} else {
891	56aebc89	pbrook	switch (n) {
892	56aebc89	pbrook	case 80: env->pc = tmp; break;
893	56aebc89	pbrook	case 81: env->npc = tmp; break;
894	56aebc89	pbrook	case 82:
895	56aebc89	pbrook	PUT_CCR(env, tmp >> 32);
896	56aebc89	pbrook	env->asi = (tmp >> 24) & 0xff;
897	56aebc89	pbrook	env->pstate = (tmp >> 8) & 0xfff;
898	56aebc89	pbrook	PUT_CWP64(env, tmp & 0xff);
899	56aebc89	pbrook	break;
900	56aebc89	pbrook	case 83: env->fsr = tmp; break;
901	56aebc89	pbrook	case 84: env->fprs = tmp; break;
902	56aebc89	pbrook	case 85: env->y = tmp; break;
903	56aebc89	pbrook	default: return 0;
904	56aebc89	pbrook	}
905	17d996e1	blueswir1	}
906	56aebc89	pbrook	return 8;
907	3475187d	bellard	#endif
908	9e62fd7f	bellard	}
909	1fddef4b	bellard	#elif defined (TARGET_ARM)
910	6da41eaf	bellard
911	56aebc89	pbrook	/* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
912	56aebc89	pbrook	whatever the target description contains. Due to a historical mishap
913	56aebc89	pbrook	the FPA registers appear in between core integer regs and the CPSR.
914	56aebc89	pbrook	We hack round this by giving the FPA regs zero size when talking to a
915	56aebc89	pbrook	newer gdb. */
916	56aebc89	pbrook	#define NUM_CORE_REGS 26
917	56aebc89	pbrook	#define GDB_CORE_XML "arm-core.xml"
918	e6e5906b	pbrook
919	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
920	e6e5906b	pbrook	{
921	56aebc89	pbrook	if (n < 16) {
922	56aebc89	pbrook	/* Core integer register. */
923	56aebc89	pbrook	GET_REG32(env->regs[n]);
924	56aebc89	pbrook	}
925	56aebc89	pbrook	if (n < 24) {
926	56aebc89	pbrook	/* FPA registers. */
927	56aebc89	pbrook	if (gdb_has_xml)
928	56aebc89	pbrook	return 0;
929	56aebc89	pbrook	memset(mem_buf, 0, 12);
930	56aebc89	pbrook	return 12;
931	56aebc89	pbrook	}
932	56aebc89	pbrook	switch (n) {
933	56aebc89	pbrook	case 24:
934	56aebc89	pbrook	/* FPA status register. */
935	56aebc89	pbrook	if (gdb_has_xml)
936	56aebc89	pbrook	return 0;
937	56aebc89	pbrook	GET_REG32(0);
938	56aebc89	pbrook	case 25:
939	56aebc89	pbrook	/* CPSR */
940	56aebc89	pbrook	GET_REG32(cpsr_read(env));
941	56aebc89	pbrook	}
942	56aebc89	pbrook	/* Unknown register. */
943	56aebc89	pbrook	return 0;
944	e6e5906b	pbrook	}
945	6f970bd9	bellard
946	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
947	56aebc89	pbrook	{
948	56aebc89	pbrook	uint32_t tmp;
949	6f970bd9	bellard
950	56aebc89	pbrook	tmp = ldl_p(mem_buf);
951	6f970bd9	bellard
952	56aebc89	pbrook	/* Mask out low bit of PC to workaround gdb bugs. This will probably
953	56aebc89	pbrook	cause problems if we ever implement the Jazelle DBX extensions. */
954	56aebc89	pbrook	if (n == 15)
955	56aebc89	pbrook	tmp &= ~1;
956	6f970bd9	bellard
957	56aebc89	pbrook	if (n < 16) {
958	56aebc89	pbrook	/* Core integer register. */
959	56aebc89	pbrook	env->regs[n] = tmp;
960	56aebc89	pbrook	return 4;
961	56aebc89	pbrook	}
962	56aebc89	pbrook	if (n < 24) { /* 16-23 */
963	56aebc89	pbrook	/* FPA registers (ignored). */
964	56aebc89	pbrook	if (gdb_has_xml)
965	56aebc89	pbrook	return 0;
966	56aebc89	pbrook	return 12;
967	56aebc89	pbrook	}
968	56aebc89	pbrook	switch (n) {
969	56aebc89	pbrook	case 24:
970	56aebc89	pbrook	/* FPA status register (ignored). */
971	56aebc89	pbrook	if (gdb_has_xml)
972	56aebc89	pbrook	return 0;
973	56aebc89	pbrook	return 4;
974	56aebc89	pbrook	case 25:
975	56aebc89	pbrook	/* CPSR */
976	56aebc89	pbrook	cpsr_write (env, tmp, 0xffffffff);
977	56aebc89	pbrook	return 4;
978	56aebc89	pbrook	}
979	56aebc89	pbrook	/* Unknown register. */
980	56aebc89	pbrook	return 0;
981	56aebc89	pbrook	}
982	6f970bd9	bellard
983	56aebc89	pbrook	#elif defined (TARGET_M68K)
984	6f970bd9	bellard
985	56aebc89	pbrook	#define NUM_CORE_REGS 18
986	6f970bd9	bellard
987	56aebc89	pbrook	#define GDB_CORE_XML "cf-core.xml"
988	6f970bd9	bellard
989	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
990	56aebc89	pbrook	{
991	56aebc89	pbrook	if (n < 8) {
992	56aebc89	pbrook	/* D0-D7 */
993	56aebc89	pbrook	GET_REG32(env->dregs[n]);
994	56aebc89	pbrook	} else if (n < 16) {
995	56aebc89	pbrook	/* A0-A7 */
996	56aebc89	pbrook	GET_REG32(env->aregs[n - 8]);
997	56aebc89	pbrook	} else {
998	56aebc89	pbrook	switch (n) {
999	56aebc89	pbrook	case 16: GET_REG32(env->sr);
1000	56aebc89	pbrook	case 17: GET_REG32(env->pc);
1001	56aebc89	pbrook	}
1002	56aebc89	pbrook	}
1003	56aebc89	pbrook	/* FP registers not included here because they vary between
1004	56aebc89	pbrook	ColdFire and m68k. Use XML bits for these. */
1005	56aebc89	pbrook	return 0;
1006	56aebc89	pbrook	}
1007	8e33c08c	ths
1008	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1009	56aebc89	pbrook	{
1010	56aebc89	pbrook	uint32_t tmp;
1011	8e33c08c	ths
1012	56aebc89	pbrook	tmp = ldl_p(mem_buf);
1013	8e33c08c	ths
1014	56aebc89	pbrook	if (n < 8) {
1015	56aebc89	pbrook	/* D0-D7 */
1016	56aebc89	pbrook	env->dregs[n] = tmp;
1017	b3d6b959	Kazu Hirata	} else if (n < 16) {
1018	56aebc89	pbrook	/* A0-A7 */
1019	56aebc89	pbrook	env->aregs[n - 8] = tmp;
1020	56aebc89	pbrook	} else {
1021	56aebc89	pbrook	switch (n) {
1022	56aebc89	pbrook	case 16: env->sr = tmp; break;
1023	56aebc89	pbrook	case 17: env->pc = tmp; break;
1024	56aebc89	pbrook	default: return 0;
1025	56aebc89	pbrook	}
1026	56aebc89	pbrook	}
1027	56aebc89	pbrook	return 4;
1028	56aebc89	pbrook	}
1029	56aebc89	pbrook	#elif defined (TARGET_MIPS)
1030	7ac256b8	ths
1031	56aebc89	pbrook	#define NUM_CORE_REGS 73
1032	7ac256b8	ths
1033	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1034	56aebc89	pbrook	{
1035	56aebc89	pbrook	if (n < 32) {
1036	56aebc89	pbrook	GET_REGL(env->active_tc.gpr[n]);
1037	56aebc89	pbrook	}
1038	56aebc89	pbrook	if (env->CP0_Config1 & (1 << CP0C1_FP)) {
1039	56aebc89	pbrook	if (n >= 38 && n < 70) {
1040	56aebc89	pbrook	if (env->CP0_Status & (1 << CP0St_FR))
1041	56aebc89	pbrook	GET_REGL(env->active_fpu.fpr[n - 38].d);
1042	56aebc89	pbrook	else
1043	56aebc89	pbrook	GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
1044	56aebc89	pbrook	}
1045	56aebc89	pbrook	switch (n) {
1046	56aebc89	pbrook	case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
1047	56aebc89	pbrook	case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
1048	56aebc89	pbrook	}
1049	56aebc89	pbrook	}
1050	56aebc89	pbrook	switch (n) {
1051	56aebc89	pbrook	case 32: GET_REGL((int32_t)env->CP0_Status);
1052	56aebc89	pbrook	case 33: GET_REGL(env->active_tc.LO[0]);
1053	56aebc89	pbrook	case 34: GET_REGL(env->active_tc.HI[0]);
1054	56aebc89	pbrook	case 35: GET_REGL(env->CP0_BadVAddr);
1055	56aebc89	pbrook	case 36: GET_REGL((int32_t)env->CP0_Cause);
1056	ff1d1977	Nathan Froyd	case 37: GET_REGL(env->active_tc.PC \| !!(env->hflags & MIPS_HFLAG_M16));
1057	56aebc89	pbrook	case 72: GET_REGL(0); /* fp */
1058	56aebc89	pbrook	case 89: GET_REGL((int32_t)env->CP0_PRid);
1059	56aebc89	pbrook	}
1060	56aebc89	pbrook	if (n >= 73 && n <= 88) {
1061	56aebc89	pbrook	/* 16 embedded regs. */
1062	56aebc89	pbrook	GET_REGL(0);
1063	56aebc89	pbrook	}
1064	6f970bd9	bellard
1065	56aebc89	pbrook	return 0;
1066	6f970bd9	bellard	}
1067	6f970bd9	bellard
1068	8e33c08c	ths	/* convert MIPS rounding mode in FCR31 to IEEE library */
1069	8e33c08c	ths	static unsigned int ieee_rm[] =
1070	8e33c08c	ths	{
1071	8e33c08c	ths	float_round_nearest_even,
1072	8e33c08c	ths	float_round_to_zero,
1073	8e33c08c	ths	float_round_up,
1074	8e33c08c	ths	float_round_down
1075	8e33c08c	ths	};
1076	8e33c08c	ths	#define RESTORE_ROUNDING_MODE \
1077	f01be154	ths	set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1078	8e33c08c	ths
1079	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1080	6f970bd9	bellard	{
1081	56aebc89	pbrook	target_ulong tmp;
1082	6f970bd9	bellard
1083	56aebc89	pbrook	tmp = ldtul_p(mem_buf);
1084	6f970bd9	bellard
1085	56aebc89	pbrook	if (n < 32) {
1086	56aebc89	pbrook	env->active_tc.gpr[n] = tmp;
1087	56aebc89	pbrook	return sizeof(target_ulong);
1088	56aebc89	pbrook	}
1089	56aebc89	pbrook	if (env->CP0_Config1 & (1 << CP0C1_FP)
1090	56aebc89	pbrook	&& n >= 38 && n < 73) {
1091	56aebc89	pbrook	if (n < 70) {
1092	7ac256b8	ths	if (env->CP0_Status & (1 << CP0St_FR))
1093	56aebc89	pbrook	env->active_fpu.fpr[n - 38].d = tmp;
1094	7ac256b8	ths	else
1095	56aebc89	pbrook	env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1096	56aebc89	pbrook	}
1097	56aebc89	pbrook	switch (n) {
1098	56aebc89	pbrook	case 70:
1099	56aebc89	pbrook	env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1100	56aebc89	pbrook	/* set rounding mode */
1101	56aebc89	pbrook	RESTORE_ROUNDING_MODE;
1102	8e33c08c	ths	#ifndef CONFIG_SOFTFLOAT
1103	56aebc89	pbrook	/* no floating point exception for native float */
1104	56aebc89	pbrook	SET_FP_ENABLE(env->active_fpu.fcr31, 0);
1105	8e33c08c	ths	#endif
1106	56aebc89	pbrook	break;
1107	56aebc89	pbrook	case 71: env->active_fpu.fcr0 = tmp; break;
1108	56aebc89	pbrook	}
1109	56aebc89	pbrook	return sizeof(target_ulong);
1110	56aebc89	pbrook	}
1111	56aebc89	pbrook	switch (n) {
1112	56aebc89	pbrook	case 32: env->CP0_Status = tmp; break;
1113	56aebc89	pbrook	case 33: env->active_tc.LO[0] = tmp; break;
1114	56aebc89	pbrook	case 34: env->active_tc.HI[0] = tmp; break;
1115	56aebc89	pbrook	case 35: env->CP0_BadVAddr = tmp; break;
1116	56aebc89	pbrook	case 36: env->CP0_Cause = tmp; break;
1117	ff1d1977	Nathan Froyd	case 37:
1118	ff1d1977	Nathan Froyd	env->active_tc.PC = tmp & ~(target_ulong)1;
1119	ff1d1977	Nathan Froyd	if (tmp & 1) {
1120	ff1d1977	Nathan Froyd	env->hflags \|= MIPS_HFLAG_M16;
1121	ff1d1977	Nathan Froyd	} else {
1122	ff1d1977	Nathan Froyd	env->hflags &= ~(MIPS_HFLAG_M16);
1123	ff1d1977	Nathan Froyd	}
1124	ff1d1977	Nathan Froyd	break;
1125	56aebc89	pbrook	case 72: /* fp, ignored */ break;
1126	56aebc89	pbrook	default:
1127	56aebc89	pbrook	if (n > 89)
1128	56aebc89	pbrook	return 0;
1129	56aebc89	pbrook	/* Other registers are readonly. Ignore writes. */
1130	56aebc89	pbrook	break;
1131	56aebc89	pbrook	}
1132	56aebc89	pbrook
1133	56aebc89	pbrook	return sizeof(target_ulong);
1134	6f970bd9	bellard	}
1135	fdf9b3e8	bellard	#elif defined (TARGET_SH4)
1136	6ef99fc5	ths
1137	6ef99fc5	ths	/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1138	56aebc89	pbrook	/* FIXME: We should use XML for this. */
1139	56aebc89	pbrook
1140	56aebc89	pbrook	#define NUM_CORE_REGS 59
1141	6ef99fc5	ths
1142	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1143	fdf9b3e8	bellard	{
1144	56aebc89	pbrook	if (n < 8) {
1145	56aebc89	pbrook	if ((env->sr & (SR_MD \| SR_RB)) == (SR_MD \| SR_RB)) {
1146	56aebc89	pbrook	GET_REGL(env->gregs[n + 16]);
1147	56aebc89	pbrook	} else {
1148	56aebc89	pbrook	GET_REGL(env->gregs[n]);
1149	56aebc89	pbrook	}
1150	56aebc89	pbrook	} else if (n < 16) {
1151	56aebc89	pbrook	GET_REGL(env->gregs[n - 8]);
1152	56aebc89	pbrook	} else if (n >= 25 && n < 41) {
1153	56aebc89	pbrook	GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1154	56aebc89	pbrook	} else if (n >= 43 && n < 51) {
1155	56aebc89	pbrook	GET_REGL(env->gregs[n - 43]);
1156	56aebc89	pbrook	} else if (n >= 51 && n < 59) {
1157	56aebc89	pbrook	GET_REGL(env->gregs[n - (51 - 16)]);
1158	56aebc89	pbrook	}
1159	56aebc89	pbrook	switch (n) {
1160	56aebc89	pbrook	case 16: GET_REGL(env->pc);
1161	56aebc89	pbrook	case 17: GET_REGL(env->pr);
1162	56aebc89	pbrook	case 18: GET_REGL(env->gbr);
1163	56aebc89	pbrook	case 19: GET_REGL(env->vbr);
1164	56aebc89	pbrook	case 20: GET_REGL(env->mach);
1165	56aebc89	pbrook	case 21: GET_REGL(env->macl);
1166	56aebc89	pbrook	case 22: GET_REGL(env->sr);
1167	56aebc89	pbrook	case 23: GET_REGL(env->fpul);
1168	56aebc89	pbrook	case 24: GET_REGL(env->fpscr);
1169	56aebc89	pbrook	case 41: GET_REGL(env->ssr);
1170	56aebc89	pbrook	case 42: GET_REGL(env->spc);
1171	56aebc89	pbrook	}
1172	56aebc89	pbrook
1173	56aebc89	pbrook	return 0;
1174	fdf9b3e8	bellard	}
1175	fdf9b3e8	bellard
1176	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1177	fdf9b3e8	bellard	{
1178	56aebc89	pbrook	uint32_t tmp;
1179	56aebc89	pbrook
1180	56aebc89	pbrook	tmp = ldl_p(mem_buf);
1181	56aebc89	pbrook
1182	56aebc89	pbrook	if (n < 8) {
1183	56aebc89	pbrook	if ((env->sr & (SR_MD \| SR_RB)) == (SR_MD \| SR_RB)) {
1184	56aebc89	pbrook	env->gregs[n + 16] = tmp;
1185	56aebc89	pbrook	} else {
1186	56aebc89	pbrook	env->gregs[n] = tmp;
1187	56aebc89	pbrook	}
1188	56aebc89	pbrook	return 4;
1189	56aebc89	pbrook	} else if (n < 16) {
1190	56aebc89	pbrook	env->gregs[n - 8] = tmp;
1191	56aebc89	pbrook	return 4;
1192	56aebc89	pbrook	} else if (n >= 25 && n < 41) {
1193	56aebc89	pbrook	env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1194	56aebc89	pbrook	} else if (n >= 43 && n < 51) {
1195	56aebc89	pbrook	env->gregs[n - 43] = tmp;
1196	56aebc89	pbrook	return 4;
1197	56aebc89	pbrook	} else if (n >= 51 && n < 59) {
1198	56aebc89	pbrook	env->gregs[n - (51 - 16)] = tmp;
1199	56aebc89	pbrook	return 4;
1200	56aebc89	pbrook	}
1201	56aebc89	pbrook	switch (n) {
1202	56aebc89	pbrook	case 16: env->pc = tmp;
1203	56aebc89	pbrook	case 17: env->pr = tmp;
1204	56aebc89	pbrook	case 18: env->gbr = tmp;
1205	56aebc89	pbrook	case 19: env->vbr = tmp;
1206	56aebc89	pbrook	case 20: env->mach = tmp;
1207	56aebc89	pbrook	case 21: env->macl = tmp;
1208	56aebc89	pbrook	case 22: env->sr = tmp;
1209	56aebc89	pbrook	case 23: env->fpul = tmp;
1210	56aebc89	pbrook	case 24: env->fpscr = tmp;
1211	56aebc89	pbrook	case 41: env->ssr = tmp;
1212	56aebc89	pbrook	case 42: env->spc = tmp;
1213	56aebc89	pbrook	default: return 0;
1214	56aebc89	pbrook	}
1215	56aebc89	pbrook
1216	56aebc89	pbrook	return 4;
1217	fdf9b3e8	bellard	}
1218	d74d6a99	Edgar E. Iglesias	#elif defined (TARGET_MICROBLAZE)
1219	d74d6a99	Edgar E. Iglesias
1220	d74d6a99	Edgar E. Iglesias	#define NUM_CORE_REGS (32 + 5)
1221	d74d6a99	Edgar E. Iglesias
1222	d74d6a99	Edgar E. Iglesias	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1223	d74d6a99	Edgar E. Iglesias	{
1224	d74d6a99	Edgar E. Iglesias	if (n < 32) {
1225	d74d6a99	Edgar E. Iglesias	GET_REG32(env->regs[n]);
1226	d74d6a99	Edgar E. Iglesias	} else {
1227	d74d6a99	Edgar E. Iglesias	GET_REG32(env->sregs[n - 32]);
1228	d74d6a99	Edgar E. Iglesias	}
1229	d74d6a99	Edgar E. Iglesias	return 0;
1230	d74d6a99	Edgar E. Iglesias	}
1231	d74d6a99	Edgar E. Iglesias
1232	d74d6a99	Edgar E. Iglesias	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1233	d74d6a99	Edgar E. Iglesias	{
1234	d74d6a99	Edgar E. Iglesias	uint32_t tmp;
1235	d74d6a99	Edgar E. Iglesias
1236	d74d6a99	Edgar E. Iglesias	if (n > NUM_CORE_REGS)
1237	d74d6a99	Edgar E. Iglesias	return 0;
1238	d74d6a99	Edgar E. Iglesias
1239	d74d6a99	Edgar E. Iglesias	tmp = ldl_p(mem_buf);
1240	d74d6a99	Edgar E. Iglesias
1241	d74d6a99	Edgar E. Iglesias	if (n < 32) {
1242	d74d6a99	Edgar E. Iglesias	env->regs[n] = tmp;
1243	d74d6a99	Edgar E. Iglesias	} else {
1244	d74d6a99	Edgar E. Iglesias	env->sregs[n - 32] = tmp;
1245	d74d6a99	Edgar E. Iglesias	}
1246	d74d6a99	Edgar E. Iglesias	return 4;
1247	d74d6a99	Edgar E. Iglesias	}
1248	f1ccf904	ths	#elif defined (TARGET_CRIS)
1249	f1ccf904	ths
1250	56aebc89	pbrook	#define NUM_CORE_REGS 49
1251	56aebc89	pbrook
1252	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1253	f1ccf904	ths	{
1254	56aebc89	pbrook	uint8_t srs;
1255	56aebc89	pbrook
1256	56aebc89	pbrook	srs = env->pregs[PR_SRS];
1257	56aebc89	pbrook	if (n < 16) {
1258	56aebc89	pbrook	GET_REG32(env->regs[n]);
1259	56aebc89	pbrook	}
1260	56aebc89	pbrook
1261	56aebc89	pbrook	if (n >= 21 && n < 32) {
1262	56aebc89	pbrook	GET_REG32(env->pregs[n - 16]);
1263	56aebc89	pbrook	}
1264	56aebc89	pbrook	if (n >= 33 && n < 49) {
1265	56aebc89	pbrook	GET_REG32(env->sregs[srs][n - 33]);
1266	56aebc89	pbrook	}
1267	56aebc89	pbrook	switch (n) {
1268	56aebc89	pbrook	case 16: GET_REG8(env->pregs[0]);
1269	56aebc89	pbrook	case 17: GET_REG8(env->pregs[1]);
1270	56aebc89	pbrook	case 18: GET_REG32(env->pregs[2]);
1271	56aebc89	pbrook	case 19: GET_REG8(srs);
1272	56aebc89	pbrook	case 20: GET_REG16(env->pregs[4]);
1273	56aebc89	pbrook	case 32: GET_REG32(env->pc);
1274	56aebc89	pbrook	}
1275	56aebc89	pbrook
1276	56aebc89	pbrook	return 0;
1277	f1ccf904	ths	}
1278	56aebc89	pbrook
1279	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1280	f1ccf904	ths	{
1281	56aebc89	pbrook	uint32_t tmp;
1282	56aebc89	pbrook
1283	56aebc89	pbrook	if (n > 49)
1284	56aebc89	pbrook	return 0;
1285	56aebc89	pbrook
1286	56aebc89	pbrook	tmp = ldl_p(mem_buf);
1287	56aebc89	pbrook
1288	56aebc89	pbrook	if (n < 16) {
1289	56aebc89	pbrook	env->regs[n] = tmp;
1290	56aebc89	pbrook	}
1291	56aebc89	pbrook
1292	d7b6967a	edgar_igl	if (n >= 21 && n < 32) {
1293	d7b6967a	edgar_igl	env->pregs[n - 16] = tmp;
1294	d7b6967a	edgar_igl	}
1295	d7b6967a	edgar_igl
1296	d7b6967a	edgar_igl	/* FIXME: Should support function regs be writable? */
1297	56aebc89	pbrook	switch (n) {
1298	56aebc89	pbrook	case 16: return 1;
1299	56aebc89	pbrook	case 17: return 1;
1300	d7b6967a	edgar_igl	case 18: env->pregs[PR_PID] = tmp; break;
1301	56aebc89	pbrook	case 19: return 1;
1302	56aebc89	pbrook	case 20: return 2;
1303	56aebc89	pbrook	case 32: env->pc = tmp; break;
1304	56aebc89	pbrook	}
1305	56aebc89	pbrook
1306	56aebc89	pbrook	return 4;
1307	f1ccf904	ths	}
1308	19bf517b	aurel32	#elif defined (TARGET_ALPHA)
1309	19bf517b	aurel32
1310	19bf517b	aurel32	#define NUM_CORE_REGS 65
1311	19bf517b	aurel32
1312	19bf517b	aurel32	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1313	19bf517b	aurel32	{
1314	19bf517b	aurel32	if (n < 31) {
1315	19bf517b	aurel32	GET_REGL(env->ir[n]);
1316	19bf517b	aurel32	}
1317	19bf517b	aurel32	else if (n == 31) {
1318	19bf517b	aurel32	GET_REGL(0);
1319	19bf517b	aurel32	}
1320	19bf517b	aurel32	else if (n<63) {
1321	19bf517b	aurel32	uint64_t val;
1322	19bf517b	aurel32
1323	8f4bee23	Michael S. Tsirkin	val = ((uint64_t )&env->fir[n-32]);
1324	19bf517b	aurel32	GET_REGL(val);
1325	19bf517b	aurel32	}
1326	19bf517b	aurel32	else if (n==63) {
1327	19bf517b	aurel32	GET_REGL(env->fpcr);
1328	19bf517b	aurel32	}
1329	19bf517b	aurel32	else if (n==64) {
1330	19bf517b	aurel32	GET_REGL(env->pc);
1331	19bf517b	aurel32	}
1332	19bf517b	aurel32	else {
1333	19bf517b	aurel32	GET_REGL(0);
1334	19bf517b	aurel32	}
1335	19bf517b	aurel32
1336	19bf517b	aurel32	return 0;
1337	19bf517b	aurel32	}
1338	19bf517b	aurel32
1339	19bf517b	aurel32	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1340	19bf517b	aurel32	{
1341	19bf517b	aurel32	target_ulong tmp;
1342	19bf517b	aurel32	tmp = ldtul_p(mem_buf);
1343	19bf517b	aurel32
1344	19bf517b	aurel32	if (n < 31) {
1345	19bf517b	aurel32	env->ir[n] = tmp;
1346	19bf517b	aurel32	}
1347	19bf517b	aurel32
1348	19bf517b	aurel32	if (n > 31 && n < 63) {
1349	19bf517b	aurel32	env->fir[n - 32] = ldfl_p(mem_buf);
1350	19bf517b	aurel32	}
1351	19bf517b	aurel32
1352	19bf517b	aurel32	if (n == 64 ) {
1353	19bf517b	aurel32	env->pc=tmp;
1354	19bf517b	aurel32	}
1355	19bf517b	aurel32
1356	19bf517b	aurel32	return 8;
1357	19bf517b	aurel32	}
1358	afcb0e45	Alexander Graf	#elif defined (TARGET_S390X)
1359	afcb0e45	Alexander Graf
1360	afcb0e45	Alexander Graf	#define NUM_CORE_REGS S390_NUM_TOTAL_REGS
1361	afcb0e45	Alexander Graf
1362	afcb0e45	Alexander Graf	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1363	afcb0e45	Alexander Graf	{
1364	afcb0e45	Alexander Graf	switch (n) {
1365	afcb0e45	Alexander Graf	case S390_PSWM_REGNUM: GET_REGL(env->psw.mask); break;
1366	afcb0e45	Alexander Graf	case S390_PSWA_REGNUM: GET_REGL(env->psw.addr); break;
1367	afcb0e45	Alexander Graf	case S390_R0_REGNUM ... S390_R15_REGNUM:
1368	afcb0e45	Alexander Graf	GET_REGL(env->regs[n-S390_R0_REGNUM]); break;
1369	afcb0e45	Alexander Graf	case S390_A0_REGNUM ... S390_A15_REGNUM:
1370	afcb0e45	Alexander Graf	GET_REG32(env->aregs[n-S390_A0_REGNUM]); break;
1371	afcb0e45	Alexander Graf	case S390_FPC_REGNUM: GET_REG32(env->fpc); break;
1372	afcb0e45	Alexander Graf	case S390_F0_REGNUM ... S390_F15_REGNUM:
1373	afcb0e45	Alexander Graf	/* XXX */
1374	afcb0e45	Alexander Graf	break;
1375	afcb0e45	Alexander Graf	case S390_PC_REGNUM: GET_REGL(env->psw.addr); break;
1376	afcb0e45	Alexander Graf	case S390_CC_REGNUM: GET_REG32(env->cc); break;
1377	afcb0e45	Alexander Graf	}
1378	afcb0e45	Alexander Graf
1379	afcb0e45	Alexander Graf	return 0;
1380	afcb0e45	Alexander Graf	}
1381	afcb0e45	Alexander Graf
1382	afcb0e45	Alexander Graf	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1383	afcb0e45	Alexander Graf	{
1384	afcb0e45	Alexander Graf	target_ulong tmpl;
1385	afcb0e45	Alexander Graf	uint32_t tmp32;
1386	afcb0e45	Alexander Graf	int r = 8;
1387	afcb0e45	Alexander Graf	tmpl = ldtul_p(mem_buf);
1388	afcb0e45	Alexander Graf	tmp32 = ldl_p(mem_buf);
1389	afcb0e45	Alexander Graf
1390	afcb0e45	Alexander Graf	switch (n) {
1391	afcb0e45	Alexander Graf	case S390_PSWM_REGNUM: env->psw.mask = tmpl; break;
1392	afcb0e45	Alexander Graf	case S390_PSWA_REGNUM: env->psw.addr = tmpl; break;
1393	afcb0e45	Alexander Graf	case S390_R0_REGNUM ... S390_R15_REGNUM:
1394	afcb0e45	Alexander Graf	env->regs[n-S390_R0_REGNUM] = tmpl; break;
1395	afcb0e45	Alexander Graf	case S390_A0_REGNUM ... S390_A15_REGNUM:
1396	afcb0e45	Alexander Graf	env->aregs[n-S390_A0_REGNUM] = tmp32; r=4; break;
1397	afcb0e45	Alexander Graf	case S390_FPC_REGNUM: env->fpc = tmp32; r=4; break;
1398	afcb0e45	Alexander Graf	case S390_F0_REGNUM ... S390_F15_REGNUM:
1399	afcb0e45	Alexander Graf	/* XXX */
1400	afcb0e45	Alexander Graf	break;
1401	afcb0e45	Alexander Graf	case S390_PC_REGNUM: env->psw.addr = tmpl; break;
1402	afcb0e45	Alexander Graf	case S390_CC_REGNUM: env->cc = tmp32; r=4; break;
1403	afcb0e45	Alexander Graf	}
1404	afcb0e45	Alexander Graf
1405	afcb0e45	Alexander Graf	return r;
1406	afcb0e45	Alexander Graf	}
1407	56aebc89	pbrook	#else
1408	56aebc89	pbrook
1409	56aebc89	pbrook	#define NUM_CORE_REGS 0
1410	56aebc89	pbrook
1411	56aebc89	pbrook	static int cpu_gdb_read_register(CPUState env, uint8_t mem_buf, int n)
1412	f1ccf904	ths	{
1413	56aebc89	pbrook	return 0;
1414	f1ccf904	ths	}
1415	f1ccf904	ths
1416	56aebc89	pbrook	static int cpu_gdb_write_register(CPUState env, uint8_t mem_buf, int n)
1417	f1ccf904	ths	{
1418	56aebc89	pbrook	return 0;
1419	56aebc89	pbrook	}
1420	f1ccf904	ths
1421	56aebc89	pbrook	#endif
1422	f1ccf904	ths
1423	56aebc89	pbrook	static int num_g_regs = NUM_CORE_REGS;
1424	f1ccf904	ths
1425	56aebc89	pbrook	#ifdef GDB_CORE_XML
1426	56aebc89	pbrook	/* Encode data using the encoding for 'x' packets. */
1427	56aebc89	pbrook	static int memtox(char buf, const char mem, int len)
1428	56aebc89	pbrook	{
1429	56aebc89	pbrook	char *p = buf;
1430	56aebc89	pbrook	char c;
1431	56aebc89	pbrook
1432	56aebc89	pbrook	while (len--) {
1433	56aebc89	pbrook	c = *(mem++);
1434	56aebc89	pbrook	switch (c) {
1435	56aebc89	pbrook	case '#': case '$': case '*': case '}':
1436	56aebc89	pbrook	*(p++) = '}';
1437	56aebc89	pbrook	*(p++) = c ^ 0x20;
1438	56aebc89	pbrook	break;
1439	56aebc89	pbrook	default:
1440	56aebc89	pbrook	*(p++) = c;
1441	56aebc89	pbrook	break;
1442	56aebc89	pbrook	}
1443	56aebc89	pbrook	}
1444	56aebc89	pbrook	return p - buf;
1445	56aebc89	pbrook	}
1446	f1ccf904	ths
1447	3faf778e	aurel32	static const char get_feature_xml(const char p, const char **newp)
1448	56aebc89	pbrook	{
1449	56aebc89	pbrook	extern const char *const xml_builtin[][2];
1450	56aebc89	pbrook	size_t len;
1451	56aebc89	pbrook	int i;
1452	56aebc89	pbrook	const char *name;
1453	56aebc89	pbrook	static char target_xml[1024];
1454	56aebc89	pbrook
1455	56aebc89	pbrook	len = 0;
1456	56aebc89	pbrook	while (p[len] && p[len] != ':')
1457	56aebc89	pbrook	len++;
1458	56aebc89	pbrook	*newp = p + len;
1459	56aebc89	pbrook
1460	56aebc89	pbrook	name = NULL;
1461	56aebc89	pbrook	if (strncmp(p, "target.xml", len) == 0) {
1462	56aebc89	pbrook	/* Generate the XML description for this CPU. */
1463	56aebc89	pbrook	if (!target_xml[0]) {
1464	56aebc89	pbrook	GDBRegisterState *r;
1465	56aebc89	pbrook
1466	5b3715bf	blueswir1	snprintf(target_xml, sizeof(target_xml),
1467	5b3715bf	blueswir1	"<?xml version=\"1.0\"?>"
1468	5b3715bf	blueswir1	"<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1469	5b3715bf	blueswir1	"<target>"
1470	5b3715bf	blueswir1	"<xi:include href=\"%s\"/>",
1471	5b3715bf	blueswir1	GDB_CORE_XML);
1472	56aebc89	pbrook
1473	880a7578	aliguori	for (r = first_cpu->gdb_regs; r; r = r->next) {
1474	2dc766da	blueswir1	pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\"");
1475	2dc766da	blueswir1	pstrcat(target_xml, sizeof(target_xml), r->xml);
1476	2dc766da	blueswir1	pstrcat(target_xml, sizeof(target_xml), "\"/>");
1477	56aebc89	pbrook	}
1478	2dc766da	blueswir1	pstrcat(target_xml, sizeof(target_xml), "</target>");
1479	56aebc89	pbrook	}
1480	56aebc89	pbrook	return target_xml;
1481	56aebc89	pbrook	}
1482	56aebc89	pbrook	for (i = 0; ; i++) {
1483	56aebc89	pbrook	name = xml_builtin[i][0];
1484	56aebc89	pbrook	if (!name \|\| (strncmp(name, p, len) == 0 && strlen(name) == len))
1485	56aebc89	pbrook	break;
1486	56aebc89	pbrook	}
1487	56aebc89	pbrook	return name ? xml_builtin[i][1] : NULL;
1488	56aebc89	pbrook	}
1489	56aebc89	pbrook	#endif
1490	f1ccf904	ths
1491	56aebc89	pbrook	static int gdb_read_register(CPUState env, uint8_t mem_buf, int reg)
1492	56aebc89	pbrook	{
1493	56aebc89	pbrook	GDBRegisterState *r;
1494	f1ccf904	ths
1495	56aebc89	pbrook	if (reg < NUM_CORE_REGS)
1496	56aebc89	pbrook	return cpu_gdb_read_register(env, mem_buf, reg);
1497	f1ccf904	ths
1498	56aebc89	pbrook	for (r = env->gdb_regs; r; r = r->next) {
1499	56aebc89	pbrook	if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1500	56aebc89	pbrook	return r->get_reg(env, mem_buf, reg - r->base_reg);
1501	56aebc89	pbrook	}
1502	56aebc89	pbrook	}
1503	56aebc89	pbrook	return 0;
1504	f1ccf904	ths	}
1505	f1ccf904	ths
1506	56aebc89	pbrook	static int gdb_write_register(CPUState env, uint8_t mem_buf, int reg)
1507	f1ccf904	ths	{
1508	56aebc89	pbrook	GDBRegisterState *r;
1509	f1ccf904	ths
1510	56aebc89	pbrook	if (reg < NUM_CORE_REGS)
1511	56aebc89	pbrook	return cpu_gdb_write_register(env, mem_buf, reg);
1512	56aebc89	pbrook
1513	56aebc89	pbrook	for (r = env->gdb_regs; r; r = r->next) {
1514	56aebc89	pbrook	if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1515	56aebc89	pbrook	return r->set_reg(env, mem_buf, reg - r->base_reg);
1516	56aebc89	pbrook	}
1517	56aebc89	pbrook	}
1518	6da41eaf	bellard	return 0;
1519	6da41eaf	bellard	}
1520	6da41eaf	bellard
1521	56aebc89	pbrook	/* Register a supplemental set of CPU registers. If g_pos is nonzero it
1522	56aebc89	pbrook	specifies the first register number and these registers are included in
1523	56aebc89	pbrook	a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
1524	56aebc89	pbrook	gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1525	56aebc89	pbrook	*/
1526	56aebc89	pbrook
1527	56aebc89	pbrook	void gdb_register_coprocessor(CPUState * env,
1528	56aebc89	pbrook	gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1529	56aebc89	pbrook	int num_regs, const char *xml, int g_pos)
1530	6da41eaf	bellard	{
1531	56aebc89	pbrook	GDBRegisterState *s;
1532	56aebc89	pbrook	GDBRegisterState **p;
1533	56aebc89	pbrook	static int last_reg = NUM_CORE_REGS;
1534	56aebc89	pbrook
1535	56aebc89	pbrook	s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1536	56aebc89	pbrook	s->base_reg = last_reg;
1537	56aebc89	pbrook	s->num_regs = num_regs;
1538	56aebc89	pbrook	s->get_reg = get_reg;
1539	56aebc89	pbrook	s->set_reg = set_reg;
1540	56aebc89	pbrook	s->xml = xml;
1541	56aebc89	pbrook	p = &env->gdb_regs;
1542	56aebc89	pbrook	while (*p) {
1543	56aebc89	pbrook	/* Check for duplicates. */
1544	56aebc89	pbrook	if (strcmp((*p)->xml, xml) == 0)
1545	56aebc89	pbrook	return;
1546	56aebc89	pbrook	p = &(*p)->next;
1547	56aebc89	pbrook	}
1548	56aebc89	pbrook	/* Add to end of list. */
1549	56aebc89	pbrook	last_reg += num_regs;
1550	56aebc89	pbrook	*p = s;
1551	56aebc89	pbrook	if (g_pos) {
1552	56aebc89	pbrook	if (g_pos != s->base_reg) {
1553	56aebc89	pbrook	fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1554	56aebc89	pbrook	"Expected %d got %d\n", xml, g_pos, s->base_reg);
1555	56aebc89	pbrook	} else {
1556	56aebc89	pbrook	num_g_regs = last_reg;
1557	56aebc89	pbrook	}
1558	56aebc89	pbrook	}
1559	6da41eaf	bellard	}
1560	6da41eaf	bellard
1561	a1d1bb31	aliguori	#ifndef CONFIG_USER_ONLY
1562	a1d1bb31	aliguori	static const int xlat_gdb_type[] = {
1563	a1d1bb31	aliguori	[GDB_WATCHPOINT_WRITE] = BP_GDB \| BP_MEM_WRITE,
1564	a1d1bb31	aliguori	[GDB_WATCHPOINT_READ] = BP_GDB \| BP_MEM_READ,
1565	a1d1bb31	aliguori	[GDB_WATCHPOINT_ACCESS] = BP_GDB \| BP_MEM_ACCESS,
1566	a1d1bb31	aliguori	};
1567	a1d1bb31	aliguori	#endif
1568	a1d1bb31	aliguori
1569	880a7578	aliguori	static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1570	a1d1bb31	aliguori	{
1571	880a7578	aliguori	CPUState *env;
1572	880a7578	aliguori	int err = 0;
1573	880a7578	aliguori
1574	e22a25c9	aliguori	if (kvm_enabled())
1575	e22a25c9	aliguori	return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1576	e22a25c9	aliguori
1577	a1d1bb31	aliguori	switch (type) {
1578	a1d1bb31	aliguori	case GDB_BREAKPOINT_SW:
1579	a1d1bb31	aliguori	case GDB_BREAKPOINT_HW:
1580	880a7578	aliguori	for (env = first_cpu; env != NULL; env = env->next_cpu) {
1581	880a7578	aliguori	err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1582	880a7578	aliguori	if (err)
1583	880a7578	aliguori	break;
1584	880a7578	aliguori	}
1585	880a7578	aliguori	return err;
1586	a1d1bb31	aliguori	#ifndef CONFIG_USER_ONLY
1587	a1d1bb31	aliguori	case GDB_WATCHPOINT_WRITE:
1588	a1d1bb31	aliguori	case GDB_WATCHPOINT_READ:
1589	a1d1bb31	aliguori	case GDB_WATCHPOINT_ACCESS:
1590	880a7578	aliguori	for (env = first_cpu; env != NULL; env = env->next_cpu) {
1591	880a7578	aliguori	err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1592	880a7578	aliguori	NULL);
1593	880a7578	aliguori	if (err)
1594	880a7578	aliguori	break;
1595	880a7578	aliguori	}
1596	880a7578	aliguori	return err;
1597	a1d1bb31	aliguori	#endif
1598	a1d1bb31	aliguori	default:
1599	a1d1bb31	aliguori	return -ENOSYS;
1600	a1d1bb31	aliguori	}
1601	a1d1bb31	aliguori	}
1602	a1d1bb31	aliguori
1603	880a7578	aliguori	static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1604	a1d1bb31	aliguori	{
1605	880a7578	aliguori	CPUState *env;
1606	880a7578	aliguori	int err = 0;
1607	880a7578	aliguori
1608	e22a25c9	aliguori	if (kvm_enabled())
1609	e22a25c9	aliguori	return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1610	e22a25c9	aliguori
1611	a1d1bb31	aliguori	switch (type) {
1612	a1d1bb31	aliguori	case GDB_BREAKPOINT_SW:
1613	a1d1bb31	aliguori	case GDB_BREAKPOINT_HW:
1614	880a7578	aliguori	for (env = first_cpu; env != NULL; env = env->next_cpu) {
1615	880a7578	aliguori	err = cpu_breakpoint_remove(env, addr, BP_GDB);
1616	880a7578	aliguori	if (err)
1617	880a7578	aliguori	break;
1618	880a7578	aliguori	}
1619	880a7578	aliguori	return err;
1620	a1d1bb31	aliguori	#ifndef CONFIG_USER_ONLY
1621	a1d1bb31	aliguori	case GDB_WATCHPOINT_WRITE:
1622	a1d1bb31	aliguori	case GDB_WATCHPOINT_READ:
1623	a1d1bb31	aliguori	case GDB_WATCHPOINT_ACCESS:
1624	880a7578	aliguori	for (env = first_cpu; env != NULL; env = env->next_cpu) {
1625	880a7578	aliguori	err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1626	880a7578	aliguori	if (err)
1627	880a7578	aliguori	break;
1628	880a7578	aliguori	}
1629	880a7578	aliguori	return err;
1630	a1d1bb31	aliguori	#endif
1631	a1d1bb31	aliguori	default:
1632	a1d1bb31	aliguori	return -ENOSYS;
1633	a1d1bb31	aliguori	}
1634	a1d1bb31	aliguori	}
1635	a1d1bb31	aliguori
1636	880a7578	aliguori	static void gdb_breakpoint_remove_all(void)
1637	a1d1bb31	aliguori	{
1638	880a7578	aliguori	CPUState *env;
1639	880a7578	aliguori
1640	e22a25c9	aliguori	if (kvm_enabled()) {
1641	e22a25c9	aliguori	kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1642	e22a25c9	aliguori	return;
1643	e22a25c9	aliguori	}
1644	e22a25c9	aliguori
1645	880a7578	aliguori	for (env = first_cpu; env != NULL; env = env->next_cpu) {
1646	880a7578	aliguori	cpu_breakpoint_remove_all(env, BP_GDB);
1647	a1d1bb31	aliguori	#ifndef CONFIG_USER_ONLY
1648	880a7578	aliguori	cpu_watchpoint_remove_all(env, BP_GDB);
1649	a1d1bb31	aliguori	#endif
1650	880a7578	aliguori	}
1651	a1d1bb31	aliguori	}
1652	a1d1bb31	aliguori
1653	fab9d284	aurel32	static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
1654	fab9d284	aurel32	{
1655	fab9d284	aurel32	#if defined(TARGET_I386)
1656	4c0960c0	Avi Kivity	cpu_synchronize_state(s->c_cpu);
1657	fab9d284	aurel32	s->c_cpu->eip = pc;
1658	fab9d284	aurel32	#elif defined (TARGET_PPC)
1659	fab9d284	aurel32	s->c_cpu->nip = pc;
1660	fab9d284	aurel32	#elif defined (TARGET_SPARC)
1661	fab9d284	aurel32	s->c_cpu->pc = pc;
1662	fab9d284	aurel32	s->c_cpu->npc = pc + 4;
1663	fab9d284	aurel32	#elif defined (TARGET_ARM)
1664	fab9d284	aurel32	s->c_cpu->regs[15] = pc;
1665	fab9d284	aurel32	#elif defined (TARGET_SH4)
1666	fab9d284	aurel32	s->c_cpu->pc = pc;
1667	fab9d284	aurel32	#elif defined (TARGET_MIPS)
1668	ff1d1977	Nathan Froyd	s->c_cpu->active_tc.PC = pc & ~(target_ulong)1;
1669	ff1d1977	Nathan Froyd	if (pc & 1) {
1670	ff1d1977	Nathan Froyd	s->c_cpu->hflags \|= MIPS_HFLAG_M16;
1671	ff1d1977	Nathan Froyd	} else {
1672	ff1d1977	Nathan Froyd	s->c_cpu->hflags &= ~(MIPS_HFLAG_M16);
1673	ff1d1977	Nathan Froyd	}
1674	d74d6a99	Edgar E. Iglesias	#elif defined (TARGET_MICROBLAZE)
1675	d74d6a99	Edgar E. Iglesias	s->c_cpu->sregs[SR_PC] = pc;
1676	fab9d284	aurel32	#elif defined (TARGET_CRIS)
1677	fab9d284	aurel32	s->c_cpu->pc = pc;
1678	fab9d284	aurel32	#elif defined (TARGET_ALPHA)
1679	fab9d284	aurel32	s->c_cpu->pc = pc;
1680	afcb0e45	Alexander Graf	#elif defined (TARGET_S390X)
1681	afcb0e45	Alexander Graf	cpu_synchronize_state(s->c_cpu);
1682	afcb0e45	Alexander Graf	s->c_cpu->psw.addr = pc;
1683	fab9d284	aurel32	#endif
1684	fab9d284	aurel32	}
1685	fab9d284	aurel32
1686	1e9fa730	Nathan Froyd	static inline int gdb_id(CPUState *env)
1687	1e9fa730	Nathan Froyd	{
1688	2f7bb878	Juan Quintela	#if defined(CONFIG_USER_ONLY) && defined(CONFIG_USE_NPTL)
1689	1e9fa730	Nathan Froyd	return env->host_tid;
1690	1e9fa730	Nathan Froyd	#else
1691	1e9fa730	Nathan Froyd	return env->cpu_index + 1;
1692	1e9fa730	Nathan Froyd	#endif
1693	1e9fa730	Nathan Froyd	}
1694	1e9fa730	Nathan Froyd
1695	1e9fa730	Nathan Froyd	static CPUState *find_cpu(uint32_t thread_id)
1696	1e9fa730	Nathan Froyd	{
1697	1e9fa730	Nathan Froyd	CPUState *env;
1698	1e9fa730	Nathan Froyd
1699	1e9fa730	Nathan Froyd	for (env = first_cpu; env != NULL; env = env->next_cpu) {
1700	1e9fa730	Nathan Froyd	if (gdb_id(env) == thread_id) {
1701	1e9fa730	Nathan Froyd	return env;
1702	1e9fa730	Nathan Froyd	}
1703	1e9fa730	Nathan Froyd	}
1704	1e9fa730	Nathan Froyd
1705	1e9fa730	Nathan Froyd	return NULL;
1706	1e9fa730	Nathan Froyd	}
1707	1e9fa730	Nathan Froyd
1708	880a7578	aliguori	static int gdb_handle_packet(GDBState s, const char line_buf)
1709	b4608c04	bellard	{
1710	880a7578	aliguori	CPUState *env;
1711	b4608c04	bellard	const char *p;
1712	1e9fa730	Nathan Froyd	uint32_t thread;
1713	1e9fa730	Nathan Froyd	int ch, reg_size, type, res;
1714	56aebc89	pbrook	char buf[MAX_PACKET_LENGTH];
1715	56aebc89	pbrook	uint8_t mem_buf[MAX_PACKET_LENGTH];
1716	56aebc89	pbrook	uint8_t *registers;
1717	9d9754a3	bellard	target_ulong addr, len;
1718	3b46e624	ths
1719	858693c6	bellard	#ifdef DEBUG_GDB
1720	858693c6	bellard	printf("command='%s'\n", line_buf);
1721	858693c6	bellard	#endif
1722	858693c6	bellard	p = line_buf;
1723	858693c6	bellard	ch = *p++;
1724	858693c6	bellard	switch(ch) {
1725	858693c6	bellard	case '?':
1726	1fddef4b	bellard	/* TODO: Make this return the correct value for user-mode. */
1727	ca587a8e	aurel32	snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1728	1e9fa730	Nathan Froyd	gdb_id(s->c_cpu));
1729	858693c6	bellard	put_packet(s, buf);
1730	7d03f82f	edgar_igl	/* Remove all the breakpoints when this query is issued,
1731	7d03f82f	edgar_igl	* because gdb is doing and initial connect and the state
1732	7d03f82f	edgar_igl	* should be cleaned up.
1733	7d03f82f	edgar_igl	*/
1734	880a7578	aliguori	gdb_breakpoint_remove_all();
1735	858693c6	bellard	break;
1736	858693c6	bellard	case 'c':
1737	858693c6	bellard	if (*p != '\0') {
1738	9d9754a3	bellard	addr = strtoull(p, (char **)&p, 16);
1739	fab9d284	aurel32	gdb_set_cpu_pc(s, addr);
1740	858693c6	bellard	}
1741	ca587a8e	aurel32	s->signal = 0;
1742	ba70a624	edgar_igl	gdb_continue(s);
1743	41625033	bellard	return RS_IDLE;
1744	1f487ee9	edgar_igl	case 'C':
1745	ca587a8e	aurel32	s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1746	ca587a8e	aurel32	if (s->signal == -1)
1747	ca587a8e	aurel32	s->signal = 0;
1748	1f487ee9	edgar_igl	gdb_continue(s);
1749	1f487ee9	edgar_igl	return RS_IDLE;
1750	dd32aa10	Jan Kiszka	case 'v':
1751	dd32aa10	Jan Kiszka	if (strncmp(p, "Cont", 4) == 0) {
1752	dd32aa10	Jan Kiszka	int res_signal, res_thread;
1753	dd32aa10	Jan Kiszka
1754	dd32aa10	Jan Kiszka	p += 4;
1755	dd32aa10	Jan Kiszka	if (*p == '?') {
1756	dd32aa10	Jan Kiszka	put_packet(s, "vCont;c;C;s;S");
1757	dd32aa10	Jan Kiszka	break;
1758	dd32aa10	Jan Kiszka	}
1759	dd32aa10	Jan Kiszka	res = 0;
1760	dd32aa10	Jan Kiszka	res_signal = 0;
1761	dd32aa10	Jan Kiszka	res_thread = 0;
1762	dd32aa10	Jan Kiszka	while (*p) {
1763	dd32aa10	Jan Kiszka	int action, signal;
1764	dd32aa10	Jan Kiszka
1765	dd32aa10	Jan Kiszka	if (*p++ != ';') {
1766	dd32aa10	Jan Kiszka	res = 0;
1767	dd32aa10	Jan Kiszka	break;
1768	dd32aa10	Jan Kiszka	}
1769	dd32aa10	Jan Kiszka	action = *p++;
1770	dd32aa10	Jan Kiszka	signal = 0;
1771	dd32aa10	Jan Kiszka	if (action == 'C' \|\| action == 'S') {
1772	dd32aa10	Jan Kiszka	signal = strtoul(p, (char **)&p, 16);
1773	dd32aa10	Jan Kiszka	} else if (action != 'c' && action != 's') {
1774	dd32aa10	Jan Kiszka	res = 0;
1775	dd32aa10	Jan Kiszka	break;
1776	dd32aa10	Jan Kiszka	}
1777	dd32aa10	Jan Kiszka	thread = 0;
1778	dd32aa10	Jan Kiszka	if (*p == ':') {
1779	dd32aa10	Jan Kiszka	thread = strtoull(p+1, (char **)&p, 16);
1780	dd32aa10	Jan Kiszka	}
1781	dd32aa10	Jan Kiszka	action = tolower(action);
1782	dd32aa10	Jan Kiszka	if (res == 0 \|\| (res == 'c' && action == 's')) {
1783	dd32aa10	Jan Kiszka	res = action;
1784	dd32aa10	Jan Kiszka	res_signal = signal;
1785	dd32aa10	Jan Kiszka	res_thread = thread;
1786	dd32aa10	Jan Kiszka	}
1787	dd32aa10	Jan Kiszka	}
1788	dd32aa10	Jan Kiszka	if (res) {
1789	dd32aa10	Jan Kiszka	if (res_thread != -1 && res_thread != 0) {
1790	dd32aa10	Jan Kiszka	env = find_cpu(res_thread);
1791	dd32aa10	Jan Kiszka	if (env == NULL) {
1792	dd32aa10	Jan Kiszka	put_packet(s, "E22");
1793	dd32aa10	Jan Kiszka	break;
1794	dd32aa10	Jan Kiszka	}
1795	dd32aa10	Jan Kiszka	s->c_cpu = env;
1796	dd32aa10	Jan Kiszka	}
1797	dd32aa10	Jan Kiszka	if (res == 's') {
1798	dd32aa10	Jan Kiszka	cpu_single_step(s->c_cpu, sstep_flags);
1799	dd32aa10	Jan Kiszka	}
1800	dd32aa10	Jan Kiszka	s->signal = res_signal;
1801	dd32aa10	Jan Kiszka	gdb_continue(s);
1802	dd32aa10	Jan Kiszka	return RS_IDLE;
1803	dd32aa10	Jan Kiszka	}
1804	dd32aa10	Jan Kiszka	break;
1805	dd32aa10	Jan Kiszka	} else {
1806	dd32aa10	Jan Kiszka	goto unknown_command;
1807	dd32aa10	Jan Kiszka	}
1808	7d03f82f	edgar_igl	case 'k':
1809	7d03f82f	edgar_igl	/* Kill the target */
1810	7d03f82f	edgar_igl	fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1811	7d03f82f	edgar_igl	exit(0);
1812	7d03f82f	edgar_igl	case 'D':
1813	7d03f82f	edgar_igl	/* Detach packet */
1814	880a7578	aliguori	gdb_breakpoint_remove_all();
1815	7d03f82f	edgar_igl	gdb_continue(s);
1816	7d03f82f	edgar_igl	put_packet(s, "OK");
1817	7d03f82f	edgar_igl	break;
1818	858693c6	bellard	case 's':
1819	858693c6	bellard	if (*p != '\0') {
1820	8fac5803	ths	addr = strtoull(p, (char **)&p, 16);
1821	fab9d284	aurel32	gdb_set_cpu_pc(s, addr);
1822	858693c6	bellard	}
1823	880a7578	aliguori	cpu_single_step(s->c_cpu, sstep_flags);
1824	ba70a624	edgar_igl	gdb_continue(s);
1825	41625033	bellard	return RS_IDLE;
1826	a2d1ebaf	pbrook	case 'F':
1827	a2d1ebaf	pbrook	{
1828	a2d1ebaf	pbrook	target_ulong ret;
1829	a2d1ebaf	pbrook	target_ulong err;
1830	a2d1ebaf	pbrook
1831	a2d1ebaf	pbrook	ret = strtoull(p, (char **)&p, 16);
1832	a2d1ebaf	pbrook	if (*p == ',') {
1833	a2d1ebaf	pbrook	p++;
1834	a2d1ebaf	pbrook	err = strtoull(p, (char **)&p, 16);
1835	a2d1ebaf	pbrook	} else {
1836	a2d1ebaf	pbrook	err = 0;
1837	a2d1ebaf	pbrook	}
1838	a2d1ebaf	pbrook	if (*p == ',')
1839	a2d1ebaf	pbrook	p++;
1840	a2d1ebaf	pbrook	type = *p;
1841	a2d1ebaf	pbrook	if (gdb_current_syscall_cb)
1842	880a7578	aliguori	gdb_current_syscall_cb(s->c_cpu, ret, err);
1843	a2d1ebaf	pbrook	if (type == 'C') {
1844	a2d1ebaf	pbrook	put_packet(s, "T02");
1845	a2d1ebaf	pbrook	} else {
1846	ba70a624	edgar_igl	gdb_continue(s);
1847	a2d1ebaf	pbrook	}
1848	a2d1ebaf	pbrook	}
1849	a2d1ebaf	pbrook	break;
1850	858693c6	bellard	case 'g':
1851	4c0960c0	Avi Kivity	cpu_synchronize_state(s->g_cpu);
1852	56aebc89	pbrook	len = 0;
1853	56aebc89	pbrook	for (addr = 0; addr < num_g_regs; addr++) {
1854	880a7578	aliguori	reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1855	56aebc89	pbrook	len += reg_size;
1856	56aebc89	pbrook	}
1857	56aebc89	pbrook	memtohex(buf, mem_buf, len);
1858	858693c6	bellard	put_packet(s, buf);
1859	858693c6	bellard	break;
1860	858693c6	bellard	case 'G':
1861	4c0960c0	Avi Kivity	cpu_synchronize_state(s->g_cpu);
1862	56aebc89	pbrook	registers = mem_buf;
1863	858693c6	bellard	len = strlen(p) / 2;
1864	858693c6	bellard	hextomem((uint8_t *)registers, p, len);
1865	56aebc89	pbrook	for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1866	880a7578	aliguori	reg_size = gdb_write_register(s->g_cpu, registers, addr);
1867	56aebc89	pbrook	len -= reg_size;
1868	56aebc89	pbrook	registers += reg_size;
1869	56aebc89	pbrook	}
1870	858693c6	bellard	put_packet(s, "OK");
1871	858693c6	bellard	break;
1872	858693c6	bellard	case 'm':
1873	9d9754a3	bellard	addr = strtoull(p, (char **)&p, 16);
1874	858693c6	bellard	if (*p == ',')
1875	858693c6	bellard	p++;
1876	9d9754a3	bellard	len = strtoull(p, NULL, 16);
1877	880a7578	aliguori	if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
1878	6f970bd9	bellard	put_packet (s, "E14");
1879	6f970bd9	bellard	} else {
1880	6f970bd9	bellard	memtohex(buf, mem_buf, len);
1881	6f970bd9	bellard	put_packet(s, buf);
1882	6f970bd9	bellard	}
1883	858693c6	bellard	break;
1884	858693c6	bellard	case 'M':
1885	9d9754a3	bellard	addr = strtoull(p, (char **)&p, 16);
1886	858693c6	bellard	if (*p == ',')
1887	858693c6	bellard	p++;
1888	9d9754a3	bellard	len = strtoull(p, (char **)&p, 16);
1889	b328f873	bellard	if (*p == ':')
1890	858693c6	bellard	p++;
1891	858693c6	bellard	hextomem(mem_buf, p, len);
1892	880a7578	aliguori	if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
1893	905f20b1	bellard	put_packet(s, "E14");
1894	858693c6	bellard	else
1895	858693c6	bellard	put_packet(s, "OK");
1896	858693c6	bellard	break;
1897	56aebc89	pbrook	case 'p':
1898	56aebc89	pbrook	/* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1899	56aebc89	pbrook	This works, but can be very slow. Anything new enough to
1900	56aebc89	pbrook	understand XML also knows how to use this properly. */
1901	56aebc89	pbrook	if (!gdb_has_xml)
1902	56aebc89	pbrook	goto unknown_command;
1903	56aebc89	pbrook	addr = strtoull(p, (char **)&p, 16);
1904	880a7578	aliguori	reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1905	56aebc89	pbrook	if (reg_size) {
1906	56aebc89	pbrook	memtohex(buf, mem_buf, reg_size);
1907	56aebc89	pbrook	put_packet(s, buf);
1908	56aebc89	pbrook	} else {
1909	56aebc89	pbrook	put_packet(s, "E14");
1910	56aebc89	pbrook	}
1911	56aebc89	pbrook	break;
1912	56aebc89	pbrook	case 'P':
1913	56aebc89	pbrook	if (!gdb_has_xml)
1914	56aebc89	pbrook	goto unknown_command;
1915	56aebc89	pbrook	addr = strtoull(p, (char **)&p, 16);
1916	56aebc89	pbrook	if (*p == '=')
1917	56aebc89	pbrook	p++;
1918	56aebc89	pbrook	reg_size = strlen(p) / 2;
1919	56aebc89	pbrook	hextomem(mem_buf, p, reg_size);
1920	880a7578	aliguori	gdb_write_register(s->g_cpu, mem_buf, addr);
1921	56aebc89	pbrook	put_packet(s, "OK");
1922	56aebc89	pbrook	break;
1923	858693c6	bellard	case 'Z':
1924	858693c6	bellard	case 'z':
1925	858693c6	bellard	type = strtoul(p, (char **)&p, 16);
1926	858693c6	bellard	if (*p == ',')
1927	858693c6	bellard	p++;
1928	9d9754a3	bellard	addr = strtoull(p, (char **)&p, 16);
1929	858693c6	bellard	if (*p == ',')
1930	858693c6	bellard	p++;
1931	9d9754a3	bellard	len = strtoull(p, (char **)&p, 16);
1932	a1d1bb31	aliguori	if (ch == 'Z')
1933	880a7578	aliguori	res = gdb_breakpoint_insert(addr, len, type);
1934	a1d1bb31	aliguori	else
1935	880a7578	aliguori	res = gdb_breakpoint_remove(addr, len, type);
1936	a1d1bb31	aliguori	if (res >= 0)
1937	a1d1bb31	aliguori	put_packet(s, "OK");
1938	a1d1bb31	aliguori	else if (res == -ENOSYS)
1939	0f459d16	pbrook	put_packet(s, "");
1940	a1d1bb31	aliguori	else
1941	a1d1bb31	aliguori	put_packet(s, "E22");
1942	858693c6	bellard	break;
1943	880a7578	aliguori	case 'H':
1944	880a7578	aliguori	type = *p++;
1945	880a7578	aliguori	thread = strtoull(p, (char **)&p, 16);
1946	880a7578	aliguori	if (thread == -1 \|\| thread == 0) {
1947	880a7578	aliguori	put_packet(s, "OK");
1948	880a7578	aliguori	break;
1949	880a7578	aliguori	}
1950	1e9fa730	Nathan Froyd	env = find_cpu(thread);
1951	880a7578	aliguori	if (env == NULL) {
1952	880a7578	aliguori	put_packet(s, "E22");
1953	880a7578	aliguori	break;
1954	880a7578	aliguori	}
1955	880a7578	aliguori	switch (type) {
1956	880a7578	aliguori	case 'c':
1957	880a7578	aliguori	s->c_cpu = env;
1958	880a7578	aliguori	put_packet(s, "OK");
1959	880a7578	aliguori	break;
1960	880a7578	aliguori	case 'g':
1961	880a7578	aliguori	s->g_cpu = env;
1962	880a7578	aliguori	put_packet(s, "OK");
1963	880a7578	aliguori	break;
1964	880a7578	aliguori	default:
1965	880a7578	aliguori	put_packet(s, "E22");
1966	880a7578	aliguori	break;
1967	880a7578	aliguori	}
1968	880a7578	aliguori	break;
1969	880a7578	aliguori	case 'T':
1970	880a7578	aliguori	thread = strtoull(p, (char **)&p, 16);
1971	1e9fa730	Nathan Froyd	env = find_cpu(thread);
1972	1e9fa730	Nathan Froyd
1973	1e9fa730	Nathan Froyd	if (env != NULL) {
1974	1e9fa730	Nathan Froyd	put_packet(s, "OK");
1975	1e9fa730	Nathan Froyd	} else {
1976	880a7578	aliguori	put_packet(s, "E22");
1977	1e9fa730	Nathan Froyd	}
1978	880a7578	aliguori	break;
1979	978efd6a	pbrook	case 'q':
1980	60897d36	edgar_igl	case 'Q':
1981	60897d36	edgar_igl	/* parse any 'q' packets here */
1982	60897d36	edgar_igl	if (!strcmp(p,"qemu.sstepbits")) {
1983	60897d36	edgar_igl	/* Query Breakpoint bit definitions */
1984	363a37d5	blueswir1	snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1985	363a37d5	blueswir1	SSTEP_ENABLE,
1986	363a37d5	blueswir1	SSTEP_NOIRQ,
1987	363a37d5	blueswir1	SSTEP_NOTIMER);
1988	60897d36	edgar_igl	put_packet(s, buf);
1989	60897d36	edgar_igl	break;
1990	60897d36	edgar_igl	} else if (strncmp(p,"qemu.sstep",10) == 0) {
1991	60897d36	edgar_igl	/* Display or change the sstep_flags */
1992	60897d36	edgar_igl	p += 10;
1993	60897d36	edgar_igl	if (*p != '=') {
1994	60897d36	edgar_igl	/* Display current setting */
1995	363a37d5	blueswir1	snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1996	60897d36	edgar_igl	put_packet(s, buf);
1997	60897d36	edgar_igl	break;
1998	60897d36	edgar_igl	}
1999	60897d36	edgar_igl	p++;
2000	60897d36	edgar_igl	type = strtoul(p, (char **)&p, 16);
2001	60897d36	edgar_igl	sstep_flags = type;
2002	60897d36	edgar_igl	put_packet(s, "OK");
2003	60897d36	edgar_igl	break;
2004	880a7578	aliguori	} else if (strcmp(p,"C") == 0) {
2005	880a7578	aliguori	/* "Current thread" remains vague in the spec, so always return
2006	880a7578	aliguori	* the first CPU (gdb returns the first thread). */
2007	880a7578	aliguori	put_packet(s, "QC1");
2008	880a7578	aliguori	break;
2009	880a7578	aliguori	} else if (strcmp(p,"fThreadInfo") == 0) {
2010	880a7578	aliguori	s->query_cpu = first_cpu;
2011	880a7578	aliguori	goto report_cpuinfo;
2012	880a7578	aliguori	} else if (strcmp(p,"sThreadInfo") == 0) {
2013	880a7578	aliguori	report_cpuinfo:
2014	880a7578	aliguori	if (s->query_cpu) {
2015	1e9fa730	Nathan Froyd	snprintf(buf, sizeof(buf), "m%x", gdb_id(s->query_cpu));
2016	880a7578	aliguori	put_packet(s, buf);
2017	880a7578	aliguori	s->query_cpu = s->query_cpu->next_cpu;
2018	880a7578	aliguori	} else
2019	880a7578	aliguori	put_packet(s, "l");
2020	880a7578	aliguori	break;
2021	880a7578	aliguori	} else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
2022	880a7578	aliguori	thread = strtoull(p+16, (char **)&p, 16);
2023	1e9fa730	Nathan Froyd	env = find_cpu(thread);
2024	1e9fa730	Nathan Froyd	if (env != NULL) {
2025	4c0960c0	Avi Kivity	cpu_synchronize_state(env);
2026	1e9fa730	Nathan Froyd	len = snprintf((char *)mem_buf, sizeof(mem_buf),
2027	1e9fa730	Nathan Froyd	"CPU#%d [%s]", env->cpu_index,
2028	1e9fa730	Nathan Froyd	env->halted ? "halted " : "running");
2029	1e9fa730	Nathan Froyd	memtohex(buf, mem_buf, len);
2030	1e9fa730	Nathan Froyd	put_packet(s, buf);
2031	1e9fa730	Nathan Froyd	}
2032	880a7578	aliguori	break;
2033	60897d36	edgar_igl	}
2034	0b8a988c	blueswir1	#ifdef CONFIG_USER_ONLY
2035	60897d36	edgar_igl	else if (strncmp(p, "Offsets", 7) == 0) {
2036	880a7578	aliguori	TaskState *ts = s->c_cpu->opaque;
2037	978efd6a	pbrook
2038	363a37d5	blueswir1	snprintf(buf, sizeof(buf),
2039	363a37d5	blueswir1	"Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
2040	363a37d5	blueswir1	";Bss=" TARGET_ABI_FMT_lx,
2041	363a37d5	blueswir1	ts->info->code_offset,
2042	363a37d5	blueswir1	ts->info->data_offset,
2043	363a37d5	blueswir1	ts->info->data_offset);
2044	978efd6a	pbrook	put_packet(s, buf);
2045	978efd6a	pbrook	break;
2046	978efd6a	pbrook	}
2047	0b8a988c	blueswir1	#else /* !CONFIG_USER_ONLY */
2048	8a34a0fb	aliguori	else if (strncmp(p, "Rcmd,", 5) == 0) {
2049	8a34a0fb	aliguori	int len = strlen(p + 5);
2050	8a34a0fb	aliguori
2051	8a34a0fb	aliguori	if ((len % 2) != 0) {
2052	8a34a0fb	aliguori	put_packet(s, "E01");
2053	8a34a0fb	aliguori	break;
2054	8a34a0fb	aliguori	}
2055	8a34a0fb	aliguori	hextomem(mem_buf, p + 5, len);
2056	8a34a0fb	aliguori	len = len / 2;
2057	8a34a0fb	aliguori	mem_buf[len++] = 0;
2058	8a34a0fb	aliguori	qemu_chr_read(s->mon_chr, mem_buf, len);
2059	8a34a0fb	aliguori	put_packet(s, "OK");
2060	8a34a0fb	aliguori	break;
2061	8a34a0fb	aliguori	}
2062	0b8a988c	blueswir1	#endif /* !CONFIG_USER_ONLY */
2063	56aebc89	pbrook	if (strncmp(p, "Supported", 9) == 0) {
2064	5b3715bf	blueswir1	snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
2065	56aebc89	pbrook	#ifdef GDB_CORE_XML
2066	2dc766da	blueswir1	pstrcat(buf, sizeof(buf), ";qXfer:features:read+");
2067	56aebc89	pbrook	#endif
2068	56aebc89	pbrook	put_packet(s, buf);
2069	56aebc89	pbrook	break;
2070	56aebc89	pbrook	}
2071	56aebc89	pbrook	#ifdef GDB_CORE_XML
2072	56aebc89	pbrook	if (strncmp(p, "Xfer:features:read:", 19) == 0) {
2073	56aebc89	pbrook	const char *xml;
2074	56aebc89	pbrook	target_ulong total_len;
2075	56aebc89	pbrook
2076	56aebc89	pbrook	gdb_has_xml = 1;
2077	56aebc89	pbrook	p += 19;
2078	880a7578	aliguori	xml = get_feature_xml(p, &p);
2079	56aebc89	pbrook	if (!xml) {
2080	5b3715bf	blueswir1	snprintf(buf, sizeof(buf), "E00");
2081	56aebc89	pbrook	put_packet(s, buf);
2082	56aebc89	pbrook	break;
2083	56aebc89	pbrook	}
2084	56aebc89	pbrook
2085	56aebc89	pbrook	if (*p == ':')
2086	56aebc89	pbrook	p++;
2087	56aebc89	pbrook	addr = strtoul(p, (char **)&p, 16);
2088	56aebc89	pbrook	if (*p == ',')
2089	56aebc89	pbrook	p++;
2090	56aebc89	pbrook	len = strtoul(p, (char **)&p, 16);
2091	56aebc89	pbrook
2092	56aebc89	pbrook	total_len = strlen(xml);
2093	56aebc89	pbrook	if (addr > total_len) {
2094	5b3715bf	blueswir1	snprintf(buf, sizeof(buf), "E00");
2095	56aebc89	pbrook	put_packet(s, buf);
2096	56aebc89	pbrook	break;
2097	56aebc89	pbrook	}
2098	56aebc89	pbrook	if (len > (MAX_PACKET_LENGTH - 5) / 2)
2099	56aebc89	pbrook	len = (MAX_PACKET_LENGTH - 5) / 2;
2100	56aebc89	pbrook	if (len < total_len - addr) {
2101	56aebc89	pbrook	buf[0] = 'm';
2102	56aebc89	pbrook	len = memtox(buf + 1, xml + addr, len);
2103	56aebc89	pbrook	} else {
2104	56aebc89	pbrook	buf[0] = 'l';
2105	56aebc89	pbrook	len = memtox(buf + 1, xml + addr, total_len - addr);
2106	56aebc89	pbrook	}
2107	56aebc89	pbrook	put_packet_binary(s, buf, len + 1);
2108	56aebc89	pbrook	break;
2109	56aebc89	pbrook	}
2110	56aebc89	pbrook	#endif
2111	56aebc89	pbrook	/* Unrecognised 'q' command. */
2112	56aebc89	pbrook	goto unknown_command;
2113	56aebc89	pbrook
2114	858693c6	bellard	default:
2115	56aebc89	pbrook	unknown_command:
2116	858693c6	bellard	/* put empty packet */
2117	858693c6	bellard	buf[0] = '\0';
2118	858693c6	bellard	put_packet(s, buf);
2119	858693c6	bellard	break;
2120	858693c6	bellard	}
2121	858693c6	bellard	return RS_IDLE;
2122	858693c6	bellard	}
2123	858693c6	bellard
2124	880a7578	aliguori	void gdb_set_stop_cpu(CPUState *env)
2125	880a7578	aliguori	{
2126	880a7578	aliguori	gdbserver_state->c_cpu = env;
2127	880a7578	aliguori	gdbserver_state->g_cpu = env;
2128	880a7578	aliguori	}
2129	880a7578	aliguori
2130	1fddef4b	bellard	#ifndef CONFIG_USER_ONLY
2131	9781e040	aliguori	static void gdb_vm_state_change(void *opaque, int running, int reason)
2132	858693c6	bellard	{
2133	880a7578	aliguori	GDBState *s = gdbserver_state;
2134	880a7578	aliguori	CPUState *env = s->c_cpu;
2135	858693c6	bellard	char buf[256];
2136	d6fc1b39	aliguori	const char *type;
2137	858693c6	bellard	int ret;
2138	858693c6	bellard
2139	9781e040	aliguori	if (running \|\| (reason != EXCP_DEBUG && reason != EXCP_INTERRUPT) \|\|
2140	36556b20	aliguori	s->state == RS_INACTIVE \|\| s->state == RS_SYSCALL)
2141	a2d1ebaf	pbrook	return;
2142	a2d1ebaf	pbrook
2143	858693c6	bellard	/* disable single step if it was enable */
2144	880a7578	aliguori	cpu_single_step(env, 0);
2145	858693c6	bellard
2146	e80cfcfc	bellard	if (reason == EXCP_DEBUG) {
2147	880a7578	aliguori	if (env->watchpoint_hit) {
2148	880a7578	aliguori	switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
2149	a1d1bb31	aliguori	case BP_MEM_READ:
2150	d6fc1b39	aliguori	type = "r";
2151	d6fc1b39	aliguori	break;
2152	a1d1bb31	aliguori	case BP_MEM_ACCESS:
2153	d6fc1b39	aliguori	type = "a";
2154	d6fc1b39	aliguori	break;
2155	d6fc1b39	aliguori	default:
2156	d6fc1b39	aliguori	type = "";
2157	d6fc1b39	aliguori	break;
2158	d6fc1b39	aliguori	}
2159	880a7578	aliguori	snprintf(buf, sizeof(buf),
2160	880a7578	aliguori	"T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
2161	1e9fa730	Nathan Froyd	GDB_SIGNAL_TRAP, gdb_id(env), type,
2162	880a7578	aliguori	env->watchpoint_hit->vaddr);
2163	6658ffb8	pbrook	put_packet(s, buf);
2164	880a7578	aliguori	env->watchpoint_hit = NULL;
2165	6658ffb8	pbrook	return;
2166	6658ffb8	pbrook	}
2167	880a7578	aliguori	tb_flush(env);
2168	ca587a8e	aurel32	ret = GDB_SIGNAL_TRAP;
2169	bbeb7b5c	bellard	} else {
2170	9781e040	aliguori	ret = GDB_SIGNAL_INT;
2171	bbeb7b5c	bellard	}
2172	1e9fa730	Nathan Froyd	snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, gdb_id(env));
2173	858693c6	bellard	put_packet(s, buf);
2174	858693c6	bellard	}
2175	1fddef4b	bellard	#endif
2176	858693c6	bellard
2177	a2d1ebaf	pbrook	/* Send a gdb syscall request.
2178	a2d1ebaf	pbrook	This accepts limited printf-style format specifiers, specifically:
2179	a87295e8	pbrook	%x - target_ulong argument printed in hex.
2180	a87295e8	pbrook	%lx - 64-bit argument printed in hex.
2181	a87295e8	pbrook	%s - string pointer (target_ulong) and length (int) pair. */
2182	7ccfb2eb	blueswir1	void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
2183	a2d1ebaf	pbrook	{
2184	a2d1ebaf	pbrook	va_list va;
2185	a2d1ebaf	pbrook	char buf[256];
2186	a2d1ebaf	pbrook	char *p;
2187	a2d1ebaf	pbrook	target_ulong addr;
2188	a87295e8	pbrook	uint64_t i64;
2189	a2d1ebaf	pbrook	GDBState *s;
2190	a2d1ebaf	pbrook
2191	880a7578	aliguori	s = gdbserver_state;
2192	a2d1ebaf	pbrook	if (!s)
2193	a2d1ebaf	pbrook	return;
2194	a2d1ebaf	pbrook	gdb_current_syscall_cb = cb;
2195	a2d1ebaf	pbrook	s->state = RS_SYSCALL;
2196	a2d1ebaf	pbrook	#ifndef CONFIG_USER_ONLY
2197	a2d1ebaf	pbrook	vm_stop(EXCP_DEBUG);
2198	a2d1ebaf	pbrook	#endif
2199	a2d1ebaf	pbrook	s->state = RS_IDLE;
2200	a2d1ebaf	pbrook	va_start(va, fmt);
2201	a2d1ebaf	pbrook	p = buf;
2202	a2d1ebaf	pbrook	*(p++) = 'F';
2203	a2d1ebaf	pbrook	while (*fmt) {
2204	a2d1ebaf	pbrook	if (*fmt == '%') {
2205	a2d1ebaf	pbrook	fmt++;
2206	a2d1ebaf	pbrook	switch (*fmt++) {
2207	a2d1ebaf	pbrook	case 'x':
2208	a2d1ebaf	pbrook	addr = va_arg(va, target_ulong);
2209	363a37d5	blueswir1	p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
2210	a2d1ebaf	pbrook	break;
2211	a87295e8	pbrook	case 'l':
2212	a87295e8	pbrook	if (*(fmt++) != 'x')
2213	a87295e8	pbrook	goto bad_format;
2214	a87295e8	pbrook	i64 = va_arg(va, uint64_t);
2215	363a37d5	blueswir1	p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
2216	a87295e8	pbrook	break;
2217	a2d1ebaf	pbrook	case 's':
2218	a2d1ebaf	pbrook	addr = va_arg(va, target_ulong);
2219	363a37d5	blueswir1	p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
2220	363a37d5	blueswir1	addr, va_arg(va, int));
2221	a2d1ebaf	pbrook	break;
2222	a2d1ebaf	pbrook	default:
2223	a87295e8	pbrook	bad_format:
2224	a2d1ebaf	pbrook	fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
2225	a2d1ebaf	pbrook	fmt - 1);
2226	a2d1ebaf	pbrook	break;
2227	a2d1ebaf	pbrook	}
2228	a2d1ebaf	pbrook	} else {
2229	a2d1ebaf	pbrook	(p++) = (fmt++);
2230	a2d1ebaf	pbrook	}
2231	a2d1ebaf	pbrook	}
2232	8a93e02a	pbrook	*p = 0;
2233	a2d1ebaf	pbrook	va_end(va);
2234	a2d1ebaf	pbrook	put_packet(s, buf);
2235	a2d1ebaf	pbrook	#ifdef CONFIG_USER_ONLY
2236	880a7578	aliguori	gdb_handlesig(s->c_cpu, 0);
2237	a2d1ebaf	pbrook	#else
2238	3098dba0	aurel32	cpu_exit(s->c_cpu);
2239	a2d1ebaf	pbrook	#endif
2240	a2d1ebaf	pbrook	}
2241	a2d1ebaf	pbrook
2242	6a00d601	bellard	static void gdb_read_byte(GDBState *s, int ch)
2243	858693c6	bellard	{
2244	858693c6	bellard	int i, csum;
2245	60fe76f3	ths	uint8_t reply;
2246	858693c6	bellard
2247	1fddef4b	bellard	#ifndef CONFIG_USER_ONLY
2248	4046d913	pbrook	if (s->last_packet_len) {
2249	4046d913	pbrook	/* Waiting for a response to the last packet. If we see the start
2250	4046d913	pbrook	of a new command then abandon the previous response. */
2251	4046d913	pbrook	if (ch == '-') {
2252	4046d913	pbrook	#ifdef DEBUG_GDB
2253	4046d913	pbrook	printf("Got NACK, retransmitting\n");
2254	4046d913	pbrook	#endif
2255	ffe8ab83	ths	put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
2256	4046d913	pbrook	}
2257	4046d913	pbrook	#ifdef DEBUG_GDB
2258	4046d913	pbrook	else if (ch == '+')
2259	4046d913	pbrook	printf("Got ACK\n");
2260	4046d913	pbrook	else
2261	4046d913	pbrook	printf("Got '%c' when expecting ACK/NACK\n", ch);
2262	4046d913	pbrook	#endif
2263	4046d913	pbrook	if (ch == '+' \|\| ch == '$')
2264	4046d913	pbrook	s->last_packet_len = 0;
2265	4046d913	pbrook	if (ch != '$')
2266	4046d913	pbrook	return;
2267	4046d913	pbrook	}
2268	858693c6	bellard	if (vm_running) {
2269	858693c6	bellard	/* when the CPU is running, we cannot do anything except stop
2270	858693c6	bellard	it when receiving a char */
2271	858693c6	bellard	vm_stop(EXCP_INTERRUPT);
2272	5fafdf24	ths	} else
2273	1fddef4b	bellard	#endif
2274	41625033	bellard	{
2275	858693c6	bellard	switch(s->state) {
2276	858693c6	bellard	case RS_IDLE:
2277	858693c6	bellard	if (ch == '$') {
2278	858693c6	bellard	s->line_buf_index = 0;
2279	858693c6	bellard	s->state = RS_GETLINE;
2280	c33a346e	bellard	}
2281	b4608c04	bellard	break;
2282	858693c6	bellard	case RS_GETLINE:
2283	858693c6	bellard	if (ch == '#') {
2284	858693c6	bellard	s->state = RS_CHKSUM1;
2285	858693c6	bellard	} else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2286	858693c6	bellard	s->state = RS_IDLE;
2287	4c3a88a2	bellard	} else {
2288	858693c6	bellard	s->line_buf[s->line_buf_index++] = ch;
2289	4c3a88a2	bellard	}
2290	4c3a88a2	bellard	break;
2291	858693c6	bellard	case RS_CHKSUM1:
2292	858693c6	bellard	s->line_buf[s->line_buf_index] = '\0';
2293	858693c6	bellard	s->line_csum = fromhex(ch) << 4;
2294	858693c6	bellard	s->state = RS_CHKSUM2;
2295	858693c6	bellard	break;
2296	858693c6	bellard	case RS_CHKSUM2:
2297	858693c6	bellard	s->line_csum \|= fromhex(ch);
2298	858693c6	bellard	csum = 0;
2299	858693c6	bellard	for(i = 0; i < s->line_buf_index; i++) {
2300	858693c6	bellard	csum += s->line_buf[i];
2301	858693c6	bellard	}
2302	858693c6	bellard	if (s->line_csum != (csum & 0xff)) {
2303	60fe76f3	ths	reply = '-';
2304	60fe76f3	ths	put_buffer(s, &reply, 1);
2305	858693c6	bellard	s->state = RS_IDLE;
2306	4c3a88a2	bellard	} else {
2307	60fe76f3	ths	reply = '+';
2308	60fe76f3	ths	put_buffer(s, &reply, 1);
2309	880a7578	aliguori	s->state = gdb_handle_packet(s, s->line_buf);
2310	4c3a88a2	bellard	}
2311	4c3a88a2	bellard	break;
2312	a2d1ebaf	pbrook	default:
2313	a2d1ebaf	pbrook	abort();
2314	858693c6	bellard	}
2315	858693c6	bellard	}
2316	858693c6	bellard	}
2317	858693c6	bellard
2318	1fddef4b	bellard	#ifdef CONFIG_USER_ONLY
2319	1fddef4b	bellard	int
2320	ca587a8e	aurel32	gdb_queuesig (void)
2321	ca587a8e	aurel32	{
2322	ca587a8e	aurel32	GDBState *s;
2323	ca587a8e	aurel32
2324	ca587a8e	aurel32	s = gdbserver_state;
2325	ca587a8e	aurel32
2326	ca587a8e	aurel32	if (gdbserver_fd < 0 \|\| s->fd < 0)
2327	ca587a8e	aurel32	return 0;
2328	ca587a8e	aurel32	else
2329	ca587a8e	aurel32	return 1;
2330	ca587a8e	aurel32	}
2331	ca587a8e	aurel32
2332	ca587a8e	aurel32	int
2333	1fddef4b	bellard	gdb_handlesig (CPUState *env, int sig)
2334	1fddef4b	bellard	{
2335	1fddef4b	bellard	GDBState *s;
2336	1fddef4b	bellard	char buf[256];
2337	1fddef4b	bellard	int n;
2338	1fddef4b	bellard
2339	880a7578	aliguori	s = gdbserver_state;
2340	1f487ee9	edgar_igl	if (gdbserver_fd < 0 \|\| s->fd < 0)
2341	1f487ee9	edgar_igl	return sig;
2342	1fddef4b	bellard
2343	1fddef4b	bellard	/* disable single step if it was enabled */
2344	1fddef4b	bellard	cpu_single_step(env, 0);
2345	1fddef4b	bellard	tb_flush(env);
2346	1fddef4b	bellard
2347	1fddef4b	bellard	if (sig != 0)
2348	1fddef4b	bellard	{
2349	ca587a8e	aurel32	snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
2350	1fddef4b	bellard	put_packet(s, buf);
2351	1fddef4b	bellard	}
2352	1f487ee9	edgar_igl	/* put_packet() might have detected that the peer terminated the
2353	1f487ee9	edgar_igl	connection. */
2354	1f487ee9	edgar_igl	if (s->fd < 0)
2355	1f487ee9	edgar_igl	return sig;
2356	1fddef4b	bellard
2357	1fddef4b	bellard	sig = 0;
2358	1fddef4b	bellard	s->state = RS_IDLE;
2359	41625033	bellard	s->running_state = 0;
2360	41625033	bellard	while (s->running_state == 0) {
2361	1fddef4b	bellard	n = read (s->fd, buf, 256);
2362	1fddef4b	bellard	if (n > 0)
2363	1fddef4b	bellard	{
2364	1fddef4b	bellard	int i;
2365	1fddef4b	bellard
2366	1fddef4b	bellard	for (i = 0; i < n; i++)
2367	6a00d601	bellard	gdb_read_byte (s, buf[i]);
2368	1fddef4b	bellard	}
2369	1fddef4b	bellard	else if (n == 0 \|\| errno != EAGAIN)
2370	1fddef4b	bellard	{
2371	1fddef4b	bellard	/* XXX: Connection closed. Should probably wait for annother
2372	1fddef4b	bellard	connection before continuing. */
2373	1fddef4b	bellard	return sig;
2374	1fddef4b	bellard	}
2375	41625033	bellard	}
2376	1f487ee9	edgar_igl	sig = s->signal;
2377	1f487ee9	edgar_igl	s->signal = 0;
2378	1fddef4b	bellard	return sig;
2379	1fddef4b	bellard	}
2380	e9009676	bellard
2381	e9009676	bellard	/* Tell the remote gdb that the process has exited. */
2382	e9009676	bellard	void gdb_exit(CPUState *env, int code)
2383	e9009676	bellard	{
2384	e9009676	bellard	GDBState *s;
2385	e9009676	bellard	char buf[4];
2386	e9009676	bellard
2387	880a7578	aliguori	s = gdbserver_state;
2388	1f487ee9	edgar_igl	if (gdbserver_fd < 0 \|\| s->fd < 0)
2389	1f487ee9	edgar_igl	return;
2390	e9009676	bellard
2391	e9009676	bellard	snprintf(buf, sizeof(buf), "W%02x", code);
2392	e9009676	bellard	put_packet(s, buf);
2393	e9009676	bellard	}
2394	e9009676	bellard
2395	ca587a8e	aurel32	/* Tell the remote gdb that the process has exited due to SIG. */
2396	ca587a8e	aurel32	void gdb_signalled(CPUState *env, int sig)
2397	ca587a8e	aurel32	{
2398	ca587a8e	aurel32	GDBState *s;
2399	ca587a8e	aurel32	char buf[4];
2400	ca587a8e	aurel32
2401	ca587a8e	aurel32	s = gdbserver_state;
2402	ca587a8e	aurel32	if (gdbserver_fd < 0 \|\| s->fd < 0)
2403	ca587a8e	aurel32	return;
2404	ca587a8e	aurel32
2405	ca587a8e	aurel32	snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
2406	ca587a8e	aurel32	put_packet(s, buf);
2407	ca587a8e	aurel32	}
2408	1fddef4b	bellard
2409	880a7578	aliguori	static void gdb_accept(void)
2410	858693c6	bellard	{
2411	858693c6	bellard	GDBState *s;
2412	858693c6	bellard	struct sockaddr_in sockaddr;
2413	858693c6	bellard	socklen_t len;
2414	858693c6	bellard	int val, fd;
2415	858693c6	bellard
2416	858693c6	bellard	for(;;) {
2417	858693c6	bellard	len = sizeof(sockaddr);
2418	858693c6	bellard	fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2419	858693c6	bellard	if (fd < 0 && errno != EINTR) {
2420	858693c6	bellard	perror("accept");
2421	858693c6	bellard	return;
2422	858693c6	bellard	} else if (fd >= 0) {
2423	40ff6d7e	Kevin Wolf	#ifndef _WIN32
2424	40ff6d7e	Kevin Wolf	fcntl(fd, F_SETFD, FD_CLOEXEC);
2425	40ff6d7e	Kevin Wolf	#endif
2426	b4608c04	bellard	break;
2427	b4608c04	bellard	}
2428	b4608c04	bellard	}
2429	858693c6	bellard
2430	858693c6	bellard	/* set short latency */
2431	858693c6	bellard	val = 1;
2432	8f447cc7	bellard	setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
2433	3b46e624	ths
2434	880a7578	aliguori	s = qemu_mallocz(sizeof(GDBState));
2435	880a7578	aliguori	s->c_cpu = first_cpu;
2436	880a7578	aliguori	s->g_cpu = first_cpu;
2437	858693c6	bellard	s->fd = fd;
2438	56aebc89	pbrook	gdb_has_xml = 0;
2439	858693c6	bellard
2440	880a7578	aliguori	gdbserver_state = s;
2441	a2d1ebaf	pbrook
2442	858693c6	bellard	fcntl(fd, F_SETFL, O_NONBLOCK);
2443	858693c6	bellard	}
2444	858693c6	bellard
2445	858693c6	bellard	static int gdbserver_open(int port)
2446	858693c6	bellard	{
2447	858693c6	bellard	struct sockaddr_in sockaddr;
2448	858693c6	bellard	int fd, val, ret;
2449	858693c6	bellard
2450	858693c6	bellard	fd = socket(PF_INET, SOCK_STREAM, 0);
2451	858693c6	bellard	if (fd < 0) {
2452	858693c6	bellard	perror("socket");
2453	858693c6	bellard	return -1;
2454	858693c6	bellard	}
2455	40ff6d7e	Kevin Wolf	#ifndef _WIN32
2456	40ff6d7e	Kevin Wolf	fcntl(fd, F_SETFD, FD_CLOEXEC);
2457	40ff6d7e	Kevin Wolf	#endif
2458	858693c6	bellard
2459	858693c6	bellard	/* allow fast reuse */
2460	858693c6	bellard	val = 1;
2461	8f447cc7	bellard	setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
2462	858693c6	bellard
2463	858693c6	bellard	sockaddr.sin_family = AF_INET;
2464	858693c6	bellard	sockaddr.sin_port = htons(port);
2465	858693c6	bellard	sockaddr.sin_addr.s_addr = 0;
2466	858693c6	bellard	ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2467	858693c6	bellard	if (ret < 0) {
2468	858693c6	bellard	perror("bind");
2469	858693c6	bellard	return -1;
2470	858693c6	bellard	}
2471	858693c6	bellard	ret = listen(fd, 0);
2472	858693c6	bellard	if (ret < 0) {
2473	858693c6	bellard	perror("listen");
2474	858693c6	bellard	return -1;
2475	858693c6	bellard	}
2476	858693c6	bellard	return fd;
2477	858693c6	bellard	}
2478	858693c6	bellard
2479	858693c6	bellard	int gdbserver_start(int port)
2480	858693c6	bellard	{
2481	858693c6	bellard	gdbserver_fd = gdbserver_open(port);
2482	858693c6	bellard	if (gdbserver_fd < 0)
2483	858693c6	bellard	return -1;
2484	858693c6	bellard	/* accept connections */
2485	880a7578	aliguori	gdb_accept();
2486	4046d913	pbrook	return 0;
2487	4046d913	pbrook	}
2488	2b1319c8	aurel32
2489	2b1319c8	aurel32	/* Disable gdb stub for child processes. */
2490	2b1319c8	aurel32	void gdbserver_fork(CPUState *env)
2491	2b1319c8	aurel32	{
2492	2b1319c8	aurel32	GDBState *s = gdbserver_state;
2493	9f6164d6	edgar_igl	if (gdbserver_fd < 0 \|\| s->fd < 0)
2494	2b1319c8	aurel32	return;
2495	2b1319c8	aurel32	close(s->fd);
2496	2b1319c8	aurel32	s->fd = -1;
2497	2b1319c8	aurel32	cpu_breakpoint_remove_all(env, BP_GDB);
2498	2b1319c8	aurel32	cpu_watchpoint_remove_all(env, BP_GDB);
2499	2b1319c8	aurel32	}
2500	1fddef4b	bellard	#else
2501	aa1f17c1	ths	static int gdb_chr_can_receive(void *opaque)
2502	4046d913	pbrook	{
2503	56aebc89	pbrook	/* We can handle an arbitrarily large amount of data.
2504	56aebc89	pbrook	Pick the maximum packet size, which is as good as anything. */
2505	56aebc89	pbrook	return MAX_PACKET_LENGTH;
2506	4046d913	pbrook	}
2507	4046d913	pbrook
2508	aa1f17c1	ths	static void gdb_chr_receive(void opaque, const uint8_t buf, int size)
2509	4046d913	pbrook	{
2510	4046d913	pbrook	int i;
2511	4046d913	pbrook
2512	4046d913	pbrook	for (i = 0; i < size; i++) {
2513	880a7578	aliguori	gdb_read_byte(gdbserver_state, buf[i]);
2514	4046d913	pbrook	}
2515	4046d913	pbrook	}
2516	4046d913	pbrook
2517	4046d913	pbrook	static void gdb_chr_event(void *opaque, int event)
2518	4046d913	pbrook	{
2519	4046d913	pbrook	switch (event) {
2520	b6b8df56	Amit Shah	case CHR_EVENT_OPENED:
2521	4046d913	pbrook	vm_stop(EXCP_INTERRUPT);
2522	56aebc89	pbrook	gdb_has_xml = 0;
2523	4046d913	pbrook	break;
2524	4046d913	pbrook	default:
2525	4046d913	pbrook	break;
2526	4046d913	pbrook	}
2527	4046d913	pbrook	}
2528	4046d913	pbrook
2529	8a34a0fb	aliguori	static void gdb_monitor_output(GDBState s, const char msg, int len)
2530	8a34a0fb	aliguori	{
2531	8a34a0fb	aliguori	char buf[MAX_PACKET_LENGTH];
2532	8a34a0fb	aliguori
2533	8a34a0fb	aliguori	buf[0] = 'O';
2534	8a34a0fb	aliguori	if (len > (MAX_PACKET_LENGTH/2) - 1)
2535	8a34a0fb	aliguori	len = (MAX_PACKET_LENGTH/2) - 1;
2536	8a34a0fb	aliguori	memtohex(buf + 1, (uint8_t *)msg, len);
2537	8a34a0fb	aliguori	put_packet(s, buf);
2538	8a34a0fb	aliguori	}
2539	8a34a0fb	aliguori
2540	8a34a0fb	aliguori	static int gdb_monitor_write(CharDriverState chr, const uint8_t buf, int len)
2541	8a34a0fb	aliguori	{
2542	8a34a0fb	aliguori	const char p = (const char )buf;
2543	8a34a0fb	aliguori	int max_sz;
2544	8a34a0fb	aliguori
2545	8a34a0fb	aliguori	max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2;
2546	8a34a0fb	aliguori	for (;;) {
2547	8a34a0fb	aliguori	if (len <= max_sz) {
2548	8a34a0fb	aliguori	gdb_monitor_output(gdbserver_state, p, len);
2549	8a34a0fb	aliguori	break;
2550	8a34a0fb	aliguori	}
2551	8a34a0fb	aliguori	gdb_monitor_output(gdbserver_state, p, max_sz);
2552	8a34a0fb	aliguori	p += max_sz;
2553	8a34a0fb	aliguori	len -= max_sz;
2554	8a34a0fb	aliguori	}
2555	8a34a0fb	aliguori	return len;
2556	8a34a0fb	aliguori	}
2557	8a34a0fb	aliguori
2558	59030a8c	aliguori	#ifndef _WIN32
2559	59030a8c	aliguori	static void gdb_sigterm_handler(int signal)
2560	59030a8c	aliguori	{
2561	59030a8c	aliguori	if (vm_running)
2562	59030a8c	aliguori	vm_stop(EXCP_INTERRUPT);
2563	59030a8c	aliguori	}
2564	59030a8c	aliguori	#endif
2565	59030a8c	aliguori
2566	59030a8c	aliguori	int gdbserver_start(const char *device)
2567	4046d913	pbrook	{
2568	4046d913	pbrook	GDBState *s;
2569	59030a8c	aliguori	char gdbstub_device_name[128];
2570	36556b20	aliguori	CharDriverState *chr = NULL;
2571	36556b20	aliguori	CharDriverState *mon_chr;
2572	cfc3475a	pbrook
2573	59030a8c	aliguori	if (!device)
2574	59030a8c	aliguori	return -1;
2575	59030a8c	aliguori	if (strcmp(device, "none") != 0) {
2576	59030a8c	aliguori	if (strstart(device, "tcp:", NULL)) {
2577	59030a8c	aliguori	/* enforce required TCP attributes */
2578	59030a8c	aliguori	snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
2579	59030a8c	aliguori	"%s,nowait,nodelay,server", device);
2580	59030a8c	aliguori	device = gdbstub_device_name;
2581	36556b20	aliguori	}
2582	59030a8c	aliguori	#ifndef _WIN32
2583	59030a8c	aliguori	else if (strcmp(device, "stdio") == 0) {
2584	59030a8c	aliguori	struct sigaction act;
2585	4046d913	pbrook
2586	59030a8c	aliguori	memset(&act, 0, sizeof(act));
2587	59030a8c	aliguori	act.sa_handler = gdb_sigterm_handler;
2588	59030a8c	aliguori	sigaction(SIGINT, &act, NULL);
2589	59030a8c	aliguori	}
2590	59030a8c	aliguori	#endif
2591	59030a8c	aliguori	chr = qemu_chr_open("gdb", device, NULL);
2592	36556b20	aliguori	if (!chr)
2593	36556b20	aliguori	return -1;
2594	36556b20	aliguori
2595	36556b20	aliguori	qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2596	36556b20	aliguori	gdb_chr_event, NULL);
2597	cfc3475a	pbrook	}
2598	cfc3475a	pbrook
2599	36556b20	aliguori	s = gdbserver_state;
2600	36556b20	aliguori	if (!s) {
2601	36556b20	aliguori	s = qemu_mallocz(sizeof(GDBState));
2602	36556b20	aliguori	gdbserver_state = s;
2603	4046d913	pbrook
2604	36556b20	aliguori	qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
2605	36556b20	aliguori
2606	36556b20	aliguori	/* Initialize a monitor terminal for gdb */
2607	36556b20	aliguori	mon_chr = qemu_mallocz(sizeof(*mon_chr));
2608	36556b20	aliguori	mon_chr->chr_write = gdb_monitor_write;
2609	36556b20	aliguori	monitor_init(mon_chr, 0);
2610	36556b20	aliguori	} else {
2611	36556b20	aliguori	if (s->chr)
2612	36556b20	aliguori	qemu_chr_close(s->chr);
2613	36556b20	aliguori	mon_chr = s->mon_chr;
2614	36556b20	aliguori	memset(s, 0, sizeof(GDBState));
2615	36556b20	aliguori	}
2616	880a7578	aliguori	s->c_cpu = first_cpu;
2617	880a7578	aliguori	s->g_cpu = first_cpu;
2618	4046d913	pbrook	s->chr = chr;
2619	36556b20	aliguori	s->state = chr ? RS_IDLE : RS_INACTIVE;
2620	36556b20	aliguori	s->mon_chr = mon_chr;
2621	8a34a0fb	aliguori
2622	b4608c04	bellard	return 0;
2623	b4608c04	bellard	}
2624	4046d913	pbrook	#endif

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