Archipelago » qemu

#undef NULL

#define NULL 0

#define AREG0 "ebp"

#define AREG1 "ebx"

#define AREG2 "esi"

#define AREG3 "edi"

#define AREG0 "r14"

#define AREG1 "r15"

#define AREG2 "r12"

#define AREG3 "r13"

//#define AREG4 "rbp"

//#define AREG5 "rbx"

#define AREG0 "r27"

#define AREG1 "r24"

#define AREG2 "r25"

#endif

#define USE_INT_TO_FLOAT_HELPERS

#define BUGGY_GCC_DIV64

#define AREG0 "r7"

#define AREG1 "r4"

#define AREG2 "r5"

#define AREG3 "r6"

#define AREG0 "fp"

#define AREG1 "s0"

#define AREG2 "s1"

#define AREG6 "s5"

#define AREG7 "s6"

#define AREG8 "s7"

#ifdef HOST_SOLARIS

#define AREG0 "g2"

#define AREG1 "g3"

#endif

#endif

#define USE_FP_CONVERT

#define AREG0 "r10"

#define AREG1 "r7"

#define AREG2 "r8"

#define AREG3 "r9"

/* Note $15 is the frame pointer, so anything in op-i386.c that would

   require a frame pointer, like alloca, would probably loose.  */

#define AREG0 "$15"

#define AREG4 "$12"

#define AREG5 "$13"

#define AREG6 "$14"

#define AREG0 "%a5"

#define AREG1 "%a4"

#define AREG2 "%d7"

#define AREG3 "%d6"

#define AREG4 "%d5"

#define AREG0 "r7"

#define AREG1 "r4"

#define AREG2 "r5"

#define AREG3 "r6"

#endif

/* force GCC to generate only one epilog at the end of the function */

#define ASM_NAME(x) #x

#endif

#define EXIT_TB() asm volatile ("ret")

#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)

#define EXIT_TB() asm volatile ("ret")

#define GOTO_LABEL_PARAM(n) asm volatile ("jmp " ASM_NAME(__op_gen_label) #n)

#define EXIT_TB() asm volatile ("blr")

#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)

#define EXIT_TB() asm volatile ("br %r14")

#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)

#define EXIT_TB() asm volatile ("ret")

#define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;")

#define GOTO_LABEL_PARAM(n) asm volatile ("br.sptk.many " \

					  ASM_NAME(__op_gen_label) #n)

#define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0; nop")

#define GOTO_LABEL_PARAM(n) asm volatile ("ba " ASM_NAME(__op_gen_label) #n ";nop")

#define EXIT_TB() asm volatile ("b exec_loop")

#define GOTO_LABEL_PARAM(n) asm volatile ("b " ASM_NAME(__op_gen_label) #n)

#define EXIT_TB() asm volatile ("rts")

#define EXIT_TB() asm volatile ("jr $ra")

#define GOTO_LABEL_PARAM(n) asm volatile (".set noat; la $1, " ASM_NAME(__op_gen_label) #n "; jr $1; .set at")

#endif

#endif /* !defined(__DYNGEN_EXEC_H__) */

#endif

int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;

static inline void flush_icache_range(unsigned long start, unsigned long stop)

{

}

static inline void flush_icache_range(unsigned long start, unsigned long stop)

{

    while (start < stop) {

    }

    asm volatile (";;sync.i;;srlz.i;;");

}

#define MIN_CACHE_LINE_SIZE 8 /* conservative value */

    asm volatile ("sync" : : : "memory");

    asm volatile ("isync" : : : "memory");

}

static inline void flush_icache_range(unsigned long start, unsigned long stop)

{

    asm ("imb");

}

static void inline flush_icache_range(unsigned long start, unsigned long stop)

{

	unsigned long p;

	for (; p < stop; p += 8)

		__asm__ __volatile__("flush\t%0" : : "r" (p));

}

static inline void flush_icache_range(unsigned long start, unsigned long stop)

{

    register unsigned long _beg __asm ("a1") = start;

    register unsigned long _flg __asm ("a3") = 0;

    __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));

}

static inline void flush_icache_range(unsigned long start, unsigned long stop)

{

    cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);

}

#endif

#ifdef __alpha__

#ifdef __ia64

/* Patch instruction with "val" where "mask" has 1 bits. */

static inline void ia64_patch (uint64_t insn_addr, uint64_t mask, uint64_t val)

{

}

#endif