Revision 52cc07d0 hw/sun4m.c
| b/hw/sun4m.c | ||
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| 184 | 184 |
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| 185 | 185 |
void pic_set_irq(int irq, int level) |
| 186 | 186 |
{
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slavio_pic_set_irq(slavio_intctl, irq, level); |
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} |
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void pic_set_irq_new(void *opaque, int irq, int level) |
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{
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pic_set_irq(irq, level); |
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} |
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void pic_set_irq_cpu(int irq, int level, unsigned int cpu) |
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{
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slavio_pic_set_irq_cpu(slavio_intctl, irq, level, cpu); |
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pic_set_irq_new(slavio_intctl, irq, level); |
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| 198 | 188 |
} |
| 199 | 189 |
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| 200 | 190 |
static void *slavio_misc; |
| ... | ... | |
| 261 | 251 |
nvram = m48t59_init(0, hwdef->nvram_base, 0, hwdef->nvram_size, 8); |
| 262 | 252 |
for (i = 0; i < MAX_CPUS; i++) {
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slavio_timer_init(hwdef->counter_base + i * TARGET_PAGE_SIZE, |
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hwdef->clock_irq, 0, i); |
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hwdef->clock_irq, 0, i, slavio_intctl);
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} |
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slavio_timer_init(hwdef->counter_base + 0x10000, hwdef->clock1_irq, 2, |
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(unsigned int)-1); |
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slavio_serial_ms_kbd_init(hwdef->ms_kb_base, hwdef->ms_kb_irq); |
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(unsigned int)-1, slavio_intctl); |
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slavio_serial_ms_kbd_init(hwdef->ms_kb_base, hwdef->ms_kb_irq, |
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slavio_intctl); |
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// Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device |
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// Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device |
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slavio_serial_init(hwdef->serial_base, hwdef->ser_irq, |
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serial_hds[1], serial_hds[0]); |
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serial_hds[1], serial_hds[0], slavio_intctl);
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| 273 | 264 |
fdctrl_init(hwdef->fd_irq, 0, 1, hwdef->fd_base, fd_table); |
| 274 | 265 |
main_esp = esp_init(bs_table, hwdef->esp_base, dma); |
| 275 | 266 |
|
| ... | ... | |
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} |
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} |
| 281 | 272 |
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slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq); |
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slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->me_irq, |
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slavio_intctl); |
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| 283 | 275 |
cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); |
| 284 | 276 |
sparc32_dma_set_reset_data(dma, main_esp, main_lance); |
| 285 | 277 |
} |
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