Revision 534ce69f target-mips/op.c

b/target-mips/op.c
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void op_mtc0_context (void)
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{
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    env->CP0_Context = (env->CP0_Context & ~0x007FFFFF) | (T0 & ~0x007FFFFF);
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    env->CP0_Context = (env->CP0_Context & 0x007FFFFF) | (T0 & ~0x007FFFFF);
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    RETURN();
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}
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......
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    RETURN();
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}
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void op_mtc0_xcontext (void)
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{
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    env->CP0_XContext = (int32_t)T0; /* XXX */
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    RETURN();
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}
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void op_mtc0_framemask (void)
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{
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    env->CP0_Framemask = T0; /* XXX */
......
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    RETURN();
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}
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#ifdef TARGET_MIPS64
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void op_dmfc0_entrylo0 (void)
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{
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    T0 = env->CP0_EntryLo0;
......
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void op_dmtc0_context (void)
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{
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    env->CP0_Context = (env->CP0_Context & ~0x007FFFFF) | (T0 & 0x007FFFF0);
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    env->CP0_Context = (env->CP0_Context & 0x007FFFFF) | (T0 & ~0x007FFFFF);
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    RETURN();
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}
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......
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void op_dmtc0_xcontext (void)
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{
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    env->CP0_XContext = T0; /* XXX */
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    env->CP0_XContext = (env->CP0_XContext & 0xffffffff) | (T0 & ~0xffffffff);
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    RETURN();
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}
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......
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    env->CP0_ErrorEPC = T0;
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    RETURN();
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}
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#endif /* TARGET_MIPS64 */
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#if 0
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# define DEBUG_FPU_STATE() CALL_FROM_TB1(dump_fpu, env)

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