root / tcg / tcg-op.h @ 53c37487
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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#ifdef CONFIG_DYNGEN_OP
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/* legacy dyngen operations */
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#include "gen-op.h" |
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#endif
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{ |
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{ |
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if (GET_TCGV(ret) != GET_TCGV(arg))
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{ |
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_3(void *func, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 3, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{ |
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TCGv args[4];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{ |
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TCGv t0; |
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 3, args); |
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tcg_temp_free(t0); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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TCGv args[4];
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TCGv t0; |
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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t0 = tcg_const_ptr((tcg_target_long)func); |
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tcg_gen_call(&tcg_ctx, |
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t0, TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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tcg_temp_free(t0); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
357 |
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
362 |
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
368 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
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tcg_gen_add_i32(ret, arg1, t0); |
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tcg_temp_free(t0); |
372 |
} |
373 |
} |
374 |
|
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
376 |
{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
378 |
} |
379 |
|
380 |
static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
381 |
{ |
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/* some cases can be optimized here */
|
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if (arg2 == 0) { |
384 |
tcg_gen_mov_i32(ret, arg1); |
385 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
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tcg_gen_sub_i32(ret, arg1, t0); |
388 |
tcg_temp_free(t0); |
389 |
} |
390 |
} |
391 |
|
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
393 |
{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
395 |
} |
396 |
|
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
398 |
{ |
399 |
/* some cases can be optimized here */
|
400 |
if (arg2 == 0) { |
401 |
tcg_gen_movi_i32(ret, 0);
|
402 |
} else if (arg2 == 0xffffffff) { |
403 |
tcg_gen_mov_i32(ret, arg1); |
404 |
} else {
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TCGv t0 = tcg_const_i32(arg2); |
406 |
tcg_gen_and_i32(ret, arg1, t0); |
407 |
tcg_temp_free(t0); |
408 |
} |
409 |
} |
410 |
|
411 |
static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
412 |
{ |
413 |
tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
414 |
} |
415 |
|
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static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
417 |
{ |
418 |
/* some cases can be optimized here */
|
419 |
if (arg2 == 0xffffffff) { |
420 |
tcg_gen_movi_i32(ret, 0xffffffff);
|
421 |
} else if (arg2 == 0) { |
422 |
tcg_gen_mov_i32(ret, arg1); |
423 |
} else {
|
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TCGv t0 = tcg_const_i32(arg2); |
425 |
tcg_gen_or_i32(ret, arg1, t0); |
426 |
tcg_temp_free(t0); |
427 |
} |
428 |
} |
429 |
|
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static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
431 |
{ |
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
433 |
} |
434 |
|
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
436 |
{ |
437 |
/* some cases can be optimized here */
|
438 |
if (arg2 == 0) { |
439 |
tcg_gen_mov_i32(ret, arg1); |
440 |
} else {
|
441 |
TCGv t0 = tcg_const_i32(arg2); |
442 |
tcg_gen_xor_i32(ret, arg1, t0); |
443 |
tcg_temp_free(t0); |
444 |
} |
445 |
} |
446 |
|
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
448 |
{ |
449 |
tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
450 |
} |
451 |
|
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static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
453 |
{ |
454 |
if (arg2 == 0) { |
455 |
tcg_gen_mov_i32(ret, arg1); |
456 |
} else {
|
457 |
TCGv t0 = tcg_const_i32(arg2); |
458 |
tcg_gen_shl_i32(ret, arg1, t0); |
459 |
tcg_temp_free(t0); |
460 |
} |
461 |
} |
462 |
|
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
464 |
{ |
465 |
tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
466 |
} |
467 |
|
468 |
static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
469 |
{ |
470 |
if (arg2 == 0) { |
471 |
tcg_gen_mov_i32(ret, arg1); |
472 |
} else {
|
473 |
TCGv t0 = tcg_const_i32(arg2); |
474 |
tcg_gen_shr_i32(ret, arg1, t0); |
475 |
tcg_temp_free(t0); |
476 |
} |
477 |
} |
478 |
|
479 |
static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
480 |
{ |
481 |
tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
482 |
} |
483 |
|
484 |
static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
485 |
{ |
486 |
if (arg2 == 0) { |
487 |
tcg_gen_mov_i32(ret, arg1); |
488 |
} else {
|
489 |
TCGv t0 = tcg_const_i32(arg2); |
490 |
tcg_gen_sar_i32(ret, arg1, t0); |
491 |
tcg_temp_free(t0); |
492 |
} |
493 |
} |
494 |
|
495 |
static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
496 |
int label_index)
|
497 |
{ |
498 |
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
499 |
} |
500 |
|
501 |
static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, |
502 |
int label_index)
|
503 |
{ |
504 |
TCGv t0 = tcg_const_i32(arg2); |
505 |
tcg_gen_brcond_i32(cond, arg1, t0, label_index); |
506 |
tcg_temp_free(t0); |
507 |
} |
508 |
|
509 |
static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
510 |
{ |
511 |
tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
512 |
} |
513 |
|
514 |
static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
515 |
{ |
516 |
TCGv t0 = tcg_const_i32(arg2); |
517 |
tcg_gen_mul_i32(ret, arg1, t0); |
518 |
tcg_temp_free(t0); |
519 |
} |
520 |
|
521 |
#ifdef TCG_TARGET_HAS_div_i32
|
522 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
523 |
{ |
524 |
tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
525 |
} |
526 |
|
527 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
528 |
{ |
529 |
tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
530 |
} |
531 |
|
532 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
533 |
{ |
534 |
tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
535 |
} |
536 |
|
537 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
538 |
{ |
539 |
tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
540 |
} |
541 |
#else
|
542 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
543 |
{ |
544 |
TCGv t0; |
545 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
546 |
tcg_gen_sari_i32(t0, arg1, 31);
|
547 |
tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
548 |
tcg_temp_free(t0); |
549 |
} |
550 |
|
551 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
552 |
{ |
553 |
TCGv t0; |
554 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
555 |
tcg_gen_sari_i32(t0, arg1, 31);
|
556 |
tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
557 |
tcg_temp_free(t0); |
558 |
} |
559 |
|
560 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
561 |
{ |
562 |
TCGv t0; |
563 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
564 |
tcg_gen_movi_i32(t0, 0);
|
565 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
566 |
tcg_temp_free(t0); |
567 |
} |
568 |
|
569 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
570 |
{ |
571 |
TCGv t0; |
572 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
573 |
tcg_gen_movi_i32(t0, 0);
|
574 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
575 |
tcg_temp_free(t0); |
576 |
} |
577 |
#endif
|
578 |
|
579 |
#if TCG_TARGET_REG_BITS == 32 |
580 |
|
581 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
582 |
{ |
583 |
if (GET_TCGV(ret) != GET_TCGV(arg)) {
|
584 |
tcg_gen_mov_i32(ret, arg); |
585 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
586 |
} |
587 |
} |
588 |
|
589 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
590 |
{ |
591 |
tcg_gen_movi_i32(ret, arg); |
592 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
593 |
} |
594 |
|
595 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
596 |
{ |
597 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
598 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
599 |
} |
600 |
|
601 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
602 |
{ |
603 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
604 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
605 |
} |
606 |
|
607 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
608 |
{ |
609 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
610 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
611 |
} |
612 |
|
613 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
614 |
{ |
615 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
616 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
617 |
} |
618 |
|
619 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
620 |
{ |
621 |
tcg_gen_ld_i32(ret, arg2, offset); |
622 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
623 |
} |
624 |
|
625 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
626 |
{ |
627 |
tcg_gen_ld_i32(ret, arg2, offset); |
628 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
629 |
} |
630 |
|
631 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
632 |
{ |
633 |
/* since arg2 and ret have different types, they cannot be the
|
634 |
same temporary */
|
635 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
636 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
637 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
638 |
#else
|
639 |
tcg_gen_ld_i32(ret, arg2, offset); |
640 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
641 |
#endif
|
642 |
} |
643 |
|
644 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
645 |
{ |
646 |
tcg_gen_st8_i32(arg1, arg2, offset); |
647 |
} |
648 |
|
649 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
650 |
{ |
651 |
tcg_gen_st16_i32(arg1, arg2, offset); |
652 |
} |
653 |
|
654 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
655 |
{ |
656 |
tcg_gen_st_i32(arg1, arg2, offset); |
657 |
} |
658 |
|
659 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
660 |
{ |
661 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
662 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
663 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
664 |
#else
|
665 |
tcg_gen_st_i32(arg1, arg2, offset); |
666 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
667 |
#endif
|
668 |
} |
669 |
|
670 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
671 |
{ |
672 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
673 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
674 |
} |
675 |
|
676 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
677 |
{ |
678 |
TCGv t0 = tcg_const_i64(arg2); |
679 |
tcg_gen_add_i64(ret, arg1, t0); |
680 |
tcg_temp_free(t0); |
681 |
} |
682 |
|
683 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
684 |
{ |
685 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
686 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
687 |
} |
688 |
|
689 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
690 |
{ |
691 |
TCGv t0 = tcg_const_i64(arg2); |
692 |
tcg_gen_sub_i64(ret, arg1, t0); |
693 |
tcg_temp_free(t0); |
694 |
} |
695 |
|
696 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
697 |
{ |
698 |
tcg_gen_and_i32(ret, arg1, arg2); |
699 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
700 |
} |
701 |
|
702 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
703 |
{ |
704 |
tcg_gen_andi_i32(ret, arg1, arg2); |
705 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
706 |
} |
707 |
|
708 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
709 |
{ |
710 |
tcg_gen_or_i32(ret, arg1, arg2); |
711 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
712 |
} |
713 |
|
714 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
715 |
{ |
716 |
tcg_gen_ori_i32(ret, arg1, arg2); |
717 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
718 |
} |
719 |
|
720 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
721 |
{ |
722 |
tcg_gen_xor_i32(ret, arg1, arg2); |
723 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
724 |
} |
725 |
|
726 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
727 |
{ |
728 |
tcg_gen_xori_i32(ret, arg1, arg2); |
729 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
730 |
} |
731 |
|
732 |
/* XXX: use generic code when basic block handling is OK or CPU
|
733 |
specific code (x86) */
|
734 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
735 |
{ |
736 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
737 |
} |
738 |
|
739 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
740 |
{ |
741 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
742 |
} |
743 |
|
744 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
745 |
{ |
746 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
747 |
} |
748 |
|
749 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
750 |
{ |
751 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
752 |
} |
753 |
|
754 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
755 |
{ |
756 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
757 |
} |
758 |
|
759 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
760 |
{ |
761 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
762 |
} |
763 |
|
764 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
765 |
int label_index)
|
766 |
{ |
767 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
768 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
769 |
cond, label_index); |
770 |
} |
771 |
|
772 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
773 |
{ |
774 |
TCGv t0, t1; |
775 |
|
776 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
777 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
778 |
|
779 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
780 |
|
781 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
782 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
783 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
784 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
785 |
|
786 |
tcg_gen_mov_i64(ret, t0); |
787 |
tcg_temp_free(t0); |
788 |
tcg_temp_free(t1); |
789 |
} |
790 |
|
791 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
792 |
{ |
793 |
TCGv t0 = tcg_const_i64(arg2); |
794 |
tcg_gen_mul_i64(ret, arg1, t0); |
795 |
tcg_temp_free(t0); |
796 |
} |
797 |
|
798 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
799 |
{ |
800 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
801 |
} |
802 |
|
803 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
804 |
{ |
805 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
806 |
} |
807 |
|
808 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
809 |
{ |
810 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
811 |
} |
812 |
|
813 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
814 |
{ |
815 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
816 |
} |
817 |
|
818 |
#else
|
819 |
|
820 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
821 |
{ |
822 |
if (GET_TCGV(ret) != GET_TCGV(arg))
|
823 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
824 |
} |
825 |
|
826 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
827 |
{ |
828 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
829 |
} |
830 |
|
831 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
832 |
tcg_target_long offset) |
833 |
{ |
834 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
835 |
} |
836 |
|
837 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
838 |
tcg_target_long offset) |
839 |
{ |
840 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
841 |
} |
842 |
|
843 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
844 |
tcg_target_long offset) |
845 |
{ |
846 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
847 |
} |
848 |
|
849 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
850 |
tcg_target_long offset) |
851 |
{ |
852 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
853 |
} |
854 |
|
855 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
856 |
tcg_target_long offset) |
857 |
{ |
858 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
859 |
} |
860 |
|
861 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
862 |
tcg_target_long offset) |
863 |
{ |
864 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
865 |
} |
866 |
|
867 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
868 |
{ |
869 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
870 |
} |
871 |
|
872 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
873 |
tcg_target_long offset) |
874 |
{ |
875 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
876 |
} |
877 |
|
878 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
879 |
tcg_target_long offset) |
880 |
{ |
881 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
882 |
} |
883 |
|
884 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
885 |
tcg_target_long offset) |
886 |
{ |
887 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
888 |
} |
889 |
|
890 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
891 |
{ |
892 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
893 |
} |
894 |
|
895 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
896 |
{ |
897 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
898 |
} |
899 |
|
900 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
901 |
{ |
902 |
TCGv t0 = tcg_const_i64(arg2); |
903 |
tcg_gen_add_i64(ret, arg1, t0); |
904 |
tcg_temp_free(t0); |
905 |
} |
906 |
|
907 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
908 |
{ |
909 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
910 |
} |
911 |
|
912 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
913 |
{ |
914 |
TCGv t0 = tcg_const_i64(arg2); |
915 |
tcg_gen_sub_i64(ret, arg1, t0); |
916 |
tcg_temp_free(t0); |
917 |
} |
918 |
|
919 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
920 |
{ |
921 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
922 |
} |
923 |
|
924 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
925 |
{ |
926 |
TCGv t0 = tcg_const_i64(arg2); |
927 |
tcg_gen_and_i64(ret, arg1, t0); |
928 |
tcg_temp_free(t0); |
929 |
} |
930 |
|
931 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
932 |
{ |
933 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
934 |
} |
935 |
|
936 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
937 |
{ |
938 |
TCGv t0 = tcg_const_i64(arg2); |
939 |
tcg_gen_or_i64(ret, arg1, t0); |
940 |
tcg_temp_free(t0); |
941 |
} |
942 |
|
943 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
944 |
{ |
945 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
946 |
} |
947 |
|
948 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
949 |
{ |
950 |
TCGv t0 = tcg_const_i64(arg2); |
951 |
tcg_gen_xor_i64(ret, arg1, t0); |
952 |
tcg_temp_free(t0); |
953 |
} |
954 |
|
955 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
956 |
{ |
957 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
958 |
} |
959 |
|
960 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
961 |
{ |
962 |
if (arg2 == 0) { |
963 |
tcg_gen_mov_i64(ret, arg1); |
964 |
} else {
|
965 |
TCGv t0 = tcg_const_i64(arg2); |
966 |
tcg_gen_shl_i64(ret, arg1, t0); |
967 |
tcg_temp_free(t0); |
968 |
} |
969 |
} |
970 |
|
971 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
972 |
{ |
973 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
974 |
} |
975 |
|
976 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
977 |
{ |
978 |
if (arg2 == 0) { |
979 |
tcg_gen_mov_i64(ret, arg1); |
980 |
} else {
|
981 |
TCGv t0 = tcg_const_i64(arg2); |
982 |
tcg_gen_shr_i64(ret, arg1, t0); |
983 |
tcg_temp_free(t0); |
984 |
} |
985 |
} |
986 |
|
987 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
988 |
{ |
989 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
990 |
} |
991 |
|
992 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
993 |
{ |
994 |
if (arg2 == 0) { |
995 |
tcg_gen_mov_i64(ret, arg1); |
996 |
} else {
|
997 |
TCGv t0 = tcg_const_i64(arg2); |
998 |
tcg_gen_sar_i64(ret, arg1, t0); |
999 |
tcg_temp_free(t0); |
1000 |
} |
1001 |
} |
1002 |
|
1003 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
1004 |
int label_index)
|
1005 |
{ |
1006 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
1007 |
} |
1008 |
|
1009 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1010 |
{ |
1011 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
1012 |
} |
1013 |
|
1014 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
1015 |
{ |
1016 |
TCGv t0 = tcg_const_i64(arg2); |
1017 |
tcg_gen_mul_i64(ret, arg1, t0); |
1018 |
tcg_temp_free(t0); |
1019 |
} |
1020 |
|
1021 |
#ifdef TCG_TARGET_HAS_div_i64
|
1022 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1023 |
{ |
1024 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
1025 |
} |
1026 |
|
1027 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1028 |
{ |
1029 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
1030 |
} |
1031 |
|
1032 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1033 |
{ |
1034 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
1035 |
} |
1036 |
|
1037 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1038 |
{ |
1039 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
1040 |
} |
1041 |
#else
|
1042 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1043 |
{ |
1044 |
TCGv t0; |
1045 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1046 |
tcg_gen_sari_i64(t0, arg1, 63);
|
1047 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
1048 |
tcg_temp_free(t0); |
1049 |
} |
1050 |
|
1051 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1052 |
{ |
1053 |
TCGv t0; |
1054 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1055 |
tcg_gen_sari_i64(t0, arg1, 63);
|
1056 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
1057 |
tcg_temp_free(t0); |
1058 |
} |
1059 |
|
1060 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1061 |
{ |
1062 |
TCGv t0; |
1063 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1064 |
tcg_gen_movi_i64(t0, 0);
|
1065 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
1066 |
tcg_temp_free(t0); |
1067 |
} |
1068 |
|
1069 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
1070 |
{ |
1071 |
TCGv t0; |
1072 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
1073 |
tcg_gen_movi_i64(t0, 0);
|
1074 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
1075 |
tcg_temp_free(t0); |
1076 |
} |
1077 |
#endif
|
1078 |
|
1079 |
#endif
|
1080 |
|
1081 |
static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, |
1082 |
int label_index)
|
1083 |
{ |
1084 |
TCGv t0 = tcg_const_i64(arg2); |
1085 |
tcg_gen_brcond_i64(cond, arg1, t0, label_index); |
1086 |
tcg_temp_free(t0); |
1087 |
} |
1088 |
|
1089 |
/***************************************/
|
1090 |
/* optional operations */
|
1091 |
|
1092 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
1093 |
{ |
1094 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
1095 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
1096 |
#else
|
1097 |
tcg_gen_shli_i32(ret, arg, 24);
|
1098 |
tcg_gen_sari_i32(ret, ret, 24);
|
1099 |
#endif
|
1100 |
} |
1101 |
|
1102 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
1103 |
{ |
1104 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
1105 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
1106 |
#else
|
1107 |
tcg_gen_shli_i32(ret, arg, 16);
|
1108 |
tcg_gen_sari_i32(ret, ret, 16);
|
1109 |
#endif
|
1110 |
} |
1111 |
|
1112 |
/* These are currently just for convenience.
|
1113 |
We assume a target will recognise these automatically . */
|
1114 |
static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) |
1115 |
{ |
1116 |
tcg_gen_andi_i32(ret, arg, 0xffu);
|
1117 |
} |
1118 |
|
1119 |
static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) |
1120 |
{ |
1121 |
tcg_gen_andi_i32(ret, arg, 0xffffu);
|
1122 |
} |
1123 |
|
1124 |
/* Note: we assume the two high bytes are set to zero */
|
1125 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
1126 |
{ |
1127 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
1128 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
1129 |
#else
|
1130 |
TCGv t0, t1; |
1131 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1132 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1133 |
|
1134 |
tcg_gen_shri_i32(t0, arg, 8);
|
1135 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
1136 |
tcg_gen_shli_i32(t1, t1, 8);
|
1137 |
tcg_gen_or_i32(ret, t0, t1); |
1138 |
tcg_temp_free(t0); |
1139 |
tcg_temp_free(t1); |
1140 |
#endif
|
1141 |
} |
1142 |
|
1143 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
1144 |
{ |
1145 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
1146 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
1147 |
#else
|
1148 |
TCGv t0, t1; |
1149 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1150 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1151 |
|
1152 |
tcg_gen_shli_i32(t0, arg, 24);
|
1153 |
|
1154 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
1155 |
tcg_gen_shli_i32(t1, t1, 8);
|
1156 |
tcg_gen_or_i32(t0, t0, t1); |
1157 |
|
1158 |
tcg_gen_shri_i32(t1, arg, 8);
|
1159 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
1160 |
tcg_gen_or_i32(t0, t0, t1); |
1161 |
|
1162 |
tcg_gen_shri_i32(t1, arg, 24);
|
1163 |
tcg_gen_or_i32(ret, t0, t1); |
1164 |
tcg_temp_free(t0); |
1165 |
tcg_temp_free(t1); |
1166 |
#endif
|
1167 |
} |
1168 |
|
1169 |
#if TCG_TARGET_REG_BITS == 32 |
1170 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1171 |
{ |
1172 |
tcg_gen_ext8s_i32(ret, arg); |
1173 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1174 |
} |
1175 |
|
1176 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1177 |
{ |
1178 |
tcg_gen_ext16s_i32(ret, arg); |
1179 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1180 |
} |
1181 |
|
1182 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1183 |
{ |
1184 |
tcg_gen_mov_i32(ret, arg); |
1185 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1186 |
} |
1187 |
|
1188 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1189 |
{ |
1190 |
tcg_gen_ext8u_i32(ret, arg); |
1191 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1192 |
} |
1193 |
|
1194 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1195 |
{ |
1196 |
tcg_gen_ext16u_i32(ret, arg); |
1197 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1198 |
} |
1199 |
|
1200 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1201 |
{ |
1202 |
tcg_gen_mov_i32(ret, arg); |
1203 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1204 |
} |
1205 |
|
1206 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1207 |
{ |
1208 |
tcg_gen_mov_i32(ret, arg); |
1209 |
} |
1210 |
|
1211 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1212 |
{ |
1213 |
tcg_gen_mov_i32(ret, arg); |
1214 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1215 |
} |
1216 |
|
1217 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1218 |
{ |
1219 |
tcg_gen_mov_i32(ret, arg); |
1220 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1221 |
} |
1222 |
|
1223 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1224 |
{ |
1225 |
TCGv t0, t1; |
1226 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1227 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1228 |
|
1229 |
tcg_gen_bswap_i32(t0, arg); |
1230 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
1231 |
tcg_gen_mov_i32(ret, t1); |
1232 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
1233 |
tcg_temp_free(t0); |
1234 |
tcg_temp_free(t1); |
1235 |
} |
1236 |
#else
|
1237 |
|
1238 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1239 |
{ |
1240 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
1241 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
1242 |
#else
|
1243 |
tcg_gen_shli_i64(ret, arg, 56);
|
1244 |
tcg_gen_sari_i64(ret, ret, 56);
|
1245 |
#endif
|
1246 |
} |
1247 |
|
1248 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1249 |
{ |
1250 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
1251 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
1252 |
#else
|
1253 |
tcg_gen_shli_i64(ret, arg, 48);
|
1254 |
tcg_gen_sari_i64(ret, ret, 48);
|
1255 |
#endif
|
1256 |
} |
1257 |
|
1258 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1259 |
{ |
1260 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
1261 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
1262 |
#else
|
1263 |
tcg_gen_shli_i64(ret, arg, 32);
|
1264 |
tcg_gen_sari_i64(ret, ret, 32);
|
1265 |
#endif
|
1266 |
} |
1267 |
|
1268 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1269 |
{ |
1270 |
tcg_gen_andi_i64(ret, arg, 0xffu);
|
1271 |
} |
1272 |
|
1273 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1274 |
{ |
1275 |
tcg_gen_andi_i64(ret, arg, 0xffffu);
|
1276 |
} |
1277 |
|
1278 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1279 |
{ |
1280 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1281 |
} |
1282 |
|
1283 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1284 |
registers. This will probably break MIPS64 targets. */
|
1285 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1286 |
{ |
1287 |
tcg_gen_mov_i32(ret, arg); |
1288 |
} |
1289 |
|
1290 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1291 |
registers */
|
1292 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1293 |
{ |
1294 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1295 |
} |
1296 |
|
1297 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1298 |
registers */
|
1299 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1300 |
{ |
1301 |
tcg_gen_ext32s_i64(ret, arg); |
1302 |
} |
1303 |
|
1304 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1305 |
{ |
1306 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
1307 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
1308 |
#else
|
1309 |
TCGv t0, t1; |
1310 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1311 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1312 |
|
1313 |
tcg_gen_shli_i64(t0, arg, 56);
|
1314 |
|
1315 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
1316 |
tcg_gen_shli_i64(t1, t1, 40);
|
1317 |
tcg_gen_or_i64(t0, t0, t1); |
1318 |
|
1319 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
1320 |
tcg_gen_shli_i64(t1, t1, 24);
|
1321 |
tcg_gen_or_i64(t0, t0, t1); |
1322 |
|
1323 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
1324 |
tcg_gen_shli_i64(t1, t1, 8);
|
1325 |
tcg_gen_or_i64(t0, t0, t1); |
1326 |
|
1327 |
tcg_gen_shri_i64(t1, arg, 8);
|
1328 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
1329 |
tcg_gen_or_i64(t0, t0, t1); |
1330 |
|
1331 |
tcg_gen_shri_i64(t1, arg, 24);
|
1332 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
1333 |
tcg_gen_or_i64(t0, t0, t1); |
1334 |
|
1335 |
tcg_gen_shri_i64(t1, arg, 40);
|
1336 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
1337 |
tcg_gen_or_i64(t0, t0, t1); |
1338 |
|
1339 |
tcg_gen_shri_i64(t1, arg, 56);
|
1340 |
tcg_gen_or_i64(ret, t0, t1); |
1341 |
tcg_temp_free(t0); |
1342 |
tcg_temp_free(t1); |
1343 |
#endif
|
1344 |
} |
1345 |
|
1346 |
#endif
|
1347 |
|
1348 |
static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1349 |
{ |
1350 |
#ifdef TCG_TARGET_HAS_neg_i32
|
1351 |
tcg_gen_op2(INDEX_op_neg_i32, ret, arg); |
1352 |
#else
|
1353 |
TCGv t0 = tcg_const_i32(0);
|
1354 |
tcg_gen_sub_i32(ret, t0, arg); |
1355 |
tcg_temp_free(t0); |
1356 |
#endif
|
1357 |
} |
1358 |
|
1359 |
static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) |
1360 |
{ |
1361 |
#ifdef TCG_TARGET_HAS_neg_i64
|
1362 |
tcg_gen_op2(INDEX_op_neg_i64, ret, arg); |
1363 |
#else
|
1364 |
TCGv t0 = tcg_const_i64(0);
|
1365 |
tcg_gen_sub_i64(ret, t0, arg); |
1366 |
tcg_temp_free(t0); |
1367 |
#endif
|
1368 |
} |
1369 |
|
1370 |
static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
1371 |
{ |
1372 |
tcg_gen_xori_i32(ret, arg, -1);
|
1373 |
} |
1374 |
|
1375 |
static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) |
1376 |
{ |
1377 |
tcg_gen_xori_i64(ret, arg, -1);
|
1378 |
} |
1379 |
|
1380 |
static inline void tcg_gen_discard_i32(TCGv arg) |
1381 |
{ |
1382 |
tcg_gen_op1(INDEX_op_discard, arg); |
1383 |
} |
1384 |
|
1385 |
#if TCG_TARGET_REG_BITS == 32 |
1386 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1387 |
{ |
1388 |
tcg_gen_discard_i32(arg); |
1389 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
1390 |
} |
1391 |
#else
|
1392 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1393 |
{ |
1394 |
tcg_gen_op1(INDEX_op_discard, arg); |
1395 |
} |
1396 |
#endif
|
1397 |
|
1398 |
/***************************************/
|
1399 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
1400 |
type. */
|
1401 |
#ifndef TARGET_LONG_BITS
|
1402 |
#error must include QEMU headers
|
1403 |
#endif
|
1404 |
|
1405 |
/* debug info: write the PC of the corresponding QEMU CPU instruction */
|
1406 |
static inline void tcg_gen_debug_insn_start(uint64_t pc) |
1407 |
{ |
1408 |
/* XXX: must really use a 32 bit size for TCGArg in all cases */
|
1409 |
#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
|
1410 |
tcg_gen_op2ii(INDEX_op_debug_insn_start, |
1411 |
(uint32_t)(pc), (uint32_t)(pc >> 32));
|
1412 |
#else
|
1413 |
tcg_gen_op1i(INDEX_op_debug_insn_start, pc); |
1414 |
#endif
|
1415 |
} |
1416 |
|
1417 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1418 |
{ |
1419 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
1420 |
} |
1421 |
|
1422 |
static inline void tcg_gen_goto_tb(int idx) |
1423 |
{ |
1424 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
1425 |
} |
1426 |
|
1427 |
#if TCG_TARGET_REG_BITS == 32 |
1428 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1429 |
{ |
1430 |
#if TARGET_LONG_BITS == 32 |
1431 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1432 |
#else
|
1433 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1434 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1435 |
#endif
|
1436 |
} |
1437 |
|
1438 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1439 |
{ |
1440 |
#if TARGET_LONG_BITS == 32 |
1441 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1442 |
#else
|
1443 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
1444 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1445 |
#endif
|
1446 |
} |
1447 |
|
1448 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1449 |
{ |
1450 |
#if TARGET_LONG_BITS == 32 |
1451 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1452 |
#else
|
1453 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1454 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1455 |
#endif
|
1456 |
} |
1457 |
|
1458 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1459 |
{ |
1460 |
#if TARGET_LONG_BITS == 32 |
1461 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1462 |
#else
|
1463 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
1464 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1465 |
#endif
|
1466 |
} |
1467 |
|
1468 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1469 |
{ |
1470 |
#if TARGET_LONG_BITS == 32 |
1471 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1472 |
#else
|
1473 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1474 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1475 |
#endif
|
1476 |
} |
1477 |
|
1478 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1479 |
{ |
1480 |
#if TARGET_LONG_BITS == 32 |
1481 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1482 |
#else
|
1483 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1484 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1485 |
#endif
|
1486 |
} |
1487 |
|
1488 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1489 |
{ |
1490 |
#if TARGET_LONG_BITS == 32 |
1491 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
1492 |
#else
|
1493 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1494 |
addr, TCGV_HIGH(addr), mem_index); |
1495 |
#endif
|
1496 |
} |
1497 |
|
1498 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1499 |
{ |
1500 |
#if TARGET_LONG_BITS == 32 |
1501 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1502 |
#else
|
1503 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
1504 |
#endif
|
1505 |
} |
1506 |
|
1507 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1508 |
{ |
1509 |
#if TARGET_LONG_BITS == 32 |
1510 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1511 |
#else
|
1512 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
1513 |
#endif
|
1514 |
} |
1515 |
|
1516 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1517 |
{ |
1518 |
#if TARGET_LONG_BITS == 32 |
1519 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1520 |
#else
|
1521 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
1522 |
#endif
|
1523 |
} |
1524 |
|
1525 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1526 |
{ |
1527 |
#if TARGET_LONG_BITS == 32 |
1528 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
1529 |
#else
|
1530 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1531 |
addr, TCGV_HIGH(addr), mem_index); |
1532 |
#endif
|
1533 |
} |
1534 |
|
1535 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
1536 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
1537 |
|
1538 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1539 |
|
1540 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1541 |
{ |
1542 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1543 |
} |
1544 |
|
1545 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1546 |
{ |
1547 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1548 |
} |
1549 |
|
1550 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1551 |
{ |
1552 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1553 |
} |
1554 |
|
1555 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1556 |
{ |
1557 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1558 |
} |
1559 |
|
1560 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1561 |
{ |
1562 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1563 |
} |
1564 |
|
1565 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1566 |
{ |
1567 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1568 |
} |
1569 |
|
1570 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1571 |
{ |
1572 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1573 |
} |
1574 |
|
1575 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1576 |
{ |
1577 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1578 |
} |
1579 |
|
1580 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1581 |
{ |
1582 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1583 |
} |
1584 |
|
1585 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1586 |
{ |
1587 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1588 |
} |
1589 |
|
1590 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1591 |
{ |
1592 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
1593 |
} |
1594 |
|
1595 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
1596 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
1597 |
|
1598 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1599 |
|
1600 |
#if TARGET_LONG_BITS == 64 |
1601 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
1602 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
1603 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
1604 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
1605 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
1606 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
1607 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
1608 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
1609 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
1610 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
1611 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
1612 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
1613 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
1614 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
1615 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
1616 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
1617 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
1618 |
#define tcg_gen_neg_tl tcg_gen_neg_i64
|
1619 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
1620 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
1621 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
1622 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
1623 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
1624 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
1625 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
1626 |
#define tcg_gen_not_tl tcg_gen_not_i64
|
1627 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
1628 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
1629 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
1630 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
1631 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
1632 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
1633 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
1634 |
#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
|
1635 |
#define tcg_gen_mul_tl tcg_gen_mul_i64
|
1636 |
#define tcg_gen_muli_tl tcg_gen_muli_i64
|
1637 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
1638 |
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
|
1639 |
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
|
1640 |
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
|
1641 |
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
|
1642 |
#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
|
1643 |
#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
|
1644 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
|
1645 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
|
1646 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
|
1647 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
|
1648 |
#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
|
1649 |
#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
|
1650 |
#define tcg_const_tl tcg_const_i64
|
1651 |
#else
|
1652 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
1653 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
1654 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
1655 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
1656 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
1657 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
1658 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
1659 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
1660 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
1661 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
1662 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
1663 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
1664 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
1665 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
1666 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
1667 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
1668 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
1669 |
#define tcg_gen_neg_tl tcg_gen_neg_i32
|
1670 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
1671 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
1672 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
1673 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
1674 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
1675 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
1676 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
1677 |
#define tcg_gen_not_tl tcg_gen_not_i32
|
1678 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
1679 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
1680 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
1681 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
1682 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
1683 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
1684 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
1685 |
#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
|
1686 |
#define tcg_gen_mul_tl tcg_gen_mul_i32
|
1687 |
#define tcg_gen_muli_tl tcg_gen_muli_i32
|
1688 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
1689 |
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
|
1690 |
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
|
1691 |
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
|
1692 |
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
|
1693 |
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
|
1694 |
#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
|
1695 |
#define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
|
1696 |
#define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
|
1697 |
#define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
|
1698 |
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
|
1699 |
#define tcg_gen_ext32u_tl tcg_gen_mov_i32
|
1700 |
#define tcg_gen_ext32s_tl tcg_gen_mov_i32
|
1701 |
#define tcg_const_tl tcg_const_i32
|
1702 |
#endif
|
1703 |
|
1704 |
#if TCG_TARGET_REG_BITS == 32 |
1705 |
#define tcg_gen_add_ptr tcg_gen_add_i32
|
1706 |
#define tcg_gen_addi_ptr tcg_gen_addi_i32
|
1707 |
#define tcg_gen_ext_i32_ptr tcg_gen_mov_i32
|
1708 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1709 |
#define tcg_gen_add_ptr tcg_gen_add_i64
|
1710 |
#define tcg_gen_addi_ptr tcg_gen_addi_i64
|
1711 |
#define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64
|
1712 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1713 |
|