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1 | 87ecb68b | pbrook | #ifndef QEMU_PCI_H
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2 | 87ecb68b | pbrook | #define QEMU_PCI_H
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3 | 87ecb68b | pbrook | |
4 | 87ecb68b | pbrook | /* PCI includes legacy ISA access. */
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5 | 87ecb68b | pbrook | #include "isa.h" |
6 | 87ecb68b | pbrook | |
7 | 87ecb68b | pbrook | /* PCI bus */
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8 | 87ecb68b | pbrook | |
9 | 87ecb68b | pbrook | extern target_phys_addr_t pci_mem_base;
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10 | 87ecb68b | pbrook | |
11 | 87ecb68b | pbrook | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
12 | 87ecb68b | pbrook | uint32_t address, uint32_t data, int len);
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13 | 87ecb68b | pbrook | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
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14 | 87ecb68b | pbrook | uint32_t address, int len);
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15 | 87ecb68b | pbrook | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
16 | 87ecb68b | pbrook | uint32_t addr, uint32_t size, int type);
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17 | 87ecb68b | pbrook | |
18 | 87ecb68b | pbrook | #define PCI_ADDRESS_SPACE_MEM 0x00 |
19 | 87ecb68b | pbrook | #define PCI_ADDRESS_SPACE_IO 0x01 |
20 | 87ecb68b | pbrook | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
21 | 87ecb68b | pbrook | |
22 | 87ecb68b | pbrook | typedef struct PCIIORegion { |
23 | 87ecb68b | pbrook | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
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24 | 87ecb68b | pbrook | uint32_t size; |
25 | 87ecb68b | pbrook | uint8_t type; |
26 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func; |
27 | 87ecb68b | pbrook | } PCIIORegion; |
28 | 87ecb68b | pbrook | |
29 | 87ecb68b | pbrook | #define PCI_ROM_SLOT 6 |
30 | 87ecb68b | pbrook | #define PCI_NUM_REGIONS 7 |
31 | 87ecb68b | pbrook | |
32 | 87ecb68b | pbrook | #define PCI_DEVICES_MAX 64 |
33 | 87ecb68b | pbrook | |
34 | 87ecb68b | pbrook | #define PCI_VENDOR_ID 0x00 /* 16 bits */ |
35 | 87ecb68b | pbrook | #define PCI_DEVICE_ID 0x02 /* 16 bits */ |
36 | 87ecb68b | pbrook | #define PCI_COMMAND 0x04 /* 16 bits */ |
37 | 87ecb68b | pbrook | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
38 | 87ecb68b | pbrook | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
39 | 87ecb68b | pbrook | #define PCI_CLASS_DEVICE 0x0a /* Device class */ |
40 | 87ecb68b | pbrook | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
41 | 87ecb68b | pbrook | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
42 | 87ecb68b | pbrook | #define PCI_MIN_GNT 0x3e /* 8 bits */ |
43 | 87ecb68b | pbrook | #define PCI_MAX_LAT 0x3f /* 8 bits */ |
44 | 87ecb68b | pbrook | |
45 | 87ecb68b | pbrook | struct PCIDevice {
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46 | 87ecb68b | pbrook | /* PCI config space */
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47 | 87ecb68b | pbrook | uint8_t config[256];
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48 | 87ecb68b | pbrook | |
49 | 87ecb68b | pbrook | /* the following fields are read only */
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50 | 87ecb68b | pbrook | PCIBus *bus; |
51 | 87ecb68b | pbrook | int devfn;
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52 | 87ecb68b | pbrook | char name[64]; |
53 | 87ecb68b | pbrook | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
54 | 87ecb68b | pbrook | |
55 | 87ecb68b | pbrook | /* do not access the following fields */
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56 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read; |
57 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write; |
58 | 87ecb68b | pbrook | /* ??? This is a PC-specific hack, and should be removed. */
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59 | 87ecb68b | pbrook | int irq_index;
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60 | 87ecb68b | pbrook | |
61 | 87ecb68b | pbrook | /* IRQ objects for the INTA-INTD pins. */
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62 | 87ecb68b | pbrook | qemu_irq *irq; |
63 | 87ecb68b | pbrook | |
64 | 87ecb68b | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
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65 | 87ecb68b | pbrook | int irq_state[4]; |
66 | 87ecb68b | pbrook | }; |
67 | 87ecb68b | pbrook | |
68 | 87ecb68b | pbrook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
69 | 87ecb68b | pbrook | int instance_size, int devfn, |
70 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read, |
71 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write); |
72 | 87ecb68b | pbrook | |
73 | 87ecb68b | pbrook | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
74 | 87ecb68b | pbrook | uint32_t size, int type,
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75 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func); |
76 | 87ecb68b | pbrook | |
77 | 87ecb68b | pbrook | uint32_t pci_default_read_config(PCIDevice *d, |
78 | 87ecb68b | pbrook | uint32_t address, int len);
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79 | 87ecb68b | pbrook | void pci_default_write_config(PCIDevice *d,
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80 | 87ecb68b | pbrook | uint32_t address, uint32_t val, int len);
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81 | 87ecb68b | pbrook | void pci_device_save(PCIDevice *s, QEMUFile *f);
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82 | 87ecb68b | pbrook | int pci_device_load(PCIDevice *s, QEMUFile *f);
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83 | 87ecb68b | pbrook | |
84 | 87ecb68b | pbrook | typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level); |
85 | 87ecb68b | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
86 | 87ecb68b | pbrook | PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
87 | 87ecb68b | pbrook | qemu_irq *pic, int devfn_min, int nirq); |
88 | 87ecb68b | pbrook | |
89 | 87ecb68b | pbrook | void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn); |
90 | 87ecb68b | pbrook | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
91 | 87ecb68b | pbrook | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
92 | 87ecb68b | pbrook | int pci_bus_num(PCIBus *s);
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93 | 87ecb68b | pbrook | void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); |
94 | 87ecb68b | pbrook | |
95 | 87ecb68b | pbrook | void pci_info(void); |
96 | 87ecb68b | pbrook | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
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97 | 87ecb68b | pbrook | pci_map_irq_fn map_irq, const char *name); |
98 | 87ecb68b | pbrook | |
99 | 87ecb68b | pbrook | /* lsi53c895a.c */
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100 | e4bcb14c | ths | #define LSI_MAX_DEVS 7 |
101 | 87ecb68b | pbrook | void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
102 | 87ecb68b | pbrook | void *lsi_scsi_init(PCIBus *bus, int devfn); |
103 | 87ecb68b | pbrook | |
104 | 87ecb68b | pbrook | /* vmware_vga.c */
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105 | 87ecb68b | pbrook | void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
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106 | 87ecb68b | pbrook | unsigned long vga_ram_offset, int vga_ram_size); |
107 | 87ecb68b | pbrook | |
108 | 87ecb68b | pbrook | /* usb-uhci.c */
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109 | 87ecb68b | pbrook | void usb_uhci_piix3_init(PCIBus *bus, int devfn); |
110 | 87ecb68b | pbrook | void usb_uhci_piix4_init(PCIBus *bus, int devfn); |
111 | 87ecb68b | pbrook | |
112 | 87ecb68b | pbrook | /* usb-ohci.c */
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113 | 87ecb68b | pbrook | void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn); |
114 | 87ecb68b | pbrook | |
115 | 87ecb68b | pbrook | /* eepro100.c */
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116 | 87ecb68b | pbrook | |
117 | 87ecb68b | pbrook | void pci_i82551_init(PCIBus *bus, NICInfo *nd, int devfn); |
118 | 87ecb68b | pbrook | void pci_i82557b_init(PCIBus *bus, NICInfo *nd, int devfn); |
119 | 87ecb68b | pbrook | void pci_i82559er_init(PCIBus *bus, NICInfo *nd, int devfn); |
120 | 87ecb68b | pbrook | |
121 | 87ecb68b | pbrook | /* ne2000.c */
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122 | 87ecb68b | pbrook | |
123 | 87ecb68b | pbrook | void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn); |
124 | 87ecb68b | pbrook | |
125 | 87ecb68b | pbrook | /* rtl8139.c */
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126 | 87ecb68b | pbrook | |
127 | 87ecb68b | pbrook | void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn); |
128 | 87ecb68b | pbrook | |
129 | 7c23b892 | balrog | /* e1000.c */
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130 | 7c23b892 | balrog | void pci_e1000_init(PCIBus *bus, NICInfo *nd, int devfn); |
131 | 7c23b892 | balrog | |
132 | 87ecb68b | pbrook | /* pcnet.c */
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133 | 87ecb68b | pbrook | void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn); |
134 | 87ecb68b | pbrook | |
135 | 87ecb68b | pbrook | /* prep_pci.c */
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136 | 87ecb68b | pbrook | PCIBus *pci_prep_init(qemu_irq *pic); |
137 | 87ecb68b | pbrook | |
138 | 87ecb68b | pbrook | /* apb_pci.c */
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139 | 87ecb68b | pbrook | PCIBus *pci_apb_init(target_phys_addr_t special_base, target_phys_addr_t mem_base, |
140 | 87ecb68b | pbrook | qemu_irq *pic); |
141 | 87ecb68b | pbrook | |
142 | 87ecb68b | pbrook | #endif |