root / hw / piix_pci.c @ 5414dec6
History | View | Annotate | Download (18.5 kB)
1 | 502a5395 | pbrook | /*
|
---|---|---|---|
2 | 502a5395 | pbrook | * QEMU i440FX/PIIX3 PCI Bridge Emulation
|
3 | 502a5395 | pbrook | *
|
4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
|
5 | 5fafdf24 | ths | *
|
6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
|
8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
|
9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
|
11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
|
12 | 502a5395 | pbrook | *
|
13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
|
14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
|
15 | 502a5395 | pbrook | *
|
16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 502a5395 | pbrook | * THE SOFTWARE.
|
23 | 502a5395 | pbrook | */
|
24 | 502a5395 | pbrook | |
25 | 87ecb68b | pbrook | #include "hw.h" |
26 | 87ecb68b | pbrook | #include "pc.h" |
27 | 87ecb68b | pbrook | #include "pci.h" |
28 | 4f5e19e6 | Isaku Yamahata | #include "pci_host.h" |
29 | f75247f1 | Gerd Hoffmann | #include "isa.h" |
30 | 8a14daa5 | Gerd Hoffmann | #include "sysbus.h" |
31 | bf1b0071 | Blue Swirl | #include "range.h" |
32 | 41445300 | Anthony PERARD | #include "xen.h" |
33 | 87ecb68b | pbrook | |
34 | 56594fe3 | Isaku Yamahata | /*
|
35 | 56594fe3 | Isaku Yamahata | * I440FX chipset data sheet.
|
36 | 56594fe3 | Isaku Yamahata | * http://download.intel.com/design/chipsets/datashts/29054901.pdf
|
37 | 56594fe3 | Isaku Yamahata | */
|
38 | 56594fe3 | Isaku Yamahata | |
39 | 502a5395 | pbrook | typedef PCIHostState I440FXState;
|
40 | 502a5395 | pbrook | |
41 | ab431c28 | Isaku Yamahata | #define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */ |
42 | e735b55a | Isaku Yamahata | #define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */ |
43 | bf09551a | Stefano Stabellini | #define XEN_PIIX_NUM_PIRQS 128ULL |
44 | ab431c28 | Isaku Yamahata | #define PIIX_PIRQC 0x60 |
45 | e735b55a | Isaku Yamahata | |
46 | fd37d881 | Juan Quintela | typedef struct PIIX3State { |
47 | fd37d881 | Juan Quintela | PCIDevice dev; |
48 | ab431c28 | Isaku Yamahata | |
49 | ab431c28 | Isaku Yamahata | /*
|
50 | ab431c28 | Isaku Yamahata | * bitmap to track pic levels.
|
51 | ab431c28 | Isaku Yamahata | * The pic level is the logical OR of all the PCI irqs mapped to it
|
52 | ab431c28 | Isaku Yamahata | * So one PIC level is tracked by PIIX_NUM_PIRQS bits.
|
53 | ab431c28 | Isaku Yamahata | *
|
54 | ab431c28 | Isaku Yamahata | * PIRQ is mapped to PIC pins, we track it by
|
55 | ab431c28 | Isaku Yamahata | * PIIX_NUM_PIRQS * PIIX_NUM_PIC_IRQS = 64 bits with
|
56 | ab431c28 | Isaku Yamahata | * pic_irq * PIIX_NUM_PIRQS + pirq
|
57 | ab431c28 | Isaku Yamahata | */
|
58 | ab431c28 | Isaku Yamahata | #if PIIX_NUM_PIC_IRQS * PIIX_NUM_PIRQS > 64 |
59 | ab431c28 | Isaku Yamahata | #error "unable to encode pic state in 64bit in pic_levels." |
60 | ab431c28 | Isaku Yamahata | #endif
|
61 | ab431c28 | Isaku Yamahata | uint64_t pic_levels; |
62 | ab431c28 | Isaku Yamahata | |
63 | bd7dce87 | Juan Quintela | qemu_irq *pic; |
64 | e735b55a | Isaku Yamahata | |
65 | e735b55a | Isaku Yamahata | /* This member isn't used. Just for save/load compatibility */
|
66 | e735b55a | Isaku Yamahata | int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS]; |
67 | 7cd9eee0 | Gerd Hoffmann | } PIIX3State; |
68 | bd7dce87 | Juan Quintela | |
69 | ae0a5466 | Avi Kivity | typedef struct PAMMemoryRegion { |
70 | ae0a5466 | Avi Kivity | MemoryRegion mem; |
71 | ae0a5466 | Avi Kivity | bool initialized;
|
72 | ae0a5466 | Avi Kivity | } PAMMemoryRegion; |
73 | ae0a5466 | Avi Kivity | |
74 | 0a3bacf3 | Juan Quintela | struct PCII440FXState {
|
75 | 0a3bacf3 | Juan Quintela | PCIDevice dev; |
76 | ae0a5466 | Avi Kivity | MemoryRegion *system_memory; |
77 | ae0a5466 | Avi Kivity | MemoryRegion *pci_address_space; |
78 | ae0a5466 | Avi Kivity | MemoryRegion *ram_memory; |
79 | ae0a5466 | Avi Kivity | MemoryRegion pci_hole; |
80 | ae0a5466 | Avi Kivity | MemoryRegion pci_hole_64bit; |
81 | ae0a5466 | Avi Kivity | PAMMemoryRegion pam_regions[13];
|
82 | ae0a5466 | Avi Kivity | MemoryRegion smram_region; |
83 | 6c009fa4 | Juan Quintela | uint8_t smm_enabled; |
84 | 0a3bacf3 | Juan Quintela | }; |
85 | 0a3bacf3 | Juan Quintela | |
86 | f2c688bb | Isaku Yamahata | |
87 | f2c688bb | Isaku Yamahata | #define I440FX_PAM 0x59 |
88 | f2c688bb | Isaku Yamahata | #define I440FX_PAM_SIZE 7 |
89 | f2c688bb | Isaku Yamahata | #define I440FX_SMRAM 0x72 |
90 | f2c688bb | Isaku Yamahata | |
91 | ab431c28 | Isaku Yamahata | static void piix3_set_irq(void *opaque, int pirq, int level); |
92 | bf09551a | Stefano Stabellini | static void piix3_write_config_xen(PCIDevice *dev, |
93 | bf09551a | Stefano Stabellini | uint32_t address, uint32_t val, int len);
|
94 | d2b59317 | pbrook | |
95 | d2b59317 | pbrook | /* return the global irq number corresponding to a given device irq
|
96 | d2b59317 | pbrook | pin. We could also use the bus number to have a more precise
|
97 | d2b59317 | pbrook | mapping. */
|
98 | ab431c28 | Isaku Yamahata | static int pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx) |
99 | d2b59317 | pbrook | { |
100 | d2b59317 | pbrook | int slot_addend;
|
101 | d2b59317 | pbrook | slot_addend = (pci_dev->devfn >> 3) - 1; |
102 | ab431c28 | Isaku Yamahata | return (pci_intx + slot_addend) & 3; |
103 | d2b59317 | pbrook | } |
104 | 502a5395 | pbrook | |
105 | ae0a5466 | Avi Kivity | static void update_pam(PCII440FXState *d, uint32_t start, uint32_t end, int r, |
106 | ae0a5466 | Avi Kivity | PAMMemoryRegion *mem) |
107 | 84631fd7 | bellard | { |
108 | ae0a5466 | Avi Kivity | if (mem->initialized) {
|
109 | ae0a5466 | Avi Kivity | memory_region_del_subregion(d->system_memory, &mem->mem); |
110 | ae0a5466 | Avi Kivity | memory_region_destroy(&mem->mem); |
111 | ae0a5466 | Avi Kivity | } |
112 | 84631fd7 | bellard | |
113 | 84631fd7 | bellard | // printf("ISA mapping %08x-0x%08x: %d\n", start, end, r);
|
114 | 84631fd7 | bellard | switch(r) {
|
115 | 84631fd7 | bellard | case 3: |
116 | 84631fd7 | bellard | /* RAM */
|
117 | ae0a5466 | Avi Kivity | memory_region_init_alias(&mem->mem, "pam-ram", d->ram_memory,
|
118 | ae0a5466 | Avi Kivity | start, end - start); |
119 | 84631fd7 | bellard | break;
|
120 | 84631fd7 | bellard | case 1: |
121 | 84631fd7 | bellard | /* ROM (XXX: not quite correct) */
|
122 | ae0a5466 | Avi Kivity | memory_region_init_alias(&mem->mem, "pam-rom", d->ram_memory,
|
123 | ae0a5466 | Avi Kivity | start, end - start); |
124 | ae0a5466 | Avi Kivity | memory_region_set_readonly(&mem->mem, true);
|
125 | 84631fd7 | bellard | break;
|
126 | 84631fd7 | bellard | case 2: |
127 | 84631fd7 | bellard | case 0: |
128 | 84631fd7 | bellard | /* XXX: should distinguish read/write cases */
|
129 | ae0a5466 | Avi Kivity | memory_region_init_alias(&mem->mem, "pam-pci", d->pci_address_space,
|
130 | ae0a5466 | Avi Kivity | start, end - start); |
131 | 84631fd7 | bellard | break;
|
132 | 84631fd7 | bellard | } |
133 | ae0a5466 | Avi Kivity | memory_region_add_subregion_overlap(d->system_memory, |
134 | ae0a5466 | Avi Kivity | start, &mem->mem, 1);
|
135 | ae0a5466 | Avi Kivity | mem->initialized = true;
|
136 | 84631fd7 | bellard | } |
137 | ee0ea1d0 | bellard | |
138 | 0a3bacf3 | Juan Quintela | static void i440fx_update_memory_mappings(PCII440FXState *d) |
139 | ee0ea1d0 | bellard | { |
140 | ee0ea1d0 | bellard | int i, r;
|
141 | ae0a5466 | Avi Kivity | uint32_t smram; |
142 | b41e1ed4 | Avi Kivity | bool smram_enabled;
|
143 | 84631fd7 | bellard | |
144 | 72124c01 | Avi Kivity | memory_region_transaction_begin(); |
145 | ae0a5466 | Avi Kivity | update_pam(d, 0xf0000, 0x100000, (d->dev.config[I440FX_PAM] >> 4) & 3, |
146 | ae0a5466 | Avi Kivity | &d->pam_regions[0]);
|
147 | 84631fd7 | bellard | for(i = 0; i < 12; i++) { |
148 | f2c688bb | Isaku Yamahata | r = (d->dev.config[(i >> 1) + (I440FX_PAM + 1)] >> ((i & 1) * 4)) & 3; |
149 | ae0a5466 | Avi Kivity | update_pam(d, 0xc0000 + 0x4000 * i, 0xc0000 + 0x4000 * (i + 1), r, |
150 | ae0a5466 | Avi Kivity | &d->pam_regions[i+1]);
|
151 | ee0ea1d0 | bellard | } |
152 | f2c688bb | Isaku Yamahata | smram = d->dev.config[I440FX_SMRAM]; |
153 | b41e1ed4 | Avi Kivity | smram_enabled = (d->smm_enabled && (smram & 0x08)) || (smram & 0x40); |
154 | b41e1ed4 | Avi Kivity | memory_region_set_enabled(&d->smram_region, !smram_enabled); |
155 | 72124c01 | Avi Kivity | memory_region_transaction_commit(); |
156 | ee0ea1d0 | bellard | } |
157 | ee0ea1d0 | bellard | |
158 | f885f1ea | Isaku Yamahata | static void i440fx_set_smm(int val, void *arg) |
159 | ee0ea1d0 | bellard | { |
160 | f885f1ea | Isaku Yamahata | PCII440FXState *d = arg; |
161 | f885f1ea | Isaku Yamahata | |
162 | ee0ea1d0 | bellard | val = (val != 0);
|
163 | 6c009fa4 | Juan Quintela | if (d->smm_enabled != val) {
|
164 | 6c009fa4 | Juan Quintela | d->smm_enabled = val; |
165 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
166 | ee0ea1d0 | bellard | } |
167 | ee0ea1d0 | bellard | } |
168 | ee0ea1d0 | bellard | |
169 | ee0ea1d0 | bellard | |
170 | 0a3bacf3 | Juan Quintela | static void i440fx_write_config(PCIDevice *dev, |
171 | ee0ea1d0 | bellard | uint32_t address, uint32_t val, int len)
|
172 | ee0ea1d0 | bellard | { |
173 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
174 | 0a3bacf3 | Juan Quintela | |
175 | ee0ea1d0 | bellard | /* XXX: implement SMRAM.D_LOCK */
|
176 | 0a3bacf3 | Juan Quintela | pci_default_write_config(dev, address, val, len); |
177 | 4da5fcd3 | Isaku Yamahata | if (ranges_overlap(address, len, I440FX_PAM, I440FX_PAM_SIZE) ||
|
178 | 4da5fcd3 | Isaku Yamahata | range_covers_byte(address, len, I440FX_SMRAM)) { |
179 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
180 | 4da5fcd3 | Isaku Yamahata | } |
181 | ee0ea1d0 | bellard | } |
182 | ee0ea1d0 | bellard | |
183 | 0c7d19e5 | Juan Quintela | static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id) |
184 | ee0ea1d0 | bellard | { |
185 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = opaque; |
186 | 52fc1d83 | balrog | int ret, i;
|
187 | ee0ea1d0 | bellard | |
188 | 0a3bacf3 | Juan Quintela | ret = pci_device_load(&d->dev, f); |
189 | ee0ea1d0 | bellard | if (ret < 0) |
190 | ee0ea1d0 | bellard | return ret;
|
191 | ee0ea1d0 | bellard | i440fx_update_memory_mappings(d); |
192 | 6c009fa4 | Juan Quintela | qemu_get_8s(f, &d->smm_enabled); |
193 | 52fc1d83 | balrog | |
194 | e735b55a | Isaku Yamahata | if (version_id == 2) { |
195 | e735b55a | Isaku Yamahata | for (i = 0; i < PIIX_NUM_PIRQS; i++) { |
196 | e735b55a | Isaku Yamahata | qemu_get_be32(f); /* dummy load for compatibility */
|
197 | e735b55a | Isaku Yamahata | } |
198 | e735b55a | Isaku Yamahata | } |
199 | 52fc1d83 | balrog | |
200 | ee0ea1d0 | bellard | return 0; |
201 | ee0ea1d0 | bellard | } |
202 | ee0ea1d0 | bellard | |
203 | e59fb374 | Juan Quintela | static int i440fx_post_load(void *opaque, int version_id) |
204 | 0c7d19e5 | Juan Quintela | { |
205 | 0c7d19e5 | Juan Quintela | PCII440FXState *d = opaque; |
206 | 0c7d19e5 | Juan Quintela | |
207 | 0c7d19e5 | Juan Quintela | i440fx_update_memory_mappings(d); |
208 | 0c7d19e5 | Juan Quintela | return 0; |
209 | 0c7d19e5 | Juan Quintela | } |
210 | 0c7d19e5 | Juan Quintela | |
211 | 0c7d19e5 | Juan Quintela | static const VMStateDescription vmstate_i440fx = { |
212 | 0c7d19e5 | Juan Quintela | .name = "I440FX",
|
213 | 0c7d19e5 | Juan Quintela | .version_id = 3,
|
214 | 0c7d19e5 | Juan Quintela | .minimum_version_id = 3,
|
215 | 0c7d19e5 | Juan Quintela | .minimum_version_id_old = 1,
|
216 | 0c7d19e5 | Juan Quintela | .load_state_old = i440fx_load_old, |
217 | 752ff2fa | Juan Quintela | .post_load = i440fx_post_load, |
218 | 0c7d19e5 | Juan Quintela | .fields = (VMStateField []) { |
219 | 0c7d19e5 | Juan Quintela | VMSTATE_PCI_DEVICE(dev, PCII440FXState), |
220 | 0c7d19e5 | Juan Quintela | VMSTATE_UINT8(smm_enabled, PCII440FXState), |
221 | 0c7d19e5 | Juan Quintela | VMSTATE_END_OF_LIST() |
222 | 0c7d19e5 | Juan Quintela | } |
223 | 0c7d19e5 | Juan Quintela | }; |
224 | 0c7d19e5 | Juan Quintela | |
225 | 81a322d4 | Gerd Hoffmann | static int i440fx_pcihost_initfn(SysBusDevice *dev) |
226 | 502a5395 | pbrook | { |
227 | 8a14daa5 | Gerd Hoffmann | I440FXState *s = FROM_SYSBUS(I440FXState, dev); |
228 | 502a5395 | pbrook | |
229 | d0ed8076 | Avi Kivity | memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s, |
230 | d0ed8076 | Avi Kivity | "pci-conf-idx", 4); |
231 | d0ed8076 | Avi Kivity | sysbus_add_io(dev, 0xcf8, &s->conf_mem);
|
232 | d0ed8076 | Avi Kivity | sysbus_init_ioports(&s->busdev, 0xcf8, 4); |
233 | d0ed8076 | Avi Kivity | |
234 | d0ed8076 | Avi Kivity | memory_region_init_io(&s->data_mem, &pci_host_data_le_ops, s, |
235 | d0ed8076 | Avi Kivity | "pci-conf-data", 4); |
236 | d0ed8076 | Avi Kivity | sysbus_add_io(dev, 0xcfc, &s->data_mem);
|
237 | d0ed8076 | Avi Kivity | sysbus_init_ioports(&s->busdev, 0xcfc, 4); |
238 | 502a5395 | pbrook | |
239 | 81a322d4 | Gerd Hoffmann | return 0; |
240 | 8a14daa5 | Gerd Hoffmann | } |
241 | 502a5395 | pbrook | |
242 | 0a3bacf3 | Juan Quintela | static int i440fx_initfn(PCIDevice *dev) |
243 | 8a14daa5 | Gerd Hoffmann | { |
244 | 0a3bacf3 | Juan Quintela | PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev); |
245 | ee0ea1d0 | bellard | |
246 | f2c688bb | Isaku Yamahata | d->dev.config[I440FX_SMRAM] = 0x02;
|
247 | ee0ea1d0 | bellard | |
248 | f885f1ea | Isaku Yamahata | cpu_smm_register(&i440fx_set_smm, d); |
249 | 81a322d4 | Gerd Hoffmann | return 0; |
250 | 8a14daa5 | Gerd Hoffmann | } |
251 | 8a14daa5 | Gerd Hoffmann | |
252 | 41445300 | Anthony PERARD | static PCIBus *i440fx_common_init(const char *device_name, |
253 | 41445300 | Anthony PERARD | PCII440FXState **pi440fx_state, |
254 | 41445300 | Anthony PERARD | int *piix3_devfn,
|
255 | 60573079 | Hervé Poussineau | ISABus **isa_bus, qemu_irq *pic, |
256 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
257 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
258 | ae0a5466 | Avi Kivity | ram_addr_t ram_size, |
259 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_start, |
260 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_size, |
261 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_start, |
262 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_size, |
263 | ae0a5466 | Avi Kivity | MemoryRegion *pci_address_space, |
264 | ae0a5466 | Avi Kivity | MemoryRegion *ram_memory) |
265 | 8a14daa5 | Gerd Hoffmann | { |
266 | 8a14daa5 | Gerd Hoffmann | DeviceState *dev; |
267 | 8a14daa5 | Gerd Hoffmann | PCIBus *b; |
268 | 8a14daa5 | Gerd Hoffmann | PCIDevice *d; |
269 | 8a14daa5 | Gerd Hoffmann | I440FXState *s; |
270 | 7cd9eee0 | Gerd Hoffmann | PIIX3State *piix3; |
271 | ae0a5466 | Avi Kivity | PCII440FXState *f; |
272 | 8a14daa5 | Gerd Hoffmann | |
273 | 8a14daa5 | Gerd Hoffmann | dev = qdev_create(NULL, "i440FX-pcihost"); |
274 | 8a14daa5 | Gerd Hoffmann | s = FROM_SYSBUS(I440FXState, sysbus_from_qdev(dev)); |
275 | aee97b84 | Avi Kivity | s->address_space = address_space_mem; |
276 | ae0a5466 | Avi Kivity | b = pci_bus_new(&s->busdev.qdev, NULL, pci_address_space,
|
277 | aee97b84 | Avi Kivity | address_space_io, 0);
|
278 | 8a14daa5 | Gerd Hoffmann | s->bus = b; |
279 | f05f6b4a | Paolo Bonzini | object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL); |
280 | f424d5c4 | Paolo Bonzini | qdev_init_nofail(dev); |
281 | 8a14daa5 | Gerd Hoffmann | |
282 | 41445300 | Anthony PERARD | d = pci_create_simple(b, 0, device_name);
|
283 | 0a3bacf3 | Juan Quintela | *pi440fx_state = DO_UPCAST(PCII440FXState, dev, d); |
284 | ae0a5466 | Avi Kivity | f = *pi440fx_state; |
285 | ae0a5466 | Avi Kivity | f->system_memory = address_space_mem; |
286 | ae0a5466 | Avi Kivity | f->pci_address_space = pci_address_space; |
287 | ae0a5466 | Avi Kivity | f->ram_memory = ram_memory; |
288 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->pci_hole, "pci-hole", f->pci_address_space,
|
289 | ae0a5466 | Avi Kivity | pci_hole_start, pci_hole_size); |
290 | ae0a5466 | Avi Kivity | memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole); |
291 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->pci_hole_64bit, "pci-hole64",
|
292 | ae0a5466 | Avi Kivity | f->pci_address_space, |
293 | ae0a5466 | Avi Kivity | pci_hole64_start, pci_hole64_size); |
294 | ae0a5466 | Avi Kivity | if (pci_hole64_size) {
|
295 | ae0a5466 | Avi Kivity | memory_region_add_subregion(f->system_memory, pci_hole64_start, |
296 | ae0a5466 | Avi Kivity | &f->pci_hole_64bit); |
297 | ae0a5466 | Avi Kivity | } |
298 | ae0a5466 | Avi Kivity | memory_region_init_alias(&f->smram_region, "smram-region",
|
299 | ae0a5466 | Avi Kivity | f->pci_address_space, 0xa0000, 0x20000); |
300 | b41e1ed4 | Avi Kivity | memory_region_add_subregion_overlap(f->system_memory, 0xa0000,
|
301 | b41e1ed4 | Avi Kivity | &f->smram_region, 1);
|
302 | b41e1ed4 | Avi Kivity | memory_region_set_enabled(&f->smram_region, false);
|
303 | 8a14daa5 | Gerd Hoffmann | |
304 | bf09551a | Stefano Stabellini | /* Xen supports additional interrupt routes from the PCI devices to
|
305 | bf09551a | Stefano Stabellini | * the IOAPIC: the four pins of each PCI device on the bus are also
|
306 | bf09551a | Stefano Stabellini | * connected to the IOAPIC directly.
|
307 | bf09551a | Stefano Stabellini | * These additional routes can be discovered through ACPI. */
|
308 | bf09551a | Stefano Stabellini | if (xen_enabled()) {
|
309 | bf09551a | Stefano Stabellini | piix3 = DO_UPCAST(PIIX3State, dev, |
310 | bf09551a | Stefano Stabellini | pci_create_simple_multifunction(b, -1, true, "PIIX3-xen")); |
311 | bf09551a | Stefano Stabellini | pci_bus_irqs(b, xen_piix3_set_irq, xen_pci_slot_get_pirq, |
312 | bf09551a | Stefano Stabellini | piix3, XEN_PIIX_NUM_PIRQS); |
313 | bf09551a | Stefano Stabellini | } else {
|
314 | bf09551a | Stefano Stabellini | piix3 = DO_UPCAST(PIIX3State, dev, |
315 | bf09551a | Stefano Stabellini | pci_create_simple_multifunction(b, -1, true, "PIIX3")); |
316 | bf09551a | Stefano Stabellini | pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3, |
317 | bf09551a | Stefano Stabellini | PIIX_NUM_PIRQS); |
318 | bf09551a | Stefano Stabellini | } |
319 | 7cd9eee0 | Gerd Hoffmann | piix3->pic = pic; |
320 | 60573079 | Hervé Poussineau | *isa_bus = DO_UPCAST(ISABus, qbus, |
321 | 60573079 | Hervé Poussineau | qdev_get_child_bus(&piix3->dev.qdev, "isa.0"));
|
322 | 41445300 | Anthony PERARD | |
323 | 7cd9eee0 | Gerd Hoffmann | *piix3_devfn = piix3->dev.devfn; |
324 | 85a750ca | Juan Quintela | |
325 | ec5f92ce | Bernhard M. Wiedemann | ram_size = ram_size / 8 / 1024 / 1024; |
326 | ec5f92ce | Bernhard M. Wiedemann | if (ram_size > 255) |
327 | ec5f92ce | Bernhard M. Wiedemann | ram_size = 255;
|
328 | ec5f92ce | Bernhard M. Wiedemann | (*pi440fx_state)->dev.config[0x57]=ram_size;
|
329 | ec5f92ce | Bernhard M. Wiedemann | |
330 | ae0a5466 | Avi Kivity | i440fx_update_memory_mappings(f); |
331 | ae0a5466 | Avi Kivity | |
332 | 502a5395 | pbrook | return b;
|
333 | 502a5395 | pbrook | } |
334 | 502a5395 | pbrook | |
335 | 41445300 | Anthony PERARD | PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn,
|
336 | 60573079 | Hervé Poussineau | ISABus **isa_bus, qemu_irq *pic, |
337 | aee97b84 | Avi Kivity | MemoryRegion *address_space_mem, |
338 | aee97b84 | Avi Kivity | MemoryRegion *address_space_io, |
339 | ae0a5466 | Avi Kivity | ram_addr_t ram_size, |
340 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_start, |
341 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole_size, |
342 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_start, |
343 | ae0a5466 | Avi Kivity | target_phys_addr_t pci_hole64_size, |
344 | ae0a5466 | Avi Kivity | MemoryRegion *pci_memory, MemoryRegion *ram_memory) |
345 | ae0a5466 | Avi Kivity | |
346 | 41445300 | Anthony PERARD | { |
347 | 41445300 | Anthony PERARD | PCIBus *b; |
348 | 41445300 | Anthony PERARD | |
349 | 60573079 | Hervé Poussineau | b = i440fx_common_init("i440FX", pi440fx_state, piix3_devfn, isa_bus, pic,
|
350 | ae0a5466 | Avi Kivity | address_space_mem, address_space_io, ram_size, |
351 | ae0a5466 | Avi Kivity | pci_hole_start, pci_hole_size, |
352 | d50c6c8b | Alexey Korolev | pci_hole64_start, pci_hole64_size, |
353 | ae0a5466 | Avi Kivity | pci_memory, ram_memory); |
354 | 41445300 | Anthony PERARD | return b;
|
355 | 41445300 | Anthony PERARD | } |
356 | 41445300 | Anthony PERARD | |
357 | 502a5395 | pbrook | /* PIIX3 PCI to ISA bridge */
|
358 | ab431c28 | Isaku Yamahata | static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) |
359 | ab431c28 | Isaku Yamahata | { |
360 | ab431c28 | Isaku Yamahata | qemu_set_irq(piix3->pic[pic_irq], |
361 | ab431c28 | Isaku Yamahata | !!(piix3->pic_levels & |
362 | 09de0f46 | TeLeMan | (((1ULL << PIIX_NUM_PIRQS) - 1) << |
363 | ab431c28 | Isaku Yamahata | (pic_irq * PIIX_NUM_PIRQS)))); |
364 | ab431c28 | Isaku Yamahata | } |
365 | 502a5395 | pbrook | |
366 | afe3ef1d | Isaku Yamahata | static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) |
367 | ab431c28 | Isaku Yamahata | { |
368 | ab431c28 | Isaku Yamahata | int pic_irq;
|
369 | ab431c28 | Isaku Yamahata | uint64_t mask; |
370 | ab431c28 | Isaku Yamahata | |
371 | ab431c28 | Isaku Yamahata | pic_irq = piix3->dev.config[PIIX_PIRQC + pirq]; |
372 | ab431c28 | Isaku Yamahata | if (pic_irq >= PIIX_NUM_PIC_IRQS) {
|
373 | ab431c28 | Isaku Yamahata | return;
|
374 | ab431c28 | Isaku Yamahata | } |
375 | ab431c28 | Isaku Yamahata | |
376 | ab431c28 | Isaku Yamahata | mask = 1ULL << ((pic_irq * PIIX_NUM_PIRQS) + pirq);
|
377 | ab431c28 | Isaku Yamahata | piix3->pic_levels &= ~mask; |
378 | ab431c28 | Isaku Yamahata | piix3->pic_levels |= mask * !!level; |
379 | ab431c28 | Isaku Yamahata | |
380 | afe3ef1d | Isaku Yamahata | piix3_set_irq_pic(piix3, pic_irq); |
381 | ab431c28 | Isaku Yamahata | } |
382 | ab431c28 | Isaku Yamahata | |
383 | ab431c28 | Isaku Yamahata | static void piix3_set_irq(void *opaque, int pirq, int level) |
384 | 502a5395 | pbrook | { |
385 | 7cd9eee0 | Gerd Hoffmann | PIIX3State *piix3 = opaque; |
386 | afe3ef1d | Isaku Yamahata | piix3_set_irq_level(piix3, pirq, level); |
387 | ab431c28 | Isaku Yamahata | } |
388 | 502a5395 | pbrook | |
389 | ab431c28 | Isaku Yamahata | /* irq routing is changed. so rebuild bitmap */
|
390 | ab431c28 | Isaku Yamahata | static void piix3_update_irq_levels(PIIX3State *piix3) |
391 | ab431c28 | Isaku Yamahata | { |
392 | ab431c28 | Isaku Yamahata | int pirq;
|
393 | ab431c28 | Isaku Yamahata | |
394 | ab431c28 | Isaku Yamahata | piix3->pic_levels = 0;
|
395 | ab431c28 | Isaku Yamahata | for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) { |
396 | ab431c28 | Isaku Yamahata | piix3_set_irq_level(piix3, pirq, |
397 | afe3ef1d | Isaku Yamahata | pci_bus_get_irq_level(piix3->dev.bus, pirq)); |
398 | ab431c28 | Isaku Yamahata | } |
399 | ab431c28 | Isaku Yamahata | } |
400 | ab431c28 | Isaku Yamahata | |
401 | ab431c28 | Isaku Yamahata | static void piix3_write_config(PCIDevice *dev, |
402 | ab431c28 | Isaku Yamahata | uint32_t address, uint32_t val, int len)
|
403 | ab431c28 | Isaku Yamahata | { |
404 | ab431c28 | Isaku Yamahata | pci_default_write_config(dev, address, val, len); |
405 | ab431c28 | Isaku Yamahata | if (ranges_overlap(address, len, PIIX_PIRQC, 4)) { |
406 | ab431c28 | Isaku Yamahata | PIIX3State *piix3 = DO_UPCAST(PIIX3State, dev, dev); |
407 | ab431c28 | Isaku Yamahata | int pic_irq;
|
408 | ab431c28 | Isaku Yamahata | piix3_update_irq_levels(piix3); |
409 | ab431c28 | Isaku Yamahata | for (pic_irq = 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { |
410 | ab431c28 | Isaku Yamahata | piix3_set_irq_pic(piix3, pic_irq); |
411 | d2b59317 | pbrook | } |
412 | 502a5395 | pbrook | } |
413 | 502a5395 | pbrook | } |
414 | 502a5395 | pbrook | |
415 | bf09551a | Stefano Stabellini | static void piix3_write_config_xen(PCIDevice *dev, |
416 | bf09551a | Stefano Stabellini | uint32_t address, uint32_t val, int len)
|
417 | bf09551a | Stefano Stabellini | { |
418 | bf09551a | Stefano Stabellini | xen_piix_pci_write_config_client(address, val, len); |
419 | bf09551a | Stefano Stabellini | piix3_write_config(dev, address, val, len); |
420 | bf09551a | Stefano Stabellini | } |
421 | bf09551a | Stefano Stabellini | |
422 | 15a1956a | Gleb Natapov | static void piix3_reset(void *opaque) |
423 | 502a5395 | pbrook | { |
424 | fd37d881 | Juan Quintela | PIIX3State *d = opaque; |
425 | fd37d881 | Juan Quintela | uint8_t *pci_conf = d->dev.config; |
426 | 502a5395 | pbrook | |
427 | 502a5395 | pbrook | pci_conf[0x04] = 0x07; // master, memory and I/O |
428 | 502a5395 | pbrook | pci_conf[0x05] = 0x00; |
429 | 502a5395 | pbrook | pci_conf[0x06] = 0x00; |
430 | 502a5395 | pbrook | pci_conf[0x07] = 0x02; // PCI_status_devsel_medium |
431 | 502a5395 | pbrook | pci_conf[0x4c] = 0x4d; |
432 | 502a5395 | pbrook | pci_conf[0x4e] = 0x03; |
433 | 502a5395 | pbrook | pci_conf[0x4f] = 0x00; |
434 | 502a5395 | pbrook | pci_conf[0x60] = 0x80; |
435 | 477afee3 | aurel32 | pci_conf[0x61] = 0x80; |
436 | 477afee3 | aurel32 | pci_conf[0x62] = 0x80; |
437 | 477afee3 | aurel32 | pci_conf[0x63] = 0x80; |
438 | 502a5395 | pbrook | pci_conf[0x69] = 0x02; |
439 | 502a5395 | pbrook | pci_conf[0x70] = 0x80; |
440 | 502a5395 | pbrook | pci_conf[0x76] = 0x0c; |
441 | 502a5395 | pbrook | pci_conf[0x77] = 0x0c; |
442 | 502a5395 | pbrook | pci_conf[0x78] = 0x02; |
443 | 502a5395 | pbrook | pci_conf[0x79] = 0x00; |
444 | 502a5395 | pbrook | pci_conf[0x80] = 0x00; |
445 | 502a5395 | pbrook | pci_conf[0x82] = 0x00; |
446 | 502a5395 | pbrook | pci_conf[0xa0] = 0x08; |
447 | 502a5395 | pbrook | pci_conf[0xa2] = 0x00; |
448 | 502a5395 | pbrook | pci_conf[0xa3] = 0x00; |
449 | 502a5395 | pbrook | pci_conf[0xa4] = 0x00; |
450 | 502a5395 | pbrook | pci_conf[0xa5] = 0x00; |
451 | 502a5395 | pbrook | pci_conf[0xa6] = 0x00; |
452 | 502a5395 | pbrook | pci_conf[0xa7] = 0x00; |
453 | 502a5395 | pbrook | pci_conf[0xa8] = 0x0f; |
454 | 502a5395 | pbrook | pci_conf[0xaa] = 0x00; |
455 | 502a5395 | pbrook | pci_conf[0xab] = 0x00; |
456 | 502a5395 | pbrook | pci_conf[0xac] = 0x00; |
457 | 502a5395 | pbrook | pci_conf[0xae] = 0x00; |
458 | ab431c28 | Isaku Yamahata | |
459 | ab431c28 | Isaku Yamahata | d->pic_levels = 0;
|
460 | ab431c28 | Isaku Yamahata | } |
461 | ab431c28 | Isaku Yamahata | |
462 | ab431c28 | Isaku Yamahata | static int piix3_post_load(void *opaque, int version_id) |
463 | ab431c28 | Isaku Yamahata | { |
464 | ab431c28 | Isaku Yamahata | PIIX3State *piix3 = opaque; |
465 | ab431c28 | Isaku Yamahata | piix3_update_irq_levels(piix3); |
466 | ab431c28 | Isaku Yamahata | return 0; |
467 | e735b55a | Isaku Yamahata | } |
468 | 15a1956a | Gleb Natapov | |
469 | e735b55a | Isaku Yamahata | static void piix3_pre_save(void *opaque) |
470 | e735b55a | Isaku Yamahata | { |
471 | e735b55a | Isaku Yamahata | int i;
|
472 | e735b55a | Isaku Yamahata | PIIX3State *piix3 = opaque; |
473 | e735b55a | Isaku Yamahata | |
474 | e735b55a | Isaku Yamahata | for (i = 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { |
475 | e735b55a | Isaku Yamahata | piix3->pci_irq_levels_vmstate[i] = |
476 | e735b55a | Isaku Yamahata | pci_bus_get_irq_level(piix3->dev.bus, i); |
477 | e735b55a | Isaku Yamahata | } |
478 | 502a5395 | pbrook | } |
479 | 502a5395 | pbrook | |
480 | d1f171bd | Juan Quintela | static const VMStateDescription vmstate_piix3 = { |
481 | d1f171bd | Juan Quintela | .name = "PIIX3",
|
482 | d1f171bd | Juan Quintela | .version_id = 3,
|
483 | d1f171bd | Juan Quintela | .minimum_version_id = 2,
|
484 | d1f171bd | Juan Quintela | .minimum_version_id_old = 2,
|
485 | ab431c28 | Isaku Yamahata | .post_load = piix3_post_load, |
486 | e735b55a | Isaku Yamahata | .pre_save = piix3_pre_save, |
487 | d1f171bd | Juan Quintela | .fields = (VMStateField []) { |
488 | d1f171bd | Juan Quintela | VMSTATE_PCI_DEVICE(dev, PIIX3State), |
489 | e735b55a | Isaku Yamahata | VMSTATE_INT32_ARRAY_V(pci_irq_levels_vmstate, PIIX3State, |
490 | e735b55a | Isaku Yamahata | PIIX_NUM_PIRQS, 3),
|
491 | d1f171bd | Juan Quintela | VMSTATE_END_OF_LIST() |
492 | da64182c | Juan Quintela | } |
493 | d1f171bd | Juan Quintela | }; |
494 | 1941d19c | bellard | |
495 | fd37d881 | Juan Quintela | static int piix3_initfn(PCIDevice *dev) |
496 | 502a5395 | pbrook | { |
497 | fd37d881 | Juan Quintela | PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev); |
498 | 502a5395 | pbrook | |
499 | c2d0d012 | Richard Henderson | isa_bus_new(&d->dev.qdev, pci_address_space_io(dev)); |
500 | a08d4367 | Jan Kiszka | qemu_register_reset(piix3_reset, d); |
501 | 81a322d4 | Gerd Hoffmann | return 0; |
502 | 502a5395 | pbrook | } |
503 | 5c2b87e3 | ths | |
504 | 40021f08 | Anthony Liguori | static void piix3_class_init(ObjectClass *klass, void *data) |
505 | 40021f08 | Anthony Liguori | { |
506 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
507 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
508 | 40021f08 | Anthony Liguori | |
509 | 39bffca2 | Anthony Liguori | dc->desc = "ISA bridge";
|
510 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_piix3; |
511 | 39bffca2 | Anthony Liguori | dc->no_user = 1,
|
512 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
513 | 40021f08 | Anthony Liguori | k->init = piix3_initfn; |
514 | 40021f08 | Anthony Liguori | k->config_write = piix3_write_config; |
515 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
516 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
|
517 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_ISA; |
518 | 40021f08 | Anthony Liguori | } |
519 | 40021f08 | Anthony Liguori | |
520 | 39bffca2 | Anthony Liguori | static TypeInfo piix3_info = {
|
521 | 39bffca2 | Anthony Liguori | .name = "PIIX3",
|
522 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
523 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PIIX3State),
|
524 | 39bffca2 | Anthony Liguori | .class_init = piix3_class_init, |
525 | e855761c | Anthony Liguori | }; |
526 | e855761c | Anthony Liguori | |
527 | 40021f08 | Anthony Liguori | static void piix3_xen_class_init(ObjectClass *klass, void *data) |
528 | 40021f08 | Anthony Liguori | { |
529 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
530 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
531 | 40021f08 | Anthony Liguori | |
532 | 39bffca2 | Anthony Liguori | dc->desc = "ISA bridge";
|
533 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_piix3; |
534 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
535 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
536 | 40021f08 | Anthony Liguori | k->init = piix3_initfn; |
537 | 40021f08 | Anthony Liguori | k->config_write = piix3_write_config_xen; |
538 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
539 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82371SB_0; // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
|
540 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_ISA; |
541 | e855761c | Anthony Liguori | }; |
542 | e855761c | Anthony Liguori | |
543 | 39bffca2 | Anthony Liguori | static TypeInfo piix3_xen_info = {
|
544 | 39bffca2 | Anthony Liguori | .name = "PIIX3-xen",
|
545 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
546 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PIIX3State),
|
547 | 39bffca2 | Anthony Liguori | .class_init = piix3_xen_class_init, |
548 | 40021f08 | Anthony Liguori | }; |
549 | 40021f08 | Anthony Liguori | |
550 | 40021f08 | Anthony Liguori | static void i440fx_class_init(ObjectClass *klass, void *data) |
551 | 40021f08 | Anthony Liguori | { |
552 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
553 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
554 | 40021f08 | Anthony Liguori | |
555 | 40021f08 | Anthony Liguori | k->no_hotplug = 1;
|
556 | 40021f08 | Anthony Liguori | k->init = i440fx_initfn; |
557 | 40021f08 | Anthony Liguori | k->config_write = i440fx_write_config; |
558 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
559 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82441; |
560 | 40021f08 | Anthony Liguori | k->revision = 0x02;
|
561 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_BRIDGE_HOST; |
562 | 39bffca2 | Anthony Liguori | dc->desc = "Host bridge";
|
563 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
564 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_i440fx; |
565 | 40021f08 | Anthony Liguori | } |
566 | 40021f08 | Anthony Liguori | |
567 | 39bffca2 | Anthony Liguori | static TypeInfo i440fx_info = {
|
568 | 39bffca2 | Anthony Liguori | .name = "i440FX",
|
569 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
570 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(PCII440FXState),
|
571 | 39bffca2 | Anthony Liguori | .class_init = i440fx_class_init, |
572 | 8a14daa5 | Gerd Hoffmann | }; |
573 | 8a14daa5 | Gerd Hoffmann | |
574 | 999e12bb | Anthony Liguori | static void i440fx_pcihost_class_init(ObjectClass *klass, void *data) |
575 | 999e12bb | Anthony Liguori | { |
576 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
577 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
578 | 999e12bb | Anthony Liguori | |
579 | 999e12bb | Anthony Liguori | k->init = i440fx_pcihost_initfn; |
580 | 39bffca2 | Anthony Liguori | dc->fw_name = "pci";
|
581 | 39bffca2 | Anthony Liguori | dc->no_user = 1;
|
582 | 999e12bb | Anthony Liguori | } |
583 | 999e12bb | Anthony Liguori | |
584 | 39bffca2 | Anthony Liguori | static TypeInfo i440fx_pcihost_info = {
|
585 | 39bffca2 | Anthony Liguori | .name = "i440FX-pcihost",
|
586 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
587 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(I440FXState),
|
588 | 39bffca2 | Anthony Liguori | .class_init = i440fx_pcihost_class_init, |
589 | 8a14daa5 | Gerd Hoffmann | }; |
590 | 8a14daa5 | Gerd Hoffmann | |
591 | 83f7d43a | Andreas Färber | static void i440fx_register_types(void) |
592 | 8a14daa5 | Gerd Hoffmann | { |
593 | 39bffca2 | Anthony Liguori | type_register_static(&i440fx_info); |
594 | 39bffca2 | Anthony Liguori | type_register_static(&piix3_info); |
595 | 39bffca2 | Anthony Liguori | type_register_static(&piix3_xen_info); |
596 | 39bffca2 | Anthony Liguori | type_register_static(&i440fx_pcihost_info); |
597 | 8a14daa5 | Gerd Hoffmann | } |
598 | 83f7d43a | Andreas Färber | |
599 | 83f7d43a | Andreas Färber | type_init(i440fx_register_types) |