Revision 5703c174
b/hw/cuda.c | ||
---|---|---|
131 | 131 |
|
132 | 132 |
CUDATimer timers[2]; |
133 | 133 |
|
134 |
uint32_t tick_offset; |
|
135 |
|
|
134 | 136 |
uint8_t last_b; /* last value of B register */ |
135 | 137 |
uint8_t last_acr; /* last value of B register */ |
136 | 138 |
|
... | ... | |
510 | 512 |
const uint8_t *data, int len) |
511 | 513 |
{ |
512 | 514 |
uint8_t obuf[16]; |
513 |
int ti, autopoll; |
|
515 |
int autopoll; |
|
516 |
uint32_t ti; |
|
514 | 517 |
|
515 | 518 |
switch(data[0]) { |
516 | 519 |
case CUDA_AUTOPOLL: |
... | ... | |
529 | 532 |
obuf[1] = data[1]; |
530 | 533 |
cuda_send_packet_to_host(s, obuf, 2); |
531 | 534 |
break; |
532 |
case CUDA_GET_TIME: |
|
533 | 535 |
case CUDA_SET_TIME: |
534 |
/* XXX: add time support ? */ |
|
535 |
ti = time(NULL) + RTC_OFFSET; |
|
536 |
ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) + (((uint32_t)data[3]) << 8) + data[4]; |
|
537 |
s->tick_offset = ti - (qemu_get_clock(vm_clock) / ticks_per_sec); |
|
538 |
obuf[0] = CUDA_PACKET; |
|
539 |
obuf[1] = 0; |
|
540 |
obuf[2] = 0; |
|
541 |
cuda_send_packet_to_host(s, obuf, 3); |
|
542 |
break; |
|
543 |
case CUDA_GET_TIME: |
|
544 |
ti = s->tick_offset + (qemu_get_clock(vm_clock) / ticks_per_sec); |
|
536 | 545 |
obuf[0] = CUDA_PACKET; |
537 | 546 |
obuf[1] = 0; |
538 | 547 |
obuf[2] = 0; |
... | ... | |
663 | 672 |
qemu_put_ubyte(f, s->autopoll); |
664 | 673 |
qemu_put_buffer(f, s->data_in, sizeof(s->data_in)); |
665 | 674 |
qemu_put_buffer(f, s->data_out, sizeof(s->data_out)); |
675 |
qemu_put_be32s(f, &s->tick_offset); |
|
666 | 676 |
cuda_save_timer(f, &s->timers[0]); |
667 | 677 |
cuda_save_timer(f, &s->timers[1]); |
668 | 678 |
} |
... | ... | |
700 | 710 |
s->autopoll = qemu_get_ubyte(f); |
701 | 711 |
qemu_get_buffer(f, s->data_in, sizeof(s->data_in)); |
702 | 712 |
qemu_get_buffer(f, s->data_out, sizeof(s->data_out)); |
713 |
qemu_get_be32s(f, &s->tick_offset); |
|
703 | 714 |
cuda_load_timer(f, &s->timers[0]); |
704 | 715 |
cuda_load_timer(f, &s->timers[1]); |
705 | 716 |
|
... | ... | |
735 | 746 |
|
736 | 747 |
void cuda_init (int *cuda_mem_index, qemu_irq irq) |
737 | 748 |
{ |
749 |
struct tm tm; |
|
738 | 750 |
CUDAState *s = &cuda_state; |
739 | 751 |
|
740 | 752 |
s->irq = irq; |
... | ... | |
744 | 756 |
|
745 | 757 |
s->timers[1].index = 1; |
746 | 758 |
|
759 |
qemu_get_timedate(&tm, RTC_OFFSET); |
|
760 |
s->tick_offset = mktimegm(&tm); |
|
761 |
|
|
747 | 762 |
s->adb_poll_timer = qemu_new_timer(vm_clock, cuda_adb_poll, s); |
748 | 763 |
*cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s); |
749 | 764 |
register_savevm("cuda", -1, 1, cuda_save, cuda_load, s); |
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